CN112732338B - Method and device for expanding addressing range, storage medium and electronic equipment - Google Patents
Method and device for expanding addressing range, storage medium and electronic equipment Download PDFInfo
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- CN112732338B CN112732338B CN202110358756.3A CN202110358756A CN112732338B CN 112732338 B CN112732338 B CN 112732338B CN 202110358756 A CN202110358756 A CN 202110358756A CN 112732338 B CN112732338 B CN 112732338B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/3013—Organisation of register space, e.g. banked or distributed register file according to data content, e.g. floating-point registers, address registers
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/3012—Organisation of register space, e.g. banked or distributed register file
- G06F9/30138—Extension of register space, e.g. register cache
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Abstract
An address range extension method and apparatus, a storage medium and an electronic device, wherein the address range extension method includes: acquiring a preset number of reserved registers; storing the addressing base address in a preset number of reserved registers; the addressing base address is obtained from the preset number of reserved registers storing the addressing base address for addressing, the addressing range of the sdio protocol can be greatly expanded, the coprocessor can completely get rid of cpu, the driving is completely realized at the host end without firmware, the driving complexity is reduced, the chip structure is simple and clear, and the sdio protocol is compatible with the standard sdio protocol.
Description
Technical Field
The present invention relates to the field of data transmission, and in particular, to an addressing range extension method and apparatus, a storage medium, and an electronic device.
Background
Under the standard of the existing sdio protocol, a coprocessor can only access 0-128KB of memory space, if the sdio slave supports CSA, each function can only be extended to 16MB of address space at most for addressing, if the coprocessor chip has no cpu, the coprocessor chip can not address in large scale by the sdio only depending on the host.
Disclosure of Invention
Objects of the invention
The invention aims to provide an addressing range expanding method and device, a storage medium and electronic equipment, which can effectively expand an addressing range and improve addressing efficiency based on an ASIC circuit.
(II) technical scheme
To solve the above problem, a first aspect of the present invention provides an address range extension method, including: acquiring a preset number of reserved registers; storing the addressing base address in a preset number of reserved registers; and acquiring the addressing base address from the preset number of reserved registers in which the addressing base address is stored for addressing.
Optionally, the obtaining a preset number of reserved registers includes: acquiring the storage width of a reserved register; and obtaining a preset number of reserved registers based on the width of the addressing base address and the storage width of the reserved registers.
Optionally, the preset number is at least two.
Optionally, the storing the addressing base address in a preset number of reserved registers includes: the cmd52 command based on the sdio protocol stores the addressed base address in a preset number of reserved registers.
Optionally, the obtaining an addressing base address from the preset number of reserved registers in which the addressing base address is stored to perform addressing includes: and acquiring the addressing base address from the preset number of reserved registers storing the addressing base address based on the cmd53 command of the sdio protocol for data transmission.
Optionally, the cmd53 based on the sdio protocol instructs to obtain the addressing base address from the preset number of reserved registers storing the addressing base address for data transmission, including: the portion of the get addressed base address in the cmd53 command is modified to read from the predetermined number of reserved registers that hold the addressed base address.
Optionally, the obtaining a preset number of reserved registers includes: the cmd53 is fetched in the CIA register for a preset number of FBR registers that the command may transfer.
A second aspect of the present invention provides an address range expansion apparatus comprising: the acquisition module is used for acquiring the preset number of reserved registers; the storage module is used for storing the addressing base addresses in a preset number of reserved registers; and the transmission module acquires the addressing base address from the preset number of reserved registers in which the addressing base address is stored so as to perform addressing.
A third aspect of the invention provides a storage medium having stored thereon a computer program which, when executed by a processor, implements the address range extension method as provided in the first aspect of the invention.
A fourth aspect of the invention provides an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the method for extending an addressing realm as provided in the first aspect of the invention when executing the program.
(III) advantageous effects
The technical scheme of the invention has the following beneficial technical effects:
the invention obtains the preset number of the reserved registers; storing the addressing base address in a preset number of reserved registers; the addressing base address is obtained from the preset number of reserved registers in which the addressing base address is stored for addressing, so that the addressing range of the sdio protocol can be greatly expanded, the coprocessor can completely get rid of the cpu, the driving is completely realized at the host end, the driving complexity is reduced, the chip structure is simple and clear, and the sdio protocol is compatible with the standard sdio protocol.
Drawings
FIG. 1 is a flow chart of an address range expansion method according to a first embodiment of the present invention;
fig. 2 is a schematic structural diagram of an address range extension apparatus according to a second embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to the accompanying drawings in conjunction with the following detailed description. It should be understood that the description is intended to be exemplary only, and is not intended to limit the scope of the present invention. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present invention.
In the prior art, because the slave base address range of the sdio is limited, part of data is generally moved to the sdio slave base address space, then cpu intervenes to move the part of data away, the sdio master moves part of data into the address range of the sdio slave, and then cpu intervenes to move the data away, and the process is circulated until all data transmission is completed, so that cpu intervenes in the process, which results in a small addressing range and a low speed.
The following first explains the terms of the present invention
The CIA, i.e. common io area, is a general io section, and there are various registers in the section, and the register addresses are designed according to the standard.
The FBR, i.e., function basic registers, is a basic function register with internal addresses 00n0ch-00n0 eh. The FBR register of the invention is: the sdio standard in the FBR register set is reserved for the user-defined register part.
First embodiment
As shown in fig. 1, the present embodiment provides an address range expanding method, including: acquiring a preset number of reserved registers; storing the addressing base address in a preset number of reserved registers; and acquiring the addressing base address from the preset number of reserved registers in which the addressing base address is stored for addressing. The method of the embodiment can greatly expand the addressing range of the sdio protocol, so that the coprocessor can completely get rid of the cpu, the drive is completely realized at the host end, the drive complexity is reduced, the chip structure is simple and clear, and the method is compatible with the standard sdio protocol.
In an alternative embodiment, the host addresses commands and the coprocessor receives the commands for implementing the method.
In an optional embodiment, the obtaining the preset number of reservation registers includes: acquiring the storage width of a reserved register; and obtaining a preset number of reserved registers based on the width of the addressing base address and the storage width of the reserved registers. Optionally, the preset number is at least two.
In an optional embodiment, the storing the addressing base address in a preset number of reserved registers includes: the cmd52 command based on the sdio protocol stores the addressed base address in a preset number of reserved registers. To facilitate subsequent addressing. Specifically, how many reservation registers are needed requires how many times to be handled with cmd52 commands.
In an optional embodiment, the obtaining an addressing base address from the preset number of reserved registers storing the addressing base address for addressing includes: and acquiring the addressing base address from the preset number of reserved registers storing the addressing base address based on the cmd53 command of the sdio protocol for data transmission.
In an optional embodiment, the sdio protocol-based cmd53 command obtaining an addressing base address from the preset number of reserved registers storing the addressing base address for data transmission includes: the portion of the get addressed base address in the cmd53 command is modified to read from the predetermined number of reserved registers that hold the addressed base address.
In an optional embodiment, the obtaining the preset number of reservation registers includes: the cmd53 is fetched in the CIA register for a preset number of FBR registers that the command may transfer. Wherein the FBR register is the subordinate memory of the CIA register.
In one implementation, the requirement is to extend the addressing range to 4GB, where 32 bits are required to address the base address, and if the memory width of the reserved memory is 8 bits, then 4 reserved memories are required, any specific user-defined FBR register is configured using 4 cmd52 commands, the 4 registers form the 32-bit addressing base address, and then the cmd53 command is used to carry data, so that the addressing range of the cmd53 command can be extended to 4 GB.
In one embodiment, in the previous embodiment, if the storage width of the reserved memory is 16 bits, 2 reserved memories are needed, any specific user-defined FBR register is configured by using 2 times of cmd52 commands, the 2 registers form a 32-bit addressing base address, and then data is carried by using the cmd53 command, so that the addressing range of the cmd53 command can be extended to 4 GB.
Second embodiment
As shown in fig. 2, a second embodiment of the present invention provides an address range expansion apparatus, including: the acquisition module is used for acquiring the preset number of reserved registers; the storage module is used for storing the addressing base addresses in a preset number of reserved registers; and the transmission module acquires the addressing base address from the preset number of reserved registers in which the addressing base address is stored so as to perform addressing. The addressing range expanding device of the embodiment can greatly expand the addressing range of the sdio protocol, so that the coprocessor can completely get rid of the cpu, the driving is completely realized at the host end, the driving complexity is reduced, the chip structure is simple and clear, and the device is compatible with the standard sdio protocol.
In an alternative embodiment, the host addresses commands and the coprocessor receives the commands for implementing the method.
In an optional embodiment, the obtaining module includes: a register storage width obtaining unit, configured to obtain a reserved register storage width; and the register quantity obtaining unit is used for reserving the register storage width based on the width of the addressing base address to obtain the preset quantity of reserved registers.
In an optional embodiment, the storage module includes: and the storage unit is used for storing the addressing base address in a preset number of reserved registers based on the cmd52 command of the sdio protocol so as to facilitate subsequent addressing.
In an optional embodiment, the transmission module includes: and the transmission unit is used for acquiring the addressing base address from the preset number of reserved registers in which the addressing base address is stored based on the cmd53 command of the sdio protocol so as to perform data transmission.
In an optional embodiment, the transmission unit includes: and the cmd53 command transmission unit is used for modifying the acquisition addressing base address part in the cmd53 command to read from the preset number of reserved registers storing the addressing base address.
In an optional embodiment, the obtaining module includes: and the register acquisition unit is used for acquiring the preset number of FBR registers which can be transmitted by the cmd53 command in the CIA register. Wherein the FBR register is the subordinate memory of the CIA register.
The same parts of this embodiment as those of the first embodiment will not be described in detail.
Third embodiment
A third embodiment of the present invention provides a storage medium having a computer program stored thereon, which when executed by a processor implements the address range extension method as provided by the first embodiment of the present invention. The same parts of this embodiment as those of the first embodiment will not be described in detail.
Fourth embodiment
A fourth embodiment of the present invention provides an electronic device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the method for extending an addressing range according to the first embodiment of the present invention. The same parts of this embodiment as those of the first embodiment will not be described in detail.
It is to be understood that the above-described embodiments of the present invention are merely illustrative of or explaining the principles of the invention and are not to be construed as limiting the invention. Therefore, any modification, equivalent replacement, improvement and the like made without departing from the spirit and scope of the present invention should be included in the protection scope of the present invention. Further, it is intended that the appended claims cover all such variations and modifications as fall within the scope and boundaries of the appended claims or the equivalents of such scope and boundaries.
Claims (7)
1. An address range expanding method is characterized in that after a coprocessor receives an address command under a host, the following steps are carried out, including:
acquiring a preset number of reserved registers;
storing the addressing base address in a preset number of reserved registers;
acquiring the addressing base address from the preset number of reserved registers in which the addressing base address is stored to address;
the acquiring of the preset number of the reserved registers includes:
acquiring the storage width of a reserved register;
obtaining a preset number of reserved registers based on the width of the addressing base address and the storage width of the reserved registers;
the step of storing the addressing base address in a preset number of reserved registers comprises the following steps:
storing the addressing base address in a preset number of reserved registers based on the cmd52 command of the sdio protocol;
the obtaining an addressing base address from the preset number of reserved registers in which the addressing base address is stored to perform addressing includes:
and acquiring the addressing base address from the preset number of reserved registers storing the addressing base address based on the cmd53 command of the sdio protocol for data transmission.
2. The method according to claim 1, wherein the predetermined number is at least two.
3. The addressing range expansion method of claim 1, wherein the sdio protocol-based cmd53 command obtaining an addressing base address from the preset number of reserved registers storing the addressing base address for data transmission comprises:
the portion of the get addressed base address in the cmd53 command is modified to read from the predetermined number of reserved registers that hold the addressed base address.
4. The address range extension method of claim 1, wherein the obtaining a preset number of reserved registers comprises:
the cmd53 is fetched in the CIA register for a preset number of FBR registers that the command may transfer.
5. An addressing range expanding device, characterized in that, after receiving an addressing command from a host, a coprocessor is used for addressing by the following devices, comprising:
the acquisition module is used for acquiring the preset number of reserved registers;
the storage module is used for storing the addressing base addresses in a preset number of reserved registers;
the transmission module acquires the addressing base address from the preset number of reserved registers in which the addressing base address is stored so as to carry out addressing;
the acquisition module includes: a register storage width obtaining unit, configured to obtain a reserved register storage width; a register quantity obtaining unit, configured to reserve a register storage width based on the width of the addressing base address to obtain a preset quantity of reserved registers;
the memory module includes: the storage unit is used for storing the addressing base address in a preset number of reserved registers based on the cmd52 command of the sdio protocol so as to facilitate subsequent addressing;
the transmission module includes: a transmission unit, configured to obtain the addressing base address from the preset number of reserved registers in which the addressing base address is stored based on a cmd53 command of an sdio protocol to perform data transmission.
6. A storage medium, characterized in that the storage medium has stored thereon a computer program which, when being executed by a processor, carries out the address range expansion method according to any one of claims 1 to 4.
7. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the method of address range extension according to any of claims 1-4 when executing the program.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102262595A (en) * | 2011-07-29 | 2011-11-30 | 航天恒星科技有限公司 | Extended addressing method for microprocessor |
| CN104424033A (en) * | 2013-09-02 | 2015-03-18 | 联想(北京)有限公司 | Electronic device and data processing method |
| CN104820574A (en) * | 2015-04-23 | 2015-08-05 | 华为技术有限公司 | Method for accessing indirect addressing register and electronic equipment |
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| JP5040306B2 (en) * | 2006-12-28 | 2012-10-03 | 富士通株式会社 | Storage control device and storage control method |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102262595A (en) * | 2011-07-29 | 2011-11-30 | 航天恒星科技有限公司 | Extended addressing method for microprocessor |
| CN104424033A (en) * | 2013-09-02 | 2015-03-18 | 联想(北京)有限公司 | Electronic device and data processing method |
| CN104820574A (en) * | 2015-04-23 | 2015-08-05 | 华为技术有限公司 | Method for accessing indirect addressing register and electronic equipment |
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