CN112636730A - Nanosecond baseband pulse modulation signal generation device based on high-speed DAC realizes - Google Patents

Nanosecond baseband pulse modulation signal generation device based on high-speed DAC realizes Download PDF

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Publication number
CN112636730A
CN112636730A CN202011507431.9A CN202011507431A CN112636730A CN 112636730 A CN112636730 A CN 112636730A CN 202011507431 A CN202011507431 A CN 202011507431A CN 112636730 A CN112636730 A CN 112636730A
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electrically connected
pulse modulation
dac
signal
unit
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廖海黔
姚金安
高峯
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Guizhou Aerospace Institute of Measuring and Testing Technology
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Guizhou Aerospace Institute of Measuring and Testing Technology
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K7/00Modulating pulses with a continuously-variable modulating signal
    • H03K7/08Duration or width modulation ; Duty cycle modulation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66Digital/analogue converters

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  • Theoretical Computer Science (AREA)
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Abstract

The invention discloses a nanosecond baseband pulse modulation signal generating device based on a high-speed DAC, which comprises: the waveform generation unit is used for generating simulation waveform data; the FPGA control unit is in communication connection with the waveform generation unit; the DAC conversion unit is electrically connected with the FPGA control unit; in a working state, the simulation waveform data generated by the waveform generation unit is cached in the RAM of the FPGA control unit, the period and the length of the simulation waveform data in the RAM are extracted by the DAC conversion unit according to a preset sampling rate, and analog-to-digital conversion is carried out, so that pulse modulation signals with different pulse widths can be obtained. According to the invention, the RAM of the FPGA is adopted for caching data, and the data is extracted according to the DAC sampling rate, so that the generation of nanosecond-level pulse modulation signal data with variable pulse width can be realized; the pulse modulation signal can be generated by performing analog-to-digital conversion on the pulse modulation signal data by adopting a high-speed DAC chip.

Description

Nanosecond baseband pulse modulation signal generation device based on high-speed DAC realizes
Technical Field
The invention relates to a nanosecond baseband pulse modulation signal generation device based on a high-speed DAC (digital-to-analog converter), and belongs to the technical field of pulse modulation sources.
Background
The pulse modulation source is an important signal source device for radar systems, electronic countermeasure, microwave communication transceiver systems, particle accelerators, electromagnetic environment effect research and the like. Where pulse width is the core indicator of the pulse modulated signal. At present, the pulse modulation source design is mainly realized by adopting modes such as microwave switching, mixing modulation and the like.
The microwave switch mode mainly utilizes the turn-off characteristic of the microwave switch to realize the generation of pulse modulated waveforms. However, since the switching time of a microwave switch is usually about ten and several nanoseconds and the isolation is not large, switching on and off of a continuous wave signal can be realized by switching on and off the microwave switch through a time domain pulse signal, but the switching on and off of a pulse modulation signal realized by the microwave switch is low, and the pulse width and the rising/falling edge time of the pulse width of ten and several nanoseconds cannot be realized.
The frequency mixing modulation mode is mainly based on a microwave switch, and in order to further improve the on-off ratio of a pulse modulation signal to generate a premodulation pulse signal, the premodulation pulse signal and a time domain pulse are mixed by a low-frequency mixer, so that the pulse modulation signal with better on-off ratio is realized. However, the better pulse modulation signal can be realized only by performing waveform conditioning on the time domain pulse signal to achieve the optimal mixing level required by mixing, and it is difficult to realize a nanosecond-level variable pulse width baseband pulse modulation signal.
Disclosure of Invention
Based on the above, the invention provides a nanosecond baseband pulse modulation signal generation device based on a high-speed DAC, which can easily realize the generation of nanosecond pulse width pulse modulation signal data by using the advantage of the sampling rate of a high-speed DAC chip, so as to overcome the defects of the prior art.
The technical scheme of the invention is as follows: nanosecond baseband pulse modulation signal generation device based on high-speed DAC realizes, wherein, the device includes:
the waveform generation unit is used for generating simulation waveform data;
the FPGA control unit is in communication connection with the waveform generation unit;
the DAC conversion unit is electrically connected with the FPGA control unit;
in a working state, the simulation waveform data generated by the waveform generation unit is cached in the RAM of the FPGA control unit, the period and the length of the simulation waveform data in the RAM are extracted by the DAC conversion unit according to a preset sampling rate, and analog-to-digital conversion is carried out, so that pulse modulation signals with different pulse widths can be obtained.
In one example, the waveform generating unit is a PC host.
In one example, the FPGA control unit includes:
the communication module is in communication connection with the PC host;
the FPGA control circuit is in signal connection with the communication module;
the signal output end of the clock driver is electrically connected with the signal input end of the FPGA control circuit;
and the signal output end of the reference crystal oscillator is electrically connected with the signal input end of the clock driver.
In one example, the communication module is an RS422 communication chip.
In one example, the DAC conversion unit includes:
the high-speed DAC chip is electrically connected with the FPGA control circuit;
the signal input end of the integrated VCO phase-locked loop chip is electrically connected with the signal output end of the reference crystal oscillator, and the signal output end of the integrated VCO phase-locked loop chip is electrically connected with the signal input end of the high-speed DAC chip;
and the differential conversion chip is electrically connected with the high-speed DAC chip.
In one example, the apparatus further comprises:
and the signal conditioning unit is electrically connected with the DAC conversion unit.
In one example, the signal conditioning unit includes:
the low-pass filter is electrically connected with the differential conversion chip;
a broadband amplifier electrically connected to the low pass filter;
and the numerical control attenuator is electrically connected with the broadband amplifier.
In one example, the FPGA control circuit is electrically connected to the control end of the digitally controlled attenuator.
The invention has the beneficial effects that: in the invention, continuous wave simulation data with different frequencies are generated by the waveform generating unit and loaded into the RAM of the FPGA control unit, and when a modulation signal needs to be generated, the pulse modulation signals with different pulse widths can be realized only by extracting the corresponding waveform data length in the RAM according to the sampling rate of the DAC converting unit and performing analog-to-digital conversion through the high-speed DAC chip. The invention utilizes the advantage of higher sampling rate of the DAC to the maximum extent, can realize that the pulse width of the modulation signal reaches the continuous wave period, and simultaneously, because the sampling rate of the existing high-speed DAC can generally reach the GSPS level rate, the invention can easily realize the nanosecond level pulse width and variable power baseband pulse modulation signal, and provides the core technical basis for the realization of the high-frequency-band pulse modulation signal source.
Drawings
Fig. 1 is a schematic block diagram of the present invention.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein, but rather should be construed as broadly as the present invention is capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
Referring to fig. 1, a nanosecond baseband pulse modulation signal generating device implemented based on a high-speed DAC according to an embodiment of the present invention includes a waveform generating unit, an FPGA control unit, a DAC conversion unit, and a signal conditioning unit.
The waveform generation unit is used for generating simulation waveform data; the FPGA control unit is in communication connection with the waveform generation unit; the DAC conversion unit is electrically connected with the FPGA control unit; in the working state, the simulation waveform data generated by the waveform generating unit is cached in the RAM of the FPGA control unit, the period and the length of the simulation waveform data in the RAM are extracted by the DAC conversion unit according to a preset sampling rate, and analog-to-digital conversion is carried out, so that pulse modulation signals with different pulse widths can be obtained.
In the invention, continuous wave simulation data with different frequencies are generated by the waveform generating unit and loaded into the RAM of the FPGA control unit, and when a modulation signal needs to be generated, the pulse modulation signals with different pulse widths can be realized only by extracting the corresponding waveform data length in the RAM according to the sampling rate of a DAC (high-speed DAC) conversion unit and performing analog-to-digital conversion through the high-speed DAC. The invention utilizes the advantage of high sampling rate of DAC to the utmost extent, can realize that the pulse width of the modulation signal reaches the continuous wave period, and simultaneously, because the sampling rate of the high-speed DAC can generally reach GSPS level rate, the invention can easily realize the pulse modulation signal with nanosecond level pulse width, and even picosecond level pulse width along with the continuous improvement of the sampling rate of the DAC, thereby having wider application scenes.
In the invention, the waveform generating unit is a PC host which is mainly used for generating waveform data and control instructions. In other embodiments, the waveform generation unit may be other waveform generation apparatus.
The FPGA control unit comprises a communication module, an FPGA control circuit, a clock driver and a reference crystal oscillator, wherein the communication module is in communication connection with a PC host, the FPGA control circuit is in signal connection with the communication module, the signal output end of the clock driver is electrically connected with the signal input end of the FPGA control circuit, and the signal output end of the reference crystal oscillator is electrically connected with the signal input end of the clock driver.
Specifically, in the working state, a signal generated by the reference crystal oscillator is output to the FPGA control circuit as a reference clock through the clock driver. The FPGA control circuit can receive simulation waveform data generated by a PC host through the communication module and store the simulation waveform data in the RAM. In this embodiment, the communication module may be an RS422 communication chip.
The DAC conversion unit comprises a high-speed DAC chip, an integrated VCO phase-locked loop chip and a differential conversion chip, wherein the high-speed DAC chip is electrically connected with the FPGA control circuit, a signal input end of the integrated VCO phase-locked loop chip is electrically connected with a signal output end of the reference crystal oscillator, a signal output end of the integrated VCO phase-locked loop chip is electrically connected with a signal input end of the high-speed DAC chip, and the differential conversion chip is electrically connected with the high-speed DAC chip.
Specifically, in an operating state, a signal generated by the reference crystal oscillator is output to the integrated VCO phase-locked loop chip as a reference clock, and the integrated VCO phase-locked loop chip outputs a high-frequency signal as a sampling clock of the high-speed DAC chip, so that the high-speed DAC chip receives simulation waveform data of the FPGA control circuit and performs analog-to-digital conversion through the differential conversion chip.
In the invention, the device also comprises a signal conditioning unit which is electrically connected with the DAC conversion unit. And the signal conditioning unit is used for adjusting the power of the pulse modulation signal output by the DAC conversion unit to obtain a baseband pulse modulation signal with variable power and pulse width.
In the invention, the signal conditioning unit comprises a low-pass filter, a broadband amplifier and a numerical control attenuator, wherein the low-pass filter is electrically connected with the differential conversion chip, the broadband amplifier is electrically connected with the low-pass filter, and the numerical control attenuator is electrically connected with the broadband amplifier.
Specifically, in the working state, the pulse modulation signal output by the differential conversion chip is output to the broadband amplifier through the low-pass filter, and finally the generation of the pulse modulation signal with variable power and pulse width is realized through the numerical control attenuator.
In the invention, the FPGA control circuit is electrically connected with the control end of the numerical control attenuator. Specifically, under the working state, the amplitude control of the pulse modulation signal can be realized through the numerical control attenuator.
The invention realizes the generation process of nanosecond baseband pulse modulation signals as follows: and the reference crystal oscillator signal is output to the FPGA control circuit through the clock driver to be used as a reference clock. The FPGA control circuit receives the simulation continuous wave data generated by the PC host through the RS422 communication chip and buffers the data in the RAM of the FPGA. Meanwhile, a reference crystal oscillator signal is output to the integrated VCO phase-locked loop chip to serve as a reference clock, the integrated VCO phase-locked loop chip outputs a high-frequency signal to serve as a sampling clock of the high-speed DAC chip, the high-speed DAC chip receives pulse modulation signal data of the FPGA control circuit according to the DAC sampling rate, and nanosecond-level variable pulse width pulse modulation signals are generated through the differential conversion chip. The pulse modulation signal output by the differential conversion chip is output to a broadband amplifier through a low-pass filter and finally passes through a numerical control attenuator, and finally the generation of the pulse modulation signal with variable power and pulse width is realized.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (8)

1. Nanosecond baseband pulse modulation signal generation device based on high-speed DAC realizes, wherein, the device includes:
the waveform generation unit is used for generating simulation waveform data;
the FPGA control unit is in communication connection with the waveform generation unit;
the DAC conversion unit is electrically connected with the FPGA control unit;
in a working state, the simulation waveform data generated by the waveform generation unit is cached in the RAM of the FPGA control unit, the period and the length of the simulation waveform data in the RAM are extracted by the DAC conversion unit according to a preset sampling rate, and analog-to-digital conversion is carried out, so that pulse modulation signals with different pulse widths can be obtained.
2. The baseband pulse modulated signal generating apparatus according to claim 1, wherein the waveform generating unit is a PC host.
3. The baseband pulse modulation signal generation apparatus according to claim 1, wherein the FPGA control unit comprises:
the communication module is in communication connection with the PC host;
the FPGA control circuit is in signal connection with the communication module;
the signal output end of the clock driver is electrically connected with the signal input end of the FPGA control circuit;
and the signal output end of the reference crystal oscillator is electrically connected with the signal input end of the clock driver.
4. The baseband pulse modulated signal generating apparatus of claim 3, wherein the communication module is an RS422 communication chip.
5. The baseband pulse modulation signal generation apparatus according to claim 3, wherein the DAC conversion unit includes:
the high-speed DAC chip is electrically connected with the FPGA control circuit;
the signal input end of the integrated VCO phase-locked loop chip is electrically connected with the signal output end of the reference crystal oscillator, and the signal output end of the integrated VCO phase-locked loop chip is electrically connected with the signal input end of the high-speed DAC chip;
and the differential conversion chip is electrically connected with the high-speed DAC chip.
6. The baseband pulse modulated signal generating apparatus according to any one of claims 1 to 5, wherein the apparatus further comprises:
and the signal conditioning unit is electrically connected with the DAC conversion unit.
7. The baseband pulse modulated signal generating apparatus according to claim 6, wherein the signal conditioning unit comprises:
the low-pass filter is electrically connected with the differential conversion chip;
a broadband amplifier electrically connected to the low pass filter;
and the numerical control attenuator is electrically connected with the broadband amplifier.
8. The baseband pulse modulation signal generation device according to claim 7, wherein the FPGA control circuit is electrically connected with the control end of the digitally controlled attenuator.
CN202011507431.9A 2020-12-18 2020-12-18 Nanosecond baseband pulse modulation signal generation device based on high-speed DAC realizes Pending CN112636730A (en)

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CN117650427B (en) * 2024-01-30 2024-04-26 苏州密尔光子科技有限公司 Pulse group modulation circuit, laser driving device and laser

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