CN112599435A - Method and structure for monitoring discharge defect of amorphous carbon film - Google Patents
Method and structure for monitoring discharge defect of amorphous carbon film Download PDFInfo
- Publication number
- CN112599435A CN112599435A CN202011421037.3A CN202011421037A CN112599435A CN 112599435 A CN112599435 A CN 112599435A CN 202011421037 A CN202011421037 A CN 202011421037A CN 112599435 A CN112599435 A CN 112599435A
- Authority
- CN
- China
- Prior art keywords
- carbon film
- amorphous carbon
- dielectric layer
- silicon wafer
- defect
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02527—Carbon, e.g. diamond-like carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02592—Microstructure amorphous
Abstract
The invention relates to a method for monitoring discharge defects of an amorphous carbon film, which comprises the following steps of S1: providing a test silicon wafer; s2: growing a dielectric layer on the surface of a test silicon wafer; s3: growing an amorphous carbon film on the dielectric layer; and S4: and scanning the edge of the silicon wafer to monitor the discharge defect. The method is characterized in that a dielectric layer is formed on the surface of a test silicon wafer before an amorphous carbon film is grown, which is equivalent to adding a dielectric layer between the amorphous carbon film and the silicon wafer, and the dielectric layer is equivalent to a flat capacitor, so that the discharge defect can be reproduced, and the defect condition of the amorphous carbon film can be rapidly monitored; meanwhile, the defects can be monitored off line so as to ensure the stability of the passing goods of the machine table, and the cost is low and the speed is high.
Description
Technical Field
The invention relates to a semiconductor integrated circuit manufacturing technology, in particular to a method for monitoring discharge defects of an amorphous carbon film.
Background
In the manufacture of semiconductor integrated circuits, as the line width is smaller, the photolithography cannot be used as a mask only by using a photoresist, and at the moment, an amorphous carbon film (APF) is introduced to be used as the mask, so that the film quality of the amorphous carbon film is more prominent, and the stability and zero defect of the film quality are required to be ensured.
The deposition of amorphous carbon film belongs to CVD process, and its deposition principle is: an amorphous carbon film was formed by cracking gas C2H2 in the presence of Plasma, and the entire silicon wafer was covered with the amorphous carbon film to form a carbon film. The silicon chip is a wafer with a certain thickness, and the edge of the silicon chip is chamfered to form a continuous and smooth side edge. The gas phase reactant in the CVD process flows and infiltrates into the side of the silicon wafer where a deposition reaction occurs to produce an amorphous carbon film, and the amorphous carbon film deposited at the edge of the silicon wafer is not uniform and uncontrolled in thickness. Therefore, the deposited film typically managed by a CVD process ranges from the center of the wafer to a circular area 3 mm from the edge of the wafer. The amorphous carbon film deposited on the 3 mm annular region and the side edge of the silicon wafer may be peeled off in the subsequent photoetching and etching processes and fall into a circuit to become a particle defect, thereby affecting the performance of the device. In order to prevent the amorphous carbon film from depositing on the edge of the silicon wafer, a part called shadow ring is additionally arranged in the cavity of the amorphous carbon film deposition equipment. After the wafer load-in, the shadow ring moves downward from above the wafer along with the upper electrode shadow head, and the shadow ring covers and presses the wafer edge. The amorphous carbon film that should be deposited on the edge of the silicon wafer will be deposited on the shadow ring and will be carried away after the process is finished with the shadow ring removed. It can be seen that the shadow ring functions to prevent the film deposition on the edge of the silicon wafer. The amorphous carbon film deposition process using shadow ring needs to be matched with a subsequent photoetching process, so that the subsequent photoetching glue covers all the amorphous carbon film deposition area, and the particle defect generated in the subsequent photoetching and etching processes can be completely avoided.
However, in the production process, it is possible that when the silicon wafer is formed in the amorphous carbon film cavity, the position of the silicon wafer is shifted, shadow Ring above the silicon wafer cannot uniformly cover the edge of the silicon wafer, so that a plasma field in a place with less coverage is unstable, charges are enriched on the surface of the silicon wafer, a discharge defect is generated, photo focus is inaccurate, a block _ etch is formed at the later stage, the damage is far, and the defect map shown in fig. 1, the defect image shown in fig. 2, and the defect source diagram shown in fig. 3 need to be solved and monitored urgently.
Disclosure of Invention
The invention provides a method for monitoring discharge defects of an amorphous carbon film, which comprises the following steps: s1: providing a test silicon wafer; s2: growing a dielectric layer on the surface of a test silicon wafer; s3: growing an amorphous carbon film on the dielectric layer; and S4: and scanning the edge of the silicon wafer to monitor the discharge defect.
Furthermore, the dielectric layer is an insulating dielectric layer.
Further, the dielectric layer has a thickness of 800-2000 angstroms.
Further, the amorphous carbon film is grown using a CVD process.
Further, the amorphous carbon film is generated by cracking the gas C2H2 under the action of Plasma.
The invention also provides a structure for monitoring the discharge defect of the amorphous carbon film, which comprises the following components: the testing device comprises a testing silicon chip, a dielectric layer and an amorphous carbon film, wherein the dielectric layer is positioned on the testing silicon chip, and the amorphous carbon film is positioned on the dielectric layer.
Furthermore, the dielectric layer is an insulating dielectric layer.
Further, the dielectric layer has a thickness of 800-2000 angstroms.
Further, the amorphous carbon film is grown using a CVD process.
Further, the amorphous carbon film is formed by cracking gas C2H2 under the action of Plasma.
Drawings
FIG. 1 is a schematic diagram of a defect map.
Fig. 2 is a schematic diagram of a defect image.
FIG. 3 is a schematic diagram of a defect source.
FIG. 4 is a flowchart illustrating an exemplary embodiment of monitoring discharge defects in an amorphous carbon film.
FIG. 5a is a schematic diagram of a test silicon wafer.
FIG. 5b is a schematic diagram of a process of monitoring discharge defects of the amorphous carbon film of the test silicon wafer according to an embodiment of the present invention.
FIG. 5c is a schematic diagram of a process of monitoring discharge defects of the amorphous carbon film of the test silicon wafer according to an embodiment of the present invention.
FIG. 6 is an equivalent diagram of the discharge defect structure of the amorphous carbon film of the test silicon wafer.
FIG. 7 is a schematic diagram showing a wafer defect ratio between the method for monitoring discharge defects of an amorphous carbon film according to the present invention and the method for monitoring discharge defects of an amorphous carbon film according to the prior art.
Detailed Description
The technical solutions in the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.
It is to be understood that the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity, and the same reference numerals denote the same elements throughout. It will be understood that when an element or layer is referred to as being "on" …, "adjacent to …," "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to the other elements or layers or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on …," "directly adjacent to …," "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.
Spatially relative terms such as "under …", "under …", "under …"),
"above …", "above", etc., may be used herein for convenience of description to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, then elements or features described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary terms "below …" and "below …" can encompass both an orientation of up and down. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatial descriptors used herein interpreted accordingly.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.
Through research and development of the inventor and multiple experiments, the inventor finds that the discharge defect occurring on the on-line (inline) can not be captured by simply growing the amorphous carbon film on the test silicon wafer, and the charge enriched on the surface of the amorphous carbon film can not form a loop.
In an embodiment of the present invention, a method for monitoring a discharge defect of an amorphous carbon film is provided, please refer to the flowchart of monitoring a discharge defect of an amorphous carbon film shown in fig. 4, the method for monitoring a discharge defect of an amorphous carbon film includes: s1: providing a test silicon wafer; s2: growing a dielectric layer on the surface of a test silicon wafer; s3: growing an amorphous carbon film on the dielectric layer; and S4: and scanning the edge of the silicon wafer to monitor the discharge defect.
Specifically, the method for monitoring the discharge defect of the amorphous carbon film according to an embodiment of the present invention includes:
s1: providing a test silicon wafer;
a test silicon wafer 100 is provided as shown schematically in fig. 5 a.
S2: growing a dielectric layer on the surface of a test silicon wafer;
as shown in FIG. 5b, which is a schematic diagram of one of the processes of monitoring the discharge defects of the amorphous carbon film of the test silicon wafer, a dielectric layer 200 is grown on the surface of the test silicon wafer 100 as shown in FIG. 5 b. In an embodiment of the present invention, the dielectric layer 200 is an insulating dielectric layer.
In one embodiment of the present invention, the dielectric layer 200 has a thickness of 800-2000 angstroms.
S3: growing an amorphous carbon film on the dielectric layer;
as shown in FIG. 5c, an amorphous carbon film 300 is grown on the dielectric layer 200, as shown in FIG. 5 c. In one embodiment of the invention, an amorphous carbon film is grown by a CVD process, and the amorphous carbon film is generated by cracking gas C2H2 under the action of Plasma.
S4: and scanning the edge of the silicon wafer to monitor the discharge defect.
Referring to fig. 6, an equivalent schematic diagram of an amorphous carbon film discharge defect structure of a test silicon wafer is shown, as shown in fig. 6, an amorphous carbon film is equivalent to an electrode, a silicon wafer is equivalent to an electrode, a middle dielectric layer is equivalent to an insulating dielectric layer, and a dielectric layer is formed on the surface of the test silicon wafer before the amorphous carbon film is grown, which is equivalent to adding a dielectric layer between the amorphous carbon film and the silicon wafer, so that an on-line discharge defect can be reproduced, the defect condition of the amorphous carbon film can be rapidly monitored, the stability of a machine during goods running can be ensured, and the defect can be monitored off-line (off line) to ensure the stability of the machine for goods delivery, and the cost is low and the speed is high. Referring to fig. 7, a schematic diagram of a wafer defect ratio between a method for monitoring discharge defects of an amorphous carbon film according to the present invention and a method for monitoring discharge defects of an amorphous carbon film according to the prior art is shown, in which the wafer defect ratio is significantly reduced after the present invention is used, as shown in fig. 7.
In an embodiment of the present invention, there is also provided a structure for monitoring a discharge defect of an amorphous carbon film, as shown in fig. 5c, the structure for monitoring a discharge defect of an amorphous carbon film includes a test silicon wafer 100, a dielectric layer 200 and an amorphous carbon film 300, wherein the dielectric layer 200 is located on the test silicon wafer 100, and the amorphous carbon film 300 is located on the dielectric layer 200.
In an embodiment of the present invention, the dielectric layer 200 is an insulating dielectric layer. In one embodiment of the present invention, the dielectric layer 200 has a thickness of 800-2000 angstroms.
In one embodiment of the invention, an amorphous carbon film is grown by a CVD process, and the amorphous carbon film is generated by cracking gas C2H2 under the action of Plasma.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (10)
1. A method for monitoring discharge defects of an amorphous carbon film, comprising:
s1: providing a test silicon wafer;
s2: growing a dielectric layer on the surface of a test silicon wafer;
s3: growing an amorphous carbon film on the dielectric layer;
s4: and scanning the edge of the silicon wafer to monitor the discharge defect.
2. The method of claim 1, wherein the dielectric layer is an insulating dielectric layer.
3. The method of monitoring discharge defects of an amorphous carbon film according to any of claims 1 or 2, wherein the dielectric layer has a thickness of 800-2000 angstroms.
4. The method of monitoring discharge defects of an amorphous carbon film according to claim 1, wherein the amorphous carbon film is grown using a CVD process.
5. The method of claim 1, wherein the amorphous carbon film is generated by Plasma cracking of gas C2H 2.
6. A structure for monitoring discharge defects of an amorphous carbon film, comprising: the testing device comprises a testing silicon chip, a dielectric layer and an amorphous carbon film, wherein the dielectric layer is positioned on the testing silicon chip, and the amorphous carbon film is positioned on the dielectric layer.
7. The structure of monitoring discharge defects of an amorphous carbon film as claimed in claim 6, wherein the dielectric layer is an insulating dielectric layer.
8. The structure of monitoring discharge defects of an amorphous carbon film as claimed in any of claims 6 or 7, wherein the thickness of the dielectric layer is 800-2000 angstroms.
9. The structure of monitoring discharge defects of an amorphous carbon film as claimed in claim 6, wherein the amorphous carbon film is grown using a CVD process.
10. The structure of monitoring discharge defects of an amorphous carbon film as claimed in claim 6, wherein the amorphous carbon film is generated by cracking of gas C2H2 under Plasma.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011421037.3A CN112599435A (en) | 2020-12-08 | 2020-12-08 | Method and structure for monitoring discharge defect of amorphous carbon film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011421037.3A CN112599435A (en) | 2020-12-08 | 2020-12-08 | Method and structure for monitoring discharge defect of amorphous carbon film |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN112599435A true CN112599435A (en) | 2021-04-02 |
Family
ID=75188747
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011421037.3A Pending CN112599435A (en) | 2020-12-08 | 2020-12-08 | Method and structure for monitoring discharge defect of amorphous carbon film |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112599435A (en) |
Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0513616A (en) * | 1991-10-03 | 1993-01-22 | Kanegafuchi Chem Ind Co Ltd | High thermal conductive insulating substrate and its manufacture |
| CN101097852A (en) * | 2006-06-29 | 2008-01-02 | 海力士半导体有限公司 | Method for fabricating a cylindrical capacitor using amorphous carbon-based layer |
| KR100863521B1 (en) * | 2007-06-28 | 2008-10-15 | 주식회사 하이닉스반도체 | Method for fabricating capacitor with cylinder storage node |
| US20080286521A1 (en) * | 2005-06-13 | 2008-11-20 | Dietmar C Eberlein | System and Method for the Manipulation, Classification Sorting, Purification, Placement, and Alignment of Nano Fibers Using Electrostatic Forces And Electrographic Techniques |
| CN102082079A (en) * | 2004-04-12 | 2011-06-01 | 三星电子株式会社 | Method of forming capacitor and dielectric layer thereof and formed capacitor |
| CN102646702A (en) * | 2011-02-16 | 2012-08-22 | 富士通株式会社 | Semiconductor device, and method of manufacturing semiconductor device |
| CN102890094A (en) * | 2011-07-19 | 2013-01-23 | 中芯国际集成电路制造(上海)有限公司 | Method for off-line detection of non-patterning surface defects |
| CN103904000A (en) * | 2014-03-20 | 2014-07-02 | 上海华力微电子有限公司 | Method for testing polycrystalline silicon bottom bridging defect through capacitor contrast test structure |
| CN104176721A (en) * | 2013-05-22 | 2014-12-03 | 江苏捷峰高科能源材料股份有限公司 | Carbon composite material, and preparation method and application thereof |
| CN105424768A (en) * | 2015-11-30 | 2016-03-23 | 中国电子科技集团公司第四十八研究所 | Dielectric material for hydrogen sensor core, hydrogen sensor core and preparation method and application thereof |
| CN105977357A (en) * | 2016-05-17 | 2016-09-28 | 西安交通大学 | Insulation dielectric film solid-state light-emitting device light emission enhancing method |
| US20180315637A1 (en) * | 2015-11-20 | 2018-11-01 | Rfhic Corporation | Mounting of semiconductor-on-diamond wafers for device processing |
| CN109524300A (en) * | 2018-11-28 | 2019-03-26 | 上海华力微电子有限公司 | A kind of lithographic method and semiconductor devices |
-
2020
- 2020-12-08 CN CN202011421037.3A patent/CN112599435A/en active Pending
Patent Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0513616A (en) * | 1991-10-03 | 1993-01-22 | Kanegafuchi Chem Ind Co Ltd | High thermal conductive insulating substrate and its manufacture |
| CN102082079A (en) * | 2004-04-12 | 2011-06-01 | 三星电子株式会社 | Method of forming capacitor and dielectric layer thereof and formed capacitor |
| US20080286521A1 (en) * | 2005-06-13 | 2008-11-20 | Dietmar C Eberlein | System and Method for the Manipulation, Classification Sorting, Purification, Placement, and Alignment of Nano Fibers Using Electrostatic Forces And Electrographic Techniques |
| CN101097852A (en) * | 2006-06-29 | 2008-01-02 | 海力士半导体有限公司 | Method for fabricating a cylindrical capacitor using amorphous carbon-based layer |
| KR100863521B1 (en) * | 2007-06-28 | 2008-10-15 | 주식회사 하이닉스반도체 | Method for fabricating capacitor with cylinder storage node |
| CN102646702A (en) * | 2011-02-16 | 2012-08-22 | 富士通株式会社 | Semiconductor device, and method of manufacturing semiconductor device |
| CN102890094A (en) * | 2011-07-19 | 2013-01-23 | 中芯国际集成电路制造(上海)有限公司 | Method for off-line detection of non-patterning surface defects |
| CN104176721A (en) * | 2013-05-22 | 2014-12-03 | 江苏捷峰高科能源材料股份有限公司 | Carbon composite material, and preparation method and application thereof |
| CN103904000A (en) * | 2014-03-20 | 2014-07-02 | 上海华力微电子有限公司 | Method for testing polycrystalline silicon bottom bridging defect through capacitor contrast test structure |
| US20180315637A1 (en) * | 2015-11-20 | 2018-11-01 | Rfhic Corporation | Mounting of semiconductor-on-diamond wafers for device processing |
| CN105424768A (en) * | 2015-11-30 | 2016-03-23 | 中国电子科技集团公司第四十八研究所 | Dielectric material for hydrogen sensor core, hydrogen sensor core and preparation method and application thereof |
| CN105977357A (en) * | 2016-05-17 | 2016-09-28 | 西安交通大学 | Insulation dielectric film solid-state light-emitting device light emission enhancing method |
| CN109524300A (en) * | 2018-11-28 | 2019-03-26 | 上海华力微电子有限公司 | A kind of lithographic method and semiconductor devices |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7432209B2 (en) | Plasma dielectric etch process including in-situ backside polymer removal for low-dielectric constant material | |
| KR101299661B1 (en) | Method for resist strip in presence of regular low k and/or porous low k dielectric materials | |
| IL186629A (en) | Process for forming a well visible non-chromate conversion coating for magnesium and magnesium alloys | |
| US20040072426A1 (en) | Process chamber for manufacturing a smiconductor device | |
| US20060163202A1 (en) | Plasma etching method | |
| CN108565216B (en) | Reworking method of dual damascene through hole process | |
| US7319073B2 (en) | Method of reducing silicon damage around laser marking region of wafers in STI CMP process | |
| US7192848B2 (en) | Method for manufacturing mesa semiconductor device | |
| US6057694A (en) | Testing method including the removal of insulative films for electrical contact and apparatus therefor | |
| CN112599435A (en) | Method and structure for monitoring discharge defect of amorphous carbon film | |
| US6239035B1 (en) | Semiconductor wafer fabrication | |
| CN110571166B (en) | Crystal edge etching method and semiconductor device manufacturing method | |
| JP2000294543A (en) | Etching method and apparatus thereof, and manufacture of semiconductor device | |
| US8222143B2 (en) | Reworking method for integrated circuit devices | |
| US20200211847A1 (en) | Method of fabricating semiconductor device | |
| CN108227390B (en) | Image quality detection method of photoetching machine | |
| US8263495B2 (en) | Release accumulative charges by tuning ESC voltages in via-etchers | |
| CN116133495B (en) | Preparation method of carbon-based sensing chip | |
| CN117153672B (en) | Dielectric layer and manufacturing method thereof | |
| US11289366B1 (en) | Method of manufacturing semiconductor structure | |
| JPH05109702A (en) | Manufacture of semiconductor device | |
| KR100831576B1 (en) | Method for fabricating a semiconductor device | |
| Chen et al. | Optimized Wafer Edge Condition in Lithographic Process For Peeling Defect Reduction | |
| TW202240660A (en) | Substrate processing method and substrate processing device | |
| US8389374B1 (en) | Method for producing a microfabricated in-plane radio frequency (RF) capacitor |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |