CN112579502A - Interface conversion circuit based on multi-path PCI bus - Google Patents
Interface conversion circuit based on multi-path PCI bus Download PDFInfo
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- CN112579502A CN112579502A CN202011542770.0A CN202011542770A CN112579502A CN 112579502 A CN112579502 A CN 112579502A CN 202011542770 A CN202011542770 A CN 202011542770A CN 112579502 A CN112579502 A CN 112579502A
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- pci bus
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- 238000006243 chemical reaction Methods 0.000 title claims abstract description 31
- 101100309714 Arabidopsis thaliana SD16 gene Proteins 0.000 claims description 6
- 101100309716 Arabidopsis thaliana SD18 gene Proteins 0.000 claims description 6
- 101100309717 Arabidopsis thaliana SD22 gene Proteins 0.000 claims description 6
- 101150104372 SD17 gene Proteins 0.000 claims description 6
- 101100309718 Arabidopsis thaliana SD25 gene Proteins 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
- G06F13/4081—Live connection to bus, e.g. hot-plugging
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0024—Peripheral component interconnect [PCI]
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Mathematical Physics (AREA)
- Bus Control (AREA)
Abstract
The invention relates to an interface conversion circuit based on a multi-path PCI bus. The invention comprises a processor PCI bus, a multi-path PCI bus interface conversion unit and a multi-path PCI slave bus, wherein the processor PCI bus is connected with the multi-path PCI slave bus through the multi-path PCI bus interface conversion unit. The invention realizes the distribution of the multi-path PCI bus interface conversion unit and the multi-path PCI slave bus interface IDSEL and the communication of the cascade expansion of the multi-path PCI bus slave equipment.
Description
Technical Field
The invention relates to the fields of aviation, navigation, industrial control and the like, in particular to an interface conversion circuit based on a multi-path PCI bus.
Background
The circuit for controlling the multi-path PCI bus slave equipment by a single processor is widely applied to the fields of industrial control and the like, the system processor PCI interface is limited and influenced, direct communication between the single processor PCI interface and the multi-path PCI bus interface slave equipment cannot be realized, the interface load capacity is limited, the commonly used single processor PCI bus and the multi-path PCI bus slave equipment can be kept one-to-one as much as possible, or the communication between the single processor PCI bus and the multi-path PCI bus slave equipment is realized by controlling and distributing address space, FPGA and other circuit systems through software, so that the cost and the labor are increased.
Disclosure of Invention
The invention provides an interface conversion circuit based on a multi-path PCI bus for solving the technical problems in the background technology, and realizes the distribution of a multi-path PCI bus interface conversion unit and a multi-path PCI slave bus interface IDSEL and the communication of cascade expansion of multi-path PCI bus slave equipment.
The technical solution of the invention is as follows: the solution of the invention is: the invention relates to an interface conversion circuit based on a multi-path PCI bus, which is characterized in that: the conversion circuit comprises a processor PCI bus, a multi-path PCI bus interface conversion unit and a multi-path PCI slave bus, wherein the processor PCI bus is connected with the multi-path PCI slave bus through the multi-path PCI bus interface conversion unit.
Preferably, the multi-path PCI bus interface conversion unit adopts an SM2050 chip.
Preferably, the SM2050 chip comprises ports SD16, SD17, SD18, SD19, SD20, SD21, SD22, SD23, SD24, SD25, SD26 and SD27 of the slave end of the chip, and an interface IDSEL _ PCI1 of the multi-path PCI slave bus is linked with any one of SD16, SD20 and SD24 of the slave end of the SM2050 bridge chip; the interface IDSEL _ PCI2 of the multi-path PCI slave bus is linked with any signal of the ports SD17, SD21 and SD 25; the interface IDSEL _ PCI3 of the multi-path PCI slave bus is linked with any signal of the ports SD18, SD22 and SD 26; the interface IDSEL _ PCI4 of the multi-path PCI slave bus is linked with any signal of the ports SD19, SD23 and SD 27.
Preferably, the SM2050 chip is connected to a power supply.
The interface conversion circuit based on the multi-path PCI bus is provided with a multi-path PCI bus interface conversion unit between a processor PCI bus and a multi-path PCI slave bus, realizes the data conversion between the processor PCI bus and the multi-path PCI slave bus by utilizing the characteristic that the multi-path PCI bus interface conversion unit is provided with a multi-path PCI interface, simultaneously selects an SM2050 chip as a core chip of the multi-path PCI bus interface conversion unit, realizes the distribution of the multi-path PCI slave bus interface IDSEL of the multi-path PCI bus interface conversion unit, the communication of the cascade expansion of multi-path PCI bus slave equipment, and a related external loading configuration circuit.
The invention can be used as a core device of a one-to-many PCI bus and can also be used as a PCI bus slave device extension for realizing secondary cascade connection of slave devices.
Drawings
FIG. 1 is a block circuit diagram of the present invention;
fig. 2 is a circuit diagram of a SM2050 chip of the present invention.
Detailed Description
The technical solution of the present invention is further described in detail with reference to the accompanying drawings and specific embodiments.
Referring to fig. 1, the architecture of the embodiment of the present invention includes a processor PCI bus, a multi-PCI bus interface conversion unit, and a multi-PCI slave bus, where the multi-PCI bus interface conversion unit is used for data conversion between the processor PCI bus and the multi-PCI slave bus. In this example, the multi-path PCI bus interface conversion unit uses SM2050 chip, and the SM2050 chip is connected with a power supply.
In practical application, the master device is connected with the processor PCI bus, the multi-path PCI slave bus is connected with the slave device, and the master device and the slave device realize communication through the processor PCI bus, the multi-path PCI bus interface conversion unit and the multi-path PCI slave bus.
Referring to fig. 2, the SM2050 chip includes ports SD16, SD17, SD18, SD19, SD20, SD21, SD22, SD23, SD24, SD25, SD26 and SD27 of the slave side of the chip, and an interface IDSEL _ PCI1 of the multi-path PCI slave bus is linked with any one of SD16, SD20 and SD24 of the slave side of the SM2050 bridge chip; the interface IDSEL _ PCI2 of the multi-path PCI slave bus is linked with any signal of the ports SD17, SD21 and SD 25; the interface IDSEL _ PCI3 of the multi-path PCI slave bus is linked with any signal of the ports SD18, SD22 and SD 26; the interface IDSEL _ PCI4 of the multi-path PCI slave bus is linked with any signal of the ports SD19, SD23 and SD 27. The corresponding relation of IDSEL to SD data lines cannot be confused, otherwise, the slave device cannot be swept, and the master device and the slave device fail to communicate.
The invention provides an interface conversion circuit based on a multi-path PCI bus, which can support the communication of master equipment of a PCI bus interface of a 32-bit processor; and a slave device of the multi-path 32-bit PCI slave bus interface; meanwhile, the SM2050 is configured to support a hot plug mode (SM [0:1] signals are pulled down through a 1K resistor and configured to be in a 00 state), and data/address lines of the master/slave devices are correspondingly and sequentially linked.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (4)
1. An interface conversion circuit based on multi-path PCI bus is characterized in that: the conversion circuit comprises a processor PCI bus, a multi-path PCI bus interface conversion unit and a multi-path PCI slave bus, wherein the processor PCI bus is connected with the multi-path PCI slave bus through the multi-path PCI bus interface conversion unit.
2. The multi-PCI bus based interface converting circuit of claim 1, wherein: the multi-path PCI bus interface conversion unit adopts an SM2050 chip.
3. The multi-PCI bus based interface converting circuit of claim 2, wherein: the SM2050 chip comprises ports SD16, SD17, SD18, SD19, SD20, SD21, SD22, SD23, SD24, SD25, SD26 and SD27 of a chip slave end, and an interface IDSEL _ PCI1 of the multi-path PCI slave bus is linked with any one signal of SD16, SD20 and SD24 of the SM2050 bridge chip slave end; the interface IDSEL _ PCI2 of the multi-path PCI slave bus is linked with any signal of the ports SD17, SD21 and SD 25; the interface IDSEL _ PCI3 of the multi-path PCI slave bus is linked with any signal of the ports SD18, SD22 and SD 26; the interface IDSEL _ PCI4 of the multi-path PCI slave bus is linked with any one signal of the ports SD19, SD23 and SD 27.
4. The multi-PCI bus based interface converting circuit of claim 3, wherein: the SM2050 chip is connected with a power supply.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011542770.0A CN112579502A (en) | 2020-12-24 | 2020-12-24 | Interface conversion circuit based on multi-path PCI bus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011542770.0A CN112579502A (en) | 2020-12-24 | 2020-12-24 | Interface conversion circuit based on multi-path PCI bus |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN112579502A true CN112579502A (en) | 2021-03-30 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011542770.0A Pending CN112579502A (en) | 2020-12-24 | 2020-12-24 | Interface conversion circuit based on multi-path PCI bus |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112579502A (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002052543A1 (en) * | 2000-12-26 | 2002-07-04 | Lear Automotive (Eeds) Spain, S.L. | Communication system and method for the passenger compartment of a motor vehicle |
| CN202710990U (en) * | 2012-08-16 | 2013-01-30 | 中国电子科技集团公司第三十八研究所 | Airborne radar monitoring system based on CPCI bus |
| CN206195819U (en) * | 2016-10-25 | 2017-05-24 | 大连大学 | Spatial information network link controlgear |
| CN210442800U (en) * | 2019-09-11 | 2020-05-01 | 北京华电众信技术股份有限公司 | Port expanding device |
| CN210983388U (en) * | 2019-12-25 | 2020-07-10 | 洛阳伟信电子科技有限公司 | Board card capable of converting one path to multiple paths of PCI-E and PCI bus interfaces |
-
2020
- 2020-12-24 CN CN202011542770.0A patent/CN112579502A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002052543A1 (en) * | 2000-12-26 | 2002-07-04 | Lear Automotive (Eeds) Spain, S.L. | Communication system and method for the passenger compartment of a motor vehicle |
| CN202710990U (en) * | 2012-08-16 | 2013-01-30 | 中国电子科技集团公司第三十八研究所 | Airborne radar monitoring system based on CPCI bus |
| CN206195819U (en) * | 2016-10-25 | 2017-05-24 | 大连大学 | Spatial information network link controlgear |
| CN210442800U (en) * | 2019-09-11 | 2020-05-01 | 北京华电众信技术股份有限公司 | Port expanding device |
| CN210983388U (en) * | 2019-12-25 | 2020-07-10 | 洛阳伟信电子科技有限公司 | Board card capable of converting one path to multiple paths of PCI-E and PCI bus interfaces |
Non-Patent Citations (1)
| Title |
|---|
| 沙万里: "基于龙芯2J1500的计算机主模块设计", 《工业控制计算机》 * |
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Application publication date: 20210330 |