CN112444718A - Chip aging monitoring method, device and system - Google Patents
Chip aging monitoring method, device and system Download PDFInfo
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- CN112444718A CN112444718A CN201910810276.9A CN201910810276A CN112444718A CN 112444718 A CN112444718 A CN 112444718A CN 201910810276 A CN201910810276 A CN 201910810276A CN 112444718 A CN112444718 A CN 112444718A
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Abstract
The embodiment of the invention provides a chip aging monitoring method, a device and a system, wherein a temperature change curve of a target chip in an aging process is obtained, a temperature change slope value of the target chip in a temperature rising stage is obtained according to a curve section corresponding to the temperature rising stage, a temperature value of the target chip in a temperature stable stage is obtained according to a curve section corresponding to the temperature stable stage, and finally the temperature change slope value and the temperature value are used for monitoring the aging state of the target chip, so that the aging states of the target chip in the temperature rising stage and the temperature stable stage in the aging process are monitored, the chips with mounting or assembly abnormality are screened in time, and the problem that the chips are easy to burn out when the temperature of the target chip is abnormal in the aging process is solved.
Description
Technical Field
The invention relates to the technical field of chip aging, in particular to a method, a device and a system for monitoring chip aging.
Background
With the arrival of the fifth generation mobile communication technology (5G), the network speed is faster and faster, the power consumption of 5G base station equipment is also larger and larger, which has been increased from two or three hundred watts to more than kilowatt, the power consumption of many chips (including processors and various power supply chips) is also greatly increased, and at this time, if the problem of insufficient soldering or heat conducting pad assembly occurs, the chip will be burned.
However, in the monitoring process of the base station, only the aging test is carried out on the radio frequency equipment, and the chip has no aging monitoring process. In addition, the monitoring parameters of the radio frequency equipment comprise output power, standing-wave ratio and the like, the aging process is that the radio frequency equipment is placed in a constant temperature box to control the temperature, the output power and the standing-wave ratio are detected when the aging is started, and the test is stopped if the abnormality is found. If the chip in the base station is aged by the aging process of the radio frequency equipment, the shape of the product is much larger than that of the product before due to the integration of the antenna and the radio frequency amplification of the 5G base station equipment, and at the moment, if the constant temperature box is used for aging, the cost is higher and the efficiency is lower.
Disclosure of Invention
The embodiment of the invention provides a chip aging monitoring method, a device and a system, which aim to solve the problem that chips are easy to burn down due to the fact that chips in a base station are not aged in the prior art.
The embodiment of the invention provides a chip aging monitoring method, which comprises the following steps:
acquiring a temperature change curve of a target chip in an aging process, wherein the temperature change curve comprises a curve section corresponding to a temperature rise stage and a curve section corresponding to a temperature steady-state stage;
obtaining a temperature change slope value of the target chip in the temperature raising stage according to the curve segment corresponding to the temperature raising stage, and obtaining a temperature value of the target chip in the temperature stable stage according to the curve segment corresponding to the temperature stable stage;
and monitoring the aging state of the target chip according to the temperature change slope value and the temperature value.
The embodiment of the invention provides a chip aging monitoring device, which comprises:
the first acquisition module is used for acquiring a temperature change curve of a target chip in an aging process, wherein the temperature change curve comprises a curve section corresponding to a temperature rise stage and a curve section corresponding to a temperature steady-state stage;
the second obtaining module is used for obtaining a temperature change slope value of the target chip in the temperature raising stage according to the curve segment corresponding to the temperature raising stage and obtaining a temperature value of the target chip in the temperature stable stage according to the curve segment corresponding to the temperature stable stage;
and the monitoring module is used for monitoring the aging state of the target chip according to the temperature change slope value and the temperature value.
The embodiment of the invention provides electronic equipment which comprises a memory, a processor and a program which is stored on the memory and can run on the processor, wherein the processor realizes the steps of the chip aging monitoring method when executing the program.
The embodiment of the invention provides a chip aging monitoring system, which comprises:
the base station equipment comprises a plurality of chips, and the outer surface of the base station equipment is sleeved with tooling equipment capable of changing the heat dissipation temperature of the base station equipment;
the electronic equipment is communicated with the at least one base station equipment so as to carry out aging monitoring on the chip by the chip aging monitoring method.
An embodiment of the present invention provides a non-transitory computer readable storage medium, on which a computer program is stored, and the computer program, when executed by a processor, implements the steps of the chip aging monitoring method.
According to the chip aging monitoring method, device and system provided by the embodiment of the invention, the aging state of the target chip is monitored by acquiring the temperature change curve of the target chip in the aging process, obtaining the temperature change slope value of the target chip in the temperature heating stage according to the curve section corresponding to the temperature heating stage, obtaining the temperature value of the target chip in the temperature stable stage according to the curve section corresponding to the temperature stable stage, and finally obtaining the temperature change slope value and the temperature value, so that the aging states of the target chip in the temperature heating stage and the temperature stable stage in the aging process are monitored, the chips with mounting or assembly abnormality are screened in time, and the problem that the chips are easily burnt when the temperature of the target chip is abnormal in the aging process is solved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.
FIG. 1 is a flowchart illustrating the steps of a chip aging monitoring method according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a monitoring process of the entire temperature raising stage according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a monitoring process during a steady state phase of the overall temperature in an embodiment of the present invention;
FIG. 4 is a graph illustrating a sample curve of temperature change according to an embodiment of the present invention;
FIG. 5 is a diagram of a chip aging monitoring system according to an embodiment of the present invention;
FIG. 6 is a block diagram of a chip burn-in apparatus according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of an electronic device in an embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Specifically, insufficient soldering or heat conduction liner assembly problem may appear in the chip in 5G base station equipment, and if continue to age the chip when this type of problem appears in the chip in 5G base station equipment, then can lead to the chip to have the risk of burning out, consequently in the aging process of chip, need to carry out ageing control to the chip, in time filter dress and assemble the chip that has a problem, in case discover unusual just stop ageing to reduce the risk of burning out the chip.
Specifically, as shown in fig. 1, a flowchart of the steps of the chip aging monitoring method in the embodiment of the present invention is shown, where the monitoring method includes the following steps:
step 101: and acquiring a temperature change curve of the target chip in the aging process.
In this step, specifically, when the chip is monitored for aging, a temperature variation curve of the target chip in the aging process may be obtained first.
The temperature change curve comprises a curve section corresponding to a temperature rising stage and a curve section corresponding to a temperature steady-state stage.
Specifically, when the temperature change curve is obtained, the temperature instantaneous value of the target chip at each aging time point may be obtained, and then the temperature change curve is obtained by drawing according to the temperature instantaneous value of the target chip at each aging time point.
In addition, specifically, the whole aging process of the chip can be divided into three stages: the temperature variation curve of the target chip in the aging process also includes a curve segment corresponding to the temperature raising stage, a curve segment corresponding to the temperature transition stage and a curve segment corresponding to the temperature steady-state stage.
Of course, it should be noted that, based on the present embodiment, only the curve segment corresponding to the temperature raising stage and the curve segment corresponding to the temperature steady-state stage are used to monitor the chip aging process, and therefore, the curve segment corresponding to the temperature transition stage is not described.
By acquiring the temperature change curve, the chip aging monitoring system can analyze the temperature condition of the target chip in each stage according to the temperature change curve, and further realize the aging monitoring process of the target chip.
Step 102: and obtaining a temperature change slope value of the target chip in the temperature rising stage according to the curve segment corresponding to the temperature rising stage, and obtaining a temperature value of the target chip in the temperature stable stage according to the curve segment corresponding to the temperature stable stage.
In this step, specifically, since the temperature of the target chip changes rapidly in the temperature raising stage, a straight line with a slope may be used for the simulation, that is, the slope value of the temperature change of the target chip in the temperature raising stage may be obtained according to the curve segment corresponding to the temperature raising stage.
In addition, specifically, since the temperature of the target chip is stable in the temperature steady-state stage, the temperature value of the target chip in the temperature steady-state stage can be obtained according to the curve segment corresponding to the temperature steady-state stage.
It should be noted here that the temperature value of the target chip in the temperature steady-state phase may be an average value of the temperatures of the target chip in the temperature steady-state phase.
Specifically, by obtaining the temperature change slope value of the target chip in the temperature rise stage, the temperature change speed of the target chip can be monitored according to the temperature change slope value; by obtaining the temperature value of the target chip in the temperature stable stage, whether the target chip is finally aged at a proper temperature can be monitored according to the temperature value, and therefore the aging effect is guaranteed.
Step 103: and monitoring the aging state of the target chip according to the temperature change slope value and the temperature value.
In this step, specifically, after the temperature change slope value of the target chip in the temperature rise stage and the temperature value in the temperature steady-state stage are obtained, the aging state of the target chip can be directly monitored according to the temperature change slope value and the temperature value, that is, the aging states of the temperature rise stage and the temperature steady-state stage of the target chip are monitored, so that the chips with mounting or assembly abnormality are timely screened, and the problem that the chips are easily burnt out when the temperature of the target chip is abnormal in the aging process is avoided.
In this way, in this embodiment, the temperature change curve of the target chip in the aging process is obtained, the temperature change slope value of the target chip in the temperature rising stage is obtained according to the curve segment corresponding to the temperature rising stage, the temperature value of the target chip in the temperature stable stage is obtained according to the curve segment corresponding to the temperature stable stage, and finally, the temperature change slope value and the temperature value are used to monitor the aging state of the target chip, so that the aging states of the target chip in the temperature rising stage and the temperature stable stage in the aging process are monitored, thereby timely screening of chips with mounting or assembly abnormality is realized, and the problem that the chips are easily burnt when the temperature of the target chip is abnormal in the aging process is avoided.
Further, when monitoring the aging state of the target chip according to the temperature change slope value and the temperature value, the method may include the following steps:
step A: and detecting whether the target chip is in a normal aging state or not according to a temperature change slope range and the temperature change slope value which are obtained in advance.
In this step, specifically, when the detected temperature change slope value is within the temperature change slope range, it may be determined that the target chip is in a normal aging state; when the temperature change slope value is detected to be larger than the maximum value of the temperature change slope range, detecting whether the temperature change slope values of other chips are in the temperature change slope range or not, wherein the other chips are chips aged simultaneously in the same aging environment with the target chip; at this time, when the temperature change slope values of the first preset number of chips in other chips are detected to be within the temperature change slope range, it is determined that the target chip is abnormal.
Of course, it should be further noted that when the value of the slope of the temperature change of the second preset number of chips in the other chips is detected to be greater than the maximum value of the range of the slope of the temperature change, it is determined that the temperature in the aging environment is greater than the preset temperature threshold.
Specifically, the first preset number and the second preset number may be defined according to actual requirements, and are not specifically described herein, for example, the first preset number may be 90% of the total number of other chips, the second preset number may be 80% of the total number of other chips, and the like.
Specifically, when the chip has abnormal problems such as cold joint or assembly of the heat conducting pad, the temperature change at the temperature rise stage is accelerated, so that the problem of missing the heat conducting pad in the cold joint and assembly process of the chip can be detected by using the characteristic.
The monitoring process of the whole temperature raising stage will be described in detail with reference to fig. 2.
Specifically, in order to ensure the accuracy and stability of the obtained data, a temperature change curve may be obtained according to the instantaneous value of the temperature detected for the second time. At this time, step 201 is entered, and the temperature change slope value of the target chip is calculated; then, step 202 is performed to determine whether the temperature change slope value is within the temperature change slope range. At this time, if the temperature is within the temperature change slope range, step 203 may be entered, and the next index of the target chip is detected, and the temperature change slope value of the target chip is periodically obtained. Of course, if the detected temperature change slope value is greater than the maximum value of the temperature change slope range, it is necessary to simultaneously detect whether the temperature change slope values of the other chips are normal, that is, step 204 is performed to detect whether the temperature change slope values of the other chips are within the temperature change slope range. At this time, if the temperature change slope values of the first preset number of chips in the other chips are within the temperature change slope range, it is indicated that the target chip may have a mounting or assembly problem, that is, step 205 may be performed to determine that the target chip is abnormal, and at this time, the test may be immediately stopped to avoid the risk of burning the target chip. In addition, if the value of the slope of the temperature change of the second preset number of chips in the other chips is detected to be greater than the maximum value of the range of the slope of the temperature change, that is, the value is detected to be beyond the range of the slope of the temperature change, it can be considered that the aging environment temperature is too high, and at this time, the step 206 may be entered, that is, the detection of the aging environment temperature is prompted, so as to ensure the normal aging temperature of the aging environment.
Therefore, the aging state of the target chip in the temperature rise stage is monitored based on the temperature change slope range obtained in advance and the temperature change slope value obtained by detection, so that the chips with mounting or assembly abnormity are screened in time, and the problem that the chips are easy to burn out when the temperature of the target chip is abnormal in the aging process is solved; in addition, when the temperature change slope value of the target chip has a problem, the aging state of the target chip is further verified by referring to the temperature change slope values of other chips, so that the influence of the aging environment and the like on the temperature change slope value of the target chip can be eliminated, and the accuracy of detecting the aging state of the target chip according to the temperature change slope value and whether the target chip is abnormal or not is ensured.
And B: and when the target chip is detected to be in a normal aging state and enters a temperature stable state, monitoring the aging environment temperature of the target chip according to a temperature stable range and the temperature value which are obtained in advance.
Specifically, in this step, when the speed of temperature rise of each chip of the 5G base station device gradually slows down, each chip is about to reach the temperature steady-state stage, that is, when the temperature instantaneous value obtained according to the temperature change curve reaches the temperature steady-state range obtained in advance, the curve segment after the time point corresponding to the temperature instantaneous value can be determined as the curve segment corresponding to the temperature steady-state stage, that is, the target chip can be determined to enter the temperature steady-state stage. At this time, the aging ambient temperature of the target chip may be monitored according to the temperature steady-state range and the temperature value of the target chip at the temperature steady-state stage.
Specifically, during monitoring, when the detected temperature value is not within the temperature steady-state range, the aging environment temperature of the target chip can be adjusted; and when the detected temperature value is in the temperature steady-state range, keeping the aging environment temperature of the target chip unchanged.
It is noted that, when adjusting the aging environment temperature of the target chip, an adjustment flag may be recorded as false, and then when detecting that the temperature value is smaller than the minimum value of the temperature steady-state range, the aging environment temperature is adjusted up, and the adjustment flag is set as true to prove that the aging environment temperature is adjusted, and then other indexes are continuously detected; if the temperature value is detected to be larger than the maximum value of the temperature steady-state range, the temperature of the aging environment is adjusted downwards, the adjustment mark is set to true, and then other indexes are continuously detected; if the temperature value is detected to be within the temperature steady-state range, the aging environment temperature is not required to be adjusted, and the adjustment mark is still the flase. Therefore, the aging environment temperature is adjusted according to the temperature value and the temperature stable range, the aging environment temperature of the chip is guaranteed, and the aging effect is further guaranteed.
In addition, when the aging environment temperature of the target chip is monitored, whether the aging time of the target chip is reached can be detected. At the moment, when the aging time of the target chip is detected, the temperature updating value of the target chip is obtained again according to the preset period; then if the aging environment temperature of the target chip is detected to be adjusted, and when a first difference value between the temperature updating value and the temperature stable range is detected to be larger than or equal to a second difference value between the temperature value and the temperature stable range, the aging environment temperature of the target chip is continuously adjusted; and when the first difference is smaller than the second difference, keeping the temperature of the aging environment unchanged.
Specifically, when the aging time of the target chip is detected, the test is stopped, otherwise, the monitoring process of the next period is continued. At this time, if the temperature update value of the target chip obtained by detection is close to the temperature steady-state range, namely the first difference is smaller than the second difference, the last adjustment on the aging environment temperature is performed, and the aging environment temperature does not need to be adjusted again; if the detected temperature update value of the target chip is not close to the temperature steady-state range, that is, the first difference value is greater than or equal to the second difference value, it indicates that the previous adjustment on the aging environment temperature has not been effected, and the aging environment temperature needs to be adjusted again to ensure that the target chip is in a balanced aging environment temperature, so as to ensure the aging effect of the target chip.
The monitoring process of the whole temperature steady-state phase is explained in detail by means of fig. 3.
Specifically, when the target chip enters the steady-state stage, the method first enters step 301, that is, the temperature adjustment flag is set to false to describe whether a subsequent temperature adjustment process exists, and then enters step 302, that is, a temperature value of the target chip in the temperature steady-state stage is obtained, where the temperature value may be an average temperature value of the target chip in the temperature steady-state stage. Then, step 303 is carried out, namely whether the temperature value is in the temperature steady-state range or not is detected; at this time, if the detected temperature value is within the temperature steady-state range, the process proceeds to step 304, in which the temperature adjustment flag is continuously set to false, and proceeds to step 305, in which other indexes are continuously detected. Then, step 306 is carried out to detect whether the aging time is reached; if the aging time of the target chip is not reached, the method circularly enters step 302, namely the temperature updating value of the target chip is obtained again according to the preset period, and the aging environment temperature monitoring process of the next period is carried out until the aging is finished. At this time, if the aging environment temperature is adjusted in the previous round, it is necessary to check whether the temperature value of the target chip is close to the temperature steady-state range, if so, the aging environment temperature is not adjusted, and if not, the aging environment temperature needs to be adjusted again. Of course, if it is detected in step 303 that the temperature value is not within the temperature steady-state range, step 307 is entered, that is, the aging environment temperature is decreased by one degree or increased by one degree according to the specific situation, and the adjustment flag is set to true; then step 305 is entered, i.e. the other indicators are continuously detected until the aging time is reached and the aging process is ended.
Specifically, the aging environment in which the target chip is located may be a closed chamber, and a temperature control device is installed in the closed chamber and used for adjusting the temperature of the closed chamber.
Therefore, the aging environment temperature of the target chip is monitored according to the temperature stable state range and the temperature value, so that the target chip can be always in a proper aging temperature at the temperature stable state stage, and the aging effect of the target chip is further ensured.
In addition, in this embodiment, before monitoring the aging state of the target chip according to the temperature change slope value and the temperature value, a temperature change slope range and a temperature steady-state range need to be obtained to realize reference to the temperature change slope range and the temperature steady-state range, and monitor the aging state of the target chip.
Specifically, when obtaining the temperature change slope range and the temperature steady-state range, the method may include the following steps:
step a, obtaining a temperature change sample curve of each chip sample in a plurality of chip samples, wherein the chip samples are chips without abnormity.
Specifically, in the present embodiment, a chip without an abnormality may be used as a chip sample, and a temperature change sample curve of m chip samples may be obtained.
Specifically, the temperature change sample curve can be seen in fig. 4, in which the horizontal axis of fig. 4 represents time and the vertical axis represents temperature. As can be seen from fig. 4, the whole aging process of the chip sample can be divided into three stages: a temperature rise stage (0-60 minutes), wherein the temperature of each chip sample rises rapidly in the stage; a temperature transition stage (60-100 minutes), in which the temperature of each chip sample is slowly increased until a stable temperature is reached; and in the temperature steady-state stage (after 100 minutes), the temperature of each chip sample is in a steady state and does not greatly fluctuate.
And b, obtaining the temperature change slope value of each chip sample in the temperature rising stage and the temperature value of each chip sample in the temperature steady state stage according to the temperature change sample curve of each chip sample.
Specifically, after obtaining the temperature change sample curve, mathematical characteristic simulation may be performed on the temperature change sample curve. In the temperature rise stage, the temperature change in the stage is fast, and the temperature change can be simulated by using a straight line with the slope of K, namely the slope values of the temperature change of the m chip samples in the temperature rise stage can be recorded as (K1, K2 … … Km); in the temperature steady-state stage, the temperature of each chip sample in the stage is substantially stable, and may be recorded as a temperature value T, where the temperature value T may be an average temperature of the time period in the temperature steady-state stage, that is, the temperature values of m chip samples in the temperature steady-state stage may be recorded as { T1, T2 … … Tm }.
And c, obtaining the average value and the standard deviation of the temperature change slopes of the plurality of chip samples according to the value of the temperature change slope of each chip sample in the temperature rise stage, and obtaining the average value and the standard deviation of the temperature of the plurality of chip samples in the temperature steady stage according to the value of the temperature of each chip sample in the temperature steady stage.
Specifically, in this step, the average value K of the temperature change slopes and the standard deviation δ K of the temperature change slopes of all the chip samples may be obtained by a statistical method according to the temperature change slope values (K1, K2 … … Km) of the m chip samples in the temperature rise stage.
Of course, the average value T and the standard deviation δ T of the temperature of all the chip samples in the steady-state temperature stage can be obtained through a statistical method according to the temperature values { T1, T2 … … Tm } of the m chip samples in the steady-state temperature stage.
And d, obtaining the temperature change slope range according to the average value of the temperature change slopes of the plurality of chip samples and the standard deviation of the temperature change slopes, and obtaining the temperature stable range according to the average value of the temperature of the plurality of chip samples in the temperature stable stage and the standard deviation of the temperature.
In this step, specifically, after obtaining the average value of the temperature change slope and the standard deviation of the temperature change slope of the plurality of chip samples, it can be known based on the respective normal principles that the ratios distributed within the positive and negative standard deviations are 99% together, that is, when obtaining the temperature change slope range based on the average value of the temperature change slope and the standard deviation of the temperature change slope of the plurality of chip samples, the temperature change slope range may be set to (- δ K + K, δ K + K).
For the same reason, when the temperature steady-state range is obtained from the temperature average value and the temperature standard deviation of the plurality of chip samples in the temperature steady-state stage, the temperature steady-state range may be set to (- δ T + T, δ T + T).
Therefore, the temperature change slope range and the temperature stable range are obtained according to the temperature change sample curve of the chip sample, the accuracy of the obtained temperature change slope range and the temperature stable range is guaranteed, and the accuracy of the target chip in monitoring the aging states of the temperature rise stage and the temperature stable stage based on the temperature change slope range and the temperature stable range is guaranteed, so that abnormal chips can be screened in time, and the risk that the chips are easily burnt is avoided.
In the embodiment, the temperature change curve of the target chip in the aging process is obtained, the temperature change slope value of the target chip in the temperature rising stage is obtained according to the curve section corresponding to the temperature rising stage, the temperature value of the target chip in the temperature stable stage is obtained according to the curve section corresponding to the temperature stable stage, and finally the temperature change slope value and the temperature value are used for monitoring the aging state of the target chip, so that the aging states of the target chip in the temperature rising stage and the temperature stable stage in the aging process are monitored, the chips with mounting or assembly abnormity are screened in time, and the problem that the chips are easy to burn out when the temperature of the target chip is abnormal in the aging process is solved.
In addition, as shown in fig. 5, the present embodiment further provides a chip aging monitoring system, which includes:
at least one base station device 1 placed in the closed space, wherein the base station device 1 comprises a plurality of chips 2, and a tooling device (not shown in the figure) capable of changing the heat dissipation temperature of the base station device is sleeved on the outer surface of the base station device 1;
and the electronic equipment 3 is communicated with the at least one base station equipment 1 so as to carry out aging monitoring on the chip 2 by using the chip aging monitoring method in the embodiment.
It should be noted here that at least one base station device can be connected to the electronic device via a switch. Further, the electronic device may be a communication device such as a personal computer. Of course, in order to regulate the temperature of the enclosed space, a temperature regulating device, such as an air conditioner, may be provided in the enclosed space.
Specifically, because the power consumption of the 5G base station equipment is large, the condition of the incubator can be simulated only by slightly changing the heat dissipation condition, and the incubator-free aging is realized. Namely, at least one base station device can be placed in the closed space, then the temperature of the closed space is set at 25 ℃ before the aging starts, and then in order to change the heat dissipation condition of the base station device, tooling equipment capable of changing the heat dissipation temperature of the base station device can be sleeved on the outer surface of the base station device, so that the inner chip of the base station device can finally work at a proper temperature (for example, the temperature within a temperature steady-state range). In addition, the tooling equipment can be in a grid shape. Certainly, in order to prevent the chip from being burned out due to an excessively high temperature and not reaching the aging effect due to a low temperature, the chip aging monitoring method in the above embodiment may be adopted to perform aging monitoring on the chip, so as to ensure that the temperature of the chip is finally in a stable state by adjusting the room temperature of the closed space.
Therefore, at least one base station device is placed in the closed space, and the chip is subjected to aging monitoring through the electronic device by adopting the chip aging monitoring method in the embodiment, so that the heat dissipation condition of the base station device is changed, the base station device can age in a heat balance state, and the incubator-free aging process is realized.
In addition, as shown in fig. 6, a block diagram of a chip aging monitoring apparatus in an embodiment of the present invention is shown, where the apparatus includes:
a first obtaining module 601, configured to obtain a temperature change curve of a target chip in an aging process, where the temperature change curve includes a curve segment corresponding to a temperature raising stage and a curve segment corresponding to a temperature steady-state stage;
a second obtaining module 602, configured to obtain a temperature change slope value of the target chip in the temperature raising stage according to the curve segment corresponding to the temperature raising stage, and obtain a temperature value of the target chip in the temperature stable stage according to the curve segment corresponding to the temperature stable stage;
and a monitoring module 603, configured to monitor an aging state of the target chip according to the temperature change slope value and the temperature value.
Optionally, the monitoring module 603 includes:
the detection unit is used for detecting whether the target chip is in a normal aging state or not according to a temperature change slope range and the temperature change slope value which are obtained in advance;
and the monitoring unit is used for monitoring the aging environment temperature of the target chip according to the temperature stable range and the temperature value which are obtained in advance when the target chip is detected to be in the normal aging state and the target chip enters the temperature stable stage.
Optionally, the detection unit includes:
the first determining subunit is used for determining that the target chip is in a normal aging state when the temperature change slope value is detected to be within the temperature change slope range;
the detection subunit is used for detecting whether the temperature change slope values of other chips are in the temperature change slope range or not when the temperature change slope value is detected to be larger than the maximum value of the temperature change slope range, wherein the other chips are chips aged simultaneously in the same aging environment with the target chip;
and the second determining subunit is used for determining that the target chip is abnormal when the temperature change slope values of the first preset number of chips in the other chips are detected to be within the temperature change slope range.
Optionally, the detection unit further includes:
and the third determining subunit is configured to determine that the temperature in the aging environment is greater than a preset temperature threshold when the temperature change slope value of a second preset number of chips in the other chips is detected to be greater than the maximum value of the temperature change slope range.
Optionally, the monitoring unit comprises:
the first adjusting unit is used for adjusting the aging environment temperature of the target chip when the detected temperature value is not in the temperature steady-state range;
and the first temperature maintaining unit is used for maintaining the aging environment temperature of the target chip when the detected temperature value is in the temperature steady-state range.
Optionally, the monitoring unit further comprises:
the acquisition unit is used for acquiring the temperature updating value of the target chip again according to a preset period when the aging time of the target chip is detected and not reached;
a second adjusting unit, configured to, if it is detected that the aging ambient temperature of the target chip has been adjusted, and when it is detected that a first difference between the temperature update value and the temperature steady-state range is greater than or equal to a second difference between the temperature value and the temperature steady-state range, continue to adjust the aging ambient temperature of the target chip;
and the second temperature maintaining unit is used for maintaining the aging environment temperature unchanged when the first difference is smaller than the second difference.
Optionally, the method further comprises:
the third acquisition module is used for acquiring a temperature change sample curve of each chip sample in a plurality of chip samples, wherein the chip samples are chips without abnormity;
the fourth obtaining module is used for obtaining a temperature change slope value of each chip sample in a temperature rising stage and a temperature value of each chip sample in a temperature steady state stage according to the temperature change sample curve of each chip sample;
a fifth obtaining module, configured to obtain a temperature change slope average value and a temperature change slope standard deviation of the multiple chip samples according to the temperature change slope value of each chip sample in the temperature rising stage, and obtain a temperature average value and a temperature standard deviation of the multiple chip samples in the temperature steady stage according to the temperature value of each chip sample in the temperature steady stage;
and the sixth acquisition module is used for acquiring the temperature change slope range according to the temperature change slope average value and the temperature change slope standard deviation of the plurality of chip samples, and acquiring the temperature steady-state range according to the temperature average value and the temperature standard deviation of the plurality of chip samples in the temperature steady-state stage.
In addition, as shown in fig. 7, an entity structure schematic diagram of the electronic device provided in the embodiment of the present invention is shown, where the electronic device may include: a processor (processor)710, a communication Interface (Communications Interface)720, a memory (memory)730, and a communication bus 740, wherein the processor 710, the communication Interface 720, and the memory 730 communicate with each other via the communication bus 740. The processor 710 may invoke a computer program stored on the memory 730 and executable on the processor 710 to perform the methods provided by the embodiments described above, including, for example: acquiring a temperature change curve of a target chip in an aging process, wherein the temperature change curve comprises a curve section corresponding to a temperature rise stage and a curve section corresponding to a temperature steady-state stage; obtaining a temperature change slope value of the target chip in the temperature raising stage according to the curve segment corresponding to the temperature raising stage, and obtaining a temperature value of the target chip in the temperature stable stage according to the curve segment corresponding to the temperature stable stage; and monitoring the aging state of the target chip according to the temperature change slope value and the temperature value.
In addition, the logic instructions in the memory 730 can be implemented in the form of software functional units and stored in a computer readable storage medium when the software functional units are sold or used as independent products. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
Embodiments of the present invention further provide a non-transitory computer-readable storage medium, on which a computer program is stored, where the computer program is implemented to perform the method provided in the foregoing embodiments when executed by a processor, and the method includes: acquiring a temperature change curve of a target chip in an aging process, wherein the temperature change curve comprises a curve section corresponding to a temperature rise stage and a curve section corresponding to a temperature steady-state stage; obtaining a temperature change slope value of the target chip in the temperature raising stage according to the curve segment corresponding to the temperature raising stage, and obtaining a temperature value of the target chip in the temperature stable stage according to the curve segment corresponding to the temperature stable stage; and monitoring the aging state of the target chip according to the temperature change slope value and the temperature value.
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (17)
1. A method for monitoring chip aging is characterized by comprising the following steps:
acquiring a temperature change curve of a target chip in an aging process, wherein the temperature change curve comprises a curve section corresponding to a temperature rise stage and a curve section corresponding to a temperature steady-state stage;
obtaining a temperature change slope value of the target chip in the temperature raising stage according to the curve segment corresponding to the temperature raising stage, and obtaining a temperature value of the target chip in the temperature stable stage according to the curve segment corresponding to the temperature stable stage;
and monitoring the aging state of the target chip according to the temperature change slope value and the temperature value.
2. The method for monitoring chip aging according to claim 1, wherein the monitoring the aging state of the target chip according to the temperature change slope value and the temperature value comprises:
detecting whether the target chip is in a normal aging state or not according to a temperature change slope range and the temperature change slope value which are obtained in advance;
and when the target chip is detected to be in a normal aging state and enters the temperature stable state, monitoring the aging environment temperature of the target chip according to the temperature stable range and the temperature value which are obtained in advance.
3. The method for monitoring chip aging according to claim 2, wherein the detecting whether the target chip is in a normal aging state according to the temperature change slope range and the temperature change slope value obtained in advance comprises:
when the temperature change slope value is detected to be within the temperature change slope range, determining that the target chip is in a normal aging state;
when the temperature change slope value is detected to be larger than the maximum value of the temperature change slope range, detecting whether the temperature change slope values of other chips are in the temperature change slope range or not, wherein the other chips are chips aged simultaneously in the same aging environment with the target chip;
and when the temperature change slope values of the first preset number of chips in the other chips are detected to be within the temperature change slope range, determining that the target chip is abnormal.
4. The method of claim 3, further comprising:
and when the temperature change slope values of a second preset number of chips in the other chips are detected to be larger than the maximum value of the temperature change slope range, determining that the temperature in the aging environment is larger than a preset temperature threshold value.
5. The method for monitoring the aging of the chip as claimed in claim 2, wherein the monitoring the aging environment temperature of the target chip according to the temperature steady-state range and the temperature value obtained in advance comprises:
when the detected temperature value is not in the temperature steady-state range, adjusting the aging environment temperature of the target chip;
and when the detected temperature value is in the temperature steady-state range, keeping the aging environment temperature of the target chip.
6. The method for monitoring chip aging according to claim 2, wherein when monitoring the aging ambient temperature of the target chip according to the temperature steady-state range and the temperature value obtained in advance, the method further comprises:
when the aging time of the target chip is detected, acquiring the temperature updating value of the target chip again according to a preset period;
if the aging environment temperature of the target chip is detected to be adjusted, and when a first difference value between the temperature updating value and the temperature steady-state range is detected to be larger than or equal to a second difference value between the temperature value and the temperature steady-state range, continuing to adjust the aging environment temperature of the target chip;
and when the first difference is smaller than the second difference, keeping the aging environment temperature unchanged.
7. The method for monitoring chip aging according to claim 2, wherein before monitoring the aging state of the target chip according to the temperature change slope value and the temperature value, the method further comprises:
obtaining a temperature change sample curve of each chip sample in a plurality of chip samples, wherein the chip samples are chips without abnormity;
obtaining a temperature change slope value of each chip sample in a temperature rising stage and a temperature value of each chip sample in a temperature steady state stage according to the temperature change sample curve of each chip sample;
obtaining the average value and standard deviation of the temperature change slopes of the plurality of chip samples according to the value of the temperature change slope of each chip sample in the temperature rise stage, and obtaining the average value and standard deviation of the temperature of the plurality of chip samples in the temperature steady stage according to the value of the temperature of each chip sample in the temperature steady stage;
and obtaining the temperature change slope range according to the average value and the standard deviation of the temperature change slopes of the plurality of chip samples, and obtaining the temperature stable range according to the average value and the standard deviation of the temperature of the plurality of chip samples in the temperature stable stage.
8. A chip aging monitoring apparatus, comprising:
the first acquisition module is used for acquiring a temperature change curve of a target chip in an aging process, wherein the temperature change curve comprises a curve section corresponding to a temperature rise stage and a curve section corresponding to a temperature steady-state stage;
the second obtaining module is used for obtaining a temperature change slope value of the target chip in the temperature raising stage according to the curve segment corresponding to the temperature raising stage and obtaining a temperature value of the target chip in the temperature stable stage according to the curve segment corresponding to the temperature stable stage;
and the monitoring module is used for monitoring the aging state of the target chip according to the temperature change slope value and the temperature value.
9. The chip degradation monitoring device of claim 8, wherein the monitoring module comprises:
the detection unit is used for detecting whether the target chip is in a normal aging state or not according to a temperature change slope range and the temperature change slope value which are obtained in advance;
and the monitoring unit is used for monitoring the aging environment temperature of the target chip according to the temperature stable range and the temperature value which are obtained in advance when the target chip is detected to be in the normal aging state and the target chip enters the temperature stable stage.
10. The chip degradation monitoring device according to claim 9, wherein the detecting unit includes:
the first determining subunit is used for determining that the target chip is in a normal aging state when the temperature change slope value is detected to be within the temperature change slope range;
the detection subunit is used for detecting whether the temperature change slope values of other chips are in the temperature change slope range or not when the temperature change slope value is detected to be larger than the maximum value of the temperature change slope range, wherein the other chips are chips aged simultaneously in the same aging environment with the target chip;
and the second determining subunit is used for determining that the target chip is abnormal when the temperature change slope values of the first preset number of chips in the other chips are detected to be within the temperature change slope range.
11. The chip degradation monitoring device of claim 10, wherein the detection unit further comprises:
and the third determining subunit is configured to determine that the temperature in the aging environment is greater than a preset temperature threshold when the temperature change slope value of a second preset number of chips in the other chips is detected to be greater than the maximum value of the temperature change slope range.
12. The chip degradation monitoring device according to claim 9, wherein the monitoring unit comprises:
the first adjusting unit is used for adjusting the aging environment temperature of the target chip when the detected temperature value is not in the temperature steady-state range;
and the first temperature maintaining unit is used for maintaining the aging environment temperature of the target chip when the detected temperature value is in the temperature steady-state range.
13. The chip degradation monitoring device according to claim 9, wherein the monitoring unit comprises:
the acquisition unit is used for acquiring the temperature updating value of the target chip again according to a preset period when the aging time of the target chip is detected and not reached;
a second adjusting unit, configured to, if it is detected that the aging ambient temperature of the target chip has been adjusted, and when it is detected that a first difference between the temperature update value and the temperature steady-state range is greater than or equal to a second difference between the temperature value and the temperature steady-state range, continue to adjust the aging ambient temperature of the target chip;
and the second temperature maintaining unit is used for maintaining the aging environment temperature unchanged when the first difference is smaller than the second difference.
14. The chip degradation monitoring device of claim 9, further comprising:
the third acquisition module is used for acquiring a temperature change sample curve of each chip sample in a plurality of chip samples, wherein the chip samples are chips without abnormity;
the fourth obtaining module is used for obtaining a temperature change slope value of each chip sample in a temperature rising stage and a temperature value of each chip sample in a temperature steady state stage according to the temperature change sample curve of each chip sample;
a fifth obtaining module, configured to obtain a temperature change slope average value and a temperature change slope standard deviation of the multiple chip samples according to the temperature change slope value of each chip sample in the temperature rising stage, and obtain a temperature average value and a temperature standard deviation of the multiple chip samples in the temperature steady stage according to the temperature value of each chip sample in the temperature steady stage;
and the sixth acquisition module is used for acquiring the temperature change slope range according to the temperature change slope average value and the temperature change slope standard deviation of the plurality of chip samples, and acquiring the temperature steady-state range according to the temperature average value and the temperature standard deviation of the plurality of chip samples in the temperature steady-state stage.
15. An electronic device comprising a memory, a processor and a program stored on the memory and executable on the processor, characterized in that the steps of the chip aging monitoring method according to any of claims 1 to 7 are implemented when the processor executes the program.
16. A system for monitoring chip aging, comprising:
the base station equipment comprises a plurality of chips, and the outer surface of the base station equipment is sleeved with tooling equipment capable of changing the heat dissipation temperature of the base station equipment;
an electronic device in communication with the at least one base station device to perform aging monitoring on the chip by the chip aging monitoring method of any one of claims 1 to 7.
17. A non-transitory computer readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the chip aging monitoring method according to any one of claims 1 to 7.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113156294A (en) * | 2021-03-23 | 2021-07-23 | 英特尔产品（成都）有限公司 | Thermal control method and device for chip burn-in test |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1114576A (en) * | 1997-06-25 | 1999-01-22 | Toshiba Corp | Method and apparatus for diagnosis of degradation of mounting board |
| CN103018646A (en) * | 2011-09-21 | 2013-04-03 | 北京大学深圳研究生院 | High-temperature wafer level burn-in test scheduling method for SoC (system on a chip) chip |
| CN103699152A (en) * | 2013-11-28 | 2014-04-02 | 中冶南方（武汉）自动化有限公司 | Power device over-temperature protection method based on temperature curve slope control |
| CN104460652A (en) * | 2014-10-27 | 2015-03-25 | 上海原动力通信科技有限公司 | Board card ageing device and using method thereof |
| CN104698323A (en) * | 2015-03-27 | 2015-06-10 | 国家电网公司 | Method for testing accelerating ageing of dry type distribution transformer |
| WO2018126901A1 (en) * | 2017-01-05 | 2018-07-12 | 中兴通讯股份有限公司 | Method and device for testing health status of battery |
| CN108450018A (en) * | 2015-12-18 | 2018-08-24 | Zf 腓德烈斯哈芬股份公司 | The method and apparatus and power electronic system of aging for detecting the power electronics devices for including semiconductor component |
| CN109271304A (en) * | 2018-09-12 | 2019-01-25 | 合肥联宝信息技术有限公司 | Health detecting method and system, the electronic equipment of cooling system |
| CN110161398A (en) * | 2018-09-04 | 2019-08-23 | 河北工业大学 | A method of IGBT power module ageing state is assessed using shell temperature |
-
2019
- 2019-08-29 CN CN201910810276.9A patent/CN112444718A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1114576A (en) * | 1997-06-25 | 1999-01-22 | Toshiba Corp | Method and apparatus for diagnosis of degradation of mounting board |
| CN103018646A (en) * | 2011-09-21 | 2013-04-03 | 北京大学深圳研究生院 | High-temperature wafer level burn-in test scheduling method for SoC (system on a chip) chip |
| CN103699152A (en) * | 2013-11-28 | 2014-04-02 | 中冶南方（武汉）自动化有限公司 | Power device over-temperature protection method based on temperature curve slope control |
| CN104460652A (en) * | 2014-10-27 | 2015-03-25 | 上海原动力通信科技有限公司 | Board card ageing device and using method thereof |
| CN104698323A (en) * | 2015-03-27 | 2015-06-10 | 国家电网公司 | Method for testing accelerating ageing of dry type distribution transformer |
| CN108450018A (en) * | 2015-12-18 | 2018-08-24 | Zf 腓德烈斯哈芬股份公司 | The method and apparatus and power electronic system of aging for detecting the power electronics devices for including semiconductor component |
| WO2018126901A1 (en) * | 2017-01-05 | 2018-07-12 | 中兴通讯股份有限公司 | Method and device for testing health status of battery |
| CN110161398A (en) * | 2018-09-04 | 2019-08-23 | 河北工业大学 | A method of IGBT power module ageing state is assessed using shell temperature |
| CN109271304A (en) * | 2018-09-12 | 2019-01-25 | 合肥联宝信息技术有限公司 | Health detecting method and system, the electronic equipment of cooling system |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113156294A (en) * | 2021-03-23 | 2021-07-23 | 英特尔产品（成都）有限公司 | Thermal control method and device for chip burn-in test |
| CN113156294B (en) * | 2021-03-23 | 2024-05-24 | 英特尔产品（成都）有限公司 | Thermal control method and device for chip burn-in test |
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