CN112305967A

CN112305967A - Wisdom energy management equipment

Info

Publication number: CN112305967A
Application number: CN202011181991.XA
Authority: CN
Inventors: 王玉萍; 樊峰; 周海伟; 上官松涛; 谭曾明; 张善杰
Original assignee: Fanshi Technology Development Co Ltd
Current assignee: Fanshi Technology Development Co Ltd
Priority date: 2020-10-29
Filing date: 2020-10-29
Publication date: 2021-02-02

Abstract

The intelligent energy management equipment is provided with a plurality of ports, and each port is connected with an independent load; the intelligent energy management equipment is used for realizing point-to-point power utilization management for the load connected with each port; the device mainly comprises a power input unit, an auxiliary power supply unit, an MCU controller, an output current detection unit, an output switch unit, an ADC reference voltage unit, an RS485 pair FSU acquisition communication interface unit, an RS485 pair upper communication interface unit and a GPS/4G remote uploading or control module; the communication link is established through the short messages of the 4G and Beidou third-generation system, and meanwhile, the 485 communication interface is compatible to be in butt joint with the iron tower base station.

Description

Wisdom energy management equipment

Technical Field

The invention relates to the technical field of energy distribution management, in particular to intelligent energy management equipment.

Background

With the large-scale construction of 5G, the number of devices with various models and systems in the iron tower base station (FSU) is increased, and the power consumption is gradually increased. However, the existing equipment is not fine, convenient, remote and intelligent enough for energy distribution management, so that the use of equipment power supply and equipment power-up in the base station are relatively disordered and are in disordered management at present. At present, most advanced is that sub-users perform management and control, energy saving can be achieved to a certain degree, but after implementation, the user can not provide any communication service for the user at the site, the significance of energy saving is lost, and better balance is not achieved in the aspects of energy saving and user service. Meanwhile, because network upgrading equipment is faster to upgrade, operators generally maintain the existing network and replace the equipment with equipment which enters a base station through a debit port and is installed privately, so that income orders are lost, and the electricity charge metering is not accurate enough.

Therefore, there is an urgent need for a power consumption management device capable of implementing fine management and control of port power consumption by an energy management platform, including remote port power up management and control, port load collection, and port resource statistics.

Disclosure of Invention

In order to overcome the defects of the prior art, the invention aims to provide intelligent energy management equipment to realize the fine management and control of an energy management platform on port power consumption, wherein the fine management and control comprises the steps of remotely managing and controlling port power-on, managing and controlling each port, collecting port load and port resource statistics.

In order to achieve the purpose, the invention adopts the technical scheme that: providing an intelligent energy management device, which is provided with a plurality of ports, wherein each port is connected with an independent load; the intelligent energy management equipment is used for realizing point-to-point power utilization management for the load connected with each port; the intelligent energy management device comprises a power input unit, an auxiliary power supply unit, an MCU (microprogrammed control unit) controller, an output current detection unit, an output switch unit, an ADC (analog-to-digital converter) reference voltage unit, an RS485 pair FSU acquisition communication interface unit, an RS485 pair upper communication interface unit and a GPS/4G remote uploading or control module; the MCU controller is respectively and electrically connected with the auxiliary power supply unit, the output current detection unit, the output switch unit, the ADC reference voltage unit, the RS485 pair FSU acquisition communication interface unit and the RS485 pair upper communication interface unit, the power input unit is respectively and electrically connected with the auxiliary power supply unit and the output current detection unit, the GPS/4G remote uploading or control module is respectively and electrically connected with the MCU controller, the auxiliary power supply unit and the RS485 pair FSU acquisition communication interface unit, and the auxiliary power supply unit is also electrically connected with the output current detection unit;

the ADC reference voltage unit is used for generating a reference voltage value so as to determine the accurate amplitude of the measured signal; the RS485 pair FSU acquisition communication interface unit is used for data transmission between the MCU controller and the iron tower base station through a 485 communication interface and transmitting the data of the iron tower base station to the GPS/4G remote uploading or control module; the RS485 pair of upper communication interface units are used for data transmission between the MCU controller and an upper computer and transmitting the data of the MCU controller to the upper computer; the GPS/4G remote uploading or control module is used for establishing a communication link with the energy management platform through the 4G and Beidou third generation system short messages; the power supply input unit is used for converting an external power supply into a working power supply of the intelligent energy management equipment; the auxiliary power supply unit is used for converting the working power supply into a power supply required by the MCU controller, the GPS/4G remote uploading or control module and the output current detection unit; the output current detection unit is used for converting the working power supply into an electric signal and transmitting the electric signal to the MCU controller, and the MCU controller processes and analyzes data acquired by the FSU acquisition communication interface unit according to the ADC reference voltage unit and the RS485 and then transmits a voltage control signal generated for the port to the output switch unit through the output current detection unit; the output current detection unit is expandable according to the increase of the port; the output switch unit is used for transmitting the voltage control signal to the load through the port.

Furthermore, the intelligent energy management device also comprises a sound prompt unit, a real-time clock unit, a FLASH storage unit, a ferroelectric storage unit, an LCD display unit and a voltage reduction and stabilization unit; the sound prompting unit is used for giving an alarm sound when the intelligent energy management equipment is in an abnormal working state or giving a prompting sound when the intelligent energy management equipment is in a switching working state; the real-time clock unit is used for providing stable running frequency for the MCU controller; the FLASH storage unit is used for storing the data of the MCU controller; the ferroelectric storage unit is used for storing the data of the MCU controller under the condition of low electric energy; the LCD display unit is used for being connected with a display and displaying the data of the MCU controller to workers through the display; the voltage reduction and stabilization unit is used for providing 3.3V voltage for the MCU controller.

Further, the power input unit includes transformer coils T1A, T1B, T1C, T1D, T1E, a voltage stabilization chip U26, a fuse F1, a MOS transistor Q59, polar capacitors E1, E2, E3, E4, E5, E6, E7, E8, capacitors C196, C197, C198, C199, C202, C203, C204, C205, diodes D88, D89, D90, D91, D92, D93, resistors TH1, R339, R340, R341, R343, R344, R345, R346, R347, R348, R349, R350, R352, R353; one end of the fuse F1 IS connected to the anode of an external power supply, the other end of the fuse F1 IS connected to one end of the resistor TH1, the other end of the resistor TH1 IS connected to the anode of the diode D88, the cathode of the diode D88 IS connected to the anode of the polar capacitor E1 and one end of the resistor R339, the other end of the resistor R339 IS connected to one end of the resistor R341 and one end of the capacitor C195, the other end of the resistor R339 IS connected to one end of the resistor R340, the other end of the resistor R340 IS connected to the terminal IS5, one end of the capacitor C195 IS further connected to one end of the resistor R344 and the pin 1 of the transformer coil T1A, the other end of the resistor R344 IS connected to one end of the resistor R343, the other end of the capacitor C195 IS connected to the other end of the resistor R343 and then connected to the cathode of the diode D89, and the pin 2 of the transformer coil T A IS connected to the anode of the diode D89 and the drain of the MOS transistor Q36, the gate of the MOS transistor D59 IS connected to one end of the resistor R346 and one end of the resistor R347, the other end of the resistor R346 IS connected to the terminal IR2, the source of the MOS transistor D59 IS connected to one end of the resistor R348, one end of the resistor R349, the other end of the resistor R347 and one end of the resistor R350, and IS connected to the terminal IS2, the other end of the resistor R348, the other end of the resistor R349 and the other end of the resistor R350 are connected to the terminal GND3, the other end of the resistor R342 IS connected to the terminal VCC10, the anode of the polar capacitor E5 and one end of the resistor R345, the other end of the resistor R345 IS connected to the cathode of the diode D92, the anode of the diode D92 IS connected to the pin 7 of the transformer coil T1D, and the pin 8 of the transformer coil T1D IS connected to the cathode of the polar capacitor E5 and the cathode of the polar capacitor E1, the negative electrode of the polar capacitor E1 is also connected with the terminal GND 3; pin 4 of the transformer coil T1B is connected to the anode of the diode D91, the cathode of the diode D91 is connected to the anode of the polar capacitor E2 and one end of the capacitor C196, one end of the capacitor C196 is further connected to the anode of the polar capacitor E4, the anode of the polar capacitor E4 is further connected to one end of the capacitor C198, one end of the capacitor C198 is further connected to a power supply voltage VCC, the other end of the capacitor C198 is connected to one end of the terminal PE and one end of the capacitor C199, the other end of the capacitor C199 is connected to the cathode of the polar capacitor E4 and one end of the capacitor C197, the other end of the capacitor C199 is further connected to an analog ground, the cathode of the polar capacitor E4 is further connected to the other end of the capacitor C196 and the anode of the capacitor E3, and the other end of the capacitor C196 is connected to the cathode of the polar capacitor E2 and pin 3 of the transformer coil T1B, pin 3 of the transformer coil T1B is connected to pin 6 of the transformer coil T1C, pin 5 of the transformer coil T1C is connected to the cathode of the diode D90, the anode of the diode D90 is connected to the cathode of the polar capacitor E3 and the other end of the capacitor C197, and the anode of the diode D90 is also connected to-5V; a pin 9 of the transformer coil T1E is connected to an anode of the diode D93, a cathode of the diode D93 is sequentially connected to an anode of the polar capacitor E6, one end of the capacitor C202, an anode of the polar capacitor E7, one end of the capacitor C203, one end of the resistor R352, and one end of the resistor R353, and then connected to a pin 1 of the regulator chip U26, a pin 10 of the transformer coil T1E is sequentially connected to a cathode of the polar capacitor E6, another end of the capacitor C202, a cathode of the polar capacitor E7, another end of the capacitor C203, another end of the resistor R352, and another end of the resistor R353, and then connected to a pin 2 of the regulator chip U26, a pin 2 of the regulator chip U26 is further connected to a cathode of the polar capacitor E8, one end of the capacitor C205, and one end of the capacitor C204, and one end of the capacitor C205 is further connected to a signal ground, the other end of the capacitor C204 is connected to the terminal PE, the pin 3 of the regulator chip U6 is connected to the positive electrode of the polar capacitor E8 and the other end of the capacitor C205, respectively, and the pin 3 of the regulator chip U26 is further connected to + 5V.

Further, the auxiliary power supply unit includes a current mode controller IC1, sockets CON33 and CON34, optocouplers U27B, U27A, capacitors C200, C201, C206, C207, C208, C209, C210, C211, C212, a zener diode U28, resistors R354, R355, R356, R357, R358, R359, R360, R351, R361, R362, R363, R364, R365; the current mode controller IC1 is a dc-dc switching regulator that can regulate the output voltage by varying the peak current cycle by cycle to ultimately obtain a stable output voltage; the socket CON33 is used for connecting the GPS/4G remote uploading or control module, and the socket CON34 is used for connecting the output current detection unit; pin 1 of the current mode controller IC1 is connected to one end of the capacitor C200 and one end of the resistor R357 respectively, the other end of the capacitor C200 and the other end of the resistor R357 are connected to each other and then connected to pin 2 of the current mode controller IC1 and pin 3 of the optocoupler U27B respectively, pin 3 of the optocoupler U27B is further connected to one end of the resistor R356, the other end of the resistor R356 is connected to the terminal GND3, pin 4 of the optocoupler U27B is connected to one end of the resistor R354, the other end of the resistor R354 is connected to the terminal VCCVREF, pin 8 of the current mode controller IC1 is connected to the terminal VCCVREF and one end of the resistor R355 respectively, the other end of the resistor R355 is connected to one end of the capacitor C206 and one end of the capacitor C207 in sequence and then connected to pin 4 of the current mode controller IC1, one end of the capacitor C208 is connected to the terminal cvvcvcvcvcvcvcvcvcvcvcvcvcvcvcvcref, the other end of the capacitor C207 and the other end of the capacitor C206 are connected to the terminal GND3, pin 4 of the current mode controller IC1 is also connected to one terminal of the capacitor C209 and one terminal of the resistor C358 respectively, the other end of the capacitor C209 and the other end of the resistor R358 are connected to pin 3 of the current mode controller IC1, pin 3 of the current mode controller IC1 IS also connected to one terminal of the resistor R359, the terminal IS5, and one terminal of the capacitor C210, the other terminal of the capacitor C210 is connected to pin 5 of the current mode controller IC1 and then to the terminal GND3, the other end of the resistor R359 IS connected to the terminal IS2, pin 6 of the current mode controller IC1 IS connected to the terminal DR2, pin 7 of the current mode controller IC1 is connected to the terminal VCC10 and one end of the capacitor C201, respectively, and the other end of the capacitor C201 is connected to the terminal GND 3; pin 1 of the optocoupler U27A is connected to one end of the resistor R360 and one end of the resistor R351 respectively, pin 2 of the optocoupler U27A is connected to the negative electrode of the zener diode U28 and the other end of the resistor R360 respectively, the other end of the resistor R360 is further connected to one end of the capacitor C211, the other end of the capacitor C211 is connected to one end of the resistor R361, the other end of the resistor R361 is connected to one end of the resistor R363 and one end of the capacitor C212 respectively, the positive electrode of the zener diode U28 is connected to signal ground, the positive electrode of the zener diode U28 is further connected to one end of the resistor R365, the other end of the resistor R365 is connected to the other end of the resistor R363 and one end of the resistor R364 respectively, the other end of the capacitor C212 is connected to one end of the resistor R362, and the other end of the resistor R362 is connected to the other end of the resistor R351 and the other end of the resistor, the other end of the resistor R364 is also connected with 7V; pin 1 of the socket CON33 is connected to 7V, pin 2 of the socket CON33 is connected to a signal ground, pin 3 of the socket CON33 is connected to terminal 3.3V1, pin 4 of the socket CON33 is connected to the data receiving terminal 4G _ RX of the GPS/4G remote upload or control module, pin 5 of the socket CON33 is connected to the data transmitting terminal 4G _ TX of the GPS/4G remote upload or control module, pin 1 of the socket CON34 is connected to the circuit voltage VDD, pin 4 of the socket CON34 is grounded, pin 2 of the socket CON34 is connected to terminal RS485_2_ a, and pin 3 of the socket CON34 is connected to terminal 485 RS _2_ B.

Further, the output switch unit comprises analog switches and multiplexers Q3, Q4, Q5, Q6, Q7, Q8, triodes Q2 and Q9, capacitors C42, C43, C44, C45, C46, C47, resistors R43, R46 and R47; the analog switch and multiplexer Q6 is used for outputting the voltage control signals to first to eighth loads, the analog switch and multiplexer Q3 is used for outputting the voltage control signals to ninth to sixteenth loads, the analog switch and multiplexer Q7 is used for outputting the control signals to the fuse of the first load to the fuse of the eighth load, the analog switch and multiplexer Q8 is used for outputting the control signals to the fuse of the ninth to sixteenth loads, the analog switch and multiplexer Q1 is used for collecting the current signals of the first to eighth loads, and the analog switch and multiplexer Q5 is used for collecting the current signals of the ninth to sixteenth loads;

pin 1 of the analog switch and multiplexer Q6 is connected to the terminal LOAD _1I of the first LOAD, pin 2 of the analog switch and multiplexer Q6 is connected to the terminal LOAD _2I of the second LOAD, pin 4 of the analog switch and multiplexer Q6 is connected to the terminal LOAD _3I of the third LOAD, pin 5 of the analog switch and multiplexer Q6 is connected to the terminal LOAD _4I of the fourth LOAD, pin 12 of the analog switch and multiplexer Q6 is connected to the terminal LOAD _5I of the fifth LOAD, pin 13 of the analog switch and multiplexer Q6 is connected to the terminal LOAD _6I of the sixth LOAD, pin 14 of the analog switch and multiplexer Q6 is connected to the terminal LOAD _7I of the seventh LOAD, pin 15 of the analog switch and multiplexer Q6 is connected to the terminal LOAD _8I of the eighth LOAD, pin 6 of the analog switch and multiplexer Q6, Pin 7 and pin 8 are connected and then connected to an analog ground, pin 16 of the analog switch and multiplexer Q6 is connected to one end of the capacitor C45 and the circuit voltage end VDD, the other end of the capacitor C45 is connected to an analog ground, pin 3 of the analog switch and multiplexer Q6 is connected to the analog-to-digital sampling end ADC _ IN0 of the MCU controller, pin 9 of the analog switch and multiplexer Q6 is connected to the control signal output end CSA0 of the MCU controller, pin 10 of the analog switch and multiplexer Q6 is connected to the control signal output end CSA1 of the MCU controller, and pin 11 of the analog switch and multiplexer Q6 is connected to the control signal output end CSA2 of the MCU controller;

pin 1 of the analog switch and multiplexer Q3 is connected to the terminal LOAD _9I of the ninth LOAD, pin 2 of the analog switch and multiplexer Q3 is connected to the terminal LOAD _10I of the tenth LOAD, pin 4 of the analog switch and multiplexer Q3 is connected to the terminal LOAD _11I of the eleventh LOAD, pin 5 of the analog switch and multiplexer Q3 is connected to the terminal LOAD _12I of the twelfth LOAD, pin 12 of the analog switch and multiplexer Q3 is connected to the terminal LOAD _13I of the thirteenth LOAD, pin 13 of the analog switch and multiplexer Q3 is connected to the terminal LOAD _14I of the fourteenth LOAD, pin 14 of the analog switch and multiplexer Q3 is connected to the terminal LOAD _15I of the fifteenth LOAD, pin 15 of the analog switch and multiplexer Q3 is connected to the terminal LOAD _16I of the sixteenth LOAD, a pin 6, a pin 7 and a pin 8 of the analog switch and multiplexer Q3 are connected and then connected with an analog ground, a pin 16 of the analog switch and multiplexer Q3 is respectively connected with one end of the capacitor C42 and a circuit voltage end VDD, the other end of the capacitor C42 is connected with the analog ground, a pin 3 of the analog switch and multiplexer Q3 is connected with an analog-digital sampling end ADC _ IN0 of the MCU controller, a pin 9 of the analog switch and multiplexer Q3 is connected with a control signal output terminal CSA0 of the MCU controller, a pin 10 of the analog switch and multiplexer Q3 is connected with a control signal output terminal CSA1 of the MCU controller, and a pin 11 of the analog switch and multiplexer Q3 is connected with a control signal output terminal CSA2 of the MCU controller;

pin 1 of the analog switch and multiplexer Q7 is connected to the terminal LOAD1FUSE of the first LOAD, pin 2 of the analog switch and multiplexer Q7 is connected to the terminal LOAD2FUSE of the second LOAD, pin 4 of the analog switch and multiplexer Q7 is connected to the terminal LOAD3FUSE of the third LOAD, pin 5 of the analog switch and multiplexer Q7 is connected to the terminal LOAD4FUSE of the fourth LOAD, pin 12 of the analog switch and multiplexer Q7 is connected to the terminal LOAD5FUSE of the fifth LOAD, pin 13 of the analog switch and multiplexer Q7 is connected to the terminal LOAD6FUSE of the sixth LOAD, pin 14 of the analog switch and multiplexer Q7 is connected to the terminal LOAD7FUSE of the seventh LOAD, pin 15 of the analog switch and multiplexer Q7 is connected to the terminal LOAD8FUSE of the eighth LOAD, and pin 6 of the analog switch and multiplexer Q7 is connected to the terminal LOAD8FUSE of the eighth LOAD, Pin 7 and pin 8 are connected and then connected to an analog ground, pin 16 of the analog switch and multiplexer Q7 is connected to one end of the capacitor C46 and the circuit voltage end VDD, the other end of the capacitor C46 is connected to an analog ground, pin 3 of the analog switch and multiplexer Q7 is connected to the FUSE sampling end FUSE _ IN0 of the MCU controller, pin 9 of the analog switch and multiplexer Q7 is connected to the control signal output terminal CSA0 of the MCU controller, pin 10 of the analog switch and multiplexer Q7 is connected to the control signal output terminal CSA1 of the MCU controller, and pin 11 of the analog switch and multiplexer Q7 is connected to the control signal output terminal CSA2 of the MCU controller;

pin 1 of the analog switch and multiplexer Q8 is connected to the terminal LOAD9FUSE of the ninth LOAD, pin 2 of the analog switch and multiplexer Q8 is connected to the terminal LOAD10FUSE of the tenth LOAD, pin 4 of the analog switch and multiplexer Q8 is connected to the terminal LOAD11FUSE of the eleventh LOAD, pin 5 of the analog switch and multiplexer Q8 is connected to the terminal LOAD12FUSE of the twelfth LOAD, pin 12 of the analog switch and multiplexer Q8 is connected to the terminal LOAD13FUSE of the thirteenth LOAD, pin 13 of the analog switch and multiplexer Q8 is connected to the terminal LOAD14FUSE of the fourteenth LOAD, pin 14 of the analog switch and multiplexer Q8 is connected to the terminal LOAD15FUSE of the fifteenth LOAD, pin 15 of the analog switch and multiplexer Q8 is connected to the terminal LOAD16FUSE of the sixteenth LOAD, and pin 6 of the analog switch and multiplexer Q8 is connected to the terminal LOAD16FUSE of the sixteenth LOAD, Pin 7 and pin 8 are connected and then connected to an analog ground, pin 16 of the analog switch and multiplexer Q8 is connected to one end of the capacitor C47 and the circuit voltage end VDD, the other end of the capacitor C47 is connected to an analog ground, pin 3 of the analog switch and multiplexer Q8 is connected to the FUSE sampling end FUSE _ IN0 of the MCU controller, pin 9 of the analog switch and multiplexer Q8 is connected to the control signal output terminal CSA0 of the MCU controller, pin 10 of the analog switch and multiplexer Q8 is connected to the control signal output terminal CSA1 of the MCU controller, and pin 11 of the analog switch and multiplexer Q8 is connected to the control signal output terminal CSA2 of the MCU controller;

pin 1 of the analog switch and multiplexer Q4 is connected to the terminal ADC _ SC1 of the first load, pin 2 of the analog switch and multiplexer Q4 is connected to the terminal ADC _ SC2 of the second load, pin 4 of the analog switch and multiplexer Q4 is connected to the terminal ADC _ SC3 of the third load, pin 5 of the analog switch and multiplexer Q4 is connected to the terminal ADC _ SC4 of the fourth load, pin 12 of the analog switch and multiplexer Q4 is connected to the terminal ADC _ SC5 of the fifth load, pin 13 of the analog switch and multiplexer Q4 is connected to the terminal ADC _ SC6 of the sixth load, pin 14 of the analog switch and multiplexer Q4 is connected to the terminal ADC _ SC7 of the seventh load, pin 15 of the analog switch and multiplexer Q4 is connected to the terminal ADC _ SC8 of the eighth load, and pin 16 of the analog switch and multiplexer Q4 is connected to the terminal of the capacitor C43 and the electric circuit 43 The voltage end VDD, the other end of the capacitor C43 is connected to an analog ground, the pin 3 of the analog switch and multiplexer Q4 is connected to the analog-to-digital sampling end SC0 of the MCU controller and the collector of the transistor Q2, the base of the transistor Q2 is connected to one end of the resistor R43 and one end of the resistor R44, the other end of the resistor R43 is connected to the serial data transmitting end ADC _ SCON0 of the MCU controller, the other end of the resistor R44 is connected to the emitter of the transistor Q2 and then connected to the connection point of the pin 7 and the pin 8 of the analog switch and multiplexer Q4, and then connected to an analog ground, the pin 6 of the analog switch and multiplexer Q4 is connected to the data receiving end e0 of the data bus of the MCU controller, the pin 9 of the analog switch and multiplexer Q4 is connected to the control signal output end CSA0 of the MCU controller, and the pin 10 of the analog switch and multiplexer Q4 is connected to the control signal output end 1 of the MCU controller Pin 11 of the analog switch and multiplexer Q4 is connected to the control signal output terminal CSA2 of the MCU controller;

pin 1 of the analog switch and multiplexer Q5 is connected to the terminal ADC _ SC9 of the ninth load, pin 2 of the analog switch and multiplexer Q5 is connected to the terminal ADC _ SC10 of the tenth load, pin 4 of the analog switch and multiplexer Q5 is connected to the terminal ADC _ SC11 of the eleventh load, pin 5 of the analog switch and multiplexer Q5 is connected to the terminal ADC _ SC12 of the twelfth load, pin 12 of the analog switch and multiplexer Q5 is connected to the terminal ADC _ SC13 of the thirteenth load, pin 13 of the analog switch and multiplexer Q5 is connected to the terminal ADC _ SC14 of the fourteenth load, pin 14 of the analog switch and multiplexer Q5 is connected to the terminal ADC _ SC15 of the fifteenth load, pin 15 of the analog switch and multiplexer Q5 is connected to the terminal ADC _ SC16 of the sixteenth load, the pin 16 of the analog switch and multiplexer Q5 is connected to one end of the capacitor C44 and the circuit voltage end VDD, respectively, the other end of the capacitor C44 is connected to an analog ground, the pin 3 of the analog switch and multiplexer Q5 is connected to the analog-to-digital sampling end SC1 of the MCU controller and the collector of the transistor Q9, the base of the transistor Q9 is connected to one end of the resistor R46 and one end of the resistor R47, the other end of the resistor R46 is connected to the serial data transmitting end ADC _ SCON1 of the MCU controller, the other end of the resistor R47 is connected to the emitter of the transistor Q9, then to the connection point of the pin 7 and pin 8 of the analog switch and multiplexer Q5, and then to an analog ground, the pin 6 of the analog switch and multiplexer Q5 is connected to the data CSA receiving end 1 of the data bus of the MCU controller, the pin 9 of the analog switch and multiplexer Q5 is connected to the control signal output end 0 of the MCU controller, pin 10 of the analog switch and multiplexer Q5 is connected to the control signal output terminal CSA1 of the MCU controller, and pin 11 of the analog switch and multiplexer Q5 is connected to the control signal output terminal CSA2 of the MCU controller.

Furthermore, the output current detection unit comprises a load fuse input circuit, a load current detection circuit, a short-circuit protection and release circuit and a socket; the socket is used for connecting the load through the port, the load fuse input circuit is used for inputting fuse signals of the load, the load current detection circuit is used for transmitting the voltage control signals output by the MCU controller to the output switch unit, and the short-circuit protection and release circuit is used for carrying out short-circuit protection on the load; the output current detection unit corresponds to each of the loads, the load fuse input circuit, the load current detection circuit, the short-circuit protection and release circuit, and the socket CON1 can be expanded according to an increase in the number of the loads, and the circuit structure of the output current detection unit corresponding to each of the loads is the same;

taking the output current detection unit corresponding to the first load as an example,

the socket is CON1, and pin 1, pin 2, pin 3, and pin 4 of the socket CON1 are connected to the negative electrode of the first load;

the load fuse input circuit comprises a voltage stabilizing diode D10, a capacitor C75, resistors R51, R52, R53 and R69; one end of the resistor R51 is connected to the negative electrode of the first LOAD, the other end of the resistor 51 is connected to one end of the resistor R52, the other end of the resistor R52 is connected to the negative electrode of the zener diode D10 and one end of the capacitor C75, respectively, a connection point at which one end of the resistor R53 is connected to one end of the resistor R69 is connected to one end of the capacitor C75, the other end of the resistor R53 is connected to the terminal LOAD1FUSE, the other end of the resistor R69 is connected to the other end of the capacitor C75 and the positive electrode of the zener diode D10, and the positive electrode of the zener diode D10 is also connected to analog ground;

the load current detection circuit comprises an operational amplifier U10B, capacitors C67, C68, C69 and C70, resistors R54, R55, R56, R57 and R58; the non-inverting input end of the operational amplifier U10B is connected to one end of the capacitor C69 and one end of the resistor R54, respectively, the other end of the capacitor C69 is connected to an analog ground, the other end of the resistor R54 is connected to the positive electrode of the first LOAD and one end of the capacitor C67, the other end of the capacitor C67 is connected to an analog ground and one end of the resistor R55, the other end of the resistor R55 is connected to the inverting input end of the operational amplifier U10B, one end of the resistor R56 and one end of the capacitor C68, respectively, the output end of the operational amplifier U10B is connected to the other end of the resistor R56 and one end of the resistor R57, the other end of the resistor R57 is connected to one end of the capacitor C70 and one end of the resistor R58, one end of the resistor R58 is further connected to the LOAD _1I terminal, and the other end of the resistor 539r 58 is connected to the voltage reference value terminal VREF3V, the other end of the capacitor C70 is connected with an analog ground and the other end of the capacitor C68 respectively;

the short-circuit protection and release circuit comprises an operational amplifier U10A, MOS transistors Q11 and Q13, current detectors RS1 and RS3, a triode Q14, diodes D8, D11, D12 and D13, capacitors C76, C77 and C79, resistors R70, R71, R73, R74, R75, R76, R77, R78 and R59; a positive power supply of the operational amplifier U10A is connected to a circuit voltage VDD and one end of the capacitor C79, the other end of the capacitor C79 is connected to-5V, a negative power supply of the operational amplifier U10A is connected to-5V, a non-inverting input terminal of the operational amplifier U10A is connected to one end of the resistor R73, one end of the capacitor C76 and one end of the resistor R74, one end of the resistor R74 is further connected to the terminal ADC _ SC1, the other end of the capacitor C76 is connected to an analog ground, the other end of the resistor R73 is connected to a positive electrode of the first load, an inverting input terminal of the operational amplifier U10A is connected to one end of the capacitor C77, one end of the resistor R71 and one end of the resistor R70, the other end of the resistor R70 is connected to the voltage reference terminal VREF3V, and an output terminal of the operational amplifier U10A is connected to a positive electrode of the diode D11, The anode of the diode D12 and one end of the resistor R75, the cathode of the diode D11 is connected to the other end of the resistor R74, the other end of the resistor R71, the other end of the capacitor C77, the other end of the resistor R75, and one end of the resistor R77 are connected to the emitter of the transistor Q14 and then connected to analog ground, the cathode of the diode D12 is connected to the cathode of the diode D13 and one end of the resistor R76, the anode of the diode D13 is connected to the first LOAD switch control terminal LOAD1-ON of the MCU controller, the other end of the resistor R76 is connected to the base of the transistor Q14 and the other end of the resistor 686r 9, the collector of the transistor Q14 is connected to the gate of the MOS transistor Q13, the gate of the MOS transistor Q11, and one end of the resistor R78, the other end of the resistor R78 is connected to the power supply voltage terminal 1, and the gate of the resistor VCC R11 are connected to the gate of the transistor Q11, the other end of the resistor R59 is connected with the source of the MOS tube Q11, the anode of the diode D8, one end of the current detector RS1, the source of the MOS tube Q13 and one end of the current detector RS3, one end of the current detector RS3 is also connected with the anode of the first load, the other end of the current detector RS3 is connected with the analog ground and the other end of the current detector RS1, the drain of the MOS tube Q13 is connected with the drain of the MOS tube Q11 and the cathode of the diode D8, and the drain of the MOS tube Q11 is connected with the cathode of the first load.

Further, the RS485 pair FSU acquisition communication interface unit includes an interface driver U2, a dual-channel digital isolator OP2, inductors B2 and B3, voltage-stabilizing diodes D2 and D3, capacitors C2, C3 and C5, resistors R1, R2, R3, R4, R7, R8, and R9; pin 1 of the interface driver U2 is connected to one end of the resistor R2, the other end of the resistor R2 is connected to a 485 data acquisition receiving terminal RS485_ DOWN _ RX of the MCU controller, pin 2 and pin 3 of the interface driver U2 are connected to one end of the resistor R4 and a 485 data acquisition enabling terminal RS485_ DOWN _ EN of the MCU controller, the other end of the resistor R4 is connected to an analog ground, pin 4 of the interface driver U2 is connected to a 485 data acquisition transmitting terminal RS485_ DOWN _ TX of the MCU controller, pin 5 of the interface driver U2 is connected to an analog ground, pin 6 of the interface driver U2 is connected to one end of the resistor R9, one end of the inductor B3 and one end of the resistor R7, the other end of the resistor R7 is connected to a circuit voltage, the other end of the inductor B3 is connected to a negative electrode of the zener diode D2 and a terminal RS485_2_ a, the anode of the zener diode D2 is connected to an analog ground, the pin 7 of the interface driver U2 is connected to one end of the resistor R8, one end of the inductor B2, and the other end of the resistor R9, respectively, the pin 8 of the interface driver U2 is connected to one end of the capacitor C5 and the circuit voltage VDD, the other end of the capacitor C5 is connected to the other end of the resistor R8, the other end of the resistor R8 is connected to an analog ground and the anode of the zener diode D3, respectively, and the other end of the inductor B2 is connected to the cathode of the zener diode D3 and the terminal RS485_2_ B, respectively;

pin 1 of the dual-channel digital isolator OP2 is connected to one end of the capacitor C2 and 3.3V, respectively, the other end of the capacitor C2 is connected to an analog ground, pin 2 of the dual-channel digital isolator OP2 is connected to one end of the resistor R1, the other end of the resistor R1 is connected to the 485 data acquisition receiving terminal RS485_ DOWN _ RX of the MCU controller, pin 3 of the dual-channel digital isolator OP2 is connected to the 485 data acquisition transmitting terminal RS485_ DOWN _ TX of the MCU controller, pin 4 of the dual-channel digital isolator OP2 is connected to the analog ground, pin 5 of the dual-channel digital isolator OP2 is connected to the signal ground, pin 6 of the dual-channel digital isolator OP2 is connected to the data acquisition transmitting terminal 4G _ TX of the GPS/4G remote upload or control module, pin 7 of the dual-channel digital isolator OP2 is connected to one end of the resistor R3, and the other end of the resistor R3 is connected to the data acquisition receiving terminal 4G remote upload or control module of the GPS/4G remote control module RX, and pin 8 of the dual-channel digital isolator OP2 is connected to one end of the capacitor C3 and 3.3V, respectively, and the other end of the capacitor C3 is connected to signal ground.

Further, the RS485 pair upper communication interface unit includes an interface driver U1, a dual channel digital isolator OP1, an optical coupler OP3, inductors B1 and B6, zener diodes D1 and D7, capacitors C1 and C4, resistors R22, R23, R5, R6, and R27; pin 1 of the interface driver U1 is connected to pin 7 of the dual-channel digital isolator OP1, pin 2 and pin 3 of the interface driver U1 are connected to one end of the resistor R23 and pin 4 of the optocoupler OP1 respectively, the other end of the resistor R23 is connected to signal ground, pin 3 of the optocoupler OP3 is connected to +5V2, pin 1 of the optocoupler OP3 is connected to 3.3V, pin 2 of the optocoupler OP3 is connected to one end of the resistor R22, the other end of the resistor R22 is connected to the 485 data upload enable end RS _ UP _ EN of the MCU controller, pin 4 of the interface driver U1 is connected to pin 6 of the dual-channel digital isolator OP1, pin 5 of the interface driver U1 is connected to signal ground, pin 6 of the interface driver U1 is connected to one end of the resistor R6, one end of the inductor B6 and one end of the resistor R27 respectively, the other end of the resistor R27 is connected with +5V2, the other end of the inductor B6 is connected with the cathode of the zener diode D7 and the terminal RS485_1_ a, the anode of the zener diode D7 is connected with a signal ground, the pin 7 of the interface driver U1 is connected with one end of the resistor R5, one end of the inductor B1 and the other end of the resistor R6, the other end of the resistor R5 is connected with a signal ground and the anode of the zener diode D1, the other end of the inductor B1 is connected with the cathode of the zener diode D1 and the terminal RS485_1_ B, the pin 8 of the interface driver U1 is connected with +5V2, the pin 1 of the dual-channel digital isolator OP1 is connected with one end of the capacitor C1 and 3.3V, the other end of the capacitor C1 is connected with an analog ground, the pin 2 of the dual-channel digital isolator OP1 is connected with the receiving end of the MCU 485 RX 485, a pin 3 of the dual-channel digital isolator OP1 is connected to a 485 data uploading transmitter RS485_ UP _ TX of the MCU controller, a pin 4 of the dual-channel digital isolator OP1 is connected to an analog ground, a pin 5 of the dual-channel digital isolator OP1 is connected to a signal ground, a pin 8 of the dual-channel digital isolator OP1 is respectively connected to one end of the capacitor C4 and +5V2, and the other end of the capacitor C4 is connected to the signal ground.

Further, the ferroelectric memory unit comprises a ferroelectric memory U5, a capacitor C16, resistors R24, R51 and R52; pin 1, pin 2, pin 3, and pin 4 of the ferroelectric memory U5 are connected to a ground, pin 5 of the ferroelectric memory U5 is connected to a serial data receiving terminal RTC _ SDA1 of the MCU controller and one end of the resistor R51, the other end of the resistor R51 is connected to one end of the resistor R52 and then connected to 3.3V, pin 6 of the ferroelectric memory U5 is connected to the other end of the resistor R52 and a serial data transmitting terminal RTC _ SCL1 of the MCU controller, pin 7 of the ferroelectric memory U5 is connected to one end of the resistor R24, the other end of the resistor R24 is connected to one end of the capacitor C16 and the ground, and pin 8 of the ferroelectric memory U5 is connected to the other end of the capacitor C16 and 3.3V, respectively.

Compared with the prior art, the intelligent energy management equipment provided by the invention is provided with a plurality of ports, and each port is connected with an independent load; the intelligent energy management equipment is used for realizing point-to-point power utilization management for the load connected with each port; the device mainly comprises a power input unit, an auxiliary power supply unit, an MCU controller, an output current detection unit, an output switch unit, an ADC reference voltage unit, an RS485 pair FSU acquisition communication interface unit, an RS485 pair upper communication interface unit and a GPS/4G remote uploading or control module; the communication link is established through the short messages of the 4G and Beidou third-generation system, and meanwhile, the 485 communication interface is compatible to be in butt joint with the iron tower base station.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.

Fig. 1 is a block diagram of a system of an intelligent energy management device according to an embodiment of the present invention.

Fig. 2 is a schematic diagram of a power input unit circuit of the intelligent energy management device according to an embodiment of the present invention.

Fig. 3 is a schematic circuit diagram of an auxiliary power supply unit of the intelligent energy management device according to an embodiment of the present invention.

Fig. 4 is a schematic circuit diagram of an output switch unit of the intelligent energy management device according to an embodiment of the present invention.

Fig. 5 is a schematic circuit diagram of an output current detection unit of the intelligent energy management device according to an embodiment of the present invention.

Fig. 6 is a schematic diagram of an RS485 to FSU acquisition communication interface unit circuit of the smart energy management device according to an embodiment of the present invention.

Fig. 7 is a schematic diagram of an RS485 pair upper communication interface unit circuit of the intelligent energy management device according to the embodiment of the present invention.

Fig. 8 is a schematic circuit diagram of a ferroelectric memory cell of an intelligent energy management device according to an embodiment of the present invention.

Fig. 9 is a schematic circuit diagram of an audio prompt unit of the smart energy management device according to an embodiment of the invention.

Fig. 10 is a schematic circuit diagram of a real-time clock unit of the intelligent energy management device according to an embodiment of the invention.

Fig. 11 is a schematic circuit diagram of a FLASH memory unit of the smart energy management device according to an embodiment of the present invention.

Fig. 12 is a schematic diagram of an LCD display unit circuit of the smart energy management device according to an embodiment of the present invention.

Fig. 13 is a schematic diagram of a buck regulator unit of the intelligent energy management device according to an embodiment of the present invention.

Fig. 14 is a schematic diagram of an ADC reference voltage unit circuit of the smart energy management apparatus according to an embodiment of the invention.

The mark in the figure is 1, MCU controller; 2. a power input unit; 3. an output current detection unit; 4. an output switch unit; 5. an auxiliary power supply unit; 6. a sound prompt unit; 7. a real-time clock unit; 8. a FLASH storage unit; 9. a ferroelectric memory cell; 10. an LCD display unit; 11. a voltage reduction and stabilization unit; 12. an ADC reference voltage unit; 13. RS485 collects the communication interface unit to FSU; 14. RS485 couples the upper communication interface unit; 15. a GPS/4G remote uploading or control module; 01. an external power supply; 02. a port; 03. a load; 04. an iron tower base station; 05. and (4) an upper computer.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

The same or similar reference numerals in the drawings of the present embodiment correspond to the same or similar components; in the description of the present invention, it should be understood that if there is an orientation or positional relationship indicated by the terms "upper", "lower", "left", "right", etc. based on the orientation or positional relationship shown in the drawings, it is only for convenience of describing the present invention and simplifying the description, but it is not intended to indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and therefore, the terms describing the positional relationship in the drawings are only used for illustrative purposes and are not to be construed as limiting the present patent, and the specific meaning of the terms may be understood by those skilled in the art according to specific circumstances.

The technical solution of the present invention is described in detail below with reference to the accompanying drawings and specific embodiments.

As shown in fig. 1 to 14, the preferred embodiment of the present invention is provided.

Referring to fig. 1, the intelligent energy management device provided by the invention is provided with a plurality of ports 02, wherein each port 02 is connected with an independent load 03; the intelligent energy management equipment is used for realizing point-to-point power utilization management for the load 03 connected with each port 02; the intelligent energy management device comprises a power input unit 2, an auxiliary power supply unit 5, an MCU (microprogrammed control unit) controller 1, an output current detection unit 3, an output switch unit 4, an ADC (analog-to-digital converter) reference voltage unit 12, an RS485 pair FSU (frequency selective unit) acquisition communication interface unit 13, an RS485 pair upper communication interface unit 14 and a GPS/4G remote uploading or control module 15; the MCU controller 1 is respectively and electrically connected with an auxiliary power supply unit 5, an output current detection unit 3, an output switch unit 4, an ADC reference voltage unit 12, an RS485 pair FSU acquisition communication interface unit 13 and an RS485 pair upper communication interface unit 14, the power input unit 2 is respectively and electrically connected with the auxiliary power supply unit 5 and the output current detection unit 3, the GPS/4G remote uploading or control module 15 is respectively and electrically connected with the MCU controller 1, the auxiliary power supply unit 5 and the RS485 pair FSU acquisition communication interface unit 13, and the auxiliary power supply unit 5 is also electrically connected with the output current detection unit 3;

the ADC reference voltage unit 12 is used for generating a reference voltage value so as to determine the accurate amplitude of the measured signal; the RS485 pair FSU acquisition communication interface unit 13 is used for the MCU controller 1 and the iron tower base station 04 to perform data transmission through a 485 communication interface, and transmits the data of the iron tower base station 04 to a GPS/4G remote uploading or control module 15; the RS485 pair of upper communication interface units 14 are used for data transmission between the MCU controller 1 and the upper computer 05 and transmitting data of the MCU controller 1 to the upper computer 05; the GPS/4G remote uploading or control module 15 is used for establishing a communication link with the energy management platform through the 4G and Beidou third generation system short messages; the power input unit 2 is used for converting an external power supply 01 into a working power supply of the intelligent energy management equipment; the auxiliary power supply unit 5 is used for converting a working power supply into a power supply required by the MCU controller 1, the GPS/4G remote uploading or control module 15 and the output current detection unit 3; the output current detection unit 3 is used for converting a working power supply into an electric signal and transmitting the electric signal to the MCU controller 1, and after the MCU controller 1 processes and analyzes data acquired by the FSU acquisition communication interface unit 13 according to the ADC reference voltage unit 12 and the RS485, the voltage control signal generated for the port 02 is transmitted to the output switch unit 4 through the output current detection unit 3; the output current detection unit 3 can be expanded in accordance with the increase of the port 02; the output switching unit 4 is used to transmit the voltage control signal to the load 03 through the port 02.

The intelligent energy management device provided by the technical scheme is provided with a plurality of ports 02, and each port 02 is connected with an independent load 03; the intelligent energy management equipment is used for realizing point-to-point power utilization management for the load 03 connected with each port 02; the device mainly comprises a power input unit 2, an auxiliary power supply unit 5, an MCU controller 1, an output current detection unit 3, an output switch unit 4, an ADC reference voltage unit 12, an RS485 pair FSU acquisition communication interface unit 13, an RS485 pair upper communication interface unit 14 and a GPS/4G remote uploading or control module 15; the communication link is established through the short messages of the 4G and Beidou third-generation system, and meanwhile, the 485 communication interface is compatible to be in butt joint with the iron tower base station 04, so that the invention realizes the refined management and control of the energy management platform on the power consumption of the port 02, including the steps of remotely controlling the power-on of the port 02, controlling the power to each port 02, acquiring the load of the port 02 and counting the resources of the port 02.

Referring to fig. 1, the smart energy management device further includes a sound prompt unit 6, a real-time clock unit 7, a FLASH memory unit 8, a ferroelectric memory unit 9, an LCD display unit 10, and a voltage reduction and stabilization unit 11; the sound prompting unit 6 is used for giving an alarm sound when the intelligent energy management equipment is in an abnormal working state or giving a prompt sound when the intelligent energy management equipment is in a switching working state; the real-time clock unit 7 is used for providing stable running frequency for the MCU controller 1; the FLASH storage unit 8 is used for storing the data of the MCU controller 1; the ferroelectric storage unit 9 is used for storing the data of the MCU controller 1 under the condition of low power; the LCD display unit 10 is used for connecting a display and displaying the data of the MCU controller 1 to workers through the display; the buck regulator unit 11 is used to provide a voltage of 3.3V for the MCU controller 1.

As an embodiment of the present invention, referring to fig. 2, the power input unit 2 includes transformer coils T1A, T1B, T1C, T1D, T1E, a voltage stabilization chip U26, a fuse F1, a MOS transistor Q59, polar capacitors E1, E2, E3, E4, E5, E6, E7, E8, capacitors C196, C197, C198, C199, C202, C203, C204, C205, diodes D88, D89, D90, D91, D92, D93, resistors TH1, R339, R340, R341, R342, R343, R344, R345, R346, R347, R348, R349, R350, R352, R353; one end of a fuse F1 IS connected with the anode of an external power supply 01, the other end of the fuse F1 IS connected with one end of a resistor TH1, the other end of a resistor TH1 IS connected with the anode of a diode D88, the cathode of a diode D88 IS respectively connected with the anode of a polar capacitor E1 and one end of a resistor R339, the other end of the resistor R339 IS respectively connected with one end of a resistor R341 and one end of a capacitor C195, the other end of the resistor R339 IS connected with one end of a resistor R340, the other end of the resistor R340 IS connected with an IS5, one end of the capacitor C195 IS also respectively connected with one end of a resistor R344 and a pin 1 of a transformer coil T1A, the other end of the resistor R344 IS connected with one end of a resistor R343, the other end of the capacitor C195 IS connected with the cathode of a diode D89 after being connected with the other end of the resistor R343, a pin 2 of the transformer coil T1A IS respectively connected with the anode of a diode D89 and the, the other end of the resistor R346 IS connected with the IR2, the source of the MOS transistor D59 IS connected with one end of the resistor R348, one end of the resistor R349, the other end of the resistor R347 and one end of the resistor R350 to form the back-connection terminal IS2, the other end of the resistor R348, the other end of the resistor R349 and the other end of the resistor R350 are connected with the back-connection terminal GND3, the other end of the resistor R342 IS connected with the VCC10, the anode of the polar capacitor E5 and one end of the resistor R345 respectively, the other end of the resistor R345 IS connected with the cathode of the diode D92, the anode of the diode D92 IS connected with the pin 7 of the transformer coil T1D, the pin 8 of the transformer coil T1D IS connected with the cathode of the polar capacitor E5 and the cathode of the polar capacitor E1 respectively; pin 4 of transformer coil T1B is connected to the anode of diode D91, the cathode of diode D91 is connected to the anode of polar capacitor E2 and one end of capacitor C196, one end of capacitor C196 is also connected to the anode of polar capacitor E4, the anode of polar capacitor E4 is also connected to one end of capacitor C198, one end of capacitor C198 is also connected to the power supply voltage VCC, the other end of capacitor C198 is connected to one end of capacitor PE and capacitor C199, the other end of capacitor C199 is connected to the cathode of polar capacitor E4 and one end of capacitor C197, the other end of capacitor C199 is also connected to analog ground, the cathode of polar capacitor E4 is also connected to the other end of capacitor C196 and the anode of capacitor E3, the other end of capacitor C196 is connected to the cathode of polar capacitor E2 and pin 3 of transformer coil T1B, pin 3 of transformer coil T1B is connected to pin 6 of transformer coil T1C, and pin 5 of transformer coil T1C is connected to the cathode of diode D90, the anode of the diode D90 is respectively connected with the cathode of the polar capacitor E3 and the other end of the capacitor C197, and the anode of the diode D90 is also connected with-5V; pin 9 of transformer coil T1E is connected to the anode of diode D93, the cathode of diode D93 is connected to the anode of polar capacitor E6, one end of capacitor C202, the anode of polar capacitor E7, one end of capacitor C203, one end of resistor R352, and one end of resistor R353 in turn, and then connected to pin 1 of voltage stabilizing chip U26, pin 10 of transformer coil T1E is connected to the cathode of polar capacitor E6, the other end of capacitor C202, the cathode of polar capacitor E7, the other end of capacitor C203, the other end of resistor R352, and the other end of resistor R353, and then connected to pin 2 of voltage stabilizing chip U26, pin 2 of voltage stabilizing chip U26 is connected to the cathode of polar capacitor E8, one end of capacitor C205, and one end of capacitor C204, one end of capacitor C205 is connected to signal ground, the other end of capacitor C204 is connected to terminal PE, and pin 3 of voltage stabilizing chip U6 is connected to the anode of polar capacitor E8 and the other end of capacitor C205, pin 3 of the regulator chip U26 is also connected to + 5V.

As an embodiment of the present invention, referring to fig. 3, the auxiliary power supply unit 5 includes a current mode controller IC1, sockets CON33 and CON34, optocouplers U27B, U27A, capacitors C200, C201, C206, C207, C208, C209, C210, C211, C212, a zener diode U28, resistors R354, R355, R356, R357, R358, R359, R360, R351, R361, R362, R363, R364, R365; the current mode controller IC1 is a dc-dc switching regulator that can regulate the output voltage by varying the peak current cycle by cycle to ultimately get a stable output voltage; the socket CON33 is used for connecting the GPS/4G remote uploading or control module 15, and the socket CON34 is used for connecting the output current detection unit 3; pin 1 of current mode controller IC1 is connected to one end of capacitor C200 and one end of resistor R357, the other end of capacitor C200 and the other end of resistor R357 are connected to pin 2 of current mode controller IC1 and pin 3 of optocoupler U27B, pin 3 of optocoupler U27B is further connected to one end of resistor R356, the other end of resistor R356 is connected to GND3, pin 4 of optocoupler U27B is connected to one end of resistor R354, the other end of resistor R354 is connected to VCCVREF, pin 8 of current mode controller IC1 is connected to one end of resistor R355 and VCCVREF, the other end of resistor R355 is connected to one end of capacitor C206 and one end of capacitor C207 and then to pin 4 of current mode controller IC1, one end of capacitor C208 is connected to VCCVREF, the other end of capacitor C208 and the other end of capacitor C206 are connected to GND, the other end of capacitor C207 and the other end of capacitor C206 and then to terminal 3, pin 4 of current mode controller IC1 is connected to one end of capacitor C358 and one end of resistor C209, the other end of the capacitor C209 and the other end of the resistor R358 are connected and then connected to a pin 3 of a current mode controller IC1, the pin 3 of the current mode controller IC1 IS further connected to one end of a resistor R359, a terminal IS5 and one end of a capacitor C210, the other end of the capacitor C210 IS connected to a pin 5 of the current mode controller IC1 and then connected to a terminal GND3, the other end of the resistor R359 IS connected to a terminal IS2, a pin 6 of the current mode controller IC1 IS connected to a terminal DR2, a pin 7 of the current mode controller IC1 IS connected to a terminal VCC10 and one end of a capacitor C201, and the other end of the capacitor C201 IS connected to a terminal GND 3; pin 1 of the optocoupler U27A is connected with one end of a resistor R360 and one end of a resistor R351 respectively, pin 2 of the optocoupler U27A is connected with the negative electrode of a voltage regulator diode U28 and the other end of the resistor R360 respectively, the other end of the resistor R360 is also connected with one end of a capacitor C211, the other end of the capacitor C211 is connected with one end of a resistor R361, the other end of the resistor R361 is connected with one end of a resistor R363 and one end of a capacitor C212 respectively, the positive electrode of the voltage regulator diode U28 is connected with a signal ground, the positive electrode of the voltage regulator diode U28 is also connected with one end of a resistor R365, the other end of the resistor R365 is connected with the other end of the resistor R363 and one end of a resistor R364 respectively, the other end of the capacitor C212 is connected with one end of the resistor R362, the other end of the resistor R; pin 1 of the socket CON33 is connected to 7V, pin 2 of the socket CON33 is connected to signal ground, pin 3 of the socket CON33 is connected to terminal 3.3V1, pin 4 of the socket CON33 is connected to the GPS/4G remote upload or control module 15 data receiving terminal 4G _ RX, pin 5 of the socket CON33 is connected to the GPS/4G remote upload or control module 15 data transmitting terminal 4G _ TX, pin 1 of the socket CON34 is connected to the circuit voltage VDD, pin 4 of the socket CON34 is connected to ground, pin 2 of the socket CON34 is connected to terminal RS485_2_ a, and pin 3 of the socket CON34 is connected to terminal RS485_2_ B.

As an embodiment of the present invention, referring to fig. 4, the output switching unit 4 includes analog switches and multiplexers Q3, Q4, Q5, Q6, Q7, Q8, triodes Q2 and Q9, capacitors C42, C43, C44, C45, C46, C47, resistors R43, R46, R47; the analog switch and multiplexer Q6 is used for outputting voltage control signals to the first to eighth loads, the analog switch and multiplexer Q3 is used for outputting voltage control signals to the ninth to sixteenth loads, the analog switch and multiplexer Q7 is used for outputting control signals to the fuse of the first load to the fuse of the eighth load, the analog switch and multiplexer Q8 is used for outputting control signals to the fuse of the ninth to sixteenth load, the analog switch and multiplexer Q1 is used for collecting current signals of the first to eighth loads, and the analog switch and multiplexer Q5 is used for collecting current signals of the ninth to sixteenth loads;

pin 1 of the analog switch and multiplexer Q6 is connected to the terminal LOAD _1I of the first LOAD, pin 2 of the analog switch and multiplexer Q6 is connected to the terminal LOAD _2I of the second LOAD, pin 4 of the analog switch and multiplexer Q6 is connected to the terminal LOAD _3I of the third LOAD, pin 5 of the analog switch and multiplexer Q6 is connected to the terminal LOAD _4I of the fourth LOAD, pin 12 of the analog switch and multiplexer Q6 is connected to the terminal LOAD _5I of the fifth LOAD, pin 13 of the analog switch and multiplexer Q6 is connected to the terminal LOAD _6I of the sixth LOAD, pin 14 of the analog switch and multiplexer Q6 is connected to the terminal LOAD _7I of the seventh LOAD, pin 15 of the analog switch and multiplexer Q6 is connected to the terminal LOAD _8I of the eighth LOAD, pin 6, pin 7, and pin 8 of the analog switch and multiplexer Q6 are connected to analog ground, pin 16 of the analog switch and multiplexer Q6 is connected to one end of a capacitor C45 and a circuit voltage end VDD respectively, the other end of the capacitor C45 is connected to an analog ground, pin 3 of the analog switch and multiplexer Q6 is connected to an analog-to-digital sampling end ADC _ IN0 of the MCU controller 1, pin 9 of the analog switch and multiplexer Q6 is connected to a control signal output terminal CSA0 of the MCU controller 1, pin 10 of the analog switch and multiplexer Q6 is connected to a control signal output terminal CSA1 of the MCU controller 1, and pin 11 of the analog switch and multiplexer Q6 is connected to a control signal output terminal CSA2 of the MCU controller 1;

pin 1 of the analog switch and multiplexer Q3 is connected to the terminal LOAD _9I of the ninth LOAD, pin 2 of the analog switch and multiplexer Q3 is connected to the terminal LOAD _10I of the tenth LOAD, pin 4 of the analog switch and multiplexer Q3 is connected to the terminal LOAD _11I of the eleventh LOAD, pin 5 of the analog switch and multiplexer Q3 is connected to the terminal LOAD _12I of the twelfth LOAD, pin 12 of the analog switch and multiplexer Q3 is connected to the terminal LOAD _13I of the thirteenth LOAD, pin 13 of the analog switch and multiplexer Q3 is connected to the terminal LOAD _14I of the fourteenth LOAD, pin 14 of the analog switch and multiplexer Q3 is connected to the terminal LOAD _15I of the fifteenth LOAD, pin 15 of the analog switch and multiplexer Q3 is connected to the terminal LOAD _16I of the sixteenth LOAD, pin 6, pin 7 and pin 8 of the analog switch and multiplexer Q3 are connected to analog ground, pin 16 of the analog switch and multiplexer Q3 is connected to one end of a capacitor C42 and a circuit voltage end VDD respectively, the other end of the capacitor C42 is connected to an analog ground, pin 3 of the analog switch and multiplexer Q3 is connected to an analog-to-digital sampling end ADC _ IN0 of the MCU controller 1, pin 9 of the analog switch and multiplexer Q3 is connected to a control signal output terminal CSA0 of the MCU controller 1, pin 10 of the analog switch and multiplexer Q3 is connected to a control signal output terminal CSA1 of the MCU controller 1, and pin 11 of the analog switch and multiplexer Q3 is connected to a control signal output terminal CSA2 of the MCU controller 1;

pin 1 of the analog switch and multiplexer Q7 is connected to the terminal LOAD1FUSE of the first LOAD, pin 2 of the analog switch and multiplexer Q7 is connected to the terminal LOAD2FUSE of the second LOAD, pin 4 of the analog switch and multiplexer Q7 is connected to the terminal LOAD3FUSE of the third LOAD, pin 5 of the analog switch and multiplexer Q7 is connected to the terminal LOAD4FUSE of the fourth LOAD, pin 12 of the analog switch and multiplexer Q7 is connected to the terminal LOAD5FUSE of the fifth LOAD, pin 13 of the analog switch and multiplexer Q7 is connected to the terminal LOAD6FUSE of the sixth LOAD, pin 14 of the analog switch and multiplexer Q7 is connected to the terminal LOAD7FUSE of the seventh LOAD, pin 15 of the analog switch and multiplexer Q7 is connected to the terminal LOAD8FUSE of the eighth LOAD, pin 6, pin 7 and pin 8 of the analog switch and multiplexer Q7 are connected to analog ground, pin 16 of the analog switch and multiplexer Q23 is connected to the voltage terminal VDD C734 of the terminal 3, the other end of the capacitor C46 is connected with an analog ground, a pin 3 of an analog switch and multiplexer Q7 is connected with a FUSE sampling end FUSE _ IN0 of the MCU controller 1, a pin 9 of the analog switch and multiplexer Q7 is connected with a control signal output end CSA0 of the MCU controller 1, a pin 10 of the analog switch and multiplexer Q7 is connected with a control signal output end CSA1 of the MCU controller 1, and a pin 11 of the analog switch and multiplexer Q7 is connected with a control signal output end CSA2 of the MCU controller 1;

pin 1 of analog switch and multiplexer Q8 is connected to terminal LOAD9FUSE of the ninth LOAD, pin 2 of analog switch and multiplexer Q8 is connected to terminal LOAD10FUSE of the tenth LOAD, pin 4 of analog switch and multiplexer Q8 is connected to terminal LOAD11FUSE of the eleventh LOAD, pin 5 of analog switch and multiplexer Q8 is connected to terminal LOAD12FUSE of the twelfth LOAD, pin 12 of analog switch and multiplexer Q8 is connected to terminal LOAD13FUSE of the thirteenth LOAD, pin 13 of analog switch and multiplexer Q8 is connected to terminal LOAD14FUSE of the fourteenth LOAD, pin 14 of analog switch and multiplexer Q8 is connected to terminal LOAD15FUSE of the fifteenth LOAD, pin 15 of analog switch and multiplexer Q8 is connected to terminal LOAD16FUSE of the sixteenth LOAD, pin 6, pin 7 and pin 8 of analog switch and multiplexer Q8 are connected to analog ground, pin 16 and pin 734 of pin 16 of analog switch and multiplexer Q23 are connected to VDD, respectively, the other end of the capacitor C47 is connected with an analog ground, a pin 3 of an analog switch and multiplexer Q8 is connected with a FUSE sampling end FUSE _ IN0 of the MCU controller 1, a pin 9 of the analog switch and multiplexer Q8 is connected with a control signal output end CSA0 of the MCU controller 1, a pin 10 of the analog switch and multiplexer Q8 is connected with a control signal output end CSA1 of the MCU controller 1, and a pin 11 of the analog switch and multiplexer Q8 is connected with a control signal output end CSA2 of the MCU controller 1;

pin 1 of the analog switch and multiplexer Q4 is connected to the terminal ADC _ SC1 of the first load, pin 2 of the analog switch and multiplexer Q4 is connected to the terminal ADC _ SC2 of the second load, pin 4 of the analog switch and multiplexer Q4 is connected to the terminal ADC _ SC3 of the third load, pin 5 of the analog switch and multiplexer Q4 is connected to the terminal ADC _ SC4 of the fourth load, pin 12 of the analog switch and multiplexer Q4 is connected to the terminal ADC _ SC5 of the fifth load, pin 13 of the analog switch and multiplexer Q4 is connected to the terminal ADC _ SC6 of the sixth load, pin 14 of the analog switch and multiplexer Q4 is connected to the terminal ADC _ SC7 of the seventh load, pin 15 of the analog switch and multiplexer Q4 is connected to the terminal ADC _ SC8 of the eighth load, pin 16 of the analog switch and multiplexer Q4 is connected to one end of the capacitor C43 and the circuit voltage terminal VDD, the other end of the capacitor C43 is connected with an analog ground, a pin 3 of the analog switch and multiplexer Q4 is respectively connected with an analog-digital sampling end SC0 of the MCU controller 1 and a collector of a triode Q2, a base of the triode Q2 is respectively connected with one end of a resistor R43 and one end of a resistor R44, the other end of the resistor R43 is connected with a serial port data sending end ADC _ SCON0 of the MCU controller 1, the other end of the resistor R44 is connected with an emitter of a triode Q2 and then connected with a connection point of a pin 7 and a pin 8 of the analog switch and multiplexer Q4, and then connected with the analog ground, a pin 6 of the analog switch and multiplexer Q4 is connected with a data receiving end CSA0 of a data bus of the MCU controller 1, a pin 9 of the analog switch and multiplexer Q4 is connected with a control signal output end CSA0 of the MCU controller 1, a pin 10 of the analog switch and multiplexer Q6 is connected with a control signal output end 1 of the MCU controller 1, and a pin 73711 of the analog switch and multiplexer Q4 is connected with a control signal output end;

pin 1 of the analog switch and multiplexer Q5 is connected to the terminal ADC _ SC9 of the ninth load, pin 2 of the analog switch and multiplexer Q5 is connected to the terminal ADC _ SC10 of the tenth load, pin 4 of the analog switch and multiplexer Q5 is connected to the terminal ADC _ SC11 of the eleventh load, pin 5 of the analog switch and multiplexer Q5 is connected to the terminal ADC _ SC12 of the twelfth load, pin 12 of the analog switch and multiplexer Q5 is connected to the terminal ADC _ SC13 of the thirteenth load, pin 13 of the analog switch and multiplexer Q5 is connected to the terminal ADC _ SC14 of the fourteenth load, pin 14 of the analog switch and multiplexer Q5 is connected to the terminal ADC _ SC15 of the fifteenth load, pin 15 of the analog switch and multiplexer Q5 is connected to the terminal ADC _ SC16 of the sixteenth load, pin 16 of the analog switch and multiplexer Q5 is connected to one end of the capacitor C44 and the circuit voltage terminal VDD, the other end of the capacitor C44 is connected with an analog ground, a pin 3 of the analog switch and multiplexer Q5 is respectively connected with an analog-digital sampling end SC1 of the MCU controller 1 and a collector of a triode Q9, a base of the triode Q9 is respectively connected with one end of a resistor R46 and one end of a resistor R47, the other end of the resistor R46 is connected with a serial port data sending end ADC _ SCON1 of the MCU controller 1, the other end of the resistor R47 is connected with an emitter of a triode Q9 and then connected with a connection point of a pin 7 and a pin 8 of the analog switch and multiplexer Q5, and then connected with the analog ground, a pin 6 of the analog switch and multiplexer Q5 is connected with a data receiving end CSA1 of a data bus of the MCU controller 1, a pin 9 of the analog switch and multiplexer Q5 is connected with a control signal output end CSA 7 and a pin 8 of the MCU controller Q5961, a pin 10 of the analog switch and the multiplexer Q6 is connected with a control signal output end 1 of the MCU controller 1, and a pin 73711 of the analog switch and the multiplexer Q5 is.

As an embodiment of the present invention, the output current detecting unit 3 includes a load fuse input circuit, a load current detecting circuit, a short-circuit protection and release circuit, a socket; the socket is used for connecting a load 03 through a port 02, the load fuse input circuit is used for inputting fuse signals of the load 03, the load current detection circuit is used for transmitting voltage control signals output by the MCU controller 1 to the output switch unit 4, and the short-circuit protection and release circuit is used for carrying out short-circuit protection on the load 03; the output current detection unit 3 corresponds to each load 03, the load fuse input circuit, the load current detection circuit, the short-circuit protection and release circuit, and the socket CON1 can be expanded according to the increase in the number of loads, and the circuit structure of the output current detection unit 3 corresponding to each load 03 is the same;

taking the output current detecting unit 3 corresponding to the first load as an example, referring to fig. 5, the socket is CON1, and pin 1, pin 2, pin 3, and pin 4 of the socket CON1 are connected to connect with the negative electrode of the first load;

the load fuse input circuit comprises a voltage stabilizing diode D10, a capacitor C75, resistors R51, R52, R53 and R69; one end of a resistor R51 is connected with the cathode of the first LOAD, the other end of a resistor 51 is connected with one end of a resistor R52, the other end of a resistor R52 is respectively connected with the cathode of a voltage stabilizing diode D10 and one end of a capacitor C75, the connection point of one end of a resistor R53 and one end of a resistor R69 is connected with one end of a capacitor C75, the other end of the resistor R53 is connected with a LOAD1FUSE, the other end of a resistor R69 is connected with the other end of the capacitor C75 and the anode of a voltage stabilizing diode D10, and the anode of the voltage stabilizing diode D10 is also connected with an analog ground;

the load current detection circuit comprises an operational amplifier U10B, capacitors C67, C68, C69 and C70, resistors R54, R55, R56, R57 and R58; the non-inverting input end of the operational amplifier U10B is connected with one end of a capacitor C69 and one end of a resistor R54 respectively, the other end of the capacitor C69 is connected with an analog ground, the other end of the resistor R54 is connected with the anode of a first LOAD and one end of a capacitor C67 respectively, the other end of the capacitor C67 is connected with the analog ground and one end of a resistor R55 respectively, the other end of the resistor R55 is connected with the inverting input end of the operational amplifier U10B, one end of the resistor R56 and one end of a capacitor C68 respectively, the output end of the operational amplifier U10B is connected with the other end of the resistor R56 and one end of a resistor R57 respectively, the other end of the resistor R57 is connected with one end of a capacitor C70 and one end of a resistor R58 respectively, one end of the resistor R58 is further connected with a terminal LOAD _1I, the other end of the resistor R58 is connected with a voltage reference value;

the short-circuit protection and release circuit comprises an operational amplifier U10A, MOS transistors Q11 and Q13, current detectors RS1 and RS3, a triode Q14, diodes D8, D11, D12 and D13, capacitors C76, C77 and C79, resistors R70, R71, R73, R74, R75, R76, R77, R78 and R59; the positive power supply of the operational amplifier U10A is connected with the circuit voltage VDD and one end of a capacitor C79 respectively, the other end of the capacitor C79 is connected with-5V, the negative power supply of the operational amplifier U10A is connected with-5V, the non-inverting input end of the operational amplifier U10A is connected with one end of a resistor R73, one end of a capacitor C76 and one end of a resistor R74 respectively, one end of the resistor R74 is further connected with an ADC _ SC1, the other end of the capacitor C76 is connected with an analog ground, the other end of the resistor R73 is connected with the anode of a first load, the inverting input end of the operational amplifier U10A is connected with one end of a capacitor C77, one end of a resistor R71 and one end of a resistor R70 respectively, the other end of a resistor R9 is connected with a voltage reference value terminal VREF3V, the output end of the operational amplifier U10A is connected with the anode of a diode D11, the anode of a diode D12 and one end of a resistor R75 respectively, The other end of the capacitor C77, the other end of the resistor R75, and one end of the resistor R77 are connected to an emitter of the transistor Q14 and then connected to an analog ground, a cathode of the diode D12 is connected to a cathode of the diode D13 and one end of the resistor R76, an anode of the diode D13 is connected to a LOAD switch control terminal LOAD1-ON of the MCU controller 1, the other end of the resistor R76 is connected to a base of the transistor Q14 and the other end of the resistor R77, a collector of the transistor Q14 is connected to a gate of the transistor Q14, a gate of the transistor Q14 and one end of the resistor R14, the other end of the resistor R14 is connected to a power supply voltage terminal VCC 14, the gate of the transistor Q14 is further connected to one end of the resistor R14, the other end of the resistor R14 is connected to a source of the transistor Q14, an anode of the diode D14, one end of the current detector RS 14 is connected to a source of the transistor Q14, an anode of the current detector RS 14 and the other end of the LOAD detector RS 14 is connected to an analog ground, the drain of the MOS transistor Q13 is connected to the drain of the MOS transistor Q11 and the cathode of the diode D8, respectively, and the drain of the MOS transistor Q11 is also connected to the cathode of the first load.

Referring to fig. 6, the RS485 pair FSU acquisition communication interface unit 13 includes an interface driver U2, a dual-channel digital isolator OP2, inductors B2 and B3, voltage-stabilizing diodes D2 and D3, capacitors C2, C3 and C5, resistors R1, R2, R3, R4, R7, R8 and R9; pin 1 of the interface driver U2 is connected to one end of a resistor R2, the other end of the resistor R2 is connected to a 485 data acquisition receiving terminal RS485_ DOWN _ RX of the MCU controller 1, pin 2 and pin 3 of the interface driver U2 are connected to one end of a resistor R4 and a 485 data acquisition enabling terminal RS485_ DOWN _ EN of the MCU controller 1, the other end of the resistor R4 is connected to an analog ground, pin 4 of the interface driver U2 is connected to a 485 data acquisition transmitting terminal RS485_ DOWN _ TX of the MCU controller 1, pin 5 of the interface driver U2 is connected to the analog ground, pin 6 of the interface driver U2 is connected to one end of a resistor R9, one end of an inductor B3 and one end of a resistor R7, the other end of the resistor R7 is connected to a circuit voltage VDD, the other end of the inductor B3 is connected to a cathode and a terminal RS485_2 a of a zener diode D2, an anode of the zener diode D2 is connected to the analog ground, and one end of the resistor R8 of the interface driver U2 is connected, One end of an inductor B2 and the other end of a resistor R9, a pin 8 of an interface driver U2 is respectively connected with one end of a capacitor C5 and a circuit voltage VDD, the other end of the capacitor C5 is connected with the other end of a resistor R8, the other end of the resistor R8 is respectively connected with an analog ground and the anode of a voltage stabilizing diode D3, and the other end of the inductor B2 is respectively connected with the cathode of a voltage stabilizing diode D3 and a terminal RS485_2_ B;

pin 1 of the dual-channel digital isolator OP2 is connected to one end of a capacitor C2 and 3.3V, respectively, the other end of the capacitor C2 is connected to an analog ground, pin 2 of the dual-channel digital isolator OP2 is connected to one end of a resistor R1, the other end of the resistor R1 is connected to a 485 data acquisition receiving terminal RS485_ DOWN _ RX of the MCU controller 1, pin 3 of the dual-channel digital isolator OP2 is connected to a 485 data acquisition transmitting terminal RS485_ DOWN _ TX of the MCU controller 1, pin 4 of the dual-channel digital isolator OP2 is connected to an analog ground, pin 5 of the dual-channel digital isolator OP2 is connected to a signal ground, pin 6 of the dual-channel digital isolator OP2 is connected to a data transmitting terminal 4G _ TX of the GPS/4G remote upload or RX control module 15, pin 7 of the dual-channel digital isolator OP2 is connected to one end of a resistor R3, the other end of the resistor R3 is connected to a data acquisition receiving terminal of the GPS/4G remote upload or RX control module 15, the pin 8 of the dual-channel digital isolator OP2 is connected to one end of a capacitor C3 and 3.3V, respectively, and the other end of the capacitor C3 is connected to signal ground.

Referring to fig. 7, the RS485 upper communication interface unit 14 includes an interface driver U1, a dual channel digital isolator OP1, an optical coupler OP3, inductors B1 and B6, zener diodes D1 and D7, capacitors C1 and C4, resistors R22, R23, R5, R6, and R27; pin 1 of an interface driver U1 is connected with pin 7 of a dual-channel digital isolator OP1, pin 2 and pin 3 of the interface driver U1 are connected with one end of a resistor R23 and pin 4 of an optical coupler OP1 respectively, the other end of the resistor R23 is connected with a signal ground, pin 3 of the optical coupler OP3 is connected with +5V2, pin 1 of the optical coupler OP3 is connected with 3.3V, pin 2 of the optical coupler OP3 is connected with one end of a resistor R22, the other end of the resistor R22 is connected with a 485 data upload enable end RS485_ UP _ EN of the MCU controller 1, pin 4 of the interface driver U1 is connected with pin 6 of the dual-channel digital isolator OP1, pin 5 of the interface driver U1 is connected with a signal ground, pin 6 of the interface driver U1 is connected with one end of a resistor 573R 5, one end of an inductor B6 and one end of a resistor R27 respectively, the other end of the resistor R27 is connected with +5V2, the other end of the inductor B6D is connected with a negative pole RS485_ A of a diode 7, the anode of the zener diode D7 is connected to the signal ground, the pin 7 of the interface driver U1 is connected to one end of the resistor R5, one end of the inductor B1 and the other end of the resistor R6, the other end of the resistor R5 is connected to the signal ground and the anode of the zener diode D1, the other end of the inductor B1 is connected to the cathode of the zener diode D1 and the terminal RS485_1_ B, the pin 8 of the interface driver U1 is connected to +5V2, the pin 1 of the dual-channel digital isolator 1 is connected to one end of the capacitor C1 and 3.3V, the other end of the capacitor C1 is connected to the analog ground, the pin 2 of the dual-channel digital isolator OP1 is connected to the data upload receiving terminal RS485_ UP _ RX of the MCU controller 1, the pin 3 of the dual-channel digital isolator OP1 is connected to the 485 data upload TX 485_ UP _ TX of the MCU controller 1, the pin 4 of the dual-channel digital isolator OP1 is connected to the analog ground, and the pin 395 of the dual-channel digital isolator OP1 is connected to the, the pin 8 of the dual-channel digital isolator OP1 is connected to one end of a capacitor C4 and +5V2, respectively, and the other end of the capacitor C4 is connected to signal ground.

As an embodiment of the present invention, referring to fig. 8, the ferroelectric memory cell 9 includes a ferroelectric memory U5, a capacitor C16, resistors R24, R51, and R52; pin 1, pin 2, pin 3 and pin 4 of the ferroelectric memory U5 are connected and then connected to an analog ground, pin 5 of the ferroelectric memory U5 is connected to a serial data receiving terminal RTC _ SDA1 of the MCU controller 1 and one end of a resistor R51, the other end of the resistor R51 is connected to one end of a resistor R52 and then connected to 3.3V, pin 6 of the ferroelectric memory U5 is connected to the other end of the resistor R52 and a serial data transmitting terminal RTC _ SCL1 of the MCU controller 1, pin 7 of the ferroelectric memory U5 is connected to one end of the resistor R24, the other end of the resistor R24 is connected to one end of a capacitor C16 and the analog ground, and pin 8 of the ferroelectric memory U5 is connected to the other end of the capacitor C16 and 3.3V, respectively.

Specifically, referring to fig. 9, the sound prompt unit 6 includes a buzzer B5, a transistor Q1, a diode D5, and resistors R18 and R19; one end of a buzzer B5 is connected with the circuit voltage VDD and the negative electrode of the diode D5 respectively, the other end of the buzzer B5 is connected with the positive electrode of the diode D5 and one end of a resistor R19 respectively, the other end of the resistor R19 is connected with the collector of a triode Q1, the emitter of the triode Q1 is connected with an analog ground, the gate of the triode Q1 is connected with one end of a resistor R18, and the other end of the resistor R18 is connected with the sound control end BEE of the MCU controller 1.

Specifically, referring to fig. 10, the real time clock unit 7 includes a clock chip U9, a crystal oscillator Y2, diodes D601 and D602, a battery BT1, capacitors C31 and C32, resistors R25, R39, R40, R53; pin 1 of the clock chip U9 is connected with one end of a resistor R53 and one end of a crystal oscillator Y2 respectively, one end of a crystal oscillator Y2 is also connected with one end of a capacitor C31, pin 2 of the clock chip U9 is connected with the other end of a resistor R53 and the other end of a crystal oscillator Y2 respectively, the other end of a crystal oscillator Y2 is also connected with one end of a capacitor C32, the other end of a capacitor C32 is connected with the other end of a capacitor C31 respectively, pin 4 of the clock chip U9 is connected with an analog ground, pin 5 of the clock chip U9 is connected with one end of a clock data receiving terminal SDA _ SDA and a resistor R40 of the MCU controller 1 respectively, pin 6 of the clock chip U9 is connected with one end of a clock data transmitting terminal SCL and a resistor R39 respectively, the other end of the resistor R40 and the other end of the resistor R39 are connected and then connected with 3.3V, the positive electrode of the diode D601 and the positive electrode of the diode D602 are connected with the positive electrode of the pin 8 of the clock chip U9 and the terminal vbr 24, the other end of the resistor R25 is respectively connected with the anode of the diode D601 and the cathode of the battery BT1, the anode of the battery BT1 is connected with the analog ground, and the anode of the diode D602 is connected with 3.3V.

Specifically, referring to fig. 11, the FLASH memory unit 8 includes a FLASH memory U6, capacitors C17 and C62, a resistor R26; pin 1 of the FLASH memory U6 is connected to the FLASH data terminal FLASH _ SPI _ NSS of the MCU controller 1, pin 2 of the FLASH memory U6 is connected to the FLASH data terminal FLASH _ SPI _ MISO of the MCU controller 1, pin 5 of the FLASH memory U6 is connected to the FLASH data terminal FLASH _ SPI _ MOSI of the MCU controller 1, pin 6 of the FLASH memory U6 is connected to the FLASH data terminal FLASH _ SPI _ SCK of the MCU controller 1, pin 3 of the FLASH memory U6 is connected to one end of the capacitor C17 and one end of the resistor R26, the other end of the resistor R26 is connected to 3.3V, pin 4 of the FLASH memory U6 is connected to the other end of the capacitor C17 and then to analog ground, pin 7 and pin 7 of the FLASH memory U6 are connected to one end of the capacitor C62 and the other end of the capacitor C62 is connected to analog ground.

Specifically, referring to fig. 12, the LCD display unit 10 includes an LCD display interface J1, light emitting diodes LED1, LED2, and LED3, resistors R13, R14, R15, R17; the light emitting diode LED1 is used for indicating that the connection between the interface J1 of the LCD display and the LCD display is normal, the light emitting diode LED2 is used for indicating that the connection between the interface J1 of the LCD display and the LCD display is abnormal, and the light emitting diode LED3 is used for indicating that the connection between the interface J1 of the LCD display and the LCD display is failed; pin 2 of the LCD interface J1 is connected to analog ground, pin 1 of the LCD interface J1 is connected to one end of the LCD power supply voltage LCD _ VCC and one end of the resistor R15, the other end of the resistor R15 is connected to 3.3V, pin 3 of the LCD interface J1 is connected to the serial data transmitting terminal LCD _ D0 of the MCU controller 1, pin 4 of the LCD interface J1 is connected to the serial data receiving terminal LCD _ D1 of the MCU controller 1, pin 5 of the LCD interface J1 is connected to the data terminal LCD _ D2 of the MCU controller 1, pin 6 of the LCD interface J1 is connected to the serial data terminal LCD _ D3 of the MCU controller 1, pin 7 of the LCD interface J1 is connected to the data terminal LCD _ D4 of the MCU controller 1, pin 8 of the LCD interface J1 is connected to the data terminal LCD _ D5 of the MCU controller 1, pin 9 of the LCD interface J6 is connected to the time control terminal LCD interface J7371, and pin 1 of the LCD interface J2 is connected to the MCU controller 1, pin 11 of LCD interface J1 is connected to time control terminal K3 of MCU controller 1, pin 12 of LCD interface J1 is connected to time control terminal K4 of MCU controller 1, pin 13 of LCD interface J1 is connected to the cathode of LED1, pin 15 of LCD interface J1 is connected to the cathode of LED2, pin 17 of LCD interface J1 is connected to the cathode of LED3, pin 14 of LCD interface J1 is connected to the anode of LED1 and one end of resistor R13, the other end of resistor R13 is connected to 3.3V, pin 16 of LCD interface J1 is connected to the anode of LED2 and one end of resistor R14, the other end of resistor R14 is connected to 3.3V, pin 18 of LCD interface J1 is connected to the anode of LED3 and one end of resistor R17, and the other end of resistor R3V is connected to 3. 17.

Specifically, referring to fig. 13, the buck regulator unit 11 includes a buck switching regulator U3, a low dropout regulator U4, inductors L1 and B4, a diode D4, capacitors C6, C9, C11, C13, C15, C14, C12, C10, C8, C7, and resistors R10, R11, and R12; pin 1 of the buck switching regulator U3 is connected to one end of a capacitor C9, the other end of the capacitor C9 is connected to pin 6 of the buck switching regulator U3 and the negative electrode of a diode D4, the positive electrode of the diode D4 is connected to analog ground, pin 6 of the buck switching regulator U3 is also connected to one end of an inductor L1, pin 5 of the buck switching regulator U3 is connected to one end of a resistor R10, a power supply voltage VCC and one end of a capacitor C6, the other end of the capacitor C6 is connected to analog ground, pin 4 of the buck switching regulator U3 is connected to the other end of a resistor R10, pin 2 of the buck switching regulator U3 is connected to analog ground, pin 2 of the buck switching regulator U3 is also connected to one end of a resistor R11, one end of a capacitor C13 and one end of a capacitor C15, pin 3 of the buck switching regulator U3 is connected to the other end of a resistor R11, one end of a capacitor C11 and the other end of the resistor R11 is connected to the inductor L11, the other end of the inductor L1 is further connected to the other end of the capacitor C13, the other end of the capacitor C15, and one end of the inductor B4, a pin 2 of the low dropout regulator U4 is connected to one end of the capacitor C8, one end of the capacitor C7, and the other end of the inductor B4, the other end of the capacitor C7, the other end of the capacitor C8, one end of the capacitor C10, one end of the capacitor C12, and one end of the capacitor C14 are connected to a pin 1 of the low dropout regulator U4, a pin 1 of the low dropout regulator U4 is further connected to an analog ground, a pin of the low dropout regulator U4 is connected to the other end of the capacitor C10, the other end of the capacitor C12, and the other end of the capacitor C14, and the other end of the capacitor C14 is.

Specifically, referring to fig. 14, the ADC reference voltage unit 12 includes a schottky diode U7, capacitors C23 and C25, resistors R29, R31, R32, R35; pin 1 of schottky diode U7 is connected to one end of resistor R31 and one end of resistor R32 respectively, the other end of resistor R31 is connected to one end of resistor R29 and pin 2 of schottky diode U7 respectively, the other end of resistor R29 is connected to 3.3V, pin 2 of schottky diode U7 is also connected to one end of resistor R35, pin 3 of schottky diode U7 is connected to the other end of resistor R32 and analog ground respectively, the other end of resistor R35 is connected to one end of capacitor C23, one end of capacitor C23 is connected to one end of capacitor C25 and voltage reference terminal VREF3V respectively, and the other end of capacitor C23 is connected to the other end of capacitor C25 and then connected to analog ground.

Preferably, the MCU controller 1 is of the model STM32F103VET 6. The GPS/4G remote uploading or control module 15 adopts the publicly-disclosed technical products existing in the market.

In summary, the present invention has the following significant advantages: integrating 16-way port output; independently uploading data to an energy management platform by adopting three short messages of 4G and Beidou, and simultaneously compatibly supporting a 485 communication interface to communicate with an iron tower base station; can be through each port self-defining user, have the branch user, divide port measurement statistical function, if: voltage, current, power, electrical energy functions; the disconnection of each port is supported by local and remote control, and the disconnection of overcurrent is supported; the short circuit protection function is realized, short circuit is immediately protected, and recovery is realized through remote control; the automatic networking and time synchronization can be realized, and a high-precision clock is provided; has the function of power-off memory.

The embodiments of the present invention have been described in detail, but the invention is not limited to the embodiments, and those skilled in the art can make many equivalent modifications or substitutions without departing from the spirit of the present invention, and the equivalents or substitutions are included in the scope of protection defined by the claims of the present application.

Claims

1. The intelligent energy management device is characterized in that a plurality of ports are arranged, and each port is connected with an independent load; the intelligent energy management equipment is used for realizing point-to-point power utilization management for the load connected with each port; the intelligent energy management device comprises a power input unit, an auxiliary power supply unit, an MCU (microprogrammed control unit) controller, an output current detection unit, an output switch unit, an ADC (analog-to-digital converter) reference voltage unit, an RS485 pair FSU acquisition communication interface unit, an RS485 pair upper communication interface unit and a GPS/4G remote uploading or control module; the MCU controller is respectively and electrically connected with the auxiliary power supply unit, the output current detection unit, the output switch unit, the ADC reference voltage unit, the RS485 pair FSU acquisition communication interface unit and the RS485 pair upper communication interface unit, the power input unit is respectively and electrically connected with the auxiliary power supply unit and the output current detection unit, the GPS/4G remote uploading or control module is respectively and electrically connected with the MCU controller, the auxiliary power supply unit and the RS485 pair FSU acquisition communication interface unit, and the auxiliary power supply unit is also electrically connected with the output current detection unit;

2. The intelligent energy management device according to claim 1, further comprising a voice prompt unit, a real-time clock unit, a FLASH memory unit, a ferroelectric memory unit, an LCD display unit, and a voltage reduction and stabilization unit; the sound prompting unit is used for giving an alarm sound when the intelligent energy management equipment is in an abnormal working state or giving a prompting sound when the intelligent energy management equipment is in a switching working state; the real-time clock unit is used for providing stable running frequency for the MCU controller; the FLASH storage unit is used for storing the data of the MCU controller; the ferroelectric storage unit is used for storing the data of the MCU controller under the condition of low electric energy; the LCD display unit is used for being connected with a display and displaying the data of the MCU controller to workers through the display; the voltage reduction and stabilization unit is used for providing 3.3V voltage for the MCU controller.

3. The smart energy management device according to claim 1, wherein the power input unit includes transformer coils T1A, T1B, T1C, T1D, T1E, a voltage stabilization chip U26, a fuse F1, a MOS transistor Q59, polar capacitors E1, E2, E3, E4, E5, E6, E7, E8, capacitors C196, C197, C198, C199, C202, C203, C204, C205, diodes D88, D89, D90, D91, D92, D93, resistors TH1, R339, R340, R341, R342, R343, R344, R345, R346, R347, R348, R349, R350, R352, R353; one end of the fuse F1 IS connected to the anode of an external power supply, the other end of the fuse F1 IS connected to one end of the resistor TH1, the other end of the resistor TH1 IS connected to the anode of the diode D88, the cathode of the diode D88 IS connected to the anode of the polar capacitor E1 and one end of the resistor R339, the other end of the resistor R339 IS connected to one end of the resistor R341 and one end of the capacitor C195, the other end of the resistor R339 IS connected to one end of the resistor R340, the other end of the resistor R340 IS connected to the terminal IS5, one end of the capacitor C195 IS further connected to one end of the resistor R344 and the pin 1 of the transformer coil T1A, the other end of the resistor R344 IS connected to one end of the resistor R343, the other end of the capacitor C195 IS connected to the other end of the resistor R343 and then connected to the cathode of the diode D89, and the pin 2 of the transformer coil T A IS connected to the anode of the diode D89 and the drain of the MOS transistor Q36, the gate of the MOS transistor D59 IS connected to one end of the resistor R346 and one end of the resistor R347, the other end of the resistor R346 IS connected to the terminal IR2, the source of the MOS transistor D59 IS connected to one end of the resistor R348, one end of the resistor R349, the other end of the resistor R347 and one end of the resistor R350, and IS connected to the terminal IS2, the other end of the resistor R348, the other end of the resistor R349 and the other end of the resistor R350 are connected to the terminal GND3, the other end of the resistor R342 IS connected to the terminal VCC10, the anode of the polar capacitor E5 and one end of the resistor R345, the other end of the resistor R345 IS connected to the cathode of the diode D92, the anode of the diode D92 IS connected to the pin 7 of the transformer coil T1D, and the pin 8 of the transformer coil T1D IS connected to the cathode of the polar capacitor E5 and the cathode of the polar capacitor E1, the negative electrode of the polar capacitor E1 is also connected with the terminal GND 3; pin 4 of the transformer coil T1B is connected to the anode of the diode D91, the cathode of the diode D91 is connected to the anode of the polar capacitor E2 and one end of the capacitor C196, one end of the capacitor C196 is further connected to the anode of the polar capacitor E4, the anode of the polar capacitor E4 is further connected to one end of the capacitor C198, one end of the capacitor C198 is further connected to a power supply voltage VCC, the other end of the capacitor C198 is connected to one end of the terminal PE and one end of the capacitor C199, the other end of the capacitor C199 is connected to the cathode of the polar capacitor E4 and one end of the capacitor C197, the other end of the capacitor C199 is further connected to an analog ground, the cathode of the polar capacitor E4 is further connected to the other end of the capacitor C196 and the anode of the capacitor E3, and the other end of the capacitor C196 is connected to the cathode of the polar capacitor E2 and pin 3 of the transformer coil T1B, pin 3 of the transformer coil T1B is connected to pin 6 of the transformer coil T1C, pin 5 of the transformer coil T1C is connected to the cathode of the diode D90, the anode of the diode D90 is connected to the cathode of the polar capacitor E3 and the other end of the capacitor C197, and the anode of the diode D90 is also connected to-5V; a pin 9 of the transformer coil T1E is connected to an anode of the diode D93, a cathode of the diode D93 is sequentially connected to an anode of the polar capacitor E6, one end of the capacitor C202, an anode of the polar capacitor E7, one end of the capacitor C203, one end of the resistor R352, and one end of the resistor R353, and then connected to a pin 1 of the regulator chip U26, a pin 10 of the transformer coil T1E is sequentially connected to a cathode of the polar capacitor E6, another end of the capacitor C202, a cathode of the polar capacitor E7, another end of the capacitor C203, another end of the resistor R352, and another end of the resistor R353, and then connected to a pin 2 of the regulator chip U26, a pin 2 of the regulator chip U26 is further connected to a cathode of the polar capacitor E8, one end of the capacitor C205, and one end of the capacitor C204, and one end of the capacitor C205 is further connected to a signal ground, the other end of the capacitor C204 is connected to the terminal PE, the pin 3 of the regulator chip U6 is connected to the positive electrode of the polar capacitor E8 and the other end of the capacitor C205, respectively, and the pin 3 of the regulator chip U26 is further connected to + 5V.

4. The smart energy management device according to claim 3, wherein the auxiliary power supply unit includes a current mode controller IC1, sockets CON33 and CON34, optocouplers U27B, U27A, capacitors C200, C201, C206, C207, C208, C209, C210, C211, C212, a zener diode U28, resistors R354, R355, R356, R357, R358, R359, R360, R351, R361, R362, R363, R364, R365; the current mode controller IC1 is a dc-dc switching regulator that can regulate the output voltage by varying the peak current cycle by cycle to ultimately obtain a stable output voltage; the socket CON33 is used for connecting the GPS/4G remote uploading or control module, and the socket CON34 is used for connecting the output current detection unit; pin 1 of the current mode controller IC1 is connected to one end of the capacitor C200 and one end of the resistor R357 respectively, the other end of the capacitor C200 and the other end of the resistor R357 are connected to each other and then connected to pin 2 of the current mode controller IC1 and pin 3 of the optocoupler U27B respectively, pin 3 of the optocoupler U27B is further connected to one end of the resistor R356, the other end of the resistor R356 is connected to the terminal GND3, pin 4 of the optocoupler U27B is connected to one end of the resistor R354, the other end of the resistor R354 is connected to the terminal VCCVREF, pin 8 of the current mode controller IC1 is connected to the terminal VCCVREF and one end of the resistor R355 respectively, the other end of the resistor R355 is connected to one end of the capacitor C206 and one end of the capacitor C207 in sequence and then connected to pin 4 of the current mode controller IC1, one end of the capacitor C208 is connected to the terminal cvvcvcvcvcvcvcvcvcvcvcvcvcvcvcvcref, the other end of the capacitor C207 and the other end of the capacitor C206 are connected to the terminal GND3, pin 4 of the current mode controller IC1 is also connected to one terminal of the capacitor C209 and one terminal of the resistor C358 respectively, the other end of the capacitor C209 and the other end of the resistor R358 are connected to pin 3 of the current mode controller IC1, pin 3 of the current mode controller IC1 IS also connected to one terminal of the resistor R359, the terminal IS5, and one terminal of the capacitor C210, the other terminal of the capacitor C210 is connected to pin 5 of the current mode controller IC1 and then to the terminal GND3, the other end of the resistor R359 IS connected to the terminal IS2, pin 6 of the current mode controller IC1 IS connected to the terminal DR2, pin 7 of the current mode controller IC1 is connected to the terminal VCC10 and one end of the capacitor C201, respectively, and the other end of the capacitor C201 is connected to the terminal GND 3; pin 1 of the optocoupler U27A is connected to one end of the resistor R360 and one end of the resistor R351 respectively, pin 2 of the optocoupler U27A is connected to the negative electrode of the zener diode U28 and the other end of the resistor R360 respectively, the other end of the resistor R360 is further connected to one end of the capacitor C211, the other end of the capacitor C211 is connected to one end of the resistor R361, the other end of the resistor R361 is connected to one end of the resistor R363 and one end of the capacitor C212 respectively, the positive electrode of the zener diode U28 is connected to signal ground, the positive electrode of the zener diode U28 is further connected to one end of the resistor R365, the other end of the resistor R365 is connected to the other end of the resistor R363 and one end of the resistor R364 respectively, the other end of the capacitor C212 is connected to one end of the resistor R362, and the other end of the resistor R362 is connected to the other end of the resistor R351 and the other end of the resistor, the other end of the resistor R364 is also connected with 7V; pin 1 of the socket CON33 is connected to 7V, pin 2 of the socket CON33 is connected to a signal ground, pin 3 of the socket CON33 is connected to terminal 3.3V1, pin 4 of the socket CON33 is connected to the data receiving terminal 4G _ RX of the GPS/4G remote upload or control module, pin 5 of the socket CON33 is connected to the data transmitting terminal 4G _ TX of the GPS/4G remote upload or control module, pin 1 of the socket CON34 is connected to the circuit voltage VDD, pin 4 of the socket CON34 is grounded, pin 2 of the socket CON34 is connected to terminal RS485_2_ a, and pin 3 of the socket CON34 is connected to terminal 485 RS _2_ B.

5. The smart energy management device according to claim 4, wherein the output switching unit includes analog switches and multiplexers Q3, Q4, Q5, Q6, Q7, Q8, transistors Q2 and Q9, capacitors C42, C43, C44, C45, C46, C47, resistors R43, R46, R47; the analog switch and multiplexer Q6 is used for outputting the voltage control signals to first to eighth loads, the analog switch and multiplexer Q3 is used for outputting the voltage control signals to ninth to sixteenth loads, the analog switch and multiplexer Q7 is used for outputting the control signals to the fuse of the first load to the fuse of the eighth load, the analog switch and multiplexer Q8 is used for outputting the control signals to the fuse of the ninth to sixteenth loads, the analog switch and multiplexer Q1 is used for collecting the current signals of the first to eighth loads, and the analog switch and multiplexer Q5 is used for collecting the current signals of the ninth to sixteenth loads;

6. The intelligent energy management device according to claim 5, wherein the output current detection unit comprises a load fuse input circuit, a load current detection circuit, a short-circuit protection and release circuit, a socket; the socket is used for connecting the load through the port, the load fuse input circuit is used for inputting fuse signals of the load, the load current detection circuit is used for transmitting the voltage control signals output by the MCU controller to the output switch unit, and the short-circuit protection and release circuit is used for carrying out short-circuit protection on the load; the output current detection unit corresponds to each of the loads, the load fuse input circuit, the load current detection circuit, the short-circuit protection and release circuit, and the socket CON1 can be expanded according to an increase in the number of the loads, and the circuit structure of the output current detection unit corresponding to each of the loads is the same;

7. The intelligent energy management device according to claim 4, wherein the RS485 pair FSU acquisition communication interface unit comprises an interface driver U2, a dual-channel digital isolator OP2, inductors B2 and B3, voltage stabilizing diodes D2 and D3, capacitors C2, C3 and C5, resistors R1, R2, R3, R4, R7, R8 and R9; pin 1 of the interface driver U2 is connected to one end of the resistor R2, the other end of the resistor R2 is connected to a 485 data acquisition receiving terminal RS485_ DOWN _ RX of the MCU controller, pin 2 and pin 3 of the interface driver U2 are connected to one end of the resistor R4 and a 485 data acquisition enabling terminal RS485_ DOWN _ EN of the MCU controller, the other end of the resistor R4 is connected to an analog ground, pin 4 of the interface driver U2 is connected to a 485 data acquisition transmitting terminal RS485_ DOWN _ TX of the MCU controller, pin 5 of the interface driver U2 is connected to an analog ground, pin 6 of the interface driver U2 is connected to one end of the resistor R9, one end of the inductor B3 and one end of the resistor R7, the other end of the resistor R7 is connected to a circuit voltage, the other end of the inductor B3 is connected to a negative electrode of the zener diode D2 and a terminal RS485_2_ a, the anode of the zener diode D2 is connected to an analog ground, the pin 7 of the interface driver U2 is connected to one end of the resistor R8, one end of the inductor B2, and the other end of the resistor R9, respectively, the pin 8 of the interface driver U2 is connected to one end of the capacitor C5 and the circuit voltage VDD, the other end of the capacitor C5 is connected to the other end of the resistor R8, the other end of the resistor R8 is connected to an analog ground and the anode of the zener diode D3, respectively, and the other end of the inductor B2 is connected to the cathode of the zener diode D3 and the terminal RS485_2_ B, respectively;

8. The intelligent energy management device according to claim 1, wherein the RS485 pair of upper communication interface units includes an interface driver U1, a dual channel digital isolator OP1, an optical coupler OP3, inductors B1 and B6, voltage-stabilizing diodes D1 and D7, capacitors C1 and C4, resistors R22, R23, R5, R6, R27; pin 1 of the interface driver U1 is connected to pin 7 of the dual-channel digital isolator OP1, pin 2 and pin 3 of the interface driver U1 are connected to one end of the resistor R23 and pin 4 of the optocoupler OP1 respectively, the other end of the resistor R23 is connected to signal ground, pin 3 of the optocoupler OP3 is connected to +5V2, pin 1 of the optocoupler OP3 is connected to 3.3V, pin 2 of the optocoupler OP3 is connected to one end of the resistor R22, the other end of the resistor R22 is connected to the 485 data upload enable end RS _ UP _ EN of the MCU controller, pin 4 of the interface driver U1 is connected to pin 6 of the dual-channel digital isolator OP1, pin 5 of the interface driver U1 is connected to signal ground, pin 6 of the interface driver U1 is connected to one end of the resistor R6, one end of the inductor B6 and one end of the resistor R27 respectively, the other end of the resistor R27 is connected with +5V2, the other end of the inductor B6 is connected with the cathode of the zener diode D7 and the terminal RS485_1_ a, the anode of the zener diode D7 is connected with a signal ground, the pin 7 of the interface driver U1 is connected with one end of the resistor R5, one end of the inductor B1 and the other end of the resistor R6, the other end of the resistor R5 is connected with a signal ground and the anode of the zener diode D1, the other end of the inductor B1 is connected with the cathode of the zener diode D1 and the terminal RS485_1_ B, the pin 8 of the interface driver U1 is connected with +5V2, the pin 1 of the dual-channel digital isolator OP1 is connected with one end of the capacitor C1 and 3.3V, the other end of the capacitor C1 is connected with an analog ground, the pin 2 of the dual-channel digital isolator OP1 is connected with the receiving end of the MCU 485 RX 485, a pin 3 of the dual-channel digital isolator OP1 is connected to a 485 data uploading transmitter RS485_ UP _ TX of the MCU controller, a pin 4 of the dual-channel digital isolator OP1 is connected to an analog ground, a pin 5 of the dual-channel digital isolator OP1 is connected to a signal ground, a pin 8 of the dual-channel digital isolator OP1 is respectively connected to one end of the capacitor C4 and +5V2, and the other end of the capacitor C4 is connected to the signal ground.

9. The smart energy management device according to claim 1, wherein the ferroelectric memory unit comprises a ferroelectric memory U5, a capacitor C16, resistors R24, R51 and R52; pin 1, pin 2, pin 3, and pin 4 of the ferroelectric memory U5 are connected to a ground, pin 5 of the ferroelectric memory U5 is connected to a serial data receiving terminal RTC _ SDA1 of the MCU controller and one end of the resistor R51, the other end of the resistor R51 is connected to one end of the resistor R52 and then connected to 3.3V, pin 6 of the ferroelectric memory U5 is connected to the other end of the resistor R52 and a serial data transmitting terminal RTC _ SCL1 of the MCU controller, pin 7 of the ferroelectric memory U5 is connected to one end of the resistor R24, the other end of the resistor R24 is connected to one end of the capacitor C16 and the ground, and pin 8 of the ferroelectric memory U5 is connected to the other end of the capacitor C16 and 3.3V, respectively.