CN112259377A - Process for solving burr problem after single-layer ceramic capacitor scribing - Google Patents
Process for solving burr problem after single-layer ceramic capacitor scribing Download PDFInfo
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- CN112259377A CN112259377A CN202010975030.XA CN202010975030A CN112259377A CN 112259377 A CN112259377 A CN 112259377A CN 202010975030 A CN202010975030 A CN 202010975030A CN 112259377 A CN112259377 A CN 112259377A
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- cutting
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- scribing
- blade
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- 238000000034 method Methods 0.000 title claims abstract description 29
- 230000008569 process Effects 0.000 title claims abstract description 27
- 239000002356 single layer Substances 0.000 title claims abstract description 15
- 239000003985 ceramic capacitor Substances 0.000 title claims abstract description 14
- 238000005520 cutting process Methods 0.000 claims abstract description 37
- 239000010931 gold Substances 0.000 claims abstract description 25
- 229910052737 gold Inorganic materials 0.000 claims abstract description 25
- 239000010410 layer Substances 0.000 claims abstract description 25
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 239000003292 glue Substances 0.000 claims abstract description 17
- 239000000919 ceramic Substances 0.000 claims abstract description 9
- 238000006243 chemical reaction Methods 0.000 claims abstract description 9
- 238000012545 processing Methods 0.000 claims abstract description 7
- 239000011248 coating agent Substances 0.000 claims abstract description 6
- 238000000576 coating method Methods 0.000 claims abstract description 6
- 238000009713 electroplating Methods 0.000 claims abstract description 6
- 238000005516 engineering process Methods 0.000 claims abstract description 5
- 239000002184 metal Substances 0.000 claims abstract description 5
- 229910052751 metal Inorganic materials 0.000 claims abstract description 5
- 238000001755 magnetron sputter deposition Methods 0.000 claims abstract description 4
- 230000001681 protective effect Effects 0.000 claims abstract description 4
- 239000002344 surface layer Substances 0.000 claims abstract description 4
- 238000012360 testing method Methods 0.000 claims description 9
- 238000007747 plating Methods 0.000 claims description 8
- 238000001465 metallisation Methods 0.000 claims description 5
- 229920002120 photoresistant polymer Polymers 0.000 claims description 5
- 238000011161 development Methods 0.000 claims description 4
- 238000011179 visual inspection Methods 0.000 claims description 2
- 238000001259 photo etching Methods 0.000 abstract description 4
- 238000012797 qualification Methods 0.000 abstract description 3
- 238000004519 manufacturing process Methods 0.000 abstract description 2
- 238000013461 design Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 235000001674 Agaricus brunnescens Nutrition 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000000861 blow drying Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000008719 thickening Effects 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/018—Dielectrics
- H01G4/06—Solid dielectrics
- H01G4/08—Inorganic dielectrics
- H01G4/12—Ceramic dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G13/00—Apparatus specially adapted for manufacturing capacitors; Processes specially adapted for manufacturing capacitors not provided for in groups H01G4/00 - H01G11/00
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Ceramic Engineering (AREA)
- Inorganic Chemistry (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Abstract
A process for solving the problem of burrs after scribing of a single-layer ceramic capacitor belongs to the field of manufacturing of single-layer ceramic capacitors. The scheme is as follows: forming a group of conductive and bonding multilayer metal layers on the surface of the ceramic chip by adopting a magnetron sputtering processing technology; uniformly coating a glue layer on the surface of the product for protection; using a mask plate to perform pattern exposure, so that the cutting track area is exposed to light and a chemical reaction occurs; the light receiving position is subjected to chemical reaction in the developing solution to fall off to form a pattern; performing gold electroplating on the surface of the substrate without a light receiving position to enable the thickness of the substrate to reach more than 2.5 um; removing the protective glue on the surface layer of the cutting path; the cutting process is performed with a blade, the entire cutting lane being in the path of the blade. Has the advantages that: according to the invention, by changing the process route and adding the photoetching process, the generated burrs are extremely small and can be completely accepted, the product performance is not influenced, the burr control standard in the industry is met, the electrical performance of the product is not influenced, and the qualification rate of SG products is greatly improved.
Description
Technical Field
The invention belongs to the field of single-layer ceramic capacitor manufacturing, and particularly relates to a processing technology of a single-layer ceramic capacitor SG (edge-free type) product.
Background
The single-layer ceramic capacitor product is formed by metalizing a ceramic substrate and then thickening the metalized ceramic substrate by gold plating. The SG product customers require that the metal layers on both sides have the same size as the ceramic layer, i.e., no ceramic is exposed in the thickness direction, and the gold layer needs to cover 100% of the ceramic. Because the gold-plating material is pure gold with 99.99 percent, the hardness of the gold layer is lower and is 70-80Hv, in the process of forming and scribing the final finished product, the gold layer is extruded and torn under the strong action of a blade rotating at high speed (20000 plus 50000 r/min) to generate plastic deformation, the thickness of the plastic deformation is far greater than that of the cutting layer, so burrs are formed, and the gold layer has the double functions of protection and welding, the thickness of the gold cannot be reduced, so the problem of the burrs is difficult to avoid. The performance influence of burrs on the single-layer capacitor is very large, which can cause the serious consequences such as reduction of the insulating property of a product, even short circuit and the like, and although the improvement can be realized by means of changing the cutter material, designing, increasing a protective layer and the like, the generation of the burrs cannot be thoroughly avoided.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides a process for solving the problem of burrs after scribing of a single-layer ceramic capacitor, the process changes the process route and increases the photoetching process, so that an electroplated gold layer with a proper width is left in a scribing cutting area, the substrate can be completely covered by the gold layer after cutting, the original design is ensured, only few gold layers can be contacted with a cutter during cutting, the generated burrs are extremely small and can be completely accepted, and the product performance is not influenced.
The technical scheme is as follows:
a process for solving the problem of burrs after single-layer ceramic capacitor scribing comprises the following steps:
s1, metallization: forming a group of conductive and bonding multilayer metal layers on the surface of the ceramic chip by adopting a magnetron sputtering processing technology;
s2, homogenizing: uniformly coating a glue layer on the surface of the metallized product for protection;
s3, exposure: using a mask plate to perform pattern exposure, so that the cutting track area is exposed to light and a chemical reaction occurs;
s4, developing: after the light receiving position is denatured, chemical reaction is carried out in the developing solution to lead the light receiving position to fall off and form a pattern;
s5, gold plating: performing gold electroplating on the surface of the substrate at the light receiving position to enable the thickness of the substrate to reach more than 2.5 um;
s6, removing the photoresist: removing the protective glue on the surface layer of the cutting path;
s7, scribing: cutting with a blade, the whole cutting path being in the path of the blade;
s8, testing: electrical property tests and visual inspection were performed.
Further, the thickness of glue film is 4-5 um.
Furthermore, the width of the cutting path after exposure and development is 5-10um smaller than that of the blade.
The invention has the beneficial effects that:
the process for solving the problem of the burrs of the single-layer ceramic capacitor after scribing changes the process route, adds the photoetching process, leaves the electroplated gold layer with proper width in the cutting area of the scribing, can ensure that the substrate is completely covered by the gold layer after cutting, ensures the original design, only few gold layers can be contacted with a cutter during cutting, generates extremely small burrs, can be completely accepted, does not influence the product performance, meets the control standard of the burrs in the industry, does not influence the electrical property of the product, and greatly improves the qualification rate of SG products.
Drawings
FIG. 1 is a design drawing of an exposure mask according to the present invention;
FIG. 2 is a schematic diagram of the burr of the present invention;
FIG. 3 is a schematic diagram of an SG product of the invention;
FIG. 4 is a schematic diagram of the dicing step of the present invention.
Detailed Description
The following will further describe the process for solving the burr problem after the single-layer ceramic capacitor is diced with reference to the attached drawings 1-4.
The invention changes the process route and increases the photoetching process, so that an electroplated gold layer with proper width is left in the cutting area of the scribing sheet, the substrate can be ensured to be completely covered by the gold layer after cutting, the original design of a customer is ensured, only few gold layers can be contacted with a cutter during cutting, the generated burrs are extremely small and can be completely accepted, and the product performance is not influenced.
The process flow of the original SG product is as follows: … … metallization-gold plating-scribing-test … …, the scribing process is carried out on the whole gold-plated substrate surface, which can generate very large burr, the appearance acceptability can not be guaranteed, and the yield is very low.
The new process flow comprises the following steps:
… … metallization, glue homogenizing, exposure, development, gold plating, glue removing, scribing and test … …. the process is added with glue homogenizing, exposure, development and glue removing process, and aims to make the substrate with pattern before electroplating and avoid the burr problem caused by the original process.
Designing an exposure mask plate:
the principle is that the width of the shielding position after exposure is 5-10um narrower than the cutting track of the scribing cutter, the design is determined according to the exposure precision, the exposure precision is 2-3um, and a certain deviation exists, in order to ensure that the cutting track of the product after cutting is completely cut by the blade, the exposure precision must be considered, so the design width is more than 2 times smaller than the exposure precision, but too large results in the problem of burr enlargement, and the upper limit is set to be 4 times width. As shown in fig. 1, the gray areas are plating areas, and the white areas are scribe lines and are not plated.
The method comprises the following specific steps:
metallization-spin-expose-develop-gold-plate-strip-scribe-test
Metallization: a magnetron sputtering processing technology is adopted to form a plurality of metal layers with good electric conductivity and bonding force on the surface of the ceramic chip.
Glue homogenizing: the surface of the product after metallization is uniformly coated with a glue layer with the thickness of about 4-5um for protection, and the thickness of the coating is 2.5-4um, so that the thickness of the photoresist needs to be larger than that of the coating, and the phenomenon that the coating in the shape of a mushroom head is formed by electroplating creeping plating and influences the cutting and appearance of the product is prevented.
The glue homogenizing method comprises the following specific steps:
1. fixing the substrate on a carrying disc through vacuum suction;
2. 2ml of glue is dripped in the center of the substrate;
3. starting rotation with the parameter of 500-;
4. pre-baking and hardening the film at the temperature of 100 +/-2 ℃/200 +/-10S.
Exposure: using a mask plate to perform pattern exposure, so that the cutting track area is exposed to light and a chemical reaction occurs; specifically, under the irradiation of UV light, the photoresist at the light receiving position is decomposed into soluble components due to chemical reaction after being shielded by a mask plate.
And (3) developing: after the light receiving position is denatured, chemical reaction occurs in the developing solution to make it fall off to form a pattern.
And (5) developing at the normal temperature of 45s +/-5 s, and then carrying out QDI cleaning and nitrogen blow-drying.
Gold plating: and electroplating gold on the surface of the substrate at the light receiving position to make the thickness of the substrate reach more than 2.5 um.
Removing the photoresist: and removing the protective glue on the surface layer of the cutting path so as to facilitate subsequent processing without etching.
Scribing: different types and thicknesses of blades can be selected according to the requirements of the product size and the substrate type of a customer, the blade thickness has different specifications such as 40um, 60um and 80um, cutting processing is carried out, the whole cutting channel is in a blade path, as shown in fig. 4, the width of the cutting channel is 5-10um smaller than the width of the blade, the center of the cutting blade and the center of the cutting channel ensure the superposition of the cutting blade through the alignment function of a scribing machine, and therefore the cutting channel is located in the blade path, and the fact that the appearance of the product is not influenced by the residual cutting channel is ensured.
And (3) testing: and (5) electrical property test and appearance inspection.
The cost after the process is processed is less than 10 mu m, most burrs are not generated, the burr control standard in the industry is completely met, the electrical property of the product is not influenced, and the qualification rate of SG products is greatly improved.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be able to cover the technical solutions and the inventive concepts of the present invention within the technical scope of the present invention.
Claims (3)
1. A process for solving the problem of burrs after scribing of a single-layer ceramic capacitor is characterized by comprising the following steps:
s1, metallization: forming a group of conductive and bonding multilayer metal layers on the surface of the ceramic chip by adopting a magnetron sputtering processing technology;
s2, homogenizing: uniformly coating a glue layer on the surface of the metallized product for protection;
s3, exposure: using a mask plate to perform pattern exposure, so that the cutting track area is exposed to light and a chemical reaction occurs;
s4, developing: after the light receiving position is denatured, chemical reaction is carried out in the developing solution to lead the light receiving position to fall off and form a pattern;
s5, gold plating: performing gold electroplating on the surface of the substrate at the light receiving position to enable the thickness of the substrate to reach more than 2.5 um;
s6, removing the photoresist: removing the protective glue on the surface layer of the cutting path;
s7, scribing: cutting with a blade, the whole cutting path being in the path of the blade;
s8, testing: electrical property tests and visual inspection were performed.
2. The process for solving the burr problem after the single-layer ceramic capacitor is scribed according to claim 1, wherein the thickness of the glue layer is 4-5 um.
3. The process for solving the problem of the burr after the scribing of the single-layer ceramic capacitor as claimed in claim 1, wherein the width of the scribe line after the exposure and the development is less than the width of the blade by 5-10 um.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010975030.XA CN112259377A (en) | 2020-09-16 | 2020-09-16 | Process for solving burr problem after single-layer ceramic capacitor scribing |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010975030.XA CN112259377A (en) | 2020-09-16 | 2020-09-16 | Process for solving burr problem after single-layer ceramic capacitor scribing |
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| Publication Number | Publication Date |
|---|---|
| CN112259377A true CN112259377A (en) | 2021-01-22 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202010975030.XA Pending CN112259377A (en) | 2020-09-16 | 2020-09-16 | Process for solving burr problem after single-layer ceramic capacitor scribing |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103579107A (en) * | 2013-11-21 | 2014-02-12 | 中国电子科技集团公司第四十一研究所 | Membrane circuit dicing method based on mask electroplating |
| CN103594335A (en) * | 2013-11-21 | 2014-02-19 | 中国电子科技集团公司第四十一研究所 | Cutting-up method for plate capacitor |
| CN106601672A (en) * | 2016-11-28 | 2017-04-26 | 西安空间无线电技术研究所 | Method for eliminating cutting burrs of film circuit |
| CN107369554A (en) * | 2017-08-30 | 2017-11-21 | 苏州惠华电子科技有限公司 | A kind of manufacture method of capacitor |
| CN110400696A (en) * | 2019-07-29 | 2019-11-01 | 大连达利凯普科技有限公司 | A kind of manufacturing process of the single-layer capacitor with golden tin solder |
-
2020
- 2020-09-16 CN CN202010975030.XA patent/CN112259377A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103579107A (en) * | 2013-11-21 | 2014-02-12 | 中国电子科技集团公司第四十一研究所 | Membrane circuit dicing method based on mask electroplating |
| CN103594335A (en) * | 2013-11-21 | 2014-02-19 | 中国电子科技集团公司第四十一研究所 | Cutting-up method for plate capacitor |
| CN106601672A (en) * | 2016-11-28 | 2017-04-26 | 西安空间无线电技术研究所 | Method for eliminating cutting burrs of film circuit |
| CN107369554A (en) * | 2017-08-30 | 2017-11-21 | 苏州惠华电子科技有限公司 | A kind of manufacture method of capacitor |
| CN110400696A (en) * | 2019-07-29 | 2019-11-01 | 大连达利凯普科技有限公司 | A kind of manufacturing process of the single-layer capacitor with golden tin solder |
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Application publication date: 20210122 |