CN112259039B - Asynchronous controller and LED display system - Google Patents
Asynchronous controller and LED display system Download PDFInfo
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- CN112259039B CN112259039B CN201910589960.9A CN201910589960A CN112259039B CN 112259039 B CN112259039 B CN 112259039B CN 201910589960 A CN201910589960 A CN 201910589960A CN 112259039 B CN112259039 B CN 112259039B
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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Abstract
The embodiment of the invention discloses an asynchronous controller and an LED display system. The asynchronous controller includes: displaying the cache; the embedded processor is connected with the display cache; the physical layer transceiver chip is connected with the first output interface of the embedded processor; the embedded processor is used for performing screen capture processing on the display data in the display cache to obtain target display data, packaging the target display data according to a network protocol, and outputting the target display data to the physical layer transceiver chip through the first output interface. The embodiment of the invention can save the hardware design cost and reduce the hardware design difficulty.
Description
Technical Field
The invention relates to the technical field of display, in particular to an asynchronous controller and an LED display system.
Background
In low-end small-screen markets such as lamp post screens, advertising machines and the like, the carrying area of an LED (Light Emitting Diode) asynchronous controller is not large, and one gigabit network port can meet the requirement; and is also very price sensitive. The existing LED asynchronous controller mostly adopts an ARM + FPGA form, and the ARM is used as a main control card and is used for controlling, playing and other functions. The FPGA is used for connecting the main control card and the receiving card as a sending card, and is a control instruction and display data channel between the main control card and the receiving card. This architecture is mature but has the obvious disadvantage of requiring a delivery card to mate. This approach increases board area and cost. The transmitting card needs to be designed, and the hardware design difficulty is increased. In addition, many asynchronous controllers in the current market cannot support simultaneous display of two display screens, and the chip price for supporting simultaneous display of two display screens is high.
Disclosure of Invention
The embodiment of the invention provides an asynchronous controller and an LED display system, which can save hardware design cost and reduce hardware design difficulty.
Specifically, an asynchronous controller provided in an embodiment of the present invention includes: displaying the cache; the embedded processor is connected with the display cache; the physical layer transceiver chip is connected with the first output interface of the embedded processor; the embedded processor is used for performing screen capture processing on the display data in the display cache to obtain target display data, packaging the target display data according to a network protocol, and outputting the target display data to the physical layer transceiver chip through the first output interface.
The technical scheme has the following advantages: by redesigning the asynchronous controller and performing screen capture processing on the display data in the display cache, the sending card is saved, the hardware design cost can be saved, and the hardware design difficulty is reduced.
In one embodiment of the present invention, the asynchronous controller further comprises: a video encoder; the video interface is connected with the second output interface of the embedded processor through the video encoder; the embedded processor is configured to output the display data in the display buffer to the video interface through the second output interface via the video encoder, and output the display data through the second output interface and the target display data through the first output interface simultaneously.
In an embodiment of the present invention, the embedded processor is configured to receive an input control instruction, parse the control instruction, package the control instruction according to a network protocol, and output the control instruction to the physical layer transceiver chip through the first output interface.
In one embodiment of the invention, the target display data is no more than 65 million pixels of data in size, and the rate of the screen capture process is no less than 30 frames per second.
In an embodiment of the present invention, the asynchronous controller further includes a USB host controller, and at least one of a mobile communication module, a WIFI module, and a wired ethernet interface, and the mobile communication module, the WIFI module, and the wired ethernet interface are connected to the embedded processor through the USB host controller.
In one embodiment of the present invention, the asynchronous controller further comprises a power management module, and the power management module is connected to the embedded processor; the first output interface is a media independent interface, and the embedded processor is an ARM processor.
In another aspect, an LED display system provided in an embodiment of the present invention includes: displaying the cache; the embedded processor is connected with the display cache; the physical layer transceiver chip is connected with the first output interface of the embedded processor; the receiving card is connected with the physical layer transceiver chip; the LED lamp panel is connected with the receiving card; the embedded processor is used for performing screen capture processing on the display data in the display cache to obtain target display data, packaging the target display data according to a network protocol, and sending the target display data to the receiving card through the first output interface and the physical layer transceiver chip; the receiving card is used for receiving the packed target display data, analyzing the packed target display data and sending the analyzed target display data to the at least one LED lamp panel for display.
In an embodiment of the present invention, the embedded processor is further configured to receive an input control instruction, parse the control instruction, package the control instruction according to a network protocol, and output the control instruction to the physical layer transceiver chip through the first output interface.
In one embodiment of the present invention, the LED display system further comprises: a video encoder; the video interface is connected with the second output interface of the embedded processor through the video encoder; the embedded processor is configured to output the display data in the display buffer to the video interface through the second output interface via the video encoder, and output the display data through the second output interface and the target display data through the first output interface simultaneously.
In another aspect, an embodiment of the present invention provides an asynchronous controller, including: displaying the cache; a physical layer transceiver chip; a video interface; the playing module is connected with the display cache and used for outputting the display data in the display cache to the video interface; the screen capture module is connected with the display cache and is used for carrying out screen capture processing on the display data in the display cache to obtain target display data; the control instruction analysis module is used for analyzing the input control instruction; and the packaging module is used for packaging the target display data according to a network protocol and outputting the target display data to the physical layer transceiver chip, and is used for packaging the analyzed control instruction according to the network protocol and outputting the analyzed control instruction to the physical layer transceiver chip.
The above-mentioned further technical solution may have one or more of the following advantages: by redesigning the asynchronous controller and performing screen capture processing on display data in the display cache, the sending card is saved, the hardware design cost can be saved, and the hardware design difficulty is reduced; the HDMI display device and the LED display device are connected through two output interfaces through screen capture processing, so that the HDMI display device and the LED display device can be displayed simultaneously; further, the LED display device satisfying 65 ten thousand pixel point data or less by the specified region screen capture processing.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an asynchronous controller according to a first embodiment of the present invention.
Fig. 2 is a schematic structural diagram of another asynchronous controller according to a first embodiment of the present invention.
Fig. 3 is a schematic structural diagram of an asynchronous controller according to another embodiment of the present invention.
Fig. 4 is a schematic structural diagram of an LED display system according to a second embodiment of the present invention.
Fig. 5 is a schematic structural diagram of another LED display system according to a second embodiment of the present invention.
Fig. 6 is a schematic structural diagram of an asynchronous controller according to a third embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
First embodiment
Referring to fig. 1, a schematic structural diagram of an asynchronous controller 100 according to a first embodiment of the present invention is shown. As shown in fig. 1, the asynchronous controller 100 includes: a cache 110, an embedded processor 120, and a physical layer transceiver chip 130 are shown.
As described above, the display buffer 110 is, for example, a DDR3 memory chip, and is used for storing display data. Of course, it is understood that the display cache 110 is not limited to use with DDR3 memory chips, and other volatile memories may be used.
The embedded processor 120 is used as a main control module of the asynchronous controller 100, which is a main control core for the whole system to run, and after being powered on, the embedded processor runs an operating system such as an android operating system and related application software, and controls various external devices to function. Embedded processor 120 includes a first output interface 121. By way of example, the embedded processor 120 is, for example, an ARM processor; the first output Interface 121 is, for example, a Media Independent Interface (MII), such as gmii (Gigabit Media Independent Interface), rgmii (reduced Gigabit Media Independent Interface), and the like. The embedded processor 120 is configured to perform screen capture processing on the display data in the display cache 110 to obtain target display data, and package the target display data according to a network protocol and output the packaged target display data to the physical layer transceiver chip 130 through the first output interface 121. The format of the packed target display data is the format of the custom frame header and the data. The rate of the screen capture process is not less than 30 frames/second. In addition, embedded processor 120 can perform a partitioned screenshot, and can specify a screenshot partition size, such as a 600 × 400 region, that can satisfy a screen having a length of no more than 1920, a width of no more than 1080, and a total area of no more than 65 ten thousand pixel points of data.
In addition, the embedded processor 120 communicates with control software on the upper computer through a network to acquire a control instruction. The embedded processor 120 parses the control command, packages the control command according to a network protocol, and outputs the control command to the physical layer transceiver chip 130 through the first output interface 121. The format of the packed control instruction is the format of the custom frame header and the data.
The physical layer transceiver chip 130, such as a gigabit ethernet physical layer transceiver chip, is coupled to the embedded processor 120 for communication between the asynchronous controller 100 and a receiving card (not shown in fig. 1).
As shown in fig. 2, the asynchronous controller 100 further includes, for example, a video encoder 140 and a video interface 150. The video interface 150 is coupled to the second output interface 122 of the embedded processor 120 through the video encoder 140. The embedded processor 120 is configured to output the display data in the display buffer 110 to the video interface 150 through the second output interface 122 via the video encoder 140, and the display data passing through the second output interface 122 and the target display data passing through the first output interface 121 are output simultaneously, that is, the embedded processor 120 supports the first output interface 121 and the second output interface 122 to output display data simultaneously. The video interface 150 is, for example, an HDMI interface, and can be connected to an HDMI display device.
As shown in fig. 3, the asynchronous controller 100 further includes, for example, a USB HOST controller (USB HOST)123, and further includes at least one of a mobile communication module 160, a WIFI module 170, and a wired ethernet interface 180.
The mobile communication module 160 is connected to the embedded processor 120 through the USB HOST 123. The mobile communication module 160 may be, for example, a 3G/4G module, and may be connected to a mobile network and access the latest information of the internet anytime and anywhere in an outdoor application. The mobile communication module 160 may be used as one of the ways of communication between the asynchronous controller 100 and a host computer such as a PC.
Of course, USB HOST 123 may also be used for external USB storage devices, and may also be connected to other USB devices such as a mouse and a keyboard.
Further, the asynchronous controller 100 includes, for example, a power supply control module 190. Power control module 190 interfaces with embedded processor 120 to provide power to embedded processor 120.
Furthermore, the asynchronous controller 100 further includes a serial module (not shown), for example. The serial module is connected with the embedded processor 120. The serial port module comprises an RS232 interface and an RS485 interface, for example. The RS232 interface is generally used for debugging a system and printing debugging information. The RS485 interface is mainly used to connect devices located a little bit away from the periphery.
Second embodiment
Fig. 4 is a schematic structural diagram of an LED display system 10 according to a second embodiment of the present invention. As shown in fig. 4, the LED display system 10 includes, for example: display cache 110, embedded processor 120, physical layer transceiver chip 130, receiving card 200, and at least one LED lamp panel 300.
As described above, the display buffer 110 is, for example, a DDR3 memory chip, and is used for storing display data. Of course, it is understood that the display cache 110 is not limited to use with DDR3 memory chips, and other volatile memories may be used.
The embedded processor 120 is used as a main control module of the LED display system 10, which is a main control core for the operation of the whole system, and after being powered on, the embedded processor runs an operating system such as an operating system of android and the like and related application software, and controls various external devices to function. Embedded processor 120 includes a first output interface 121. By way of example, the embedded processor 120 is, for example, an ARM processor; the first output Interface 121 is, for example, a Media Independent Interface (MII), such as gmii (Gigabit Media Independent Interface), rgmii (reduced Gigabit Media Independent Interface), and the like. The embedded processor 120 is configured to perform screen capture processing on the display data in the display cache 110 to obtain target display data, and package the target display data according to a network protocol and output the packaged target display data to the physical layer transceiver chip 130 through the first output interface 121. The format of the packed target display data is the format of the custom frame header and the data. The rate of the screen capture process is not less than 30 frames/second. In addition, embedded processor 120 can perform a partitioned screenshot, and can specify a screenshot partition size, such as a 600 × 400 region, that can satisfy a screen having a length of no more than 1920, a width of no more than 1080, and a total area of no more than 65 ten thousand pixel points of data.
In addition, the embedded processor 120 also communicates with control software on the upper computer through a network to obtain control instructions. The embedded processor 120 parses the control command, packages the control command according to a network protocol, and outputs the control command to the physical layer transceiver chip 130 through the first output interface 121. The format of the packed control instruction is the format of the custom frame header and the data.
The receiving card 200 is connected to the phy layer transceiver chip 130 to obtain the packed target display data from the phy layer transceiver chip 130. The receiving card 200 parses the packed target display data. The format of the target display data is the format of the custom frame header + data, and if the frame header of the target display data does not conform to the format of the target display data, the receiving card 200 abandons the target display data. Finally, the receiving card 200 sends the analyzed target display data to at least one LED lamp panel 300 for display.
As shown in fig. 5, LED display system 10 further includes a video encoder 140 and a video interface 150. The video interface 150 is coupled to the second output interface 122 of the embedded processor 120 through the video encoder 140. The embedded processor 120 is configured to output the display data in the display buffer 110 to the video interface 150 through the second output interface 122 via the video encoder 140, and the display data passing through the second output interface 122 and the target display data passing through the first output interface 121 are output simultaneously, that is, the embedded processor 120 supports the first output interface 121 and the second output interface 122 to output display data simultaneously. The video interface 150 is, for example, an HDMI interface, and can be connected to an HDMI display device.
In addition, the LED display system 10 further includes, for example, a USB HOST controller (USB HOST)123, and further includes at least one of a mobile communication module 160, a WIFI module 170, and a wired ethernet interface 180.
The mobile communication module 160 is connected to the embedded processor 120 through the USB HOST 123. The mobile communication module 160 may be, for example, a 3G/4G module, and may connect to a mobile network and access internet information anytime and anywhere in an outdoor application. The mobile communication module 160 may be used as one of the communication methods between the LED display system 10 and a host computer such as a PC.
Of course, USB HOST 123 may also be used for external USB storage devices, and may also be connected to other USB devices such as a mouse and a keyboard.
Further, the LED display system 10 further includes, for example, a power supply control module (not shown in fig. 5). The power control module is coupled to embedded processor 120 to provide power to embedded processor 120.
Third embodiment
Referring to fig. 6, a schematic structural diagram of an asynchronous controller 500 according to a third embodiment of the present invention is shown. As shown in fig. 6, the asynchronous controller 500 includes, for example: display buffer 510, play module 520, video interface 530, screen capture module 540, packing module 550, physical layer transceiver chip 560, and control instruction parsing module 570.
As mentioned above, the display buffer 510 is, for example, a DDR3 memory chip, and is used for storing display data. Of course, it is understood that the display cache 510 is not limited to use with DDR3 memory chips, and other volatile memories may be used.
The video interface 530 is, for example, an HDMI interface, and can be connected to an HDMI display device. The video interface 530 allows a user to directly connect to the monitor screen to view the operation interface, operation status, real-time video playing status, and the like of the system. In addition, the user can directly configure the system and the playing software through the video interface 530, which is convenient and visual.
The playing module 520 is connected to the display buffer 510, and is configured to output the display data in the display buffer to the video interface 530.
The screen capture module 540 is connected to the display buffer 510, and configured to perform screen capture processing on the display data in the display buffer 510 to obtain target display data. The rate of the screen capture process is not less than 30 frames/second. In addition, the screen capture module 540 can perform partition screen capture, and can specify the size of the screen capture partition, for example, capture a 600 × 400 area, and can satisfy the screen size of which the length is not more than 1920, the width is not more than 1080, and the total area is not more than 65 ten thousand pixel point data.
And the control instruction analysis module 570 is used for analyzing the input control instruction. The input control command is obtained by the asynchronous controller 500 communicating with an upper computer such as a PC through a network.
The packing module 550 is connected to the screen capture module 540 and the control instruction parsing module 570 to obtain the target display data and the parsed control instruction. The packing module 550 packs the target display data according to a network protocol and outputs the packed target display data to the physical layer transceiver chip 560. The packing module 550 packs the analyzed control command according to a network protocol and outputs the packed control command to the physical layer transceiver chip 560. The formats of the packed target display data and the packed control instruction are the formats of the custom frame header and the data.
Finally, it should be noted that, in the embodiment of the present invention, the components of the asynchronous controller 500 may also be integrated into a piece of hardware to implement the functions of the components.
In summary, in the foregoing embodiment of the present invention, through redesign of the asynchronous controller and screen capture processing of the display data in the display cache, the sending card is saved, hardware design cost can be saved, and hardware design difficulty is reduced; the HDMI display equipment and the LED display equipment are displayed simultaneously through screen capture processing; and the screen shot satisfies the LED display device with the data of less than 65 ten thousand pixels through the specified area.
In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and/or method may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units/modules is only one logical division, and there may be other divisions in actual implementation, for example, multiple units or modules may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units/modules described as separate parts may or may not be physically separate, and parts displayed as units/modules may or may not be physical units, may be located in one place, or may be distributed on multiple network units. Some or all of the units/modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment.
In addition, each functional unit/module in the embodiments of the present invention may be integrated into one processing unit/module, or each unit/module may exist alone physically, or two or more units/modules may be integrated into one unit/module. The integrated units/modules may be implemented in the form of hardware, or may be implemented in the form of hardware plus software functional units/modules.
The integrated units/modules, which are implemented in the form of software functional units/modules, may be stored in a computer readable storage medium. The software functional unit is stored in a storage medium and includes several instructions for causing one or more processors of a computer device (which may be a personal computer, a server, or a network device) to execute some steps of the methods according to the embodiments of the present invention. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (10)
1. An asynchronous controller, comprising:
displaying the cache;
the embedded processor is connected with the display cache;
the physical layer transceiver chip is connected with the first output interface of the embedded processor;
the embedded processor is used for performing screen capture processing on the display data in the display cache to obtain target display data, packaging the target display data according to a network protocol, and outputting the target display data to the physical layer transceiver chip through the first output interface, so that the physical layer transceiver chip transmits the target display data to a receiving card to drive at least one LED lamp panel, and a programmable logic device is not arranged between the embedded processor and the physical layer transceiver chip.
2. The asynchronous controller of claim 1, further comprising:
a video encoder;
the video interface is connected with the second output interface of the embedded processor through the video encoder;
wherein the embedded processor is further configured to output the display data in the display buffer to the video interface through the second output interface via the video encoder, and the display data through the second output interface and the target display data through the first output interface are output simultaneously.
3. The asynchronous controller of claim 1, wherein the embedded processor is further configured to receive an input control command, parse the control command, and package the control command according to a network protocol, and output the control command to the physical layer transceiver chip through the first output interface.
4. The asynchronous controller of claim 1, wherein the target display data has a size of no more than 65 million pixels of data, and the rate of the screen capture process is no less than 30 frames/second; the receiving card analyzes the packed target display data, if the frame header of the target display data does not conform to the target format, the receiving card abandons the target display data, otherwise, the receiving card sends the analyzed target display data to the at least one LED lamp panel for display.
5. The asynchronous controller according to claim 1, further comprising a USB host controller and at least one of a mobile communication module, a WIFI module and a wired ethernet interface, the mobile communication module, the WIFI module and the wired ethernet interface being connected to the embedded processor through the USB host controller.
6. The asynchronous controller according to claim 1, further comprising a power management module, said power management module coupled to said embedded processor; the first output interface is a media independent interface, and the embedded processor is an ARM processor.
7. An LED display system, comprising:
displaying the cache;
the embedded processor is connected with the display cache;
the physical layer transceiver chip is connected with the first output interface of the embedded processor;
the receiving card is connected with the physical layer transceiver chip;
the LED lamp panel is connected with the receiving card;
the embedded processor is used for performing screen capture processing on the display data in the display cache to obtain target display data, packaging the target display data according to a network protocol, and sending the target display data to the receiving card through the first output interface and the physical layer transceiver chip, so that a programmable logic device is not arranged between the embedded processor and the physical layer transceiver chip, and the screen capture processing is partition screen capture processing; the receiving card is used for receiving the packed target display data, analyzing the packed target display data and judging whether the frame header of the target display data does not conform to the target format or not, if not, the receiving card gives up the target display data, and if not, the analyzed target display data is sent to the at least one LED lamp panel for display.
8. The LED display system of claim 7, wherein the embedded processor is further configured to receive an input control command, parse the control command, and package the control command according to a network protocol, and output the control command to the physical layer transceiver chip through the first output interface.
9. The LED display system of claim 7, further comprising:
a video encoder;
the video interface is connected with the second output interface of the embedded processor through the video encoder;
the embedded processor is configured to output the display data in the display buffer to the video interface through the second output interface via the video encoder, and output the display data through the second output interface and the target display data through the first output interface simultaneously.
10. An asynchronous controller, comprising:
displaying the cache;
a physical layer transceiver chip;
a video interface;
the playing module is connected with the display cache and used for outputting the display data in the display cache to the video interface;
the screen capture module is connected with the display cache and is used for carrying out screen capture processing on the display data in the display cache to obtain target display data;
the control instruction analysis module is used for analyzing the input control instruction;
and the packaging module is used for packaging the target display data according to a network protocol and outputting the target display data to the physical layer transceiver chip, and is used for packaging the analyzed control instruction according to the network protocol and outputting the analyzed control instruction to the physical layer transceiver chip.
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