CN112234823A

CN112234823A - Low-voltage input and wide-load output linear voltage converter and power supply system

Info

Publication number: CN112234823A
Application number: CN202011426647.2A
Authority: CN
Inventors: 庄文贤; 余岱原; 邱伟茗
Original assignee: Shenzhen Southern Silicon Valley Semiconductor Co ltd
Current assignee: Shenzhen Nanfang Silicon Valley Semiconductor Co.,Ltd.
Priority date: 2020-12-09
Filing date: 2020-12-09
Publication date: 2021-01-15
Anticipated expiration: 2040-12-09
Also published as: CN112234823B

Abstract

The invention provides a linear voltage converter with low-voltage input and wide-load output and a power supply system, relates to the technical field of power supply management, and solves the technical problem that an error amplifier cannot provide enough gain due to the fact that an MOS (metal oxide semiconductor) tube is transmitted under a load with extremely low power or no power. The linear voltage converter comprises an output stage sensor and a comparator; the number of the transmission MOS tubes of the output stage is one or a plurality of transmission MOS tubes connected in parallel; the output stage sensor can detect the output voltage or current of the output stage, the output stage sensor is connected with the comparator, the comparator compares the detection result with the detection reference voltage and generates different control signals, and the control signals can switch the power supply of the core stage to the input voltage V of the battery entering the switching power converter_INOr adjusting the access number of the transmission MOS tubes. The invention ensures that the core level operates in a proper interval under the load of extremely low power or no power, and improves the performance of the linear voltage converter.

Description

Low-voltage input and wide-load output linear voltage converter and power supply system

Technical Field

The invention relates to the technical field of power management, in particular to a linear voltage converter with low-voltage input and wide-load output and a power supply system.

Background

In wireless communicationWith the rapid development of communication technology systems, the development of low-cost, high-performance, and low-power-consumption wireless rf integrated circuits is becoming more and more urgent, and currently, the world is entering an Internet of Things (IoT) era where various systems need to collect and exchange data. As shown in fig. 1, in SoC (System on Chip) power architecture, ldo (low dropout regulator) is increasingly used as a low dropout linear regulator. In order to improve the overall electric energy conversion efficiency, the upper layer adopts a switching power converter, and the battery enters the switching power converter and is input voltage V_INThe voltage converted by the switching power converter is V_OUT（V_IN>V_OUT). The middle layer adopts a plurality of linear voltage converters, so that a plurality of analog or digital load circuits on the lower layer have good isolation between each other, and further the transmission efficiency is improved.

As shown in fig. 2, in the architecture of a single switching power converter and a linear voltage converter, the linear voltage converter can be divided into an LDO core stage (referred to as a core stage) and an LDO output stage (referred to as an output stage) as shown in fig. 3. As shown in FIG. 3, the core stage is mainly the reference voltage V_REFWith feedback voltage V_FBLet V pass through an error amplifier_LDOThere is a stable voltage output. The output stage comprises a transmission MOS (Mpass in FIG. 3, the transmission MOS is PMOS), a feedback resistor (Ra, Rb) and a voltage-stabilizing capacitor (C)_OUT) In order to achieve a small quiescent current design, the feedback resistor is not designed to be too small, and the voltage stabilizing capacitor is usually provided with a plurality of uF for achieving a voltage stabilizing effect. The transmission MOS tube needs to have certain driving capability in order to bear high-power load, and when the maximum current is output, the W/L ratio needs to be properly designed to ensure that Vo is output>2V_DS,SATAnd the error amplifier is ensured to operate in a saturation region. On the contrary, under the condition of very low power or no power load, the transmission MOS tube can be operated in a subcritical conduction region, namely a very low driving voltage (V)_gate-source) Generating aThe higher Vo makes the MOS transistor MP2 enter the linear region, so that the error amplifier cannot provide enough gain, and the gain of the whole open loop is reduced, which affects the performance of the linear voltage converter.

According to the load power formula P_{Load power}=P_OUT/P_IN=V_OUT*I_OUT/V_IN*I_INThe goal of lower power consumption is to improve from three main points. (1) Reducing the load voltage V_LDOThe load power is reduced (P = VI), but the minimum voltage at which the load can operate is limited by the process technology, and cannot be adjusted down at will. (2) As shown in table 1, the conversion efficiency of the switching power converter is improved, and under the same load power, the input power is reduced along with the improvement of the efficiency, so as to achieve the long-term use goal. However, there are limits to the conversion efficiency, which are limited by the circuit design and the choice of external components. (3) Reducing output voltage V of switching power converter_OUTAs shown in table 2, for output voltage adjustment of the switching power converter, under the same conversion efficiency, the input power and the output power are reduced along with the reduction of the output voltage, so as to achieve the objective of low power consumption. Due to the fact that at a fixed load voltage V_LDOLower, lower V_OUTThe linear voltage converter can operate in a smaller range and bear a large range of load current, which increases the difficulty of design.

TABLE 1 conversion efficiency of a switching power converter

Serial number	Load power efficiency	Input of power	Power output
					1	80%	1	0.8
2	85%	0.94X	0.8
				3	90%	0.89X	0.8
4	95%	0.84X	0.8

TABLE 2 output voltage regulation for switching power converters

Serial number	Load power efficiency	Output voltage	Input of power	Power output
						1	90%	1	1	0.9
2	90%	0.9	0.9X	0.81X
					3	90%	0.8	0.8X	0.72X
4	90%	0.7	0.7X	0.63X

The applicant has found that the prior art has at least the following technical problems:

under the load with little power or no power, the transmission MOS tube is in a sub-threshold region (sub-threshold), so that the error amplifier cannot provide enough gain, the gain of the whole open loop is reduced, and the performance of the linear voltage converter is influenced.

Disclosure of Invention

The invention aims to provide a linear voltage converter with low-voltage input and wide-load output and a power supply system, and aims to solve the technical problems that in the prior art, a transmission MOS (metal oxide semiconductor) tube is in a sub-threshold region under a load with extremely low power or no power, so that an error amplifier cannot provide enough gain, the gain of an integral open loop is reduced, and the performance of the linear voltage converter is influenced. The technical effects that can be produced by the preferred technical scheme in the technical schemes provided by the invention are described in detail in the following.

In order to achieve the purpose, the invention provides the following technical scheme:

the invention provides a linear voltage converter with low-voltage input and wide-load output, which comprises a core stage and an output stage, wherein the core stage is a voltage V converted by a switching power converter_OUTThe LDO power supply circuit is used for supplying power, the voltage of the LDO is stably output through the error amplifier and is connected with the output stage, the output stage is connected with a load and supplies power for the load, and the LDO power supply circuit further comprises an output stage sensor and a comparator; the number of the transmission MOS tubes of the output stage is one or a plurality of transmission MOS tubes connected in parallel; the output stage sensor can detect the output voltage or current of the output stage, the output stage sensor is connected with the comparator, the comparator compares the detection result with the detection reference voltage and generates different control signals, and the control signals can switch the power supply of the core stage to the input voltage V of the battery entering the switching power converter_INOr adjusting the access number of the transmission MOS tubes.

Optionally, the output stage sensor is connected to a gate of a transfer MOS transistor of the output stage and is capable of detecting a gate voltage or a drain current of the transfer MOS transistor.

Optionally, the output stage sensor detects the current of the drain and is connected with the positive terminal of the comparator through a first PMOS transistor and an impedance; and the grid electrode and the drain electrode of the first PMOS tube are respectively connected with the grid electrode of the transmission MOS tube and the impedance.

Optionally, the ratio of the currents of the first PMOS transistor and the transfer MOS transistor is 1: K.

Optionally, the control signal switches the power supply of the core stage through a power switch.

Optionally, the power switch is two parallel PMOS transistors, which are respectively a second PMOS transistor and a third PMOS transistor, and the second PMOS transistor,The third PMOS tube supplies power to the core stage through a drain electrode; the grid electrodes of the second PMOS tube and the third PMOS tube are connected with the output end of the comparator; the source electrodes of the second PMOS tube and the third PMOS tube are respectively connected with the V_IN、V_OUTAnd (4) connecting.

Optionally, the detection voltage is higher than the reference sensing voltage, and the output result of the comparator is a high level V_C(ii) a The detection voltage is lower than the reference sensing voltage, and the output result of the comparator is low level

_C(ii) a The grid electrode of the second PMOS tube and the high level V_CThe grid electrode of the third PMOS tube and the low level

_CAnd (4) connecting.

Optionally, the output result of the comparator is a high level V_CWhen the power supply is started, the second PMOS tube is closed, the third PMOS tube is conducted, and the core-level power supply is connected with the V_OUTConnecting; the output result of the comparator is low level

_CWhen the power supply is started, the second PMOS tube is switched on, the third PMOS tube is switched off, and the core-level power supply and the V are connected_INAnd (4) connecting.

_C(ii) a The output result of the comparator is high level V_CWhen the MOS transistors are connected in parallel, two or more transmission MOS transistors are connected in parallel at the same time; the output result of the comparator is low level

_CAnd when the MOS tube is connected, only any one of the transmission MOS tubes is connected.

A power supply system comprises the linear voltage converter with low voltage input and wide load output.

Any technical scheme can at least produce the following technical effects:

the core-level power supply under the extremely-low-power or no-power load is switched through the output-level sensor, the comparator and the power switch, and because the current flowing through the core level is about several uA steps, which are extremely small than the output level, the core-level power supply is connected to the V with higher potential under the extremely-low-power or no-power load under the condition of not influencing the whole electric energy conversion efficiency_INOr reducing the output voltage V of the error amplifier by reducing the parallel transmission MOS tube_OThe method has the advantages that the error amplifier of the core level can be operated in a proper interval, sufficient open loop gain is provided, the performance of the linear voltage converter is improved, the difficulty in designing a large-scale load current is solved, and the whole electric energy conversion efficiency is not influenced.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a block diagram of a prior art SoC power architecture;

FIG. 2 is a block diagram of a conventional architecture of a single-switch power converter and a linear voltage converter;

FIG. 3 is a circuit diagram of an architecture of a prior art linear voltage converter;

FIG. 4 is a circuit diagram of a prior art error amplifier;

fig. 5 is a block diagram of the power supply structure of the linear voltage converter of embodiment 1 of the present invention;

fig. 6 is a circuit diagram of a linear voltage converter according to embodiment 1 of the present invention;

FIG. 7 is a circuit diagram of a comparator in the present invention;

fig. 8 is a block diagram of the power supply structure of the linear voltage converter of embodiment 2 of the present invention;

fig. 9 is a circuit diagram of a linear voltage converter according to embodiment 2 of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be described in detail below. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the examples given herein without any inventive step, are within the scope of the present invention.

Example 1

The invention provides a low-voltage input and wide-load output linear voltage converter, which comprises a core stage and an output stage shown in fig. 5-7, wherein the core stage and the output stage are the LDO output stage and the LDO core stage shown in fig. 5. The core level is the voltage V converted by a switching power converter (DC-DC, i.e. direct current switching power converter)_OUTTo supply power, i.e. V_OUTThe output stage is connected with a load and supplies power to the load, and is connected with a positive power supply end of an error amplifier A1, and the voltage of the LDO is stably output through the error amplifier A1. The linear voltage converter also comprises an output stage sensor, a comparator and a power switch; the output level sensor can detect the output voltage or the current magnitude of the output level (the output level sensor needs to be converted into a voltage signal for being connected with the comparator when detecting the current, and the detection sensitivity is higher), and the output level sensor is connected with the comparator, particularly, the output level sensor is connected with the positive input end of the comparator. The comparator compares the detection result with a detection reference voltage V_R1（V_R1Set in advance as required) and generate different control signals, i.e., high level signal and low level signal, which can control the coreSwitching of the power supply of a stage to the input voltage V of a battery-entering switched-mode power converter_INWhen the load has little or no power, i.e. switching to V_IN. Because the current flowing through the core stage is about several uA steps, which are extremely small than the output stage, under the condition of not affecting the whole electric energy conversion efficiency, when the load is small, the core stage power supply is connected to the V with higher potential_INThe source voltage U of the PMOS transistor MP2 in the error amplifier A1 is increased_SIt is clear that the drain voltage U of MP2_D<U_S，U_DS<0, MP2 is always in the conducting state, so that the voltage difference U between the source and the drain of MP2_DSDecrease, i.e. | U_DSIncrease |)_，The PMOS transistor MP2, i.e., the core stage circuit, can be prevented from entering the linear region. Under the load of extremely small power or no power, due to the voltage V connected into the core level_INThe method has the advantages that the core-level error amplifier can be operated in a proper interval, sufficient open loop gain is provided, the performance of the linear voltage converter is improved, the difficulty in designing a large-scale load current is solved, and the whole electric energy conversion efficiency is not influenced.

As an alternative embodiment, the output stage sensor and the transmission MOS transistor of the output stage (the transmission MOS transistor is PMOS transistor, M in FIG. 6)_pass) The grid electrode of the transmission MOS tube is connected with the positive input end of the comparator, and the grid electrode voltage or the drain current of the transmission MOS tube can be detected. The output-stage sensor detects the current of the drain electrode, can realize higher detection sensitivity, and passes through the first PMOS tube (M)_sense) And the impedance is connected with the positive end of the comparator; the grid and the drain of the first PMOS tube are respectively connected with the grid and the impedance of the transmission MOS tube, and the source of the first PMOS tube is connected with the V_OUTAnd (4) connecting. The ratio of the current of the first PMOS tube to the current of the transmission MOS tube is 1: K, namely the drain current of the first PMOS tube is 1/K of the drain current of the transmission MOS tube, the sensing current is 1/K of the current of the transmission MOS tube, the larger the K value is, the larger the impedance required by the output-stage sensor is, and the proper K value can be selected according to the requirement so as to be convenient for converting proper sensing voltage. The sensing current is converted into a voltage signal V after passing through impedance_SAnd is andthe positive input of the comparator is connected so that the comparator is aligned with V at the positive input_SAnd a detection reference voltage V of a negative input terminal_R1And finally generating a corresponding level signal.

As an alternative embodiment, the control signal switches the power supply of the core stage via a power switch, as shown in fig. 6-7. The power switch is composed of two PMOS tubes connected in parallel, and the two PMOS tubes are respectively a second PMOS tube (M in figure 6)_SW1) And a third PMOS transistor (M in FIG. 6)_SW2) The second PMOS transistor and the third PMOS transistor supply power to the core stage through the drain, that is, the drains of the second PMOS transistor and the third PMOS transistor are connected to the positive power supply terminal of the error amplifier a1, and the negative power supply terminal of the error amplifier a1 is grounded. The grid electrodes of the second PMOS tube and the third PMOS tube are connected with the output end of the comparator, and the source electrodes of the second PMOS tube and the third PMOS tube are respectively connected with the V_INAnd V_OUTAnd (4) connecting. The detection voltage is higher than the reference sensing voltage, and the output result of the comparator is a high level V_C(ii) a The detection voltage is lower than the reference sensing voltage, and the output result of the comparator is low level

_C(ii) a Grid and high level V of second PMOS tube_CThe grid of the third PMOS tube is connected with the low level

_CAnd (4) connecting. According to the working principle of the PMOS tube, when the Ugs is less than or equal to 0, the PMOS tube is conducted, and the Ugs>When 0, the PMOS tube is cut off. The output result of the comparator is high level V_CWhile, the Ugs of the second PMOS tube>0, the second PMOS tube is closed, the Ugs of the third PMOS tube is less than or equal to 0, the third PMOS tube is conducted, and the core-level power supply and the V_OUTConnecting; the output result of the comparator is low

_CWhen the power supply is turned on, the second PMOS tube is turned on, the third PMOS tube is turned off, and the core-level power supply and the V are connected_INAnd (4) connecting.

As an alternative embodiment, as shown in fig. 7, the comparator is a two-stage comparator, and includes an input stage and a latch stage, where the input stage is a first stage and the latch stage is a second stage, which has the advantages of simple structure and high speed.

Example 2

As shown in fig. 8 to 9, the technical feature different from embodiment 1 is that the number of transfer MOS transistors is 2 or more (two in fig. 9, i.e., the first transfer MOS transistor and the second transfer MOS transistor) and they are connected in parallel to form a transfer MOS transistor array, and the more transfer MOS transistors, the easier it is to implement V-pair_OAccurate control of voltage range, and preferably, the parameters of all parallel transmission MOS tubes are consistent; meanwhile, the control signal adjusts the working state of the PMOS transistor MP2 by adjusting the number of the connected transmission MOS transistors. When the load is small, the output result of the comparator is low level

_COnly one or a few (when the number of the transmission MOS tubes in the transmission MOS tube array in the circuit is more than three) transmission MOS tubes are started, namely, one or a few transmission MOS tubes are connected in parallel, V_OThe transmission MOS tube array has larger voltage drop than a plurality of transmission MOS tubes connected in parallel, so that V is_OThe voltage at (c) decreases. The drain voltage U of the PMOS tube MP2 in the error amplifier A1 is reduced_DDue to source voltage U of MP2_SIs still V_OUTUnchanged, obviously U_D<U_S，U_DS<0, MP2 is always on, U_DReducing the voltage difference U between the drain and the source of MP2_DSDecrease, i.e. | U_DSIncrease |)_，The PMOS transistor MP2, i.e., the core stage circuit, can be prevented from entering the linear region. When the load is heavy, the output result of the comparator is high level V_CAnd two or a plurality of transmission MOS tubes (when the number of the transmission MOS tubes in the transmission MOS tube array in the circuit is more than three) are started, and the transmission MOS tubes are in the same working state as the conventional linear voltage converter.

A power supply system comprises the linear voltage converter with low voltage input and wide load output. Under the condition of extremely-low-power or no-power load, the voltage connected into the core stage of the linear voltage converter is higherOutput voltage V of high-or error amplifier_OThe method has the advantages that the error amplifier of the core level can be operated in a proper interval, sufficient open loop gain is provided, the performance of the linear voltage converter is improved, the difficulty in designing a large-scale load current is solved, the whole electric energy conversion efficiency is not influenced, and the purpose of lower power consumption is achieved by the power supply system.

The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.

Claims

1. A linear voltage converter with low voltage input and wide load output comprises a core stage and an output stage, wherein the core stage is a voltage V converted by a switching power converter_OUTThe LDO power supply circuit is characterized by also comprising an output stage sensor and a comparator, wherein the output stage is connected with a load and supplies power to the load; the number of the transmission MOS tubes of the output stage is one or a plurality of transmission MOS tubes connected in parallel; the output stage sensor can detect the output voltage or current of the output stage, the output stage sensor is connected with the comparator, the comparator compares the detection result with the detection reference voltage and generates different control signals, and the control signals can switch the power supply of the core stage to the input voltage V of the battery entering the switching power converter_INOr adjusting the access number of the transmission MOS tubes.

2. The low voltage input and wide load output linear voltage converter according to claim 1, wherein the output stage sensor is connected to a gate of a pass MOS transistor of the output stage and is capable of detecting a gate voltage or a drain current of the pass MOS transistor.

3. The low voltage input and wide load output linear voltage converter according to claim 2, wherein the output stage sensor detects the current of the drain, and is connected to the positive terminal of the comparator through a first PMOS transistor and an impedance; and the grid electrode and the drain electrode of the first PMOS tube are respectively connected with the grid electrode of the transmission MOS tube and the impedance.

4. The low voltage input and wide load output linear voltage converter according to claim 3, wherein the current ratio of the first PMOS transistor to the transmission MOS transistor is 1: K.

5. The low voltage input and wide load output linear voltage converter according to any one of claims 1-4, wherein the control signal switches the power supply of the core stage through a power switch.

6. The low-voltage-input and wide-load-output linear voltage converter according to claim 5, wherein the power switch comprises two parallel PMOS transistors, namely a second PMOS transistor and a third PMOS transistor, and the second PMOS transistor and the third PMOS transistor supply power to the core stage through a drain; the grid electrodes of the second PMOS tube and the third PMOS tube are connected with the output end of the comparator; the source electrodes of the second PMOS tube and the third PMOS tube are respectively connected with the V_IN、V_OUTAnd (4) connecting.

7. The low voltage input and wide load output linear voltage converter according to claim 6, wherein the sensing voltage is higher than the reference sensing voltage, and the output result of the comparator is a high level V_C(ii) a The detection voltage is lower than the reference sensing voltage, and the output result of the comparator is low level

_C(ii) a The grid electrode of the second PMOS tube and the high level V_CIs connected with the third PMOS tubeAnd the low level

_CAnd (4) connecting.

8. The low voltage input and wide load output linear voltage converter according to claim 7, wherein the comparator output result is a high level V_CWhen the power supply is started, the second PMOS tube is closed, the third PMOS tube is conducted, and the core-level power supply is connected with the V_OUTConnecting; the output result of the comparator is low level

9. A low voltage input and wide load output linear voltage converter according to any one of claims 1-3, wherein the sensing voltage is higher than the reference sensing voltage, and the output result of the comparator is a high level V_C(ii) a The detection voltage is lower than the reference sensing voltage, and the output result of the comparator is low level

10. A power supply system comprising a low voltage input and wide load output linear voltage converter as claimed in any one of claims 1 to 9.