CN112185702B - Multilayer ceramic capacitor - Google Patents

Multilayer ceramic capacitor Download PDF

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Publication number
CN112185702B
CN112185702B CN202010641390.6A CN202010641390A CN112185702B CN 112185702 B CN112185702 B CN 112185702B CN 202010641390 A CN202010641390 A CN 202010641390A CN 112185702 B CN112185702 B CN 112185702B
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China
Prior art keywords
electrode
electrodes
multilayer ceramic
ceramic capacitor
connection
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CN202010641390.6A
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CN112185702A (en
Inventor
李泽正
李旼坤
崔才烈
郑镇万
朱镇卿
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Samsung Electro Mechanics Co Ltd
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Samsung Electro Mechanics Co Ltd
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Priority claimed from KR1020190080682A external-priority patent/KR20190116122A/en
Priority claimed from KR1020190081079A external-priority patent/KR20190116124A/en
Application filed by Samsung Electro Mechanics Co Ltd filed Critical Samsung Electro Mechanics Co Ltd
Priority to CN202311478126.5A priority Critical patent/CN117275940A/en
Publication of CN112185702A publication Critical patent/CN112185702A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/005Electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/018Dielectrics
    • H01G4/06Solid dielectrics
    • H01G4/08Inorganic dielectrics
    • H01G4/12Ceramic dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/30Stacked capacitors

Abstract

The present application provides a multilayer ceramic capacitor comprising: a body including a dielectric layer, a first internal electrode and a second internal electrode disposed with the dielectric layer interposed therebetween and disposed point-symmetrically to each other; a first connection electrode and a second connection electrode penetrating the body in a direction perpendicular to the dielectric layer and connected to the first internal electrode; a third connection electrode and a fourth connection electrode penetrating the body in a direction perpendicular to the dielectric layer and connected to the second internal electrode; first and second external electrodes disposed on both surfaces of the main body and connected to the first and second connection electrodes, respectively; and third and fourth external electrodes spaced apart from the first and second external electrodes and connected to the third and fourth connection electrodes, the first and second internal electrodes including regions in which the electrodes are not disposed.

Description

Multilayer ceramic capacitor
The present application claims the benefit of priority from korean patent application No. 10-2019-0081079 filed on the south of 2019, 7 and 5, and korean patent application No. 10-2019-0080682 filed on the south of 2019, 7 and 4, the disclosures of which are incorporated herein by reference in their entirety.
Technical Field
The present disclosure relates to a multilayer ceramic capacitor.
Background
Electronic devices including multilayer ceramic capacitors (MLCCs) have recently been increasingly used. In the 5 th generation communication era, a larger number of capacitors have been used in smartphones, and such capacitors are required to have a high capacity. However, the mounting area of passive components such as MLCCs and inductors decreases with the reduction in size of the packaged product, and thus, the demand for the reduction in size of the passive components increases. The MLCCs and inductors may be packaged with an Integrated Circuit (IC) and an Application Processor (AP), may be embedded in a substrate, or may be mounted at the lower end of the AP in the form of a (pad-side capacitor) LSC, as needed, to improve mounting flexibility.
Accordingly, the mounting area can be reduced, and equivalent series inductance (ESL) occurring in the substrate can also be reduced. Accordingly, there is an increasing demand for reduced-size MLCC products.
Unlike a general MLCC, a double via type capacitor may include a via hole. In the double via type capacitor, a cap layer may be provided in the upper and lower portions, a via hole may be formed in the body in which the effective layer forming the capacitance is provided, the via hole may be filled with a via electrode, and the via electrode may be electrically connected.
However, in such a via-type capacitor, the ESL and Equivalent Series Resistance (ESR) of the capacitor may deteriorate due to the via, and the capacitance may decrease.
Disclosure of Invention
An aspect of the present disclosure is to provide a multilayer ceramic capacitor having improved equivalent series inductance (ESL) by canceling mutual inductance.
Another aspect of the present disclosure is to provide a multilayer ceramic capacitor having increased capacitance as compared to a multilayer ceramic capacitor having an internal via structure.
Another aspect of the present disclosure is to provide a multilayer ceramic capacitor having an improved insulation breakdown voltage (BDV).
According to an aspect of the present disclosure, there is provided a multilayer ceramic capacitor including: a body including a dielectric layer, a first internal electrode and a second internal electrode disposed with the dielectric layer interposed therebetween and disposed to be point-symmetrical to each other; a first connection electrode and a second connection electrode penetrating the body in a direction perpendicular to the dielectric layer and connected to the first internal electrode; third and fourth connection electrodes penetrating the body in a direction perpendicular to the dielectric layer and connected to the second internal electrode; first and second external electrodes disposed on both surfaces of the main body and connected to the first and second connection electrodes, respectively; and third and fourth external electrodes spaced apart from the first and second external electrodes and connected to the third and fourth connection electrodes, the first and second internal electrodes including regions in which electrodes are not disposed.
According to another aspect of the present disclosure, there is provided a multilayer ceramic capacitor including: a body including a first internal electrode, a second internal electrode, and a dielectric layer interposed between the first internal electrode and the second internal electrode, the first internal electrode and the second internal electrode being disposed to be point-symmetrical to each other; first and second connection electrodes disposed perpendicular to the dielectric layer and exposed through first and second surfaces of the body, connected to the first internal electrode and spaced apart from a portion of the second internal electrode; third and fourth connection electrodes disposed perpendicular to the dielectric layer and exposed through the first and second surfaces of the body, connected to the second internal electrode and spaced apart from a portion of the first internal electrode and the first and second connection electrodes; first and second external electrodes disposed on the first and second surfaces of the main body and connected to the first and second connection electrodes, respectively; and third and fourth external electrodes provided on the first and second surfaces of the main body, respectively, spaced apart from the first and second external electrodes, and connected to the third and fourth connection electrodes.
Drawings
The above and other aspects, features and advantages of the present disclosure will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings in which:
fig. 1 is a perspective view illustrating a multilayer ceramic capacitor according to an example embodiment of the present disclosure;
FIG. 2 is a cross-sectional view taken along line I-I' in FIG. 1;
fig. 3A and 3B are sectional views taken along the X and Y directions shown in fig. 1, wherein fig. 3A is a sectional view showing a first inner electrode and fig. 3B is a sectional view showing a second inner electrode; and
fig. 4A and 4B are sectional views taken along the X and Y directions shown in fig. 1, wherein fig. 4A is a sectional view showing a first inner electrode and fig. 4B is a sectional view showing a second inner electrode.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described as follows with reference to the accompanying drawings. The shapes and sizes of constituent elements in the drawings may be exaggerated or reduced for clarity.
These embodiments are described in sufficient detail to enable those skilled in the art to practice the application. It is to be understood that the various embodiments of the application, although different, are not necessarily mutually exclusive. For example, the structure, shape, and dimensions described as examples in the embodiments in the present disclosure may be implemented in another example embodiment without departing from the spirit and scope of the present disclosure. The shapes and sizes of elements in the drawings may be exaggerated for clarity of description, and the same elements will be denoted by the same reference numerals.
For clarity of description, some elements may be omitted or schematically illustrated and the thickness of the elements may be exaggerated to clearly show layers and regions. It will be understood that when a portion "comprises" an element, it can further comprise another element without excluding the other element, unless the context requires otherwise.
In the drawing, the X direction may be defined as a first direction, an L direction, or a length direction, the Y direction may be defined as a second direction, a W direction, or a width direction, and the Z direction may be defined as a third direction, a T direction, or a thickness direction. However, these directions are defined for convenience of description, and the claims are not limited in detail by the directions defined as described above.
The meaning of "connected" of an element to another element in the specification includes indirect connection through an adhesive layer and direct connection between the two elements. In addition, "electrically connected" is meant to include both physically connected and physically disconnected concepts. It will be understood that when an element is referred to as being "first" or "second," it is not limited thereto. The terms "first," "second," and the like may be used merely for distinguishing between other elements and not necessarily for limiting the order or importance of the elements. In some cases, a first element may be termed a second element without departing from the scope of the claims set forth herein. Similarly, the second element may also be referred to as a first element.
The term "exemplary embodiment" as used herein does not refer to the same exemplary embodiment and is provided to emphasize a particular feature or characteristic different from that of another exemplary embodiment. However, the exemplary embodiments provided herein are considered to be capable of being implemented by being combined with each other in whole or in part. For example, unless a contrary or contradictory description is provided therein, an element described in a particular exemplary embodiment may be understood as a description relating to another exemplary embodiment even if it is not described in another exemplary embodiment.
The terminology used herein is for the purpose of describing exemplary embodiments only and is not intended to be limiting of the disclosure. In this case, the singular includes the plural unless the context indicates otherwise.
In the following description, a multilayer ceramic capacitor according to an example embodiment will be described with reference to fig. 1 to 4B.
The multilayer ceramic capacitor 200 in example embodiments may include: a body 210, the body 210 including a dielectric layer 211, and first and second internal electrodes 221 and 222, the first and second internal electrodes 221 and 222 being disposed with the dielectric layer 211 interposed therebetween and disposed to be point-symmetrical to each other; a first connection electrode 231 and a second connection electrode 234 penetrating the body 210 in a direction perpendicular to the dielectric layer 211 and connected to the first inner electrode 221; the third and fourth connection electrodes 232 and 233 penetrating the body 210 in a direction perpendicular to the dielectric layer 211 and connected to the second internal electrode 222; first and second external electrodes 241 and 244 disposed on both surfaces of the body 210 and connected to the first and second connection electrodes 231 and 234; and third and fourth external electrodes 242 and 243 spaced apart from the first and second external electrodes 241 and 244 and connected to the third and fourth connection electrodes 232 and 233, and the first and second internal electrodes 221 and 222 include regions 222a and 221a, respectively, in which electrodes are not disposed.
In the body 210, the dielectric layers 211 and the first and second internal electrodes 221 and 222 may be alternately stacked. The shape of the body 210 may not be limited to any particular shape, and may have a hexahedral shape as shown in the drawings or a hexahedral-like shape. Since the ceramic powder included in the body 210 is shrunk during the sintering process, the body 210 may not have an exact hexahedral shape having a straight line, but may have a substantially hexahedral shape.
The main body 210 may have first and second surfaces S1 and S2 opposite to each other in a thickness direction (Z direction), third and fourth surfaces S3 and S4 connected to the first and second surfaces S1 and S2 and opposite to each other in a width direction (Y direction), and fifth and sixth surfaces S5 and S6 connected to the first and second surfaces S1 and S2 and the third and fourth surfaces S3 and S4 and opposite to each other in a length direction (X direction). One of the first surface S1 and the second surface S2 may be configured as a mounting surface.
The plurality of dielectric layers included in the body 210 may be in a sintered state, and the dielectric layers may be integrated such that boundaries between adjacent dielectric layers cannot be identified without using a Scanning Electron Microscope (SEM).
In an example embodiment, the material of the dielectric layer 211 may not be limited to any particular material as long as sufficient capacitance is available. For example, the dielectric layer 211 may be formed using a barium titanate material, a perovskite material compound having lead (Pb), a strontium titanate material, or the like. The barium titanate material may comprise BaTiO 3 Powder, and BaTiO 3 Examples of the powder may include (Ba) in which calcium (Ca), zirconium (Zr), or the like is partially dissolved 1-x Ca x )TiO 3 、Ba(Ti 1-y Ca y )O 3 、(Ba 1-x Ca x )(Ti 1-y Zr y )O 3 、Ba(Ti 1-y Zr y )O 3 Etc. Barium titanate (BaTiO) added with various ceramic additives, organic solvents, coupling agents, dispersants, etc. can be used according to the intended purpose 3 ) Powder, or the like is used as a material of the dielectric layer 211.
The first and second cover parts 212 and 213, each having a certain thickness, may be formed in the lower portion of the lowermost internal electrode and in the upper portion of the uppermost internal electrode of the body 210. The first and second cover parts 212 and 213 may have the same composition as that of the dielectric layer 211, and the first and second cover parts 212 and 213 may be formed by laminating at least one or more dielectric layers excluding electrodes in each of an upper portion of an uppermost internal electrode and a lower portion of a lowermost internal electrode of the body 210.
In an example embodiment, the logo 250 may be disposed on the first cover 212 and/or the second cover 213, if desired. The logo 250 may be formed in one of the first and second cover parts 212 and 213, and the upper and lower parts of the main body 210 may be distinguished from each other by the logo 250 based on a difference in brightness or color. The logo 250 may be configured as a dielectric layer formed by sintering a single ceramic green sheet or stacking a plurality of ceramic green sheets, and may be included in the first cover 212 and/or the second cover 213.
The method of providing the difference in brightness or color between the first cover 212 and the second cover 213 by using the logo 250 is not limited to any particular method. For example, the logo 250 may be formed using ceramic particles, each having a size different from that of the ceramic particles included in the body, or may be formed by oxidizing one or more metals selected from Ni, mn, cr, mg, Y and V or BaSiO 3 、CaSiO 3 Etc. to the ceramic composition and may be marked with a laser. However, the material of the logo 250 and the method of forming the logo 250 may not be limited to the examples described above. By providing the marks, the upper and lower portions of the main body can be distinguished from each other, and the direction of the protrusion protruding through the electrode can be recognized. Therefore, the multilayer ceramic capacitor in the example may be mounted on the substrate in a direction to obtain an improved bonding force.
In an example embodiment, the thickness of the body 210 may be 100 μm or less. The thickness of the body 210 may refer to a vertical distance between the first surface and the second surface. The lower limit of the thickness is not limited to any particular size, and may be, for example, 5 μm or more. By manufacturing the body 210 to have a thickness of 100 μm or less, the multilayer ceramic capacitor in the example embodiment may be applied to a multilayer ceramic capacitor embedded in a substrate and/or a capacitor mounted on a lower end of an Application Processor (AP) in the form of a pad-side capacitor (LSC).
The internal electrodes 221 and 222 may include first and second internal electrodes 221 and 222 alternately disposed and opposite to each other, and the dielectric layer 211 is interposed between the first and second internal electrodes 221 and 222. The first and second internal electrodes 221 and 222 may include regions 222a and 221a, respectively, in which electrodes are not disposed. The regions 222a and 221a in which the electrodes are not disposed may refer to regions in which the first and second internal electrodes 221 and 222 are not disposed, respectively, and the first and second internal electrodes 221 and 222 may be connected to external electrodes having different polarities. Accordingly, the first and second connection electrodes 231 and 234 may penetrate the region 221a in which the electrode is not formed and may be spaced apart from the second inner electrode 222, and the third and fourth connection electrodes 232 and 233 may penetrate the region 222a in which the electrode is not formed and may be spaced apart from the first inner electrode 221.
By connecting the first and second inner electrodes 221 and 222 to the first and second outer electrodes 241, 244, the third and fourth outer electrodes 242 and 243 using the first and second connection electrodes 231, 234, the third and fourth connection electrodes 232 and 233, the overlapping area of the dielectric layer 211 between the first and second inner electrodes 221 and 222 therebetween may be increased, and thus the capacitance of the multilayer ceramic capacitor 200 may be increased.
The first and second internal electrodes 221 and 222 may contain a large amount of nickel (Ni), but the composition of the first and second internal electrodes 221 and 222 is not limited thereto. For example, the first and second internal electrodes 221 and 222 may be formed using a conductive paste including one or more materials from among silver (Ag), palladium (Pd), gold (Au), platinum (Pt), nickel (Ni), tin (Sn), copper (Cu), tungsten (W), titanium (Ti), indium (In), and alloys thereof. As a method of printing the conductive paste, a screen printing method, a gravure printing method, or the like can be used, but the printing method is not limited thereto.
The multilayer ceramic capacitor 200 in example embodiments may include a first connection electrode 231, a second connection electrode 234, a third connection electrode 232, and a fourth connection electrode 233, the first connection electrode 231 and the second connection electrode 234 may be electrically connected to the first external electrode 241 and the second external electrode 244, and the third connection electrode 232 and the fourth connection electrode 233 may be electrically connected to the third external electrode 242 and the fourth external electrode 243.
As described above, by providing a plurality of connection electrodes connecting the first and second external electrodes 241 and 244 and the third and fourth external electrodes 242 and 243, the coupling force between the external electrodes and the body can be improved.
Fig. 3A and 3B are sectional views showing the shapes of the first and second internal electrodes 221 and 222. Referring to fig. 3A and 3B, the first and second internal electrodes 221 and 222 may have shapes formed to be point-symmetrical to each other. The formation of the inner electrodes 221 and 222 into a point-symmetrical configuration may refer to: the first and second internal electrodes 221 and 222 may be disposed to be point-symmetrical to each other with reference to the center point of each of the internal electrodes 221 and 222, provided that there are electrodes in the regions of the internal electrodes 221 and 222 where the electrodes are not actually disposed. Since the first and second internal electrodes 221 and 222 have shapes forming point symmetry, mutual inductance can be offset, thereby improving equivalent series inductance (ESL) of the multilayer ceramic capacitor.
In an example embodiment, each of the first and second inner electrodes 221 and 222 may have a T-shaped form. Referring to fig. 3A and 3B, each of the first and second internal electrodes 221 and 222 may have a shape of a long side taken in a length direction and a short side taken in a width direction, and the shape shown in fig. 3A and 3B may represent a T-shaped form.
Since each of the inner electrodes 221 and 222 has a T-shaped form, the regions 221a and 222a in which no electrode is disposed may be formed in the inner electrodes 222 and 221, and thus the connection electrodes 231 and 234 may penetrate the region 221a in which no electrode is disposed, and the connection electrodes 233 and 234 may penetrate the region 222a in which no electrode is disposed. By including the above structure, the capacitance can be increased as compared with a configuration in which a via hole is formed on an inner electrode.
In an example embodiment, each of the regions 222a and 221a of the inner electrodes 221 and 222 in which no electrode is disposed may have a rectangular shape. Referring to fig. 3A and 3B, each of the regions 221a and 222a in which the electrodes are not disposed may have a rectangular shape toward the center portion of the inner electrode.
In another example embodiment, each of the regions 222a and 221a of the inner electrodes 221 and 222 where no electrode is disposed may have a circular shape. Referring to fig. 4A and 4B, each of the regions 221a and 222a in which the electrodes are not disposed may have a circular shape toward the center portion of the inner electrode. That is, the corners of the inner electrodes 221 and 222 have regions 222a and 221a recessed toward the center thereof in an approximately circular shape.
In the above-described example embodiments, each of the regions in the inner electrode where the electrode is not disposed may have a rectangular shape and/or a circular shape, but the shape of the region in which the electrode is not disposed is not limited thereto. Examples of the shape of the region where the electrode is not provided may include a quadrangular shape (e.g., a trapezoidal shape, a rectangular shape), a triangular shape, a polygonal shape with more than four sides, a circle, an ellipse, and a combination of any of these shapes.
In an example embodiment, the connection electrodes 231, 232, 233, and 234 may contain a large amount of nickel, but the composition of the connection electrodes 231, 232, 233, and 234 is not limited thereto. For example, the connection electrodes 231, 232, 233, and 234 may be formed using a conductive paste including one or more materials from among silver (Ag), palladium (Pd), gold (Au), platinum (Pt), nickel (Ni), tin (Sn), copper (Cu), tungsten (W), titanium (Ti), and alloys thereof. The method of forming the connection electrodes 231, 232, 233, and 234 is not limited to any particular method. For example, the connection electrodes 231, 232, 233, and 234 may be formed by: a laminate in which the dielectric layer 211, the first internal electrode 221, and the second internal electrode 222 are laminated is formed, the main body 210 is drilled in a third direction (Z direction) using laser drilling, mechanical pin punching, or the like, and the drilled portion is filled with the above-described conductive paste.
In an example embodiment, the inner electrodes 221 and 222 and the connection electrodes 231, 232, 233, and 234 may include the same metal material. The same metal material may be nickel (Ni), but examples of the metal material are not limited thereto. For example, the metallic material may include one or more elements from among silver (Ag), palladium (Pd), gold (Au), platinum (Pt), nickel (Ni), tin (Sn), copper (Cu), tungsten (W), titanium (Ti), and alloys thereof. When the inner electrodes 221 and 222 and the connection electrodes 231, 232, 233, and 234 of the multilayer ceramic capacitor include the same metal material, the sintering initiation temperatures and/or sintering shrinkage rates of the inner electrodes 221 and 222 and the connection electrodes 231, 232, 233, and 234 may be matched, so that cracks, delamination, and the like may be prevented.
In an example embodiment, the connection electrodes 231, 232, 233, and 234 may protrude in the Z direction. Referring to fig. 2, the connection electrode 231 may protrude to the second surface of the body 210. This is because the connection electrode 231 may protrude outward from the through hole of the body 210 due to sintering shrinkage or the like during a process for forming the connection electrode. Depending on the size of the protrusions, when the multilayer ceramic capacitor is mounted in or on the substrate, an air gap may be formed between the electrode and the substrate, which may result in deterioration of the bonding force. In the multilayer ceramic capacitor in example embodiments, since the external electrodes are disposed on both the first surface and the second surface of the body, deterioration of the bonding force caused by the protrusions can be prevented.
In the example embodiment, the cross-sectional shape of each of the connection electrodes 231, 232, 233, and 234 may be configured as a circle, but examples of the cross-sectional shape are not limited thereto. The cross section of each of the connection electrodes 231, 232, 233, and 234 may have a quadrangular shape, a triangular shape, or the like. Also, the connection electrodes 231, 232, 233, and 234 may occupy 5% to 65% of the area in the width direction (Y direction) of the main body, but example embodiments thereof are not limited thereto.
In an example embodiment, the first, second, third and fourth external electrodes 241, 244, 242 and 243 may be disposed on both surfaces of the body 210. The first and second external electrodes 241 and 244 may be disposed on the first and second surfaces S1 and S2 of the body 210, respectively, and may be electrically connected to each other through the first and second connection electrodes 231 and 234. The third and fourth external electrodes 242 and 243 may be spaced apart from the first and second external electrodes 241 and 244, may be disposed on the first and second surfaces S1 and S2 of the body 110, respectively, and may be electrically connected through the third and fourth connection electrodes 232 and 233.
The multilayer ceramic capacitor 200 constructed as above may have improved capacitance by increasing the area where the first and second internal electrodes 221 and 222 are disposed by reducing edge portions on side surfaces connecting the upper and lower surfaces of the body 210. Accordingly, in the multilayer ceramic capacitor 200 in example embodiments, the external electrode may not be disposed on the side surface, and the internal electrode may be connected to the external electrode through the connection electrode penetrating the body, thereby increasing the capacitance.
In the following description, the configuration of the external electrode will be described based on the first external electrode 241 with reference to fig. 2. The description of the first external electrode 241 may be applied to the second external electrode 244, the third external electrode 242, and the fourth external electrode 243.
Referring to fig. 2, the first external electrode 241 may include a first sintered electrode 241a and first and second plating layers 241b and 241c. The first sintered electrode 241a may include one or more materials from among silver (Ag), palladium (Pd), gold (Au), platinum (Pt), nickel (Ni), tin (Sn), copper (Cu), tungsten (W), titanium (Ti), and alloys thereof, and may be configured as a sintered electrode formed, for example, by sintering a conductive paste including nickel (Ni). When the external electrode includes a sintered electrode (first sintered electrode 241), the external electrode may be sintered simultaneously with the main body and the internal electrode, and the bonding strength between the main body and the external electrode may be improved. In addition, referring to fig. 2, the second external electrode 244 may include a first sintered electrode 244a and first and second plating layers 244b and 244c. Since the description of the first external electrode 241 is applicable to the second external electrode 244, the third external electrode 242, and the fourth external electrode 243, a detailed description thereof will be omitted.
In example embodiments, an arithmetic average roughness (Ra) of a surface of each of the first, second, third, and fourth external electrodes 241, 244, 242, and 243 (e.g., a sintered electrode of each of the first, second, third, and fourth external electrodes 241, 244, 242, and 243) may be in a range of 1nm to 100 nm. In an example embodiment, the term "arithmetic average roughness (Ra)" may refer to an average roughness value of a distance to an imaginary center line, and the concept that the external electrode has an arithmetic average roughness (Ra) of 1nm to 100nm may refer to that the external electrode may have a surface roughness of the above range, and may refer to that the external electrode may have an artificially structured surface roughness satisfying the above range.
The arithmetic average roughness (Ra) can be calculated by: an imaginary center line is set with respect to the regions having roughness on the surfaces of the first, second, third and fourth external electrodes 241, 244, 242 and 243, distances (e.g., r1, r2, r3, … … rn) from the vertices of each region having roughness to the imaginary center line are measured, an average value of the distances is calculated using formula 1 (below), and the calculated value may be determined as an arithmetic average roughness (Ra) of the external electrode.
[ 1]
The external electrode having an arithmetic average roughness (Ra) satisfying the above range may be formed by physical or chemical surface modification. The method of surface modification is not limited to any particular method as long as the above-described roughness can be obtained. For example, surface treatment with an acid or alkali solution, physical polishing treatment with a polishing material, or the like can be used.
In general, since an oxide layer may be formed on the surface of a sintered electrode including nickel during a sintering process, it may be difficult to form a plating layer, the plating layer may be easily separated, or other problems may exist. When the surface of the external electrode in the exemplary embodiment is reformed to have an arithmetic average roughness (Ra) satisfying the above range, the oxide layer may be removed, or a surface having a certain roughness may be formed. Accordingly, the adhesion between the sintered electrode and the plating layer of the external electrode can be improved, and separation of the plating layer can be prevented.
The first plating layer 241b may include nickel, and the second plating layer 241c may include copper or tin. Since the first plating layer 241b includes nickel, adhesion with the first sintering electrode 241a can be improved. In addition, since the second plating layer 241b includes copper or tin, an external electrode having improved conductivity, improved plating adhesion property, and improved soldering property may be provided.
In another example embodiment, the first plating layer 241b may include tin, and the second plating layer 241c may include nickel. Since the first plating layer 241b includes tin, adhesion with the first sintering electrode 241a can be improved. Further, since the second plating layer 241b includes nickel, a uniform plating layer can be formed.
In an example embodiment, a thickness of each of the first, second, third and fourth external electrodes 241, 244, 242 and 243 may be in a range of 3 μm to 30 μm. The thickness of each of the first, second, third and fourth external electrodes 241, 244, 242 and 243 may refer to the total thickness of the external electrodes including the sintered electrode, the first and second plating layers laminated therein, and may refer to the distance from the body perpendicular to the surface of the external electrode. By configuring the thickness of the external electrode as above, the multilayer ceramic capacitor may not occupy a large area when mounted on or embedded in a substrate, and may have improved mounting performance.
The multilayer ceramic capacitor in example embodiments may be manufactured by the method described below. A green sheet (for forming a dielectric layer) having a paste including a conductive metal printed on one surface thereof with a certain thickness may be laminated, thereby preparing a body including a dielectric layer and first and second internal electrodes with the dielectric layer interposed therebetween.
The first and second cover parts 212 and 213 may be formed by stacking dielectric layers excluding the internal electrodes on the upper and lower parts of the body 210. An identification 250 may be provided if desired.
After forming the cover, vias may be formed in the body using laser drilling, mechanical pin punching, or the like. The via holes may be coated with a conductive paste, or may be filled with a conductive material through a plating process or the like, thereby forming the first, second, third, and fourth connection electrodes 231, 234, 232, and 233.
First and second external electrodes 241 and 244 connected to the first and second connection electrodes 231 and 234 and third and fourth external electrodes 242 and 243 connected to the third and fourth connection electrodes 232 and 233 may be formed on the first and second surfaces of the body 210.
For example, forming the first to fourth external electrodes may include: forming first to fourth sintered electrodes including nickel on the body, forming a first plating layer on each of the first to fourth sintered electrodes, and forming a second plating layer on the first plating layer.
The sintered electrode may be formed by coating a surface with a conductive paste including nickel and sintering the paste, the first plating layer may include nickel and may be formed by an electroplating method or an electroless plating method, and the second plating layer may include copper or tin and may be formed by an electroplating method or an electroless plating method.
After forming the sintered electrode layer, a baking process and a sintering process may be performed, and a first plating layer and a second plating layer may be formed, thereby manufacturing the multilayer ceramic capacitor shown in fig. 1.
According to the foregoing example embodiments, the capacitance of the multilayer ceramic capacitor may be improved.
In addition, the dielectric breakdown voltage (BDV) of the multilayer ceramic capacitor can be improved.
In addition, a multilayer ceramic capacitor having improved equivalent series inductance (ESL) can be provided by canceling mutual inductance.
While example embodiments have been shown and described above, it will be apparent to those skilled in the art that modifications and variations may be made without departing from the scope of the application as defined by the appended claims.

Claims (17)

1. A multilayer ceramic capacitor comprising:
a main body including dielectric layers stacked in a thickness direction and first and second internal electrodes disposed with the dielectric layers interposed therebetween and disposed to be point-symmetrical to each other;
a first connection electrode and a second connection electrode penetrating the body in the thickness direction, connected to the first internal electrode, and spaced apart from the second internal electrode by a first groove portion where no electrode is provided;
third and fourth connection electrodes penetrating the body in the thickness direction, connected to the second internal electrode, and spaced apart from the first internal electrode by a second groove portion where no electrode is provided;
first and second external electrodes disposed on second and first surfaces of the body opposite to each other in the thickness direction and connected to the first and second connection electrodes, respectively;
third and fourth external electrodes disposed on the second and first surfaces of the main body, respectively, spaced apart from the first and second external electrodes, respectively, and connected to the third and fourth connection electrodes; and
an identification layer disposed on only the second surface of the first and second surfaces of the main body, between the second surface of the main body and the first and third external electrodes,
wherein each of the first to fourth external electrodes includes a sintered electrode and first and second plating layers sequentially stacked in a direction away from the main body, and
wherein each of the first and second connection electrodes protrudes from only the second surface of the first and second surfaces of the main body, penetrates through the identification layer, and passes through a portion of the sintered electrode of the first external electrode, and each of the third and fourth connection electrodes protrudes from only the second surface of the first and second surfaces of the main body, penetrates through the identification layer, and passes through a portion of the sintered electrode of the third external electrode.
2. The multilayer ceramic capacitor of claim 1, wherein each of the first and second inner electrodes has a T-shape.
3. The multilayer ceramic capacitor according to claim 1, wherein the first internal electrode, the second internal electrode, the first connection electrode, the second connection electrode, the third connection electrode, and the fourth connection electrode comprise the same metal material.
4. The multilayer ceramic capacitor according to claim 1,
wherein the first connection electrode and the second connection electrode penetrate the first groove portion, and
wherein the third connection electrode and the fourth connection electrode penetrate the second groove portion.
5. The multilayer ceramic capacitor of claim 1, wherein the first and second internal electrodes comprise nickel.
6. The multilayer ceramic capacitor according to any one of claims 1 to 5, wherein the sintered electrode of each of the first to fourth external electrodes comprises nickel.
7. The multilayer ceramic capacitor of any one of claims 1 to 5, wherein each of the first to fourth external electrodes has an arithmetic average roughness of 1 to 100 nm.
8. The multilayer ceramic capacitor of claim 1, wherein each of the first and second internal electrodes comprises one or more selected from the group consisting of silver, palladium, gold, platinum, nickel, tin, copper, tungsten, titanium, indium, and alloys thereof.
9. The multilayer ceramic capacitor according to claim 1, wherein a thickness of each of the first to fourth external electrodes is in a range of 3 to 30 μm.
10. The multilayer ceramic capacitor of claim 1, wherein the thickness of the body is 100 μm or less.
11. The multilayer ceramic capacitor according to claim 1, wherein the first connection electrode and the second connection electrode are spaced apart from each other in a length direction of the main body, the first groove portion is provided at two corners of the second inner electrode opposite to each other in the length direction of the main body,
the third connection electrode and the fourth connection electrode are spaced apart from each other in the length direction of the main body, the third connection electrode is spaced apart from the first connection electrode in the width direction of the main body, the fourth connection electrode is spaced apart from the second connection electrode in the width direction of the main body, the second groove portion is provided at two corners of the first inner electrode opposite to each other in the length direction of the main body, wherein the length of the main body in the length direction is greater than the width of the main body in the width direction,
the third and first external electrodes are opposite to each other in the width direction of the main body, and the fourth and second external electrodes are opposite to each other in the width direction of the main body.
12. The multilayer ceramic capacitor of claim 1, wherein the first and second internal electrodes comprise a conductive material disposed on the dielectric layer.
13. The multilayer ceramic capacitor according to claim 1, wherein the first internal electrode, the second internal electrode, the first connection electrode, the second connection electrode, the third connection electrode, and the fourth connection electrode, and the sintered electrode comprise nickel,
the first plating layer comprises nickel and the second plating layer comprises copper or tin, or the first plating layer comprises tin and the second plating layer comprises nickel.
14. The multilayer ceramic capacitor of claim 1, wherein the first and second slot portions have a shape selected from the group consisting of quadrilateral, triangular, polygonal with more than four sides, circular, elliptical, and combinations thereof.
15. The multilayer ceramic capacitor of claim 1, wherein the sintered electrode of each of the first, second, third and fourth external electrodes has an arithmetic average roughness of 1nm to 100 nm.
16. The multilayer ceramic capacitor of claim 1, wherein each of the first, second, third and fourth connection electrodes comprises a via penetrating the body, the via filled with a conductive material.
17. The multilayer ceramic capacitor of claim 1, at least one of the first and second inner electrodes being completely separated from an outer edge of the dielectric layer.
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