CN112104303A - Fault detection method of control circuit, motor controller and servo control system - Google Patents
Fault detection method of control circuit, motor controller and servo control system Download PDFInfo
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- CN112104303A CN112104303A CN202010963291.XA CN202010963291A CN112104303A CN 112104303 A CN112104303 A CN 112104303A CN 202010963291 A CN202010963291 A CN 202010963291A CN 112104303 A CN112104303 A CN 112104303A
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- arm driving
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P29/00—Arrangements for regulating or controlling electric motors, appropriate for both AC and DC motors
- H02P29/02—Providing protection against overload without automatic interruption of supply
- H02P29/024—Detecting a fault condition, e.g. short circuit, locked rotor, open circuit or loss of load
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P27/00—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
- H02P27/04—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
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Abstract
The invention discloses a fault detection method of a control circuit, a motor controller and a servo control system. The fault detection method of the photoelectric coupler and the intelligent power module IPM comprises the following steps: detecting an upper bridge arm driving signal and a lower bridge arm driving signal output by the photoelectric coupler; analyzing whether the upper bridge arm driving signal and the lower bridge arm driving signal are abnormal or not; if at least one of the upper bridge arm driving signal and the lower bridge arm driving signal is abnormal, determining that the control circuit has a fault; and when the control circuit is determined to have a fault, the PWM wave is switched off to protect the IPM module, wherein the PWM wave is sent out by the main control chip and is input to the IPM module. The invention solves the technical problem that the driving signal directly enters the IPM module without detection in the related technology, so that the power device is easy to damage and the potential safety hazard is caused.
Description
Technical Field
The invention relates to the technical field of servo control, in particular to a fault detection method of a control circuit, a motor controller and a servo control system.
Background
In the related art, the PWM signal is a key control signal in the control system, and the signal integrity thereof plays an important role in the control system. However, in the transmission process of the signal, the PWM signal may be abnormal, so that the signal received by the PWM driving circuit is not necessarily the output value of the main control chip, and serious consequences such as damage and explosion of the power device are caused.
In the existing motor control circuit design, upper and lower bridge arm driving signals sent by a main control chip directly enter an IPM module without detection, and when a photoelectric coupler (optical coupler for short) is damaged, the output upper and lower bridge arm driving signals may be high level at the same time. When the driving signals of the upper and lower bridge arms are at high level at the same time, the upper and lower bridge arms in the IPM module are conducted at the same time to generate short circuit, so that the IPM module is damaged and exploded, and the like, and great potential safety hazard exists. Fig. 1 is a schematic diagram of an optional PWM control circuit in the prior art, in fig. 1, two upper and lower bridge arm driving signals (subjected to level conversion by a signal buffer) sent by a CPU pass through resistors R1, R2, R5 and R6, respectively, and then are isolated by an optical coupler, so that a signal difference between the upper bridge arm driving signal and the lower bridge arm driving signal is directly input to an upper bridge arm driving signal pin of an IPM module, and a signal difference between the lower bridge arm driving signal and the upper bridge arm driving signal is directly input to a lower bridge arm driving signal pin of the IPM module, so as to drive an IGBT inside the IPM module, thereby controlling the operation of a motor. Therefore, it is important to detect the PWM wave entering the IPM module.
In view of the above problems, no effective solution has been proposed.
Disclosure of Invention
The embodiment of the invention provides a fault detection method of a control circuit, a motor controller and a servo control system, which are used for at least solving the technical problem that a driving signal directly enters an IPM module without being detected in the related technology, so that a power device is easily damaged and potential safety hazards are caused.
According to an aspect of an embodiment of the present invention, there is provided a fault detection method of a control circuit, the control circuit including at least: the fault detection method comprises the following steps: detecting an upper bridge arm driving signal and a lower bridge arm driving signal output by the photoelectric coupler; analyzing whether the upper bridge arm driving signal and the lower bridge arm driving signal are abnormal or not; if at least one of the upper bridge arm driving signal and the lower bridge arm driving signal is abnormal, determining that the control circuit has a fault; and when the control circuit is determined to have a fault, the PWM wave is switched off to protect the IPM module, wherein the PWM wave is sent out by the main control chip and is input to the IPM module.
Optionally, the step of analyzing whether the upper bridge arm driving signal and the lower bridge arm driving signal are abnormal includes: performing logical NAND processing on the upper bridge arm driving signal and the lower bridge arm driving signal to obtain a NAND gate output signal; inputting the output signal of the NAND gate to a grid of a preset transistor, wherein the preset transistor is connected to an input path of a power supply of a photoelectric coupler so as to control the working state of the photoelectric coupler; and when the grid of the preset transistor receives a low-level signal, determining that at least one of the upper bridge arm driving signal and the lower bridge arm driving signal is abnormal.
Optionally, the step of turning off the PWM wave to protect the IPM module when it is determined that the control circuit has a fault includes: cutting off the power supply of the photoelectric coupler to control the photoelectric coupler to stop working; and after the photoelectric coupler stops working, stopping outputting the driving signal to cut off the PWM wave.
Optionally, the step of analyzing whether the upper bridge arm driving signal and the lower bridge arm driving signal are abnormal includes: performing logic and processing on the upper bridge arm driving signal and the lower bridge arm driving signal to obtain a first and gate output signal; inputting the output signal of the first AND gate to a first preset pin of a signal buffer, wherein the signal buffer is arranged at the rear end of the photoelectric coupler; and when the first preset pin receives a high-level signal, determining that at least one of the upper bridge arm driving signal and the lower bridge arm driving signal is abnormal.
Optionally, the step of turning off the PWM wave to protect the IPM module when it is determined that the control circuit has a fault further includes: after a first preset pin of the signal buffer receives a high-level signal, a transmission path of a driving signal is blocked; and after a transmission path of a driving signal is blocked, forbidding the upper bridge arm and the lower bridge arm of the IPM module to be simultaneously conducted so as to cut off the PWM wave.
Optionally, the step of analyzing whether the upper bridge arm driving signal and the lower bridge arm driving signal are abnormal includes: performing logic and processing on the upper bridge arm driving signal and the lower bridge arm driving signal to obtain a second and gate output signal; inputting the second AND gate output signal to a second preset pin of the IPM module; and when the second preset pin receives a high level, determining that at least one of the upper bridge arm driving signal and the lower bridge arm driving signal is abnormal.
Optionally, the step of turning off the PWM wave to protect the IPM module when it is determined that the control circuit has a fault further includes: and turning off the PWM wave through the interior of the IPM module so as to protect the IPM module.
Optionally, the second preset pin is a CIN pin.
According to another aspect of the embodiments of the present invention, there is also provided a motor controller, wherein the motor controller executes the fault detection method of the control circuit according to any one of the above items.
According to another aspect of the embodiments of the present invention, there is also provided a servo control system, at least including: the motor controller is provided.
According to another aspect of the embodiment of the invention, a robot is further provided, and is applied to the servo control system.
In the embodiment of the invention, an upper bridge arm driving signal and a lower bridge arm driving signal output by a photoelectric coupler are detected firstly, whether the upper bridge arm driving signal and the lower bridge arm driving signal are abnormal or not is analyzed, if at least one of the upper bridge arm driving signal and the lower bridge arm driving signal is abnormal, a control circuit is determined to be in fault, and when the control circuit is determined to be in fault, a PWM wave is turned off to protect an IPM module, wherein the PWM wave is sent out by a main control chip and is input to the IPM module. In the embodiment, the upper bridge arm driving signal and the lower bridge arm driving signal sent to the IPM module can be detected, when the driving signals are abnormal, the PWM wave is rapidly turned off, the upper bridge arm and the lower bridge arm are prevented from being simultaneously conducted to cause damage to the IPM module, and the protection of the IPM module is realized, so that the technical problem that in the related technology, the driving signals directly enter the IPM module without detection, power devices are easily damaged, and potential safety hazards are caused is solved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention. In the drawings:
FIG. 1 is a schematic diagram of an alternative PWM control circuit of the prior art;
FIG. 2 is a flow chart of an alternative method of fault detection for a control circuit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of an alternative PWM wave fault detection control circuit according to an embodiment of the present invention;
fig. 4 is a detection flow chart of an alternative PWM wave detection circuit according to an embodiment of the present invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
To facilitate understanding of the invention by those skilled in the art, some terms or nouns referred to in the embodiments of the invention are explained below:
IPM, intelligent power module, also referred to as a power switch device, has the advantages of GTR (large power transistor) high current density, low saturation voltage and high voltage resistance, and the advantages of high input impedance, high switching frequency and low driving power with a transistor MOSFET.
PWM, Pulse Modulation Wave, Pulse width Modulation, i.e. a Pulse shape with a variable duty cycle.
A photocoupler, which may also be referred to as a photo isolator or an optocoupler, transmits a signal through light as a medium.
The embodiment of the invention can be applied to various servo control systems, including but not limited to: the system comprises a main control chip (for transmitting a driving signal to a photoelectric coupler), a photoelectric coupler (for short, an optical coupler), a signal buffer, an IPM module, a transistor and the like. The main control chip sends out a driving signal, and the driving signal is input to the front end of the photoelectric coupler after level conversion is carried out through the signal buffer.
The control circuit of the motor in the embodiment of the invention has simple and light structure and low cost, adopts the logic gate to process signals, has the reaction speed reaching nanosecond level and is far longer than the time for judging the fault and closing the PWM wave by the IPM module, and improves the reliability of a motor driving system.
While a logical order is shown in the flow chart, in some cases, the steps shown or described may be performed in an order different than that shown or described herein.
In the method for detecting a fault of a control circuit according to an embodiment of the present invention, the control circuit at least includes: photocouplers and intelligent power modules IPM.
Fig. 2 is a flow chart of an alternative method of fault detection for a control circuit according to an embodiment of the present invention, as shown in fig. 2, the method comprising the steps of:
step S202, detecting an upper bridge arm driving signal and a lower bridge arm driving signal output by the photoelectric coupler;
step S204, analyzing whether the upper bridge arm driving signal and the lower bridge arm driving signal are abnormal or not;
step S206, if at least one of the upper bridge arm driving signal and the lower bridge arm driving signal is abnormal, determining that the control circuit has a fault;
and step S208, when the control circuit is determined to have a fault, the PWM wave is turned off to protect the IPM module, wherein the PWM wave is sent out by the main control chip and is input into the IPM module.
Through the steps, the upper bridge arm driving signal and the lower bridge arm driving signal output by the photoelectric coupler can be detected firstly, whether the upper bridge arm driving signal and the lower bridge arm driving signal are abnormal or not is analyzed, if at least one of the upper bridge arm driving signal and the lower bridge arm driving signal is abnormal, the control circuit is determined to be in fault, and when the control circuit is determined to be in fault, the PWM wave is cut off to protect the IPM module, wherein the PWM wave is sent out by the main control chip and is input to the IPM module. In the embodiment, the upper bridge arm driving signal and the lower bridge arm driving signal sent to the IPM module can be detected, when the driving signals are abnormal, the PWM wave is rapidly turned off, the upper bridge arm and the lower bridge arm are prevented from being simultaneously conducted to cause damage to the IPM module, and the protection of the IPM module is realized, so that the technical problem that in the related technology, the driving signals directly enter the IPM module without detection, power devices are easily damaged, and potential safety hazards are caused is solved.
The present invention will be described in detail with reference to the above steps.
And step S202, detecting the upper bridge arm driving signal and the lower bridge arm driving signal output by the photoelectric coupler.
The master control chip performs level conversion through the signal buffer after sending out the upper bridge arm driving signal and the lower bridge arm driving signal, and then transmits the level conversion to the photoelectric coupler.
The photoelectric coupler can be connected with the main control chip and receives the PWM driving signal of the main control chip.
Due to signal interlocking, only one driving optocoupler of the upper bridge arm and one driving optocoupler of the lower bridge arm are conducted, and under a normal condition, the driving signals of the upper bridge arm and the driving signals of the lower bridge arm are not required to be simultaneously in a high level state. However, if the optical coupler is damaged, the interlocking of the signals is disabled, and the output upper bridge arm driving signal and the output lower bridge arm driving signal are likely to be high level at the same time. Therefore, the upper bridge arm driving signal and the lower bridge arm driving signal output by the optical coupler are detected, and fault information is eliminated.
And step S204, analyzing whether the upper bridge arm driving signal and the lower bridge arm driving signal are abnormal or not.
In step S206, if at least one of the upper arm driving signal and the lower arm driving signal is abnormal, it is determined that the control circuit has a fault.
And step S208, when the control circuit is determined to have a fault, the PWM wave is turned off to protect the IPM module, wherein the PWM wave is sent out by the main control chip and is input into the IPM module.
The signal transmission of the signal buffer is determined by a level signal of the/OE pin, when the/OE pin is at a high level, the signal transmission is turned off, and when the/OE pin is at a low level, the signal transmission is realized. Now, a PWM wave detection circuit is added, the circuit detects PWM waves from the rear end of the optical coupler to the IPM module, and under abnormal conditions, the PWM waves are cut off from three aspects, so that triple protection of the IPM module is achieved.
And the first protection is realized by presetting a transistor.
Optionally, the step of analyzing whether the upper bridge arm driving signal and the lower bridge arm driving signal are abnormal includes: performing logical NAND processing on the upper bridge arm driving signal and the lower bridge arm driving signal to obtain an NAND gate output signal; inputting the output signal of the NAND gate to the grid of a preset transistor, wherein the preset transistor is connected to the input path of a power supply of the photoelectric coupler so as to control the working state of the photoelectric coupler; and when the grid of the preset transistor receives a low-level signal, determining that at least one of the upper bridge arm driving signal and the lower bridge arm driving signal is abnormal.
Because photoelectric coupler is through light transmission signal as the medium, consequently, if the abnormality appears, can be directly through turning off this transistor of predetermineeing for light can't transmit to photoelectric coupler, and photoelectric coupler can't work, just can not transmit the PWM ripples to IPM module yet.
Alternatively, the step of turning off the PWM wave to protect the IPM module when it is determined that the control circuit has a fault includes: cutting off the power supply of the photoelectric coupler to control the photoelectric coupler to stop working; and after the photoelectric coupler stops working, stopping outputting the driving signal to cut off the PWM wave.
For example, the upper arm driving signal a and the lower arm driving signal B are logically nand-processed, and then the nand gate output signal S1 is input to the gate of an N-type MOSFET connected to the input path of the optocoupler power supply for controlling the operating state of the optocoupler. When the upper bridge arm driving signal A and the lower bridge arm driving signal B are abnormal (high level at the same time), the output signal S1 of the NAND gate is low level, the MOSFET is turned off, the power supply of the optocoupler is cut off, the optocoupler stops working, the output of the driving signal is turned off, so that the PWM wave is turned off, the PWM wave is detected at the rear end of the optocoupler by protection, and when the signals are abnormal, the power supply of the optocoupler is directly turned off, and the output of the PWM wave is forbidden to continue.
Second protection, by first preset pin protection of signal buffer
Optionally, the step of analyzing whether the upper bridge arm driving signal and the lower bridge arm driving signal are abnormal includes: performing logic and processing on the upper bridge arm driving signal and the lower bridge arm driving signal to obtain a first AND gate output signal; inputting a first AND gate output signal to a first preset pin of a signal buffer, wherein the signal buffer is arranged at the rear end of the photoelectric coupler; and when the first preset pin receives a high-level signal, determining that at least one of the upper bridge arm driving signal and the lower bridge arm driving signal is abnormal.
Alternatively, the step of turning off the PWM wave to protect the IPM module when it is determined that the control circuit has a fault further includes: after a first preset pin of the signal buffer receives a high-level signal, a transmission path of a driving signal is blocked; after a transmission path of the driving signal is blocked, the upper bridge arm and the lower bridge arm of the IPM module are prohibited from being simultaneously conducted so as to cut off the PWM wave.
For example, the upper arm driving signal a and the lower arm driving signal B are logically and-processed, and then the and gate output signal S is input to a first preset pin (the first preset pin is set by itself, for example, the/OE pin) of the optocoupler back end signal buffer. When the upper bridge arm driving signal A and the lower bridge arm driving signal B are abnormal (are high level at the same time), the AND gate output signal S is high level, and after the first preset pin of the signal buffer receives the high level signal, the transmission path of the driving signal is blocked, so that the PWM wave is cut off. The protection detects PWM waves at the rear end of the optical coupler, and when signals are abnormal, the IPM module is forbidden to conduct an upper bridge arm and a lower bridge arm at the same time to generate short circuit.
The third protection is protected by a second preset pin of the IPM module
Optionally, the step of analyzing whether the upper bridge arm driving signal and the lower bridge arm driving signal are abnormal includes: performing logic and processing on the upper bridge arm driving signal and the lower bridge arm driving signal to obtain a second AND gate output signal; inputting a second AND gate output signal to a second preset pin of the IPM module; and when the second preset pin receives a high level, determining that at least one of the upper bridge arm driving signal and the lower bridge arm driving signal is abnormal.
Alternatively, the step of turning off the PWM wave to protect the IPM module when it is determined that the control circuit has a fault further includes: and the PWM wave is turned off through the interior of the IPM module so as to protect the IPM module.
For example, the upper arm driving signal a and the lower arm driving signal B are logically and-processed, and then the and gate output signal S is input to a second preset pin of the IPM module (the second preset pin is set by itself, for example, the second preset pin is set as a CIN pin), when the CIN pin is at a high level, the interior of the IPM module directly turns off the PWM wave, and a fault alarm is output. When the upper bridge arm driving signal A and the lower bridge arm driving signal B are abnormal (are high level at the same time), the output signal S of the AND gate is high level, and after the CIN pin of the IPM module receives the high level signal, the interior of the IPM module directly cuts off PWM waves. The protection detects PWM waves at the rear end of the optical coupler, and when signals are abnormal, the PWM waves are directly cut off in the IPM module.
The triple protection is not conflicted with each other and has complementary functions. When any one protection fails, the other two protections can also timely turn off the PWM wave to protect the IPM module, and the reliability of the drive circuit is greatly improved.
Fig. 3 is a schematic diagram of an alternative PWM wave fault detection control circuit according to an embodiment of the present invention, as shown in fig. 3, including: main control chip 31, optical coupler 32, signal buffer 33 and IPM 34. U1 is a logic NAND gate; u2 and U3 are both logic AND gates; u4 is a signal buffer; q1 is an N-type MOS tube; r1 and R2 are both resistors.
In fig. 3, the main control chip 31 outputs a PWM wave number to the optical coupler 32, and the optical coupler 32 may determine a plurality of driving signals (i.e., driving signal 1, driving signal 2, driving signal 3, driving signal 4, driving signal 5, and driving signal 6 in fig. 3) based on the PWM wave signal, and then send each driving signal to the IPM through the signal buffer.
A first heavy protection is arranged at the input end of an optocoupler power supply, namely an MOS (metal oxide semiconductor) transistor is arranged (namely the preset transistor is abbreviated as the MOSFET), after an upper bridge arm driving signal and a lower bridge arm driving signal sent by a CPU (Central processing Unit) are input, a level signal output by a NAND gate is input to a grid of the MOS transistor through a logic NAND gate ("& + o"), and the on-off of the MOS is determined according to the level of the grid. When the signals of the upper and lower bridge arms are abnormal, the MOS tube is switched off, so that the power supply of the optical coupler is cut off, and the PWM wave is closed. In fig. 3, Q1 is a MOSFET, Q1 is connected to an external input voltage VCC through a resistor R1, and the first protection mode determines whether the driving signals of the upper and lower arms are abnormal through the gate of the MOS transistor.
And a second protection, namely an/OE pin is arranged at the connection position of the signal buffer, and the state of the upper and lower bridge arm signals of the IPM module is judged through the pin so as to determine whether the driving signals of the upper and lower bridge arms are abnormal or not. And after upper and lower bridge arm signals of the IPM module are processed by a logic AND gate, an output signal of the AND gate is input to a/OE pin of a signal buffer at the rear end of the optocoupler, and then whether the PWM wave is closed or not is determined by a judgment result.
And setting a third protection at the connection position of the IPM module, namely connecting a CIN pin, and receiving the level signal processed by the logic AND gate through the CIN pin. The third protection is that: and (3) performing logic and processing on the driving signals of the upper and lower bridge arms, transmitting an output signal of the AND gate to a CIN pin of the IPM module, and closing the PWM wave when the CIN pin receives an abnormal signal (high level). That is, whether the driving signals of the upper and lower arms of the IPM module are abnormal or not can be determined by the level signal (such as a high level signal or a low level signal) received by the CIN pin. And determining whether the driving signals of the upper and lower bridge arms are abnormal or not according to the output signals of the AND gate, if so, closing the PWM wave, and if so, sending the PWM wave into the IPM module.
Fig. 4 is a detection flowchart of an alternative PWM wave detection circuit according to an embodiment of the present invention, as shown in fig. 4,
after the upper and lower bridge arm driving signals of the IPM module are obtained, the upper bridge arm driving signal and the lower bridge arm driving signal of the IPM module are subjected to logic AND processing, and the upper bridge arm driving signal and the lower bridge arm driving signal of the IPM module are subjected to logic NAND processing.
For logic and processing, an and gate output signal is input to a/OE pin of the opto-coupler back-end signal buffer and an and gate output signal is input to a CIN pin of the IPM module, respectively. If the high level occurs, determining that the driving signals of the upper bridge arm and the lower bridge arm are abnormal, and closing the PWM wave; and if the two signals are all low level after being processed by the AND gate, determining that the driving signals of the upper and lower bridge arms are normal, and sending PWM waves to the IPM module.
For a logic NAND processing result, inputting a signal output by a NAND gate into a grid of an MOSFET (metal oxide semiconductor field effect transistor), if a low level occurs, determining that driving signals of an upper bridge arm and a lower bridge arm are abnormal, turning off the MOSFET, and stopping an optocoupler, thereby turning off a PWM (pulse-width modulation) wave; and if the high level occurs, determining that the driving signals of the upper and lower bridge arms are normal, conducting the MOSFET tube, normally working the optocoupler, and sending the optocoupler to a PWM wave.
According to another aspect of the embodiments of the present invention, there is also provided a motor controller, characterized in that the motor controller executes the fault detection method of the control circuit of any one of the above.
According to another aspect of the embodiments of the present invention, there is also provided a servo control system, at least including: the motor controller is provided.
According to another aspect of the embodiment of the invention, a robot is further provided, and is applied to the servo control system.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
In the above embodiments of the present invention, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed technology can be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units may be a logical division, and in actual implementation, there may be another division, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, units or modules, and may be in an electrical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (11)
1. A method of fault detection of a control circuit, characterized in that the control circuit comprises at least: the fault detection method comprises the following steps:
detecting an upper bridge arm driving signal and a lower bridge arm driving signal output by the photoelectric coupler;
analyzing whether the upper bridge arm driving signal and the lower bridge arm driving signal are abnormal or not;
if at least one of the upper bridge arm driving signal and the lower bridge arm driving signal is abnormal, determining that the control circuit has a fault;
and when the control circuit is determined to have a fault, the PWM wave is switched off to protect the IPM module, wherein the PWM wave is sent out by the main control chip and is input to the IPM module.
2. The fault detection method according to claim 1, wherein the step of analyzing whether the upper leg driving signal and the lower leg driving signal are abnormal includes:
performing logical NAND processing on the upper bridge arm driving signal and the lower bridge arm driving signal to obtain a NAND gate output signal;
inputting the output signal of the NAND gate to a grid of a preset transistor, wherein the preset transistor is connected to an input path of a power supply of a photoelectric coupler so as to control the working state of the photoelectric coupler;
and when the grid of the preset transistor receives a low-level signal, determining that at least one of the upper bridge arm driving signal and the lower bridge arm driving signal is abnormal.
3. The method according to claim 2, wherein the step of turning off the PWM wave to protect the IPM module when it is determined that the control circuit is malfunctioning includes:
cutting off the power supply of the photoelectric coupler to control the photoelectric coupler to stop working;
and after the photoelectric coupler stops working, stopping outputting the driving signal to cut off the PWM wave.
4. The fault detection method according to claim 1, wherein the step of analyzing whether the upper leg driving signal and the lower leg driving signal are abnormal includes:
performing logic and processing on the upper bridge arm driving signal and the lower bridge arm driving signal to obtain a first and gate output signal;
inputting the output signal of the first AND gate to a first preset pin of a signal buffer, wherein the signal buffer is arranged at the rear end of the photoelectric coupler;
and when the first preset pin receives a high-level signal, determining that at least one of the upper bridge arm driving signal and the lower bridge arm driving signal is abnormal.
5. The method according to claim 4, wherein the step of turning off the PWM wave to protect the IPM module when it is determined that the control circuit is faulty, further comprises:
after a first preset pin of the signal buffer receives a high-level signal, a transmission path of a driving signal is blocked;
and after a transmission path of a driving signal is blocked, forbidding the upper bridge arm and the lower bridge arm of the IPM module to be simultaneously conducted so as to cut off the PWM wave.
6. The fault detection method according to claim 1, wherein the step of analyzing whether the upper leg driving signal and the lower leg driving signal are abnormal includes:
performing logic and processing on the upper bridge arm driving signal and the lower bridge arm driving signal to obtain a second and gate output signal;
inputting the second AND gate output signal to a second preset pin of the IPM module;
and when the second preset pin receives a high level, determining that at least one of the upper bridge arm driving signal and the lower bridge arm driving signal is abnormal.
7. The method according to claim 6, wherein the step of turning off the PWM wave to protect the IPM module when it is determined that the control circuit is malfunctioning, further comprises:
and turning off the PWM wave through the interior of the IPM module so as to protect the IPM module.
8. The fault detection method according to claim 6, wherein the second preset pin is a CIN pin.
9. A motor controller characterized in that it executes the method of detecting a failure of the control circuit of any one of claims 1 to 8.
10. A servo control system, characterized by comprising at least: the motor controller of claim 9.
11. A robot, characterized by being applied to the servo control system according to claim 10.
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| CN116125245A (en) * | 2023-03-14 | 2023-05-16 | 广州小鹏汽车科技有限公司 | Power module driving state judging method, motor controller and automobile |
| CN117081372A (en) * | 2023-07-28 | 2023-11-17 | 海信家电集团股份有限公司 | Intelligent power module IPM, control method thereof, chip and electronic equipment |
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Application publication date: 20201218 |