CN112018727A

CN112018727A - Semiconductor device with a plurality of semiconductor chips

Info

Publication number: CN112018727A
Application number: CN202010459538.4A
Authority: CN
Inventors: 猪上浩树
Original assignee: Rohm Co Ltd
Current assignee: Rohm Co Ltd
Priority date: 2019-05-29
Filing date: 2020-05-26
Publication date: 2020-12-01
Anticipated expiration: 2040-05-26
Also published as: CN112018727B; JP7328008B2; JP2020194389A

Abstract

The invention provides a semiconductor device. Has 1 st and 2 nd temperature detecting elements (D1, D2) arranged at 1 st and 2 nd object positions different from each other in a semiconductor integrated circuit, and generates a temperature difference protection signal S corresponding to a temperature difference between the temperature of the 1 st object position and the temperature of the 2 nd object position by using the 1 st and 2 nd temperature detecting elements_DELTA. The 1 st temperature detection element (D1) is disposed closer to the subject element as a heat generation source than the 2 nd temperature detection element (D2). The control circuit controls the target element based on the temperature difference protection signal. For example at temperatureWhen the difference is considerably high, the output transistor, i.e., the target element in the power supply IC is turned off.

Description

Semiconductor device with a plurality of semiconductor chips

Technical Field

The present invention relates to a semiconductor device.

Background

In many of various ICs including a power supply IC forming a linear regulator or a switching regulator, a temperature protection circuit is built in to protect itself from self-heating and heat caused by external air. The temperature protection circuit is also sometimes referred to as a thermal protection circuit, a thermal shutdown circuit, or the like.

Such a temperature protection circuit generally stops the operation of the IC when the temperature of the target position in the IC is equal to or higher than a predetermined protection temperature.

The temperature protection circuit is a useful circuit, but when thermal imbalance occurs in an IC (semiconductor device), thermal protection may be insufficient.

Patent document 1: japanese patent laid-open publication No. 2016-126650

Disclosure of Invention

The present invention aims to provide a semiconductor device which contributes to improvement of a thermal protection function.

A semiconductor device according to the present invention includes a semiconductor integrated circuit, and includes: a temperature difference protection signal output circuit including a 1 st temperature detection element and a 2 nd temperature detection element arranged at a 1 st object position and a 2 nd object position different from each other in the semiconductor integrated circuit, the temperature difference protection signal output circuit outputting a temperature difference protection signal corresponding to a temperature difference between a temperature of the 1 st object position and a temperature of the 2 nd object position by using the 1 st temperature detection element and the 2 nd temperature detection element; a target element as a heat generation source; and a control circuit that controls the objective element based on the temperature difference protection signal, wherein a distance between the 1 st temperature detection element and the objective element is shorter than a distance between the 2 nd temperature detection element and the objective element (1 st configuration).

In the semiconductor device according to the above-described configuration 1, the semiconductor device may include an input terminal and an output terminal for receiving an input voltage from an external device, the target element may be provided in the semiconductor integrated circuit as an element interposed between the input terminal and the output terminal, and a current based on the input voltage may flow through a target circuit via the input terminal, the target element, and the output terminal, whereby the target element generates heat, and the control circuit may control the target element based on the temperature difference protection signal, thereby forming or cutting the target circuit (configuration 2).

In the semiconductor device according to the above-described configuration 2, the target element may be a transistor, and the control circuit may control a state of the transistor based on the temperature difference protection signal to form or cut off the target circuit (configuration 3).

In the semiconductor device according to the above-described 2 nd or 3 rd configuration, the semiconductor device may be provided with a temperature protection circuit including the temperature difference protection signal output circuit, a 1 st temperature protection signal output circuit that outputs a 1 st temperature protection signal corresponding to a temperature of a 1 st specific position in the semiconductor integrated circuit, and a 2 nd temperature protection signal output circuit that outputs a 2 nd temperature protection signal corresponding to a temperature of a 2 nd specific position in the semiconductor integrated circuit, wherein the control circuit may perform formation or disconnection of the target circuit based on the temperature difference protection signal, the 1 st temperature protection signal, and the 2 nd temperature protection signal (a 4 th configuration).

In the semiconductor device having the 4 th configuration, the temperature difference protection signal output circuit may be configured to set the temperature difference protection signal to an active state when the temperature of the 1 st target position is higher than the temperature of the 2 nd target position by a predetermined differential protection temperature or more, set the 1 st temperature protection signal to an active state when the temperature of the 1 st specific position is higher than a predetermined 1 st protection temperature or more, set the 2 nd temperature protection signal to an active state when the temperature of the 2 nd specific position is higher than the 1 st protection temperature by a predetermined 2 nd protection temperature or more, set the 2 nd temperature protection signal to an active state when both the temperature difference protection signal and the 1 st temperature protection signal are in an active state or when the 2 nd temperature protection signal is in an active state, the control circuit cuts off the subject circuit (configuration No. 5).

In the semiconductor device according to the above-described 2 or 3, the semiconductor device may be provided with a temperature protection circuit including the temperature difference protection signal output circuit and a temperature protection signal output circuit that outputs a temperature protection signal corresponding to a temperature at a specific position in the semiconductor integrated circuit, wherein the control circuit may form or cut the target circuit based on the temperature difference protection signal and the temperature protection signal (configuration 6).

In the semiconductor device according to the above-described configuration 6, the temperature difference protection signal output circuit may be configured to set the temperature difference protection signal to an active state when the temperature of the 1 st target position is higher than the temperature of the 2 nd target position by a predetermined difference protection temperature or more, set the temperature protection signal to an active state when the temperature of the specific position is equal to or higher than a predetermined protection temperature, and configured to shut off the target circuit when at least one of the temperature difference protection signal and the temperature protection signal is in an active state (configuration 7).

In the semiconductor device according to the above-described configuration 2 or 3, the temperature difference protection signal output circuit may be configured to set the temperature difference protection signal to an active state when the temperature of the 1 st target position is higher than the temperature of the 2 nd target position by a predetermined difference protection temperature or more, and the control circuit may be configured to shut off the target circuit when the temperature difference protection signal is in the active state (configuration 8).

In the semiconductor device according to any one of the above 1 st to 8 th configurations, the semiconductor device may further include: a semiconductor chip on which the semiconductor integrated circuit is formed; a case for housing the semiconductor chip; and a plurality of external terminals mounted on the case, the plurality of external terminals including the input terminal and the output terminal, the target element being formed in a predetermined target region in the semiconductor chip, a plurality of metal pads being provided on the semiconductor chip, each metal pad being connected to a corresponding external terminal via a metal lead, a distance between the 1 st temperature detection element and the target region being shorter than a distance between the 2 nd temperature detection element and the target region, a minimum distance among distances between the 2 nd temperature detection element and the plurality of metal pads being shorter than a minimum distance among distances between the 1 st temperature detection element and the plurality of metal pads (structure 9).

In the semiconductor device having the 9 th structure, 1 st to k-th metal pads included in the plurality of metal pads may be arranged along a predetermined side of the semiconductor chip, k is an integer of 2 or more, and a distance between the k-th metal pad and the target region is longest among distances between the 1 st to k-th metal pads and the target region, and a distance between the k-th metal pad and the 2 nd temperature detection element is shortest among distances between the 1 st to k-th metal pads and the 2 nd temperature detection element (10 th structure).

In the semiconductor device according to any one of the above-described 1 st to 10 th configurations, the 1 st temperature detection element may be an element whose electrical characteristic changes in accordance with the temperature of the 1 st target position, the 2 nd temperature detection element may be an element whose electrical characteristic changes in accordance with the temperature of the 2 nd target position, and the temperature difference protection signal output circuit may be configured to generate the temperature difference protection signal in accordance with the temperature difference, using a change in the electrical characteristic of the 1 st temperature detection element in accordance with the temperature of the 1 st target position and a change in the electrical characteristic of the 2 nd temperature detection element in accordance with the temperature of the 2 nd target position (configuration 11 th).

According to the present invention, a semiconductor device contributing to an improvement in thermal protection function can be provided.

Drawings

Fig. 1 is an external perspective view of a semiconductor device according to embodiment 1 of the present invention.

Fig. 2 is a schematic configuration diagram of a power supply IC according to embodiment 1 of the present invention.

Fig. 3 is a diagram showing a plurality of regions formed in a semiconductor chip of a power supply IC according to embodiment 1 of the present invention.

Fig. 4 is a circuit diagram of a temperature difference detection circuit of example EX1_1 pertaining to embodiment 1 of the present invention.

Fig. 5 is a circuit diagram of a temperature detection circuit of example EX1_2 pertaining to embodiment 1 of the present invention.

Fig. 6 is a configuration diagram of a temperature protection circuit of example EX1_3 pertaining to embodiment 1 of the present invention.

Fig. 7 is a configuration diagram of a temperature protection circuit of example EX1_4 pertaining to embodiment 1 of the present invention.

Fig. 8 is a configuration diagram of a temperature protection circuit of example EX1_5 pertaining to embodiment 1 of the present invention.

Fig. 9 is a circuit diagram of a temperature difference detection circuit of example EX1_6 pertaining to embodiment 1 of the present invention.

Fig. 10 is a schematic layout view of a semiconductor chip of example EX1_7 pertaining to embodiment 1 of the present invention.

Fig. 11 is a schematic configuration diagram of a vehicle according to embodiment 2 of the present invention.

Detailed Description

Hereinafter, an example of the embodiment of the present invention will be specifically described with reference to the drawings. In the drawings referred to, the same components are denoted by the same reference numerals, and redundant description of the same components will be omitted in principle. Note that, in this specification, for the sake of simplifying the description, names of information, signals, physical quantities, elements, parts, and the like corresponding to the symbols or symbols may be omitted or abbreviated by writing the symbols or symbols indicating the information, signals, physical quantities, elements, parts, and the like. For example, the 1 st temperature detection region (see fig. 3) denoted by "Rt 1" described later may be referred to as the 1 st temperature detection region Rt1, or may be referred to simply as the temperature detection region Rt1 or simply as the region Rt1, but they all refer to the same thing.

First, several terms used in the description of the embodiments of the present invention will be explained. In the embodiment of the present invention, the IC is an abbreviation of Integrated Circuit (Integrated Circuit). The Ground (Ground) refers to a conductive portion having a potential of 0V (zero volts) as a reference or to the potential itself of 0V. The potential of 0V is sometimes also referred to as ground potential. In the embodiment of the present invention, the voltage shown without particularly providing a reference represents the potential observed from the ground.

The level refers to a level of potential, and a high level has a higher potential than a low level for an arbitrary signal or voltage. With respect to a certain arbitrary signal of interest, when the signal of interest is at a high level, an inverted signal of the signal of interest takes a low level, and when the signal of interest is at a low level, the inverted signal of the signal of interest takes a high level.

In any transistor configured as an FET (field effect transistor), the on state means that the transistor is in a conductive state between the drain and the source, and the off state means that the transistor is in a non-conductive state between the drain and the source (off state). The same applies to transistors (bipolar transistors and the like) which are not classified as FETs. Hereinafter, the on state and the off state may be simply referred to as on and off. Switching from an off state to an on state of any transistor is referred to as on, and switching from an on state to an off state is referred to as off. A MOSFET is an abbreviation of a metal-oxide-semiconductor field-effect transistor. The MOSFET is understood to be an enhancement type MOSFET as long as it is not specifically described.

< embodiment 1 >

Embodiment 1 of the present invention will be explained. Fig. 1 is an external perspective view of a semiconductor device 1 according to embodiment 1 of the present invention. The semiconductor device 1 is an electronic component including a semiconductor chip on which a semiconductor integrated circuit is formed, a case (housing) in which the semiconductor chip is housed, and a plurality of external terminals mounted on the case, and is formed by sealing the semiconductor chip in the case (housing) made of resin. The plurality of external terminals are provided in the case of the semiconductor device 1 so as to be exposed. The number of external terminals of the semiconductor device 1 and the external appearance of the semiconductor device 1 shown in fig. 1 are merely examples, and they can be designed arbitrarily.

Fig. 2 shows a schematic configuration of a power supply IC10 as an example of the semiconductor device 1. The power supply IC10 includes an input terminal TM1, an output terminal TM2, a ground terminal TM3, and an enable terminal TM4, which are included in the plurality of external terminals. The plurality of external terminals may include terminals other than the terminals TM1 to TM4, but the 4 terminals are focused here.

The power supply IC10 is a semiconductor device for constituting a linear regulator, and includes a circuit including an output transistor (power transistor) 11, a control circuit 12, a temperature protection circuit 13, and

feedback resistors

14 and 15 as a semiconductor integrated circuit. The power IC10 receives a positive input voltage Vin (e.g., 5V-45V), and generates a desired positive dc voltage, i.e., an output voltage Vout (e.g., 3.3V or 5V), by stepping down the input voltage Vin. The input voltage Vin is applied to the input terminal TM1, and the output voltage Vout is applied to the output terminal TM 2. The ground terminal TM3 is grounded. Power IC10 may also be a power device classified as an LDO (Low Drop Out) regulator.

A positive input voltage Vin of a direct current is supplied to the input terminal TM1 from a voltage source VS as an external device of the power IC 10. The output transistor 11 is configured as a P-channel MOSFET. The input terminal TM1 is connected to the source of the output transistor 11, and the output terminal TM2 is connected to the drain of the output transistor 11.

A feedback circuit including

feedback resistors

14 and 15 is provided between the output terminal TM2 and ground, and generates a feedback voltage Vfb corresponding to the output voltage Vout. Specifically, one end of the feedback resistor 14 is connected to the output terminal TM2, and the other end of the feedback resistor 14 is grounded via the feedback resistor 15. A feedback voltage Vfb is generated at the connection node between the

feedback resistors

14 and 15 as a voltage proportional to the output voltage Vout. The feedback voltage Vfb is delivered to the control circuit 12.

The control circuit 12 controls the gate voltage of the output transistor 11 so that the feedback voltage Vfb coincides with a predetermined reference voltage. As a result, the voltage determined by the ratio of the resistance values of the

feedback resistors

14 and 15 and the reference voltage is set to the target voltage Vtg, and the control circuit 12 continuously controls the on resistance value of the output transistor 11 so that the output voltage Vout matches the target voltage Vtg.

However, only at enable signal S_ENHas a logic value of "1" and thermally turns off the signal S_TSDWhen the logic value is "0", an operation (hereinafter, referred to as a normal operation) of controlling the gate voltage of the output transistor 11 so that the feedback voltage Vfb matches a predetermined reference voltage is performed. Thus, at enable signal S_ENWith a logic value of "0" or at the thermal shutdown signal S_TSDWhen the logic value of "1" is obtained, the control circuit 12 does not perform the normal operation, and the gate voltage of the output transistor 11 is sufficiently increased to maintain the output transistor 11In the off state.

Enable signal S_ENAnd a thermal shutdown signal S_TSDRespectively, a binary signal having a logical value of "0" or "1". Will enable signal S_ENThe power is supplied from a higher-level system (not shown) of the power IC10 to the enable terminal TM 4. Will heat off signal S_TSDThe temperature protection circuit 13 supplies the control circuit 12.

The output voltage Vout itself may be the feedback voltage Vfb. In any case, the feedback voltage Vfb is a voltage corresponding to the output voltage Vout. The feedback resistors 14 and 15 may be provided outside the power supply IC 10. In this case, the feedback terminal that receives the feedback voltage Vfb generated by the

feedback resistors

14 and 15 is set as one of the external terminals of the power supply IC 10.

In the power supply IC10, the output transistor 11 corresponds to a target element interposed between the input terminal TM1 and the output terminal TM2, and the target element functions as a main heat generation source. When a current based on the input voltage Vin flows through a circuit (hereinafter, referred to as a target circuit) via the input terminal TM1, the output transistor 11, and the output terminal TM2, the target element generates heat. When the temperature of the power supply IC10 including the objective element abnormally increases, the power supply IC10 may be damaged or thermally runaway. In order to prevent the power supply IC10 from being damaged by abnormal temperature, the temperature protection circuit 13 performs the thermal shutdown signal S_TSDGeneration and output of (1). Thermal shutdown signal S_TSDA thermal shutdown signal S having a logic value of "1" and serving as a signal for requesting the stop of the normal operation_TSDThermal shutdown signal S in an active state (i.e., an asserted state) with a logic value of "0_TSDIn an invalid state (i.e., a failed state).

The control circuit 12 turns off the signal S based on heat_TSDThe formation or cutting of the target circuit is performed. I.e. at the thermal shutdown signal S_TSDWhen the logic value of "1" is present, the control circuit 12 cuts off the target circuit by maintaining the output transistor 11 in the off state, and stops the heat generation of the output transistor 11 due to the current flowing through the output transistor 11. In the enable signal S_ENFront with logical value of "1Under the condition of thermal shutdown signal S_TSDWhen the logical value of "0" is present, the control circuit 12 forms the target circuit to perform the above-described normal operation.

In the power supply IC10, the thermal shutdown signal S is generated based on a plurality of temperatures of a plurality of locations within the semiconductor chip_TSD. The detection position of the temperature in the semiconductor chip is explained with reference to fig. 3. Fig. 3 is a schematic plan view of a semiconductor chip CP in which elements constituting a power supply IC10 are integrated on a semiconductor substrate. The semiconductor integrated circuit in the power supply IC10 is mounted on the semiconductor chip CP. Here, for clarity and concrete description, it is assumed that the semiconductor chip CP has a rectangular (including square) outer shape as shown in fig. 3. However, the outer shape of the semiconductor chip CP is not limited to a rectangular shape.

The semiconductor chip CP includes regions Rpow, Rcnt, Rt1, and Rt2 as different regions from each other. The region Rpow is an output transistor region (power transistor region) where the output transistor 11 is formed and arranged. The region Rcnt is a control system region where the control circuit 12 is formed and arranged. Various control system circuits (not shown in fig. 2) different from the control circuit 12 may be provided in the power supply IC10, and the control system circuits may be formed and arranged in the region Rcnt. A part or all of the circuits constituting the temperature protection circuit 13 may be disposed in the region Rcnt.

The region Rt1 is a 1 st temperature detection region in which the 1 st temperature detection element is formed and arranged, and the region Rt2 is a 2 nd temperature detection region in which the 2 nd temperature detection element is formed and arranged. Since the regions Rt1 and Rt2 are disposed at different positions from each other, the 1 st temperature detection element and the 2 nd temperature detection element are disposed at the 1 st object position and the 2 nd object position that are different from each other in the semiconductor chip CP (and hence in the semiconductor integrated circuit), and the 1 st temperature detection region and the 2 nd temperature detection region can be said to correspond to the 1 st object position and the 2 nd object position, respectively.

The 1 st temperature detection element is a temperature detection element arranged for the main purpose of detecting the temperature of the output transistor 11 (for example, particularly, the junction temperature of the output transistor 11), and is formed and arranged in the vicinity of the output transistor region Rpow. In contrast, the 2 nd temperature detection element is formed and arranged at a position relatively distant from the output transistor region Rpow as compared with the 1 st temperature detection element. Therefore, in the semiconductor chip CP, the distance between the 1 st temperature detection element and the output transistor 11 is shorter than the distance between the 2 nd temperature detection element and the output transistor 11. In other words, in the semiconductor chip CP, the distance of the 1 st temperature detection region Rt1 from the output transistor region Rpow is shorter than the distance of the 2 nd temperature detection region Rt2 from the output transistor region Rpow.

The distance of the 1 st temperature detection element from the output transistor 11 means the shortest distance of the 1 st temperature detection region Rt1 from the output transistor region Rpow, and the distance of the 2 nd temperature detection element from the output transistor 11 means the shortest distance of the 2 nd temperature detection region Rt2 from the output transistor region Rpow. Alternatively, the distance between the 1 st temperature detection element and the output transistor 11 may be understood as a distance between the center or the gravity center position of the 1 st temperature detection region Rt1 and the center or the gravity center position of the output transistor region Rpow, and similarly, the distance between the 2 nd temperature detection element and the output transistor 11 may be understood as a distance between the center or the gravity center position of the 2 nd temperature detection region Rt2 and the center or the gravity center position of the output transistor region Rpow.

As shown in fig. 3, the 1 st temperature detection region Rt1 is located in the vicinity of the output transistor region Rpow and is disposed between the output transistor region Rpow and the control system region Rcnt. In contrast, the 2 nd temperature detection region Rt2 is located in the vicinity of the control system region Rcnt. For example, as shown in fig. 3, the control system region Rcnt exists between the 2 nd temperature detection region Rt2 and the output transistor region Rpow. Here, although it is considered that the 2 nd temperature detection region Rt2 is provided separately from the control system region Rcnt, the 2 nd temperature detection region Rt2 may be a region within the control system region Rcnt. In addition, hereinafter, the symbol "T [ Rt1 ]" indicates the temperature in the 1 st temperature detection region Rt1 to be detected by the 1 st temperature detection element, and the symbol "T [ Rt2 ]" indicates the temperature in the 2 nd temperature detection region Rt2 to be detected by the 2 nd temperature detection element.

Embodiment 1 includes the following examples EX1_1 to EX1_ 8. In embodiments EX1_1 to EX1_8, specific configuration examples and the like of the temperature protection circuit 13 including the 1 st temperature detection element and the 2 nd temperature detection element will be described. The matters described above in embodiment 1 are applied to the following examples EX1_1 to EX1_8 unless otherwise specified and contradicted, and in each example, the matters contradictory to the matters described above in embodiment 1 may be prioritized over the matters described in each example. Note that, as long as there is no contradiction, the matters described in any of embodiments EX1_1 to EX1_8 may be applied to any other embodiments (that is, any 2 or more embodiments out of a plurality of embodiments may be combined).

Example EX1_1

Example EX1_1 is explained. Fig. 4 is a circuit diagram of the temperature difference detection circuit 20 that can be provided in the temperature protection circuit 13. The temperature difference detection circuit 20 outputs the temperature difference protection signal S_DELTAThe circuit 20 may be referred to as a temperature difference protection signal output circuit.

The temperature difference detection circuit 20 includes transistors Tr1 to Tr7, constant current circuits CC1 to CC3, temperature detection diodes D1 and D2, a resistor R1, and an inverter circuit INV 1. The transistors Tr1 and Tr2 are NPN-type bipolar transistors. The transistors Tr3 to Tr5 are configured as P-channel MOSFETs. The transistors Tr6 and Tr7 are N-channel MOSFETs. The constant current circuits CC 1-CC 3 generate constant currents I with constant current values based on the internal power supply voltage Vreg_CC1、I_CC2、I_CC3. The internal power supply voltage Vreg is a positive direct current voltage generated based on the input voltage Vin to the power supply IC 10. The input voltage Vin itself may also be an internal supply voltage Vreg. Hereinafter, a terminal to which the internal power supply voltage Vreg is applied is referred to as an internal power supply terminal.

The constant current circuit CC1 is arranged between an internal power supply terminal and a node ND1, and makes a constant current I_CC1The operation is performed so as to flow from the internal power supply terminal to the node ND 1. The constant current circuit CC2 is arranged between an internal power supply terminal and a node ND2, and makes a constant current I_CC2Flows from the internal power supply terminal toward the node ND2The action is performed. Here, let constant current I_CC1And I_CC2The values of (a) and (b) are identical to each other.

The temperature detection diode D1 corresponds to the 1 st temperature detection element, and the temperature detection diode D2 corresponds to the 2 nd temperature detection element. Therefore, the temperature detection diode D1 is formed and arranged in the 1 st temperature detection region Rt1, and the temperature detection diode D2 is formed and arranged in the 2 nd temperature detection region Rt2 (see fig. 3). In the temperature difference detection circuit 20, the anode of the temperature detection diode D1 is connected to the node ND1, and the anode of the temperature detection diode D2 is connected to the node ND 2. The cathodes of the temperature detection diodes D1 and D2 are grounded. The voltage at the node ND1 is referred to as a voltage V1, and the voltage at the node ND2 is referred to as a voltage V2. The temperature detection diodes D1 and D2 are preferably diodes having a common structure and common electrical characteristics.

The sources of the transistors Tr3 to Tr5 are connected to an internal power supply terminal. The gate and the drain of the transistor Tr3, the gate of the transistor Tr4, and the collector of the transistor Tr1 are commonly connected to each other. The drain of the transistor Tr4, the collector of the transistor Tr2, and the gate of the transistor Tr5 are commonly connected to each other. The emitters of the transistors Tr1 and Tr2 are commonly connected to the node ND 3. The constant current circuit CC3 is arranged between a node ND3 and the ground to make the constant current I_CC3The node ND3 operates to flow toward the ground. The base of the transistor Tr1 is connected to the node ND1, and the base of the transistor Tr2 is connected to the node ND 2.

The drain of the transistor Tr5, the drain and the gate of the transistor Tr6, and the gate of the transistor Tr7 are commonly connected to each other. The sources of the transistors Tr6 and Tr7 are grounded. The drain of the transistor Tr7 is connected to the internal power supply terminal via a resistor R1. A signal (voltage signal) generated at the drain of the transistor Tr7 is input to the inverter circuit INV 1. The inverter circuit INV1 outputs an inverted signal of the signal generated at the drain of the transistor Tr7 as the temperature difference protection signal S_DELTA。

Currently, the base currents of the transistors Tr1 and Tr2 are sufficiently small to be ignored. Then, a constant current I flows through the temperature detection diodes D1 and D2, respectively_CC1、I_CC2. When the temperature of the temperature-detecting diode D1 (i.e., the temperature of the region Rt 1) increases, the voltage V1 decreases because the forward voltage of the temperature-detecting diode D1 decreases, and when the temperature of the temperature-detecting diode D1 (i.e., the temperature of the region Rt 1) decreases, the forward voltage of the temperature-detecting diode D1 increases, and therefore the voltage V1 increases. Similarly, when the temperature of the temperature-detecting diode D2 (i.e., the temperature of the region Rt 2) increases, the forward voltage of the temperature-detecting diode D2 decreases, and therefore the voltage V2 decreases, and when the temperature of the temperature-detecting diode D2 (i.e., the temperature of the region Rt 2) decreases, the forward voltage of the temperature-detecting diode D2 increases, and therefore the voltage V2 increases.

The temperature difference detection circuit 20 includes a comparator, compares the voltages V1 and V2 with each other, and outputs the comparison result as a temperature difference protection signal S_DELTA. However, in the comparator in the temperature difference detection circuit 20, the size ratio of the transistors Tr1 and Tr2 is set to "m: 1', thereby to bias the voltage V_OFFSETTo the input terminal (inverting input terminal or non-inverting input terminal) of the comparator. Here, "m" is>1 and V_OFFSET>0”。

Therefore, in the comparator of the temperature difference detection circuit 20, the voltage (V1+ V) is compared_OFFSET) And a voltage V2. And, at "V1 + V_OFFSET>V2' is turned off by the transistor Tr5, and the temperature difference protection signal S is generated_DELTABecomes a low level. In contrast, at "V1 + V_OFFSET<V2' when the transistor Tr5 is turned on, the temperature difference protection signal S_DELTABecomes a high level.

Protection signal S at temperature difference_DELTAIn the middle, the signal level of the high level has a logic value of "1", and the signal level of the low level has a logic value of "0". Temperature difference protection signal S having a logic value of "1_DELTAIn the active state, the temperature difference protection signal S having a logic value of "0_DELTAIs in an inactive state. And, at the temperature T [ Rt2] from the 2 nd temperature detection region Rt2](i.e., the temperature of the 2 nd object position) the temperature of the 1 st temperature detection region Rt1 appearsDegree T [ Rt1](i.e., the temperature of the 1 st target position) is higher than the predetermined differential protection temperature Δ T_REFWhen the above is true, namely, at "T [ Rt1]≥T[Rt2]+ΔT_REF"when true, temperature difference protection signal S_DELTAHas a logical value of "1" (i.e., becomes active). Thus, the temperature difference protection signal S having a logical value of "1_DELTADenotes "T [ Rt1]≥T[Rt2]+ΔT_REF"true". In contrast, at "T [ Rt1]<T[Rt2]+ΔT_REF"when true, temperature difference protection signal S_DELTAHas a logical value of "0". Delta T_REFWith positive values in terms of temperature, for example 30 ℃.

According to "T [ Rt1]≥T[Rt2]+ΔT_REF"switching between satisfaction and non-satisfaction of temperature difference protection signal S_DELTAIn the logic value of (3), the bias voltage V is set in consideration of the electrical characteristics of the temperature detection diodes D1 and D2_OFFSET(in other words, the size ratio "m: 1" of the transistors Tr1 and Tr2 is determined).

To satisfy the condition of "T [ Rt1]≥T[Rt2]+ΔT_REF"temperature difference protection signal S when in erection_DELTAHas a logic value of "1" and is at "T [ Rt1]<T[Rt2]+ΔT_REF"temperature difference protection signal S when in erection_DELTAThe signal generation condition CND1 in which the logical value of (3) is "0" is set in the configuration of fig. 4 such that the size ratio of the transistors Tr1 and Tr2 is "m: 1 ", the method satisfied by the signal generation condition CND1 is not limited to this.

For example, the constant current I may be set appropriately_CC1And I_CC2The ratio of the values of (c) satisfies the signal generation condition CND 1. Even if the size ratio of the transistors Tr1 and Tr2 is "1: 1', by applying a constant current I_CC1And I_CC2Can obtain and apply the bias voltage V_OFFSETHas the same effect.

Alternatively, for example, the temperature detection diodes D1 and D2 may be formed by parallel-connected circuits of a plurality of diodes, and the number of parallel-connected diodes forming the temperature detection diode D1 and the number of parallel-connected diodes forming the temperature detection diode D2 may be appropriately set to satisfy the signal generation condition CND1. Even if the size ratio of the transistors Tr1 and Tr2 is "1: 1' and constant current I_CC1And I_CC2By making the number of parallel connections of the diodes constituting the temperature detecting diode D1 different from the number of parallel connections of the diodes constituting the temperature detecting diode D2, the bias voltage V can be obtained_OFFSETHas the same effect.

The transistors Tr1 and Tr2 may be field effect transistors such as MOSFETs. For example, when the transistors Tr1 and Tr2 are N-channel MOSFETs, the collector, emitter, and base described above correspond to the drain, source, and gate of the transistors Tr1 and Tr2, respectively.

In addition, a slave "T [ Rt 1" may be provided to the temperature difference detection circuit 20]≥T[Rt2]+ΔT_REF"false state to" T [ Rt1]≥T[Rt2]+ΔT_REF"established State transition and temperature Difference protection Signal S_DELTAIs switched from "0" to "1", provided that "T [ Rt1]+T_HYSA<T[Rt2]+ΔT_REFIf' does not stand, the temperature difference is protected by a signal S_DELTAA hysteresis circuit (not shown) for holding the logical value of "1". T is_HYSAIs a hysteresis temperature with positive values, for example 10 ℃.

The temperature protection circuit 13 (see fig. 2) can protect the signal S based on the temperature difference of fig. 4_DELTAGenerating a thermal shutdown signal S_TSD. In this case, the temperature difference protection signal S may be set_DELTAItself used as a thermal shutdown signal S_TSDOr alternatively, the signal S may be protected based on the temperature difference_DELTAAnd other signals to generate a thermal shutdown signal S_TSDThis will be described later.

Example EX1_2

An embodiment EX1_2 will be explained. Fig. 5 is a circuit diagram of the temperature detection circuit 30 that can be provided in the temperature protection circuit 13. Since the temperature detection circuit 30 outputs the temperature protection signal S_ABSThe circuit 30 may be referred to as a temperature protection signal output circuit.

The temperature detection circuit 30 includes transistors Tr11 to Tr14, resistors R11 to R16, and inverter circuits INV11 and INV 12. The transistor Tr11 is a temperature detection transistor and is configured as an NPN-type bipolar transistor. The transistor Tr12 is configured as a P-channel MOSFET. The transistors Tr13 and Tr14 are N-channel MOSFETs. The transistor Tr14 is a transistor for forming a hysteresis.

One end of the resistor R11 is connected to an internal power supply terminal (i.e., a terminal to which the internal power supply voltage Vreg is applied), and the other end of the resistor R11 is connected to one end of the resistor R12. The other end of the resistor R12 is connected to one end of the resistor R13, and to the drain of the transistor Tr 14. The other end of the resistor R13 is grounded, and the source of the transistor Tr14 is also grounded.

The connection node between the resistors R11 and R12 is connected to the base of the transistor 11. The voltage at the connection node between the resistors R11 and R12 is referred to as voltage Va. The collector of the temperature detection transistor Tr11 is connected to the gate of the transistor Tr12, and is connected to the internal power supply terminal via the resistor R14. The emitter of the temperature detection transistor Tr11 is grounded. The source of the transistor Tr12 is connected to an internal power supply terminal, and the drain of the transistor Tr12 is connected to the gate of the transistor Tr13 and is grounded via a resistor R15. Further, a connection node between the drain of the transistor Tr12 and the resistor R15 is connected to an input terminal of the inverter circuit INV 12. An output terminal of the inverter circuit INV12 is connected to the gate of the transistor Tr 14. The drain of the transistor Tr13 is connected to the internal power supply terminal via the resistor R16, and the source of the transistor Tr13 is grounded. A signal (voltage signal) generated at the drain of the transistor Tr13 is input to the inverter circuit INV 11. The inverter circuit INV11 outputs an inverted signal of the signal generated at the drain of the transistor Tr13 as the temperature protection signal S_ABS。

In the temperature detection circuit 30, the temperature detection transistor Tr11 functions as a temperature detection element for detecting the temperature of a specific position within the semiconductor integrated circuit (i.e., the semiconductor chip CP), and is therefore formed and arranged at the specific position. Hereinafter, for convenience of explanation, the specific position where the temperature detection transistor Tr11 is formed and arranged is referred to as a specific position PP (the specific position PP is not shown).

The temperature detection circuit 30 will be described with reference to a state where the temperature of the specific position PP is sufficiently low as a starting pointAnd (6) acting. When the temperature of the specific position PP is sufficiently low, the threshold voltage of the temperature detection transistor Tr11 is sufficiently high, and the temperature detection transistor Tr11 is in an off state, so that the transistor Tr12 is also in an off state. When the transistor Tr12 is in the off state, since no voltage is generated in the resistor R15, the transistor Tr13 is also in the off state, and the low-level temperature protection signal S is output from the inverter circuit INV11_ABS. When the transistor Tr12 is in the off state, the output signal of the inverter circuit INV12 is at the high level, and therefore the transistor Tr14 is in the on state. When the transistor Tr14 is in the on state, the voltage Va is represented by "Va ═ R12/(R11+ R12)".

When the temperature of the specific position PP rises from the off state of the transistor Tr12, the threshold voltage Vth [ Tr11 ] of the temperature detection transistor Tr11]Decrease when "Va ≧ Vth [ Tr11 ]]"at this time, the temperature detection transistor Tr11 is turned on. When the temperature detection transistor Tr11 is turned on, the transistor Tr12 is also turned on, the transistor Tr13 is turned on by the occurrence of a voltage drop in the resistor R15, and the temperature protection signal S of high level is output from the inverter circuit INV11_ABSAnd the transistor Tr14 is turned off. The voltage Va when the transistor Tr14 is in the off state is represented by "Va ═ R12+ R13)/(R11+ R12+ R13". Therefore, the voltage Va is higher when the transistor Tr14 is in the off state than when the transistor Tr14 is in the on state, and the temperature detection transistor Tr11 is hard to turn off. Thus, the temperature at the specific location PP and the temperature protection signal S_ABSThe relationship (2) gives hysteresis characteristics.

That is, in the use of "T [ PP ]]"indicates the temperature of PP at a specific position, when the temperature T [ PP ]]At a temperature of T [ PP ]]Sufficiently low and temperature protection signal S_ABSThe low state is increased to a predetermined protection temperature T_THIn the above case, the temperature protection signal S is generated by turning on the temperature detection transistor Tr11_ABSSwitching from low to high. After that, as long as the temperature T [ PP ]]Not from a predetermined protective temperature T_THLow predetermined hysteresis temperature T_HYSBTemperature "T" of_TH-T_HYSB"below, the temperature protection signal S_ABSMaintained at a high level when "TPP]≤T_TH-T_HYSB"time" is the temperature protection signal S by turning off the temperature detection transistor Tr11_ABSThe low level is switched from the high level.

Protection signal S at temperature_ABSIn the middle, the signal level of the high level has a logic value of "1", and the signal level of the low level has a logic value of "0". Temperature protection signal S having a logic value of "1_ABSTemperature protection signal S in active state with logic value of "0_ABSIs in an inactive state. Then, as described above, at the temperature T [ PP ] to be detected by the temperature detecting transistor Tr11](i.e., the temperature of the specific position PP) is a predetermined protection temperature T_THWhen above, i.e. in "T [ PP]≥T_THWhen "true, temperature protection signal S_ABSHas a logical value of "1" (i.e., becomes active). Thus, the temperature protection signal S having a logic value of "1_ABSIs denoted "T [ PP]≥T_TH"true".

The protection temperature T is set based on the electrical characteristics of the temperature detection transistor Tr11 and the resistance values of the resistors R11 and R12_THProtection temperature T_THFor example 150 ℃ or 175 ℃. Hysteresis temperature T_HYSBHas a positive value. The hysteresis temperature T is set based on the electrical characteristics of the temperature detection transistor Tr11 and the resistance values of the resistors R11 to R13_HYSBRetardation temperature T_HYSBFor example 10 deg.c.

The temperature detection transistor Tr11 may be a field effect transistor such as a MOSFET. For example, when the temperature detection transistor Tr11 is an N-channel MOSFET, the collector, emitter, and base described above correspond to the drain, source, and gate of the temperature detection transistor Tr11, respectively.

The temperature protection circuit 13 (see fig. 2) can be based on the temperature protection signal S of fig. 5_ABSGenerating a thermal shutdown signal S_TSD. In this case, the temperature protection signal S may be set_ABSItself used as a thermal shutdown signal S_TSDOr alternatively based on the temperature protection signal S_ABSGenerating a thermal shutdown signal S with other signals_TSDThis will be described later.

Example EX1_3

An embodiment EX1_3 will be explained. Fig. 6 shows the structure of the temperature protection circuit 13A of embodiment EX1_ 3. The temperature protection circuit 13A may be used as the temperature protection circuit 13 of fig. 2. The temperature protection circuit 13A has the temperature difference detection circuit 20 shown in embodiment EX1_1, and outputs the temperature difference protection signal S from the temperature difference detection circuit 20_DELTAAs a thermal shutdown signal S_TSDAnd outputs to the control circuit 12.

As described above, the temperature T [ Rt2 in the from 2 nd temperature detection region Rt2](i.e., the temperature of the 2 nd object position) the temperature T [ Rt1] in the 1 st temperature detection region Rt1](i.e., the temperature of the 1 st target position) is higher than the predetermined differential protection temperature Δ T_REFIn the above case, the temperature difference detection circuit 20 outputs the temperature difference protection signal S_DELTASet to an active state (i.e., the temperature difference protection signal S_DELTAIs set to "1"). Thus, the signal S is protected against temperature differences_DELTAIn the active state, the control circuit 12 of embodiment EX1_3 turns off the output transistor 11 and cuts off the circuit to be the subject.

Although a temperature imbalance is generated in the semiconductor chip CP to some extent, it can be said that a state in which the temperature imbalance is large is an abnormality, and it is possible to detect such an abnormality and cut off the target circuit, which is useful for circuit protection. For example, during the operation (normal operation) of controlling the gate voltage of the output transistor 11 so that the feedback voltage Vfb matches the predetermined reference voltage, both the temperatures of the temperature detection regions Rt1 and Rt2 in fig. 3 increase when the output terminal TM2 is short-circuited to ground, but the temperature increase rate in the temperature detection region Rt1 may be relatively large, and the temperature difference between the temperature detection regions Rt1 and Rt2 may be rapidly increased. This state can be detected by the temperature difference detection circuit 20, and rapid circuit protection can be performed.

Example EX1_4

An embodiment EX1_4 will be explained. Fig. 7 shows the structure of the temperature protection circuit 13B of embodiment EX1_ 4. The temperature protection circuit 13B may be used as the temperature protection circuit 13 of fig. 2. The temperature protection circuit 13B has a temperature shown in embodiment EX1_1The difference detection circuit 20, the temperature detection circuit 30 shown in embodiment EX1_2, and the OR circuit 51. The or circuit 51 outputs the temperature difference protection signal S output from the temperature difference detection circuit 20_DELTAAnd a temperature protection signal S outputted from the temperature detection circuit 30_ABSAs a thermal shutdown signal S_TSDAnd outputs to the control circuit 12.

In the temperature protection circuit 13B, the temperature T [ Rt2 in the 2 nd temperature detection region Rt2](i.e., the temperature of the 2 nd object position) the temperature T [ Rt1] in the 1 st temperature detection region Rt1](i.e., the temperature of the 1 st target position) is higher than the predetermined differential protection temperature Δ T_REFIn the above case, the temperature difference detection circuit 20 outputs the temperature difference protection signal S_DELTASet to an active state (i.e., the temperature difference protection signal S_DELTAIs set to "1"), the temperature T [ PP ] of the PP at the specific position]Is a predetermined protection temperature T_THIn the above, the temperature detection circuit 30 outputs the temperature protection signal S_ABSSet to an active state (i.e., set the temperature protection signal S)_ABSIs set to "1"), the signal S is protected against temperature differences_DELTAAnd temperature protection signal S_ABSIs in an active state, the thermal shutdown signal S_TSDBecomes the active state (has a logical value of "1").

Thus, the signal S is protected against temperature differences_DELTAAnd temperature protection signal S_ABSWhen at least one of them is in the active state, the control circuit 12 of embodiment EX1_4 turns off the output transistor 11 to cut off the target circuit.

In the temperature protection circuit 13B, the specific position PP at which the temperature detection transistor Tr11 (see fig. 5) is disposed may be a position that does not belong to any of the temperature detection regions Rt1 and Rt2 (i.e., a position different from any of the 1 st object position and the 2 nd object position) in the region where the semiconductor integrated circuit of the power supply IC10 is formed. However, from the viewpoint of temperature detection and protection of the output transistor 11 (see fig. 2) as a heat generation source, it is preferable to dispose the temperature detection transistor Tr11 in the vicinity of the output transistor region Rpow (see fig. 3) which is a formation region of the output transistor 11. Therefore, the specific position PP may be a position within the temperature detection region Rt1 or a position adjacent to the temperature detection region Rt 1. When the specific position PP is a position within the temperature detection region Rt1, it can be said that the specific position PP coincides with the 1 st object position.

In the temperature difference detection circuit 20, a temperature detection diode D1 (see fig. 4) is used as a temperature detection element (temperature detection element whose electrical characteristic changes in accordance with the temperature of the 1 st target position) for detecting the temperature of the 1 st target position, and in the temperature detection circuit 30, a temperature detection transistor Tr11 is provided as a temperature detection element (temperature detection element whose electrical characteristic changes in accordance with the temperature of the specific position PP) for detecting the temperature of the specific position PP. However, when the specific position PP is aligned with the 1 st target position, the temperature detection element for detecting the temperature of the 1 st target position and the temperature detection element for detecting the temperature of the specific position PP may be used as a common temperature detection element. However, this dual use is not essential.

In the temperature protection circuit 13B, the protection temperature T is set mainly based on the maximum rated temperature (highest junction temperature at the maximum rated value) of the output transistor 11_THFor example, 175 ℃.

A general thermal shutdown function can be realized by the temperature detection circuit 30. The temperature protection circuit 13B can perform a protection operation based on the temperature difference in addition to a general thermal shutdown function, and thus it is considered that safety is increased.

Example EX1_5

An embodiment EX1_5 will be explained. Fig. 8 shows the structure of the temperature protection circuit 13C of embodiment EX1_ 5. The temperature protection circuit 13C may be used as the temperature protection circuit 13 of fig. 2. The temperature protection circuit 13C includes the temperature difference detection circuit 20 shown in example EX1_1, AND further includes the AND (AND) circuit 61 AND/OR (OR) circuit 62, AND further includes 2 temperature detection circuits 30 shown in example EX1_ 2.

One of the 2 temperature detection circuits 30 provided in the temperature protection circuit 13C is denoted by a symbol "30 [1], and the other is denoted by a symbol" 30[2 ].

The position of the temperature detection transistor Tr11 in which the temperature detection circuit 30[1] is disposed, that is, the specific position PP of the temperature detection circuit 30[1], is referred to as a specific position PP [1 ]. Similarly, the position of the temperature detection transistor Tr11 in which the temperature detection circuit 30[2] is disposed, that is, the specific position PP of the temperature detection circuit 30[2], is referred to as a specific position PP [2 ].

In addition, a temperature detection circuit 30[1]]Protective temperature T in_THReferred to as protection temperature T_TH[1]A temperature detection circuit 30[2]]Protective temperature T in_THReferred to as protection temperature T_TH[2]. As will be described later, the protection temperature T is preferred_TH[2]Above the protective temperature T_TH[1]。

In addition, the slave temperature detection circuit 30[1]]Output temperature protection signal S_ABSReferred to as temperature protection signal S_ABS[1]Will be driven by the temperature detection circuit 30[2]]Output temperature protection signal S_ABSReferred to as temperature protection signal S_ABS[2]。

AND circuit 61 outputs temperature difference protection signal S_DELTAWith temperature protection signal S_ABS[1]And signal of (2). The OR circuit 62 outputs the output signal of the AND circuit 61 AND the temperature protection signal S_ABS[2]As a thermal shutdown signal S_TSDAnd outputs to the control circuit 12.

In the temperature protection circuit 13C, the temperature T [ Rt2 in the 2 nd temperature detection region Rt2](i.e., the temperature of the 2 nd object position) the temperature T [ Rt1] in the 1 st temperature detection region Rt1](i.e., the temperature of the 1 st target position) is higher than the predetermined differential protection temperature Δ T_REFIn the above case, the temperature difference detection circuit 20 outputs the temperature difference protection signal S_DELTASet to an active state (i.e., the temperature difference protection signal S_DELTAIs set to "1"), at a specific position PP [1]]Is a predetermined protection temperature T_TH[1]In the above, the temperature detection circuit 30[1]]Will protect the signal S_ABS[1]Set to an active state (i.e., set the temperature protection signal S)_ABS[1]Is set to "1"), in a specific position PP [2]]Is a predetermined protection temperature T_TH[2]In the above, the temperature detection circuit 30[2]]Will protect the signal S_ABS[2]Is set to an active state (i.e.A temperature protection signal S_ABS[2]Is set to "1").

Further, the control circuit 12 of the embodiment EX1_5 protects the signal S against the temperature difference by the function of the AND (AND) circuit 61 AND/OR the (OR) circuit 62_DELTAAnd temperature protection signal S_ABS[1]In all active states or at a temperature protection signal S_ABS[2]When the active state is established, the output transistor 11 is turned off to cut off the circuit to be operated. "temperature difference protection Signal S_DELTAAnd temperature protection signal S_ABS[1]All being in active state or temperature protection signal S_ABS[2]In the active state "including of course" signal S_DELTA、S_ABS[1]And S_ABS[2]All being active, thus_DELTA、S_ABS[1]And S_ABS[2]All of them are in the active state, "the target circuit is also cut off.

The specific position PP [1] of the temperature detection transistor Tr11 in which the temperature detection circuit 30[1] is arranged and the specific position PP [2] of the temperature detection transistor Tr11 in which the temperature detection circuit 30[2] is arranged may be positions that do not belong to any of the temperature detection regions Rt1 and Rt2 (that is, positions different from any of the 1 st object position and the 2 nd object position). However, from the viewpoint of temperature detection and protection of the output transistor 11 (see fig. 2) as a heat generation source, it is preferable that each temperature detection transistor Tr11 is disposed in the vicinity of the output transistor area Rpow (see fig. 3) which is a formation area of the output transistor 11.

Therefore, the specific position PP [1] may be a position within the temperature detection region Rt1 or a position adjacent to the temperature detection region Rt1, and the specific position PP [2] may be a position within the temperature detection region Rt1 or a position adjacent to the temperature detection region Rt 1. When the specific position PP [1] is within the temperature detection region Rt1, it can be said that the specific position PP [1] coincides with the 1 st object position. Similarly, when the specific position PP 2 is within the temperature detection region Rt1, it can be said that the specific position PP 2 coincides with the 1 st object position.

Only the specific position PP 1 of the specific positions PP 1 and PP 2 may be a position within the temperature detection region Rt 1. At this time, the specific position PP [2] is set to a position within the temperature detection region Rt2 or a position not belonging to any of the temperature detection regions Rt1 and Rt 2. Alternatively, only the specific position PP 2 of the specific positions PP 1 and PP 2 may be a position within the temperature detection region Rt 1. At this time, the specific position PP [1] is set to a position within the temperature detection region Rt2 or a position not belonging to any of the temperature detection regions Rt1 and Rt 2.

The temperature difference detection circuit 20 uses a temperature detection diode D1 (see fig. 4) as a temperature detection element (temperature detection element whose electrical characteristic changes in accordance with the temperature of the 1 st target position) for detecting the temperature of the 1 st target position, and the temperature detection circuits 30[1] and 30[2] are provided with temperature detection transistors Tr11 as temperature detection elements (temperature detection elements whose electrical characteristic changes in accordance with the temperature of the specific positions PP [1] and PP [1 ]) for detecting the temperatures of the specific positions PP [1] and PP [2 ].

However, when the specific position PP [1] is matched with the 1 st target position, the temperature detection element for detecting the temperature of the 1 st target position and the temperature detection element for detecting the temperature of the specific position PP [1] may be shared by the common temperature detection elements. However, this dual use is not essential.

Similarly, when the specific position PP 2 is matched with the 1 st target position, the temperature detection element for detecting the temperature of the 1 st target position and the temperature detection element for detecting the temperature of the specific position PP 2 may be shared by the common temperature detection elements. However, this dual use is not essential.

When both the specific positions PP 1 and PP 2 are matched with the 1 st target position, the temperature detection element for detecting the temperature of the specific position PP 1, and the temperature detection element for detecting the temperature of the specific position PP 2 may be shared by the common temperature detection elements. However, this dual use is not essential.

Through a temperature detection circuit 30[2]]A general thermal shutdown function can be achieved. In the temperature protection circuit 13C, except for general thermal shutdownIn addition to the function, a protection operation based on the temperature difference can be performed, and it is considered that safety is increased. However, if the disconnection determination of the target circuit is made only on the basis of the satisfaction of the condition that the temperature difference is large, the excessive protection may occur. For example, even if the temperature difference exceeds a prescribed differential protection temperature Δ T_REF(e.g., 30 deg.C.) as long as it should be detected by the temperature detection circuit 30[1]]The detected temperature is sufficiently low (e.g., 40 ℃), and it is not necessary to cut the target circuit. In consideration of this, the signal S is used in the temperature protection circuit 13C_DELTAAnd S_ABS[1]And signal of (2). This enables an appropriate protection operation to be achieved.

In the temperature protection circuit 13C, the protection temperature T is set mainly based on the maximum rated temperature (highest junction temperature at the maximum rated value) of the output transistor 11_TH[2]. For protection temperature T_TH[1]Protection temperature T of set ratio_TH[2]Low temperature. For example, against a protection temperature T_TH[1]、T_TH[2]The temperature was set at 150 ℃ and 175 ℃ respectively. In this case, even the temperature protection signal S for realizing the normal thermal shutdown function_ABS[2]Is "0" (even if 175 ℃ C. is not reached) as long as the temperature detection circuit 30[1]]Is high to some extent (for example, up to 150 ℃) and the above temperature difference is a differential protection temperature Δ T_REFThe above (for example, 30 ℃ or higher) causes the circuit to be cut off as an abnormal temperature rise, thereby increasing safety.

Example EX1_6

An embodiment EX1_6 will be explained. In the temperature difference detection circuit, the temperature detection element may be incorporated in the comparator. That is, for example, the temperature difference detection circuit 20A shown in fig. 9 may be used. Fig. 9 is a circuit diagram of the temperature difference detection circuit 20A of embodiment EX1_ 6. In each of the above embodiments, the temperature difference detection circuit 20A may be incorporated in the temperature protection circuit 13 instead of the temperature difference detection circuit 20.

The temperature difference detection circuit 20A includes transistors Tr21 to Tr26, a constant current circuit CC21, resistors R21 to R25, and an inverter circuit INV 21.

The transistors Tr21 and Tr22 are temperature detection transistors and are configured as PNP bipolar transistors. Of the temperature detection transistors Tr21 and Tr22, the transistor Tr21 corresponds to the 1 st temperature detection element, and the transistor Tr22 corresponds to the 2 nd temperature detection element. Therefore, the temperature detection transistor Tr21 is formed and arranged in the 1 st temperature detection region Rt1, and the temperature detection transistor Tr22 is formed and arranged in the 2 nd temperature detection region Rt2 (see fig. 3). The transistors Tr23 to Tr25 are NPN bipolar transistors. The transistor Tr26 is a transistor for forming a hysteresis, and is configured as an N-channel MOSFET.

One end of the resistor R21 is connected to the internal power supply terminal, and the other end of the resistor R21 is connected to one end of the resistor R22 via a node ND 22. The other end of the resistor R22 is connected to one end of the resistor R23 via a node ND 21. The other end of the resistor R23 is grounded via a resistor R24. Hereinafter, voltages at the nodes ND21 and ND22 are referred to as voltages V21 and V22, respectively.

The base of the temperature detection transistor Tr21 is connected to the node ND21, and the base of the temperature detection transistor Tr22 is connected to the node ND 22. The constant current circuit CC21 is provided between the internal power supply terminal and the node at which the emitters of the temperature detection transistors Tr21 and Tr22 are commonly connected, and operates so that a constant current flows from the internal power supply terminal to the node at which the emitters of the temperature detection transistors Tr21 and Tr22 are commonly connected. The collector of the transistor Tr22, the collector and the base of the transistor Tr24, and the base of the transistor Tr23 are commonly connected to each other. The emitters of the transistors Tr23 and Tr24 are grounded.

The collectors of the transistors Tr21 and Tr23 are connected to the base of the transistor Tr 25. The collector of the transistor Tr25 is connected to the internal power supply terminal via the resistor R25, and the emitter of the transistor Tr25 is grounded. A signal (voltage signal) generated at the collector of the transistor Tr25 is input to the inverter circuit INV 21. The inverter circuit INV21 outputs an inverted signal of the signal generated at the collector of the transistor Tr25 as the temperature difference protection signal S_DELTA. As described above, the signal S is protected against temperature differences_DELTAIn the middle, the signal level of the high level has a logic value of "1", and the signal level of the low level has a logic value of "0". Has a value of "1"Of the logical value of (S) a temperature difference protection signal S_DELTAIn the active state, the temperature difference protection signal S having a logic value of "0_DELTAIs in an inactive state.

Protecting the temperature difference signal S_DELTATo the gate of the transistor Tr 26. The drain of the transistor Tr26 is connected to a connection node between the resistors R23 and R24, and the source of the transistor Tr26 is grounded.

In the temperature difference detection circuit 20A, a comparator for comparing the voltages V21 and V22 is formed, and the size ratio of the temperature detection transistors Tr21 and Tr22 is set to "1: n' and a bias voltage is given corresponding to the compared voltage (here "n>1"). In the comparator of the temperature difference detecting circuit 20A, even the temperature T [ Rt1] of the 1 st temperature detecting region Rt1]Temperature T [ Rt2] higher than the 2 nd temperature detection region Rt2]When the temperature difference is smaller than the temperature difference corresponding to the bias voltage, the transistor Tr25 is kept off, and the temperature difference protection signal S is generated_DELTAIs low. Temperature T [ Rt2] of Rt2 is detected from 2 nd temperature]It appears that the temperature T [ Rt1] of the 1 st temperature detection region Rt1]When the temperature difference is sufficiently high and equal to or greater than the temperature difference corresponding to the bias voltage, the collector current of the temperature detection transistor Tr21 increases to turn on the transistor Tr25, thereby turning on the temperature difference protection signal S_DELTAAnd goes high.

That is, in the temperature difference detection circuit 20A, the slave temperature T [ Rt2] is detected in the same manner as the temperature difference detection circuit 20 of fig. 4](i.e., the temperature of the 2 nd object position) the temperature T [ Rt1](i.e., the temperature of the 1 st target position) is higher than the predetermined differential protection temperature Δ T_REFWhen the above is true, namely, at "T [ Rt1]≥T[Rt2]+ΔT_REF"when true, temperature difference protection signal S_DELTAAlso has a logical value of "1" (i.e., becomes active). Thus, the temperature difference protection signal S having a logical value of "1_DELTADenotes "T [ Rt1]≥T[Rt2]+ΔT_REF"true". Delta T_REFWith positive values in terms of temperature, for example 30 ℃.

The temperature difference detection circuit 20A is provided with a slave "T [ Rt1]≥T[Rt2]+ΔT_REF"false state to" T [ Rt1]≥T[Rt2]+ΔT_REF"established State transition and temperature Difference protection Signal S_DELTAIs switched from "0" to "1", provided that "T [ Rt1]+T_HYSA<T[Rt2]+ΔT_REFIf' does not stand, the temperature difference is protected by a signal S_DELTAThe hysteresis characteristic of "1" is maintained. This hysteresis characteristic is realized by on/off of the transistor Tr 26. T is_HYSAIs a hysteresis temperature with positive values, for example 10 ℃.

The temperature detection transistors Tr21 and Tr22 may be field effect transistors such as MOSFETs. For example, when the temperature detection transistors Tr21 and Tr22 are P-channel MOSFETs, the collector, emitter, and base of the temperature detection transistors Tr21 and Tr22 correspond to the drain, source, and gate, respectively.

Example EX1_7

An embodiment EX1_7 will be explained. In embodiment EX1_7, a specific example of the arrangement of the temperature detection regions Rt1 and Rt2 will be described. Fig. 10 shows a schematic layout of the semiconductor chip CP of embodiment EX1_ 7. As described above, in order to clarify and make the description concrete, the semiconductor chip CP is assumed to have a rectangular (including square) outer shape. In the relationship with the semiconductor chip CP, the X axis and the Y axis orthogonal to each other are defined as follows.

The 4 sides of the rectangle that is the outer shape of the semiconductor chip CP are composed of sides L1 and L2 that face each other and sides L3 and L4 that face each other. Sides L1 and L2 are parallel to the Y axis, and sides L3 and L4 are parallel to the X axis.

Fig. 10 shows the above-described output transistor region Rpow and temperature detection regions Rt1 and Rt2, and shows metal PADs PAD1 to PAD5 formed on the surface of the semiconductor chip CP. In fig. 10, the control system region Rcnt (see fig. 3) is not shown. A plurality of metal PADs including metal PADs PAD1 to PAD5 are formed on the surface of the semiconductor chip CP. As described above, the semiconductor device 1 exemplified using the power IC10 is provided with a plurality of external terminals exposed from the case. Each metal pad on the semiconductor chip CP is connected to one of the external terminals via a lead wiring. Such connections are commonly referred to as wire bonds.

For example, by wire bonding, the metal PADs PAD1 and PAD2 are connected to the input terminal TM1, the metal PAD3 is connected to the enable terminal TM4, the metal PAD4 is connected to the ground terminal TM3, and the metal PAD5 is connected to the output terminal TM 2. Of course, these connection relationships are merely examples, and various modifications are possible. In addition, a plurality of external terminals may be assigned to terminals having a common function. For example, 2 external terminals may be assigned to the input terminal TM 1.

Each metal pad is provided in the vicinity of one side of the semiconductor chip CP for the purpose of facilitating wire bonding or the like. As just one example, the metal PADs PAD 1-PAD 3 are disposed near side L2 in fig. 10. In other words, of the distances between the arrangement position of the metal PAD1 and the sides L1 to L4, the distance between the arrangement position of the metal PAD1 and the side L2 is the shortest. The same applies to the metal PADs PAD2 and PAD 3. The metal PAD4 is disposed near the side L3. In other words, of the distances between the arrangement position of the metal PAD4 and the sides L1 to L4, the distance between the arrangement position of the metal PAD4 and the side L3 is the shortest. The metal PAD5 is disposed near the side L1. In other words, of the distances between the arrangement position of the metal PAD5 and the sides L1 to L4, the distance between the arrangement position of the metal PAD5 and the side L1 is the shortest.

The output transistor region Rpow is a substantially rectangular region having a longitudinal direction along the X-axis direction, and is disposed closer to the side L4 than the side L3. In the Y axis direction, the 1 st temperature detection region Rt1 is disposed between the side L3 and the output transistor region Rpow, and the output transistor region Rpow is disposed between the 1 st temperature detection region Rt1 and the side L4.

In the following, for the sake of specific explanation, it is considered that only the metal PADs PAD1 to PAD5 are provided as metal PADs on the surface of the semiconductor chip CP.

As described above, in the semiconductor chip CP, the distance of the 1 st temperature detection region Rt1 from the output transistor region Rpow is shorter than the distance of the 2 nd temperature detection region Rt2 from the output transistor region Rpow. That is, in the semiconductor chip CP, the 1 st temperature detection element (diode D1 in fig. 4) and the output transistor region Rpow (object region)) Is shorter than the distance of the 2 nd temperature detection element (diode D2 in fig. 4) from the output transistor area Rpow (object area). Further, in the semiconductor chip CP, the minimum distance d of the distances from the 2 nd temperature detection region Rt2 (in other words, the 2 nd temperature detection element) to the metal PADs PAD1 to PAD5_MIN2A minimum distance d from the 1 st temperature detection region Rt1 (in other words, the 1 st temperature detection element) to the metal PADs PAD1 PAD5_MIN1Short.

In the example of fig. 10, the 2 nd temperature detection region Rt2 (in other words, the 2 nd temperature detection element) is disposed adjacent to the metal PAD3, and the distance between the region Rt2 and the metal PAD3 is the minimum distance d_MIN2. On the other hand, the 1 st temperature detection region Rt1 (in other words, the 1 st temperature detection element) is disposed as far as possible from any one of the metal PADs, and in the example of fig. 10, the distance between the region Rt1 and the metal PAD1 is the minimum distance d described above_MIN1，“d_MIN1>d_MIN2". It is understood that the distance between a certain region and a certain metal pad refers to the distance between the center or gravity center position of the region and the center or gravity center position of the metal pad, or may also refer to the shortest distance between the region and the metal pad.

The heat dissipation effect is greater in the vicinity of the metal pad connected to the external terminal by wire bonding than in other portions. Therefore, by realizing the arrangement of the regions Rt1 and Rt2 described above, a temperature difference between the regions Rt1 and Rt2 is easily generated, and the gist of detecting a heat-related abnormality by the temperature difference is observed.

As shown in fig. 10, the metal PADs PAD1 to PAD3 are arranged along the side L2, and the metal PADs PAD1, PAD2, and PAD3 are arranged in this order from the output transistor region Rpow toward the side L3. That is, of the distances between the metal PADs PAD1 to PAD3 and the output transistor region Rpow, the distance between the metal PAD1 and the region Rpow is the shortest, and the distance between the metal PAD3 and the region Rpow is the longest. Among the distances between the metal PADs PAD1 to PAD3 and the 2 nd temperature detection region Rt2, the distance between the metal PAD3 and the 2 nd temperature detection region Rt2 is the shortest. That is, among the plurality of metal pads arranged in a concentrated manner, the 2 nd temperature detection region Rt2 is arranged in the vicinity of the metal pad farthest from the output transistor region Rpow.

In the example of fig. 10, 3 metal pads are arranged along the side L2, but the number of metal pads arranged along a certain side may be any, as long as 2 or more. That is, when generalization is performed using an integer k of 2 or more, it is preferable to realize the following arrangement.

The 1 st to k th metal pads are arranged along predetermined sides of the semiconductor chip CP. The 1 st to k-th metal pads are part or all of a plurality of metal pads provided on the semiconductor chip CP. In the example of fig. 10, "k" is 3 ", and the metal PADs PAD1 to PAD3 correspond to the 1 st to 3 rd metal PADs, respectively.

Further, it is preferable that the distance between the kth metal pad and the output transistor region Rpow (target region) is longest among the distances between the 1 st to kth metal pads and the output transistor region Rpow (target region).

Further, it is preferable that the distance between the kth metal pad and the 2 nd temperature detection element is shortest among the distances between the 1 st to kth metal pads and the 2 nd temperature detection region Rt2 (i.e., the 2 nd temperature detection element).

With such a configuration, a temperature difference between the regions Rt1 and Rt2 is easily generated, and the detection of a heat-related abnormality by the temperature difference is achieved.

Example EX 1-8

An embodiment EX1_8 will be explained. The 1 st temperature detection element arranged in the 1 st temperature detection region Rt1 corresponding to the 1 st object position is an element (for example, the diode D1 of fig. 4 or the transistor Tr21 of fig. 9) whose electrical characteristics vary according to the temperature of the 1 st object position. The 2 nd temperature detecting element arranged in the 2 nd temperature detecting region Rt2 corresponding to the 2 nd object position is an element (for example, the diode D2 of fig. 4 or the transistor Tr22 of fig. 9) whose electrical characteristics vary according to the temperature of the 2 nd object position.

The temperature difference detection circuit 20 of fig. 4 and the temperature difference detection circuit 20A of fig. 9 are merely examples of the temperature difference protection signal output circuit of the present invention, and various modifications thereof are possible. The temperature difference protection signal output circuit of the present invention may be any circuit as long as it can utilize the sameA temperature difference protection signal (S) corresponding to the temperature difference between the 1 st object position and the 2 nd object position is generated by the change of the electrical characteristic of the 1 st temperature detection element corresponding to the temperature of the 1 st object position and the change of the electrical characteristic of the 2 nd temperature detection element corresponding to the temperature of the 2 nd object position (S)_DELTA) The circuit of (1) is sufficient.

< embodiment 2 >

Embodiment 2 of the present invention will be explained. Embodiment 2 is an embodiment based on embodiment 1, and the description of embodiment 1 may be applied to embodiment 2 as well, as long as there is no contradiction between matters not particularly stated in embodiment 2. In explaining the description of embodiment 2, the description of embodiment 2 may be given priority to the matters contradictory between embodiment 1 and embodiment 2.

Embodiment 2 includes the following examples EX2_1 to EX2_ 3. The matters described in any of embodiments EX2_1 to EX2_3 can be applied to any other embodiment as long as they are not contradictory (that is, any 2 or more embodiments among a plurality of embodiments can be combined).

Example EX2_1

Example EX2_1 is explained. The output voltage Vout of the power supply IC10 can be supplied to any load device, and any electrical device including the power supply IC10 and the load device can be configured. The electric device including the power supply IC10 and the load device may be a device mounted on a vehicle such as an automobile (i.e., an in-vehicle device), or may be an industrial device, an office device, a home appliance, a portable device including an information terminal, or the like.

Fig. 11 shows a schematic configuration of a vehicle 310 as an automobile on which electric devices including a power supply IC10 and a load device LD are mounted. In vehicle 310, a battery provided in vehicle 310 functions as a voltage source VS, and an input voltage Vin from voltage source VS is supplied to power supply IC 10. The load device LD is driven based on the output voltage Vout of the power supply IC 10. The load device LD may be any load provided to the vehicle 310. For example, the load device LD may be an ECU (Electronic Control Unit). The ECU performs travel control of the vehicle 310, drive control of an air conditioner, a lamp, a power window, an airbag, and the like provided in the vehicle 310. Alternatively, for example, these air conditioners, lamps, power windows, or airbags may be the load device LD.

Example EX2_2

An embodiment EX2_2 will be explained. The structure of the power supply IC10 is explained assuming that the power supply IC10 functions as a linear regulator, but the power supply IC10 may be a power supply IC constituting a switching regulator. When the power supply IC10 is a power supply IC constituting a switching regulator, the output voltage Vout is generated by switching the input voltage Vin by the output transistor 11.

The present invention can also be applied to an IC not classified as a power IC such as a linear regulator or a switching regulator. That is, for example, the semiconductor device 1 may be a switching IC that switches conduction/non-conduction between the input terminal TM1 and the output terminal TM2, or may be a driving IC for driving a light emitting element such as a light emitting diode or a motor.

Example EX2_3

An embodiment EX2_3 will be explained.

For any signal or voltage, the relationship between the high level and the low level may be reversed without impairing the above-described gist. In addition, the type of FET (field effect transistor) or bipolar transistor can be arbitrarily changed without impairing the gist described above.

Each of the transistors described above may be any type of transistor. For example, the Transistor which is a MOSFET as described above may be replaced with a junction FET, an IGBT (Insulated Gate Bipolar Transistor), or a Bipolar Transistor. Similarly, a transistor which is a bipolar transistor as described above may be replaced with a junction FET, a MOSFET, or an IGBT, for example. Any of the transistors has a 1 st electrode, a 2 nd electrode, and a control electrode. In the FET, one of the 1 st and 2 nd electrodes is a drain, the other is a source, and the control electrode is a gate. In the IGBT, one of the 1 st and 2 nd electrodes is a collector, the other is an emitter, and the control electrode is a gate. In a bipolar transistor not belonging to an IGBT, one of the 1 st electrode and the 2 nd electrode is a collector, the other is an emitter, and the control electrode is a base.

In the present invention, the target element as the heat generation source may be an element other than a transistor.

The embodiments of the present invention can be modified in various ways as appropriate within the scope of the technical idea shown in the claims. The above embodiments are merely examples of the embodiments of the present invention, and the meaning of the terms of the present invention and each constituent element is not limited to the meanings described in the above embodiments. The specific numerical values shown in the above description are merely examples, and it is needless to say that they may be changed to various numerical values.

Claims

1. A semiconductor device including a semiconductor integrated circuit, comprising:

a temperature difference protection signal output circuit including a 1 st temperature detection element and a 2 nd temperature detection element arranged at a 1 st object position and a 2 nd object position different from each other in the semiconductor integrated circuit, the temperature difference protection signal output circuit outputting a temperature difference protection signal corresponding to a temperature difference between a temperature of the 1 st object position and a temperature of the 2 nd object position by using the 1 st temperature detection element and the 2 nd temperature detection element;

a target element as a heat generation source; and

a control circuit that controls the subject element based on the temperature difference protection signal,

the distance between the 1 st temperature detection element and the objective element is shorter than the distance between the 2 nd temperature detection element and the objective element.

2. The semiconductor device according to claim 1,

the semiconductor device includes:

an input terminal that receives an input voltage from an external device; and

an output terminal for outputting a signal to the external power supply,

the target element is provided in the semiconductor integrated circuit as an element interposed between the input terminal and the output terminal,

a current based on the input voltage flows through a target circuit via the input terminal, the target element, and the output terminal, whereby the target element generates heat,

the control circuit controls the objective element based on the temperature difference protection signal, thereby performing formation or disconnection of the objective circuit.

3. The semiconductor device according to claim 2,

the subject element is a transistor and the target element is a transistor,

the control circuit controls the state of the transistor based on the temperature difference protection signal, thereby forming or cutting off the target circuit.

4. The semiconductor device according to claim 2,

the semiconductor device includes: a temperature protection circuit having the temperature difference protection signal output circuit, a 1 st temperature protection signal output circuit that outputs a 1 st temperature protection signal corresponding to a temperature of a 1 st specific position in the semiconductor integrated circuit, and a 2 nd temperature protection signal output circuit that outputs a 2 nd temperature protection signal corresponding to a temperature of a 2 nd specific position in the semiconductor integrated circuit,

the control circuit performs formation or disconnection of the target circuit based on the temperature difference protection signal, the 1 st temperature protection signal, and the 2 nd temperature protection signal.

5. The semiconductor device according to claim 4,

the temperature difference protection signal output circuit sets the temperature difference protection signal to an active state when the temperature of the 1 st target position is higher than the temperature of the 2 nd target position by a predetermined differential protection temperature or more,

the 1 st temperature protection signal output circuit sets the 1 st temperature protection signal to an active state when the temperature of the 1 st specific position is equal to or higher than a predetermined 1 st protection temperature,

the 2 nd temperature protection signal output circuit sets the 2 nd temperature protection signal to an active state when the temperature of the 2 nd specific position is equal to or higher than a predetermined 2 nd protection temperature higher than the 1 st protection temperature,

when the temperature difference protection signal and the 1 st temperature protection signal are both in an active state or when the 2 nd temperature protection signal is in an active state, the control circuit cuts off the object circuit.

6. The semiconductor device according to claim 2,

the semiconductor device includes: a temperature protection circuit having the temperature difference protection signal output circuit and a temperature protection signal output circuit that outputs a temperature protection signal corresponding to a temperature of a specific position within the semiconductor integrated circuit,

the control circuit performs formation or disconnection of the target circuit based on the temperature difference protection signal and the temperature protection signal.

7. The semiconductor device according to claim 6,

the temperature protection signal output circuit sets the temperature protection signal to an active state when the temperature at the specific position is equal to or higher than a predetermined protection temperature,

the control circuit cuts off the subject circuit when at least one of the temperature difference protection signal and the temperature protection signal is in an active state.

8. The semiconductor device according to claim 2,

and when the temperature difference protection signal is in an effective state, the control circuit cuts off the object circuit.

9. The semiconductor device according to any one of claims 2 to 8,

the semiconductor device includes:

a semiconductor chip on which the semiconductor integrated circuit is formed;

a case for housing the semiconductor chip; and

a plurality of external terminals mounted to the housing,

the plurality of external terminals include the input terminal and the output terminal,

forming the object element in a predetermined object region in the semiconductor chip,

a plurality of metal pads are disposed on the semiconductor chip,

each metal pad is connected to a corresponding external terminal via a metal lead,

the distance between the 1 st temperature detection element and the target region is shorter than the distance between the 2 nd temperature detection element and the target region,

a minimum distance among distances from the 2 nd temperature detection element to the plurality of metal pads is shorter than a minimum distance among distances from the 1 st temperature detection element to the plurality of metal pads.

10. The semiconductor device according to claim 9,

arranging 1 st to kth metal pads included in the plurality of metal pads along a predetermined side of the semiconductor chip, k being an integer of 2 or more,

the distance between the 1 st to k-th metal pads and the target area is longest,

among the distances between the 1 st to k-th metal pads and the 2 nd temperature detection element, the distance between the k-th metal pad and the 2 nd temperature detection element is the shortest.

11. The semiconductor device according to any one of claims 1 to 8,

the 1 st temperature detection element is an element whose electrical characteristic changes in accordance with the temperature of the 1 st object position, the 2 nd temperature detection element is an element whose electrical characteristic changes in accordance with the temperature of the 2 nd object position,

the temperature difference protection signal output circuit generates the temperature difference protection signal corresponding to the temperature difference using a change in the electrical characteristic of the 1 st temperature detection element corresponding to the temperature of the 1 st target position and a change in the electrical characteristic of the 2 nd temperature detection element corresponding to the temperature of the 2 nd target position.