CN111983437A - 5G module product GPIO port test circuit and test method - Google Patents

5G module product GPIO port test circuit and test method Download PDF

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Publication number
CN111983437A
CN111983437A CN202010864437.5A CN202010864437A CN111983437A CN 111983437 A CN111983437 A CN 111983437A CN 202010864437 A CN202010864437 A CN 202010864437A CN 111983437 A CN111983437 A CN 111983437A
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module
test
gpio
switch module
self
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CN111983437B (en
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程明军
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Shenzhen Qikai Electronic Co ltd
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Shenzhen Qikai Electronic Co ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/31712Input or output aspects
    • G01R31/31713Input or output interfaces for test, e.g. test pins, buffers
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/31703Comparison aspects, e.g. signature analysis, comparators
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3183Generation of test inputs, e.g. test vectors, patterns or sequences
    • G01R31/318314Tools, e.g. program interfaces, test suite, test bench, simulation hardware, test compiler, test program languages
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/319Tester hardware, i.e. output processing circuits
    • G01R31/31903Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31912Tester/user interface
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
    • G01R31/54Testing for continuity
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
    • G01R31/66Testing of connections, e.g. of plugs or non-disconnectable joints
    • G01R31/68Testing of releasable connections, e.g. of terminals mounted on a printed circuit board
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

The invention provides a 5G module product GPIO port test circuit and a test method, and belongs to the field of 5G module test. The 5G module product to be tested is provided with a self-checking program, a first testing pin and a second testing pin which are respectively controlled by the self-checking program, the 5G module product GPIO port testing circuit comprises a first switch module and a second switch module, the control end of the first switch module is connected with the first testing pin, one end of the first switch module is connected with a power supply, the other end of the first switch module is connected with one end of the second switch module, the other end of the second switch module is connected with a power supply ground, the controller of the second switch module is connected with the second testing pin, and all GPIO ports of the 5G module product are connected between the first switch module and the second switch module in parallel. The invention has the beneficial effects that: the testing efficiency is extremely high; the test effect is good, and the function coverage is complete.

Description

5G module product GPIO port test circuit and test method
Technical Field
The invention relates to a 5G module testing technology, in particular to a 5G module product GPIO port testing circuit and a testing method.
Background
As the 5G intelligent universal module has more pins and large module size, once a client finds that the module is bad after being produced and attached to a product, the module is difficult to disassemble and maintain, and therefore, the function of each functional pin in the factory state of the module is ensured to be normal.
Then, the module is provided with more than 30 GPIO ports, and the production test cannot be carried out in a mode of judging the normal pins of the module in a traditional pin testing function mode, so that the traditional testing mode is adopted to carry out one-to-one test, the realization is difficult, and the testing efficiency is very low.
Disclosure of Invention
In order to solve the problem that a 5G module GPIO port is inconvenient to test in the prior art, the invention provides a 5G module product GPIO port test circuit and a test method based on the 5G module product GPIO port test circuit.
The 5G module product to be tested is provided with a self-checking program, a first testing pin and a second testing pin which are respectively controlled by the self-checking program, the 5G module product GPIO port testing circuit comprises a first switch module and a second switch module, the control end of the first switch module is connected with the first testing pin, one end of the first switch module is connected with a power supply, the other end of the first switch module is connected with one end of the second switch module, the other end of the second switch module is connected with a power supply ground, the controller of the second switch module is connected with the second testing pin, and all GPIO ports of the 5G module product are connected between the first switch module and the second switch module in parallel.
The invention is further improved and also comprises a test indication module, the 5G module product is provided with a test indication pin for outputting a test result by the self-checking program, and the input end of the test indication module is connected with the indication pin.
The invention is further improved, and the test indication module is an indicator light or an audible alarm.
The invention is further improved, the test indication module is an LED lamp, and the test indication module also comprises a current limiting unit connected with the LED lamp in series.
The invention is further improved and also comprises a filtering module, wherein the filtering module is arranged at the parallel connection end of all GPIO ports.
The invention is further improved, the 5G module product is replaced by a single chip microcomputer which can detect the high and low levels of GPIO ports of the 5G module product, the first test pin and the second test pin are arranged on the single chip microcomputer, and the single chip microcomputer is respectively connected with all the GPIO ports of the 5G module product to be detected.
The invention also provides a test method based on the 5G module product GPIO port test circuit, which comprises the initial steps of: the 5G module product is in an initial state after being electrified: all GPIO ports are set in an input state;
and (3) testing the input function of the GPIO port: controlling a first test pin to output a high level, controlling a second test pin to output a low level, enabling a first switch module to be switched on, enabling a second switch module to be switched off, applying power voltage to all tested GPIO ports of a 5G module product, polling all GPIO states by a self-checking program, judging whether the GPIO ports are the high level, if so, enabling the GPIO ports to be normal, and if not, enabling the corresponding GPIO ports to be abnormal;
and (3) testing the output function of the GPIO port: and controlling the first test pin to be at a low level and the second test pin to be at a high level, then stopping the first switch module, turning on the second switch module, polling all GPIO states by the self-checking program, judging whether the GPIO states are at the low level, if so, judging that the GPIO port is normal, and if not, judging that the corresponding GPIO port is abnormal.
The invention is further improved, and the method also comprises a test result indicating step: and when the GPIO port is abnormal in the self-checking process of the self-checking program, controlling the test indication module to indicate that the self-checking fails and stopping the self-checking.
The invention is further improved, when all GPIO ports are normal in the steps of testing the input function of the GPIO port and testing the output function of the GPIO port, the 5G module product system is normally started, and the system records the passing result of self-test in the data structure.
Compared with the prior art, the invention has the beneficial effects that: 1. the problem that the GPIO port of the module is inconvenient to test is solved by low cost; 2. self-checking test is adopted, so that the test efficiency is extremely high; 3. the test effect is good, and the function coverage is complete.
Drawings
FIG. 1 is a block diagram of the present invention;
fig. 2 is a schematic diagram of the circuit of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples.
The invention combines the circuit characteristic of single function (input and output control) of the GPIO port, pins of a 5G module product (module for short) are basically the condition that pins of a CPU chip are directly led out, and whether the functions of the pins of the GPIO port of the module are normal depends on the welding between the pins of the chip and a PCB and the wiring of the PCB. Therefore, the invention combines the characteristic of strong functions of the 5G module, designs a very simple test circuit and can complete the test of all GPIO ports. This will be described in detail below.
As shown in fig. 1, a 5G module product to be tested according to the present invention is provided with a self-checking program, and a first test pin and a second test pin that are respectively controlled by the self-checking program, the GPIO port test circuit of the 5G module product includes a first switch module and a second switch module, a control end of the first switch module is connected to the first test pin, one end of the first switch module is connected to a power supply, the other end of the first switch module is connected to one end of the second switch module, the other end of the second switch module is connected to a power ground, a controller of the second switch module is connected to the second test pin, and all GPIO ports of the 5G module product are connected in parallel between the first switch module and the second switch module. Still include test instruction module, 5G module product is equipped with the test instruction pin that is used for self-checking procedure output test result, test instruction module's input links to each other with the instruction pin.
As shown in fig. 2, as an embodiment of the present invention, the first switch module and the second switch module in this embodiment are both transistors, and the two test pins CTRL1 and CTRL2 are respectively connected to the bases of the transistors Q1 and Q2 through a resistor. The power supply Vcc is connected to the collector of the transistor Q1 through the resistor R2, the emitter of the transistor Q1 is connected to the collector of the transistor Q2, and the emitter of the transistor Q2 is connected to the power ground.
All functional pins GPIO ports of the 5G module product are connected in parallel with an emitter of the transistor Q1 and a collector of the transistor Q2, and preferably, a grounding capacitor C1 with a function of de-jitter filtering is further connected at the parallel connection end of the GPIO ports. The stability of the test circuit is better. The first switch module and the second switch module in this example may be switching tubes, field effect tubes, or the like.
The test indication module of the embodiment is an LED lamp, the positive electrode of the LED lamp is connected with a test indication pin LEDCTRL, and the negative electrode of the LED lamp is connected with a power ground. In the embodiment, the anode of the LED lamp is also connected in series with a current-limiting resistor R4, and the brightness of the LED lamp can be adjusted by adjusting the resistance value of the current-limiting resistor R4.
The indicating module of this example can also be a plurality of LED lamps to instruct different operating condition, still can be audible and visual indicating module such as audible alarm, buzzer.
As another embodiment of the present invention, the test function of the 5G module product in this embodiment is replaced by a single chip capable of detecting the high and low levels of the GPIO ports of the 5G module product, the first test pin, the second test pin, and the test program are all disposed on the single chip, and the single chip is further connected to all GPIO ports of the 5G module product to be tested through different pins. In the embodiment, the level of all GPIO ports of a 5G module product to be tested is tested through a test program arranged in a single chip microcomputer, so that whether the GPIO ports are abnormal or not is judged.
The invention also provides a test method based on the 5G module product GPIO port test circuit, and the test method realizes the test of all GPIO ports by the self-checking program in the 5G module product.
The test method of the embodiment comprises the initial steps of:
1. initial state after module power-on: all GPIOs (GPIO _1,2,3,, GPIO _ N) are set to the input (floating state).
2. And (3) testing the input function of the GPIO port: CTRL1 is high; CTRL2 goes low so that transistor Q1 is on and transistor Q2 is off. The Vcc supply voltage is applied to all GPIO ports tested on the module through resistor R2, which should all be pulled high. At this time, the self-checking program polls all the GPIO states once, and the GPIO pins which are all high are abnormal, which is caused by open circuit between the chip pin and the module pin or damage of the CPU chip.
3. And (3) testing the output function of the GPIO port: CTRL1 is low; when CTRL2 goes high, transistor Q1 turns off and transistor Q2 turns on. All GPIO ports under test should be forced low by Q2. At this time, the module self-checking program polls all the GPIO states once, and all the GPIO states are low-to-low, and the GPIO pin that is high is abnormal, which is caused by an open circuit from the chip pin to the module pin or damage to the CPU chip.
4. When the test in the step 2 is abnormal, the system controls the LED lamp D1 to slowly flash through the LEDCTRL pin to prompt that the self-test fails, and the self-test process is stopped;
when the test in the step 3 is abnormal, the system controls the LED lamp D1 to flash quickly through the LEDCTRL pin to prompt the failure of self-checking, and the self-checking process is stopped. Of course, this example can indicate two anomalies by providing two different colored LED lights.
5. And when the test result passes, the module system is normally started, and the module system records the passing result of the self-test in the NV data structure.
Compared with the prior art, the invention has the following advantages:
1. the structure is simple, the performance is stable, and the problem that the GPIO port of the module is inconvenient to test is solved through low cost;
2. self-checking test is adopted, so that the test efficiency is extremely high;
3. the test effect is good, and the function coverage is complete.
The above-described embodiments are intended to be illustrative, and not restrictive, of the invention, and all changes that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

Claims (9)

1. The utility model provides a 5G module product GPIO mouth test circuit which characterized in that: 5G module product that awaits measuring is equipped with the self-checking procedure, is respectively by first test pin and the second test pin of self-checking program control, 5G module product GPIO mouth test circuit includes first switch module, second switch module, first switch module's control end links to each other with first test pin, first switch module's one end links to each other with the power, and the other end links to each other with second switch module's one end, and second switch module's the other end meets power ground, second switch module's controller links to each other with second test pin, all GPIO mouths of 5G module product connect in parallel between first switch module and second switch module.
2. The 5G module product GPIO port test circuit of claim 1, wherein: still include test instruction module, 5G module product is equipped with the test instruction pin that is used for self-checking procedure output test result, test instruction module's input links to each other with the instruction pin.
3. The 5G module product GPIO port test circuit of claim 2, wherein: the test indication module is an indicator light or an audible alarm.
4. The 5G module product GPIO port test circuit of claim 3, wherein: the test indication module is an LED lamp, and the test indication module further comprises a current limiting unit connected with the LED lamp in series.
5. The 5G module product GPIO port test circuit of claim 1, wherein: the GPIO interface circuit further comprises a filtering module, wherein the filtering module is arranged at the parallel connection end of all GPIO interfaces.
6. The 5G module product GPIO port test circuit of any one of claims 1-5, wherein: the 5G module product is replaced by a single chip microcomputer capable of detecting the high and low levels of GPIO ports of the 5G module product, the first testing pin, the second testing pin and the self-checking program are all arranged on the single chip microcomputer, and the single chip microcomputer is further connected with all GPIO ports of the 5G module product to be tested respectively.
7. A test method based on 5G module product GPIO port test circuit of any claim 1-6, characterized by comprising the following steps:
the method comprises the following initial steps: the 5G module product is in an initial state after being electrified: all GPIO ports are set in an input state;
and (3) testing the input function of the GPIO port: controlling a first test pin to output a high level, controlling a second test pin to output a low level, enabling a first switch module to be switched on, enabling a second switch module to be switched off, applying power voltage to all tested GPIO ports of a 5G module product, polling all GPIO states by a self-checking program, judging whether the GPIO ports are the high level, if so, enabling the GPIO ports to be normal, and if not, enabling the corresponding GPIO ports to be abnormal;
and (3) testing the output function of the GPIO port: and controlling the first test pin to be at a low level and the second test pin to be at a high level, then stopping the first switch module, turning on the second switch module, polling all GPIO states by the self-checking program, judging whether the GPIO states are at the low level, if so, judging that the GPIO port is normal, and if not, judging that the corresponding GPIO port is abnormal.
8. The test method of claim 7, wherein: the method also comprises a test result indicating step: and when the GPIO port is abnormal in the self-checking process of the self-checking program, controlling the test indication module to indicate that the self-checking fails and stopping the self-checking.
9. The 5G module product GPIO port test circuit of claim 7, wherein: and when all the GPIO ports are normal in the step of testing the input function of the GPIO port and the step of testing the output function of the GPIO port, the 5G module product system is normally started, and the system records the passing result of the self-test in a data structure.
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