CN111863948B - 一种带栅源桥的GaN基P-GaN增强型HEMT器件及其制备方法 - Google Patents
一种带栅源桥的GaN基P-GaN增强型HEMT器件及其制备方法 Download PDFInfo
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Abstract
本发明提供一种带栅源桥的GaN基P‑GaN增强型HEMT器件结构及其制作方法，生长完GaN cap层后取出外延片利用薄膜沉积设备生长SiO2或SiN薄膜，再利用湿法腐蚀制作出所需的SiO2或SiN图形，接着进行二次外延生长，生长完整结构。刻蚀P‑GaN帽层时，剩下栅电极和连接栅源之间的P‑GaN，通过芯片制作后和SiO2或SiN介质层图形一起成为一个栅源桥。该发明较传统结构可以得到更高的阈值电压且由于栅源桥下介质膜的存在，在提高阈值电压的同时不会造成输出电流的下降。
Description
技术领域
本发明涉及一种带栅源桥的GaN基P-GaN增强型HEMT器件及其制备方法，属于半导体材料技术领域。
背景技术
GaN材料作为第三代宽禁带半导体材料的代表，以其宽禁带，电子饱和度率高，耐高温，抗辐射等特点成为研究热点，尤其在高温、大功率、微波领域有着很大的应用前景。由于AlGaN/GaN异质结自身的特性，在不掺杂的情况下异质结界面就可以产生高密度的二维电子气，二维电子气的存在极大的提高了载流子迁移率，降低了导通电阻和器件的响应时间，提高器件性能。
GaN基HEMT目前主要分为耗尽型和增强型两种，耗尽型器件只要由于自身存在的高浓度，高迁移率的二维电子气，使器件在栅极零偏压时，器件本身处于导通状态，需要在栅极施加负偏压才能使开关断开，在实际应用中，需要增加一个负压电源设计，一方面增加能耗，另一方面存在一定的不安全隐患。所以在实际应用中，耗尽型器件较少见，而常开型器件即增强型器件是必不可少的。
目前增强型HEMT主要有四种制作方法：凹槽型，栅下F离子注入，cascode级联和P-GaN帽层。四种方法各有优缺点，凹槽型器件需要对栅下势垒做部分去除处理，以达到增强效果，然而刻蚀损伤不可避免且精度需要控制精准。栅下F离子注入是利用F离子来耗尽栅下的二维电子气，然而F离子注入不稳定，导致器件阈值不稳定。cascode级联是将耗尽型器件与Si器件进行级联来实现增强型，会受限于Si器件的性能。P-GaN帽层的方法是通过极化方式调节沟道内的二维电子气，P-GaN栅帽层技术在界面质量、器件开态特性等方面具有潜在优势，但是受限于较低的激活能，实现高掺杂浓度的P-GaN较为困难，若要实现增强型需要较厚的P-GaN，这样就会导致驱动能力下降。
发明内容
本发明的目的在于提供一种带栅源桥的GaN基P-GaN增强型HEMT器件，在提高阈值电压的同时不会造成输出电流的下降。
本发明的目的通过以下技术方案实现：
一种带栅源桥的GaN基P-GaN增强型HEMT器件，其结构自下而上依次包括衬底、缓冲层、沟道层、势垒层、GaN cap层、钝化介质层、P-GaN帽层，还包括设置于势垒层上的源电极和漏电极，栅电极设置于P-GaN帽层上，其特征在于：还包括栅源桥，所述钝化介质层填充在栅源桥和GaN cap层之间，栅源桥一端连接P-GaN帽层，另一端连接源电极。其中势垒层和沟道层异质结之间产生二维电子气(2DEG)。
优选的，所述栅源桥的数量为一个或二个以上，二个以上的带栅源桥之间平行排布。
优选的，所述P-GaN帽层的厚度为80-120nm，P-GaN的Mg掺杂浓度不低于1×1019cm-3，所述栅源桥与P-GaN帽层等高、使用相同材料制成。
优选的，所述沟道层为厚度60nm-120nm的GaN沟道层，所述势垒层为10nm-40nm的AlxGa1-xN或InGaN,势垒层，X表示15-30％的Al组分。
优选的，所述GaN cap层厚度为2nm-5nm。
优选的，衬底为Si衬底、蓝宝石衬底或SiC衬底，所述缓冲层为由Al含量沿AlN层到GaN层方向逐渐降低的AlGaN材料构成，厚度为1μm-3.5μm。
优选的，所述器件表面除源电极、漏电极和栅电极以外的区域覆盖有SiC、SiO2或SiN钝化层。
优选的，所述钝化介质层所用材料为SiC、SiO2或SiN。
本发明还公开了上述的带栅源桥的GaN基P-GaN增强型HEMT器件的制备方法，其步骤包括：
(1)在衬底上依次生长缓冲层、沟道层、势垒层和GaN cap；
(2)在GaN cap上生长钝化介质层；
(3)采用光刻技术刻蚀钝化介质层，只留下与栅源桥所在区域同样宽度的钝化介质层；
(4)继续生长一层P-GaN帽层；
(5)采用光刻技术刻蚀P-GaN帽层和GaN cap层，只留下栅电极和栅源桥所在处的P-GaN帽层；
(6)在势垒层上蒸镀多层金属作为源电极和漏电极，快速退火形成欧姆接触；
(7)在P-GaN帽层上蒸镀多层金属作为栅电极；
(8)在器件表面生长一层SiC、SiO2或SiN钝化膜，然后用光刻技术刻蚀去除栅电极，源电极，漏电极处的SiC、SiO2或SiN钝化膜。
本发明提供了一种设有栅源桥的P-GaN帽层增强型HEMT，较传统结构可以得到更高的阈值电压，这种P-GaN桥连接在栅电极和源电极之间能够提供额外的导电通道，一般认为桥连接电阻低于栅电极接触电阻，当给栅电极施加正电压时，大部分电压落在栅电极的接触电阻上，导致用于降低AlGaN势垒的电压减小，该电压不足开启沟道，从而提高了器件的阈值电压，且随着桥个数的增加，桥接触电阻更低，栅压在栅电极接触电阻的电位下降更大，用来降低AlGaN势垒的电压更小，器件的阈值电压越高，另一方面栅源桥的存在会减小器件的导电沟道面积，从而导致输出电流下降，但是本专利中带栅源桥下面有一层钝化介质层，介质层的存在使得即使栅源桥存在也不会减小器件的导电通道，输出电流不会减小。也就是说本发明较传统结构可以得到更高的阈值电压且由于栅源桥下介质膜的存在，在提高阈值电压的同时不会造成输出电流的下降。
附图说明
图1生长完GaN cap层的GaN外延片剖面图。
图2制作完SiO2或SiN图形的GaN外延片剖面图。
图3二次外延后有P-GaN帽层的GaN外延片剖面图。
图4剩下栅电极和栅源桥所在位置处P-GaN的GaN外延片剖面图。
图5制作完漏源电极的P-GaN帽层的GaN HEMT芯片剖面图。
图6制作完栅电极的GaN HEMT芯片剖面图。
图7制作完钝化层的GaN HEMT芯片剖面图。
图8带栅源桥P-GaN增强型HEMT器件立体结构示意图(图中SiO2钝化层未示出)。
具体实施方式
以下是结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅是本发明的一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领普通技术人员在没有做出创造性劳动的前提下所获得的所有其他实施例，都属于本发明保护的范围。
实施例1
一种带栅源桥的GaN基P-GaN增强型HEMT器件的制备方法，其步骤包括：
(1)在衬底1上依次生长缓冲层2、沟道层3、势垒层4和GaN cap5，如图1所示；
(2)在GaN cap上生长钝化介质层；
(3)采用光刻技术刻蚀钝化介质层，只留下与栅源桥所在区域同样宽度的钝化介质层6，如图2所示；
(4)继续生长一层P-GaN帽层7，如图3所示；
(5)采用光刻技术刻蚀P-GaN帽层和GaN cap层，只留下栅电极和栅源桥所在处的P-GaN帽层，其中栅源桥所在处的P-GaN帽层即构成栅源桥8，如图4所示；
(6)在势垒层上蒸镀多层金属作为源电极9和漏电极10，快速退火形成欧姆接触，如图5所示；
(7)在P-GaN帽层上蒸镀多层金属作为栅电极11，如图6所示；
(8)在器件表面生长一层SiO2钝化膜12，然后用光刻技术刻蚀去除栅电极，源电极，漏电极处的SiO2钝化膜，如图7所示。
实施例2
如图8所示，一种带栅源桥的GaN基P-GaN增强型HEMT器件，其结构自下而上依次包括Si衬底、2μm AlGaN缓冲层、80nm GaN沟道层、20nmAl0.2Ga0.8N势垒层、约2nm的GaN cap层、100nm Mg掺杂P-GaN帽层，掺杂浓度2×1019cm-3，还包括设置于势垒层上的源电极和漏电极，源电极和漏电极为20nmAl、120nmTi、50nmNi、50nmAu的多层金属电极，源电极和漏电极与器件形成欧姆接触，栅电极设置于P-GaN帽层上，为50nmNi、100nmAu的多层金属电极，还包括两个平行的栅源桥，所述栅源桥设置于GaN cap层上，一端连接P-GaN帽层，另一端连接源电极，所述反栅源桥下面有一层SiO2介质层，介质层上面是P-GaN栅源桥。器件表面除源电极、漏电极和栅电极以外的区域覆盖有SiO2钝化层。该器件的阈值电压可以到3.9V。
实施例3
一种带栅源桥的GaN基P-GaN增强型HEMT器件，其结构自下而上依次包括蓝宝石衬底、1μm AlGaN缓冲层、60nm GaN沟道层、10nmAl0.3Ga0.7N势垒层、约3nm的GaN cap层、120nmMg掺杂P-GaN帽层，掺杂浓度1×1019cm-3，还包括设置于势垒层上的源电极和漏电极，源电极和漏电极为20nmAl、120nmTi、50nmNi、50nmAu的多层金属电极，源电极和漏电极与器件形成欧姆接触，栅电极设置于P-GaN帽层上，为50nmNi、100nmAu的多层金属电极，还包括一个栅源桥，所述栅源桥设置于GaN cap层上，一端连接P-GaN帽层，另一端连接源电极，所述栅源桥下面有一层SiN介质层，介质层上面是P-GaN栅源桥。器件表面除源电极、漏电极和栅电极以外的区域覆盖有SiN钝化层。该器件的阈值电压可以到2.8V。
实施例4
一种带栅源桥的GaN基P-GaN增强型HEMT器件，其结构自下而上依次包括SiC衬底、3.5μm AlGaN缓冲层、120nm GaN沟道层、40nmInGaN势垒层、约2.5nm的GaN cap层、60nm Mg掺杂P-GaN帽层，掺杂浓度4×1019cm-3，还包括设置于势垒层上的源电极和漏电极，源电极和漏电极为200nmAl、120nmTi、50nmNi、50nmAu的多层金属电极，源电极和漏电极与器件形成欧姆接触，栅电极设置于P-GaN帽层上，为50nmNi、100nmAu的多层金属电极，还包括四个平行的栅源桥，所述栅源桥设置于GaN cap层上，一端连接P-GaN帽层，另一端连接源电极，所述反栅源桥下面有一层SiC介质层，介质层上面是P-GaN栅源桥。器件表面除源电极、漏电极和栅电极以外的区域覆盖有SiC钝化层。该器件的阈值电压可以到5.1V。
Claims (9)
1.一种带栅源桥的GaN基P-GaN增强型HEMT器件，其结构自下而上依次包括衬底、缓冲层、沟道层、势垒层、GaN cap层、钝化介质层、P-GaN帽层，还包括设置于势垒层上的源电极和漏电极，栅电极设置于P-GaN帽层上，其特征在于：还包括栅源桥，所述钝化介质层填充在栅源桥和GaN cap层之间，栅源桥一端连接P-GaN帽层，另一端连接源电极。
2.根据权利要求1所述的带栅源桥的GaN基P-GaN增强型HEMT器件，其特征在于：所述栅源桥的数量为一个或二个以上，二个以上的栅源桥之间平行排布。
3.根据权利要求2所述的带栅源桥的GaN基P-GaN增强型HEMT器件，其特征在于：所述P-GaN帽层的厚度为80-120nm，P-GaN的Mg掺杂浓度不低于1×1019cm-3，所述栅源桥与P-GaN帽层等高、使用相同材料制成。
4.根据权利要求3所述的带栅源桥的GaN基P-GaN增强型HEMT器件，其特征在于：所述沟道层为厚度60nm-120nm的GaN沟道层，所述势垒层为10nm-40nm的AlxGa1-xN或InGaN,势垒层，X表示15-30％的Al组分。
5.根据权利要求4所述的带栅源桥的GaN基P-GaN增强型HEMT器件，其特征在于：所述GaN cap层厚度为2-3nm。
6.根据权利要求5所述的带栅源桥的GaN基P-GaN增强型HEMT器件，其特征在于：衬底为Si衬底、蓝宝石衬底或SiC衬底，所述缓冲层为由Al含量沿AlN层到GaN层方向逐渐降低的AlGaN材料构成，厚度为1μm-3.5μm。
7.根据权利要求6所述的带栅源桥的GaN基P-GaN增强型HEMT器件，其特征在于：所述器件表面除源电极、漏电极和栅电极以外的区域覆盖有SiC、SiO2或SiN钝化层。
8.根据权利要求1所述的带栅源桥的GaN基P-GaN增强型HEMT器件，其特征在于：所述钝化介质层所用材料为SiC、SiO2或SiN。
9.权利要求1-8中任一项所述的带栅源桥的GaN基P-GaN增强型HEMT器件的制备方法，其步骤包括：
(1)在衬底上依次生长缓冲层、沟道层、势垒层和GaN cap；
(2)在GaN cap上生长钝化介质层；
(3)采用光刻技术刻蚀钝化介质层，只留下与栅源桥所在区域同样宽度的钝化介质层；
(4)继续生长一层P-GaN帽层；
(5)采用光刻技术刻蚀P-GaN帽层和GaN cap层，只留下栅电极和栅源桥所在处的P-GaN帽层；
(6)在势垒层上蒸镀多层金属作为源电极和漏电极，快速退火形成欧姆接触；
(7)在P-GaN帽层上蒸镀多层金属作为栅电极；
(8)在器件表面生长一层SiC、SiO2或SiN钝化膜，然后用光刻技术刻蚀去除栅电极，源电极，漏电极处的SiC、SiO2或SiN钝化膜。
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