CN111805091A - LAP laser etching process - Google Patents

LAP laser etching process Download PDF

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Publication number
CN111805091A
CN111805091A CN202010515686.3A CN202010515686A CN111805091A CN 111805091 A CN111805091 A CN 111805091A CN 202010515686 A CN202010515686 A CN 202010515686A CN 111805091 A CN111805091 A CN 111805091A
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CN
China
Prior art keywords
substrate
laser
etching process
circuit wiring
wiring groove
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202010515686.3A
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Chinese (zh)
Inventor
杨更欢
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Shenzhen Sunway Communication Co Ltd
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Shenzhen Sunway Communication Co Ltd
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Priority to CN202010515686.3A priority Critical patent/CN111805091A/en
Publication of CN111805091A publication Critical patent/CN111805091A/en
Pending legal-status Critical Current

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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/36Removing material
    • B23K26/362Laser etching
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/70Auxiliary operations or equipment
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/70Auxiliary operations or equipment
    • B23K26/702Auxiliary equipment

Abstract

The invention discloses a LAP laser etching process, which comprises the following steps of S1, obtaining a plastic substrate; s2, plating an oxide film on the surface of the substrate; s3, manufacturing a circuit wiring groove on the surface of the substrate plated with the oxide film through laser; and S4, plating a metal layer in the circuit wiring groove on the substrate. The oxidation film can prevent the edge of the circuit wiring groove on the substrate from being burnt due to the heat of laser when the circuit wiring groove is laser-etched on the substrate, so that the outline of the circuit wiring groove formed by laser is clear, meanwhile, the interference of various factors in the chemical plating pretreatment process is avoided, the probability of bad phenomena such as excessive plating, missing plating and the like of a product is greatly reduced, the product quality is improved, the quality of a finished product is ensured, and the resource waste caused by the bad products is reduced.

Description

LAP laser etching process
Technical Field
The invention relates to the technical field of antennas, in particular to a LAP laser etching process.
Background
Along with mobile communication equipment and intelligent wearing equipment develop towards direction miniaturized, intelligent for the antenna that uses in above-mentioned equipment need integrate a large amount of functions such as WIFI, bluetooth in extremely limited space.
The lap (laser active plating) technology is a technology of selective metal plating after inducing a common plastic substrate by laser, and can manufacture circuits and interconnection devices with electrical functions on any molding surface, so that the lap (laser active plating) technology has obvious advantages in antenna manufacturing.
In the conventional LAP process, because ordinary plastic base material is soft and fragile, the outline of the circuit is rough and unstable due to scorching of the product in the laser etching process, so that the residual quantity of various acid-base liquid medicines in the outline rough part of the circuit is large in the chemical plating pretreatment process, the circuit outline of the product is corroded, spots and micropores are generated to influence the plating layer to be attached to the product, and the product has undesirable phenomena of excessive plating, missing plating and the like.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: provides an LAP laser etching process for improving the product quality.
In order to solve the technical problems, the invention adopts the technical scheme that: a LAP laser etching process comprises the following steps,
s1, obtaining a plastic substrate;
s2, plating an oxide film on the surface of the substrate;
s3, manufacturing a circuit wiring groove on the surface of the substrate plated with the oxide film through laser;
and S4, plating a metal layer in the circuit wiring groove on the substrate.
The invention has the beneficial effects that: the oxidation film can prevent the edge of the circuit wiring groove on the substrate from being burnt due to the heat of laser when the circuit wiring groove is laser-etched on the substrate, so that the outline of the circuit wiring groove formed by laser is clear, meanwhile, the interference of various factors in the chemical plating pretreatment process is avoided, the probability of bad phenomena such as excessive plating, missing plating and the like of a product is greatly reduced, the product quality is improved, the quality of a finished product is ensured, and the resource waste caused by the bad products is reduced.
Drawings
Fig. 1 is a schematic diagram of step S1 in the LAP laser etching process according to the first embodiment of the invention;
fig. 2 is a schematic diagram of step S2 in the LAP laser etching process according to the first embodiment of the invention;
fig. 3 is a schematic diagram of step S3 in the LAP laser etching process according to the first embodiment of the invention;
fig. 4 is a schematic diagram of step S4 in the LAP laser etching process according to the first embodiment of the invention.
Description of reference numerals:
1. a substrate; 2. an oxide film; 3. a circuit wiring slot; 4. a metal layer.
Detailed Description
In order to explain technical contents, achieved objects, and effects of the present invention in detail, the following description is made with reference to the accompanying drawings in combination with the embodiments.
The most key concept of the invention is as follows: and plating an oxidation film on the plastic substrate before performing LAP laser etching on the circuit wiring groove on the plastic substrate.
Referring to fig. 1 to 4, a LAP laser etching process includes the following steps,
s1, obtaining a plastic substrate 1;
s2, plating an oxide film 2 on the surface of the substrate 1;
s3, manufacturing a circuit wiring groove 3 on the surface of the substrate 1 plated with the oxide film 2 through laser;
s4, a metal layer 4 is plated in the circuit wiring groove 3 on the substrate 1.
The working principle of the invention is briefly described as follows: before the plastic substrate 1 is subjected to laser etching of the circuit wiring groove 3, the substrate 1 is plated with the oxidation film 2 to enhance the oxidation resistance and the wear resistance of the substrate 1, and the oxidation film 2 can prevent the edge of the circuit wiring groove 3 on the substrate 1 from being burnt due to the heat of laser when the laser is used for laser etching the circuit wiring groove 3 on the substrate 1, so that the outline of the circuit wiring groove 3 formed by laser is clear.
From the above description, the beneficial effects of the present invention are: the circuit wiring groove 3 formed on the substrate 1 through laser has clear outline, so that spots or small holes generated by corrosion of various acid-base liquid medicines on the edge of the circuit wiring groove 3 in the chemical plating pretreatment process are avoided, the probability of adverse phenomena such as excessive plating, plating leakage and the like of a product is greatly reduced, the product quality is improved, and the resource waste caused by poor quality of a finished product is reduced.
Further, in step S2, the oxide film 2 is formed by a PVD process.
As can be seen from the above description, the oxide film 2 layer formed by the PVD process has good hardness and wear resistance, so that the oxide film 2 layer has a longer service life and is not easily peeled off from the surface of the substrate 1.
Further, step S2 is preceded by step S11 of cleaning the surface of the substrate 1 and performing a static electricity removing process.
As can be seen from the above description, the removal of the impurities and contaminants from the surface of the substrate 1 and the electrostatic discharge treatment are helpful for the next treatment of the substrate 1, so as to avoid the impurities adhering to the surface of the substrate 1 and causing the oxide film 2 to be unevenly or incompletely distributed on the substrate 1.
Further, step S11 is followed by step S12 of polishing and sandblasting the surface of the substrate 1.
Further, step S12 is followed by step S13 of spraying a primer on the substrate 1 and baking the primer until the primer is set.
According to the description, the surface of the substrate 1 is polished and sandblasted, and then the primer is sprayed, so that the fine roughness of the surface of the substrate 1 is improved, the primer can better permeate into the surface of the substrate 1, the adhesive force of the oxide film 2 on the substrate 1 is greatly increased, and the coating of the oxide film 2 is ensured to be difficult to fall off.
Further, in step S2, the oxide film 2 is a silicon dioxide layer.
As can be seen from the above description, the silicon dioxide has stable structure and strong oxidation resistance, and the oxidation resistance and wear resistance of the substrate 1 are greatly improved by plating the silicon dioxide layer on the surface of the substrate 1.
Further, step S21 is included after step S2, a finish is sprayed on the substrate 1, and the finish is baked until the finish is shaped.
As can be seen from the above description, spraying the finish on the oxide film 2 further improves the performance of the oxide film 2, and simultaneously protects the oxide film 2 and reduces the interference of external force on the oxide film 2.
Further, in step S3, the energy of the laser is 8W, the frequency of the laser is 40KHZ, the speed of the laser is 2500mm/S, and the filling pitch of the laser is 0.04 mm.
Further, in step S3, the number of laser engraving times of the substrate 1 by the laser is 8.
As can be seen from the above description, since the surface of the substrate 1 is covered with the oxide film 2, the surface of the substrate 1 is passivated and hardened, and thus when the circuit wiring groove 3 is laser-etched, the power of the laser-etching machine needs to be increased and the number of laser-etching times needs to be increased to obtain a sufficiently clear circuit wiring groove 3.
Further, step S31 is further included before step S4, in which the substrate 1 is chemically degreased, and the residual chemical agent is removed by washing with water after the chemical degreasing.
It can be known from the above description that before the chemical plating of the substrate 1, impurities such as oil stains attached to the surface of the substrate 1 need to be removed, so that the metal layer 4 completely covers the circuit wiring groove 3 during the chemical plating, and the residual chemical agent on the substrate 1 after the chemical degreasing is removed by washing with water, thereby preventing the residual chemical agent from corroding the substrate 1.
Example one
Referring to fig. 1 to 4, a first embodiment of the present invention is: a LAP laser etching process comprises the following steps,
s1, obtaining a plastic substrate 1;
s2, plating an oxide film 2 on the surface of the substrate 1;
s3, manufacturing a circuit wiring groove 3 on the surface of the substrate 1 plated with the oxide film 2 through laser;
s4, a metal layer 4 is plated in the circuit wiring groove 3 on the substrate 1.
As shown in fig. 1, in step S1, the substrate 1 is injection molded according to the shape of the product in actual production, or purchased directly from a supplier.
Further, step S11 is included before step S2, the surface of the substrate 1 is cleaned and subjected to static electricity removing treatment; step S12, polishing and sand blasting the surface of the substrate 1; and step S13, spraying a primer on the substrate 1, and baking the primer until the primer is shaped. The step S11 is to remove stains such as oil stains from the surface of the substrate 1 and perform static electricity removing treatment before the oxide film 2 is formed on the surface of the substrate 1, so as to prevent the oxide film 2 from covering unevenly or even forming gaps on the substrate 1 when the oxide film 2 is plated due to impurities attached to the surface of the substrate 1, which affects the subsequent processes, and the substrate 1 which is cleaned and subjected to static electricity removing also needs to be subjected to polishing and sand blasting treatment to enhance the fine roughness of the surface of the substrate 1, so that the primer sprayed in the step S13 can penetrate into the surface of the substrate 1, the adhesion between the oxide film 2 and the substrate 1 can be greatly enhanced, the coating of the oxide film 2 can be ensured not fall off, and the polishing and sand blasting treatment of the surface of the substrate 1 is equivalent to the roughening of the substrate 1 with chromic anhydride and sulfuric acid in the conventional chemical plating process to enhance the adhesion of the coating on the substrate 1, so that partial processes in the, the time required by the chemical plating process is shortened, the production efficiency is improved, and the edge of the circuit wiring groove 3 is prevented from being blurred due to corrosion of various acid-base liquid medicines used in the chemical plating pretreatment on the substrate 1.
As shown in fig. 2, in step S2, an oxide film 2 is formed on the surface of the substrate 1 by a PVD process, in this embodiment, the oxide film 2 is a silicon dioxide film, and in other possible embodiments, the oxide film 2 may be made of other materials, such as aluminum oxide.
Further, step S21 is included after step S2, a finish is sprayed on the substrate 1, and the finish is baked until the finish is shaped. Step S21 is to spray a finish on the surface of the oxide film 2, so as to protect the oxide film 2 while further improving the performance of the oxide film 2.
As shown in fig. 3, in step S3, a laser etching machine is used to etch the surface of the substrate 1 plated with the oxide film 2 to form a circuit wiring groove 3, wherein the laser etching machine generates laser with energy of 8W, frequency of 40KHZ, speed of 2500mm/S, filling distance of 0.04mm and etching frequency of 8 times, compared with the laser etching method in which 4W is directly used to etch the circuit wiring groove on a plastic substrate, the surface of the substrate 1 plated with the oxide film 2 is passivated, and hardness and oxidation resistance are much higher than those of a common plastic substrate, so that when the same laser etching machine is used, the energy intensity of the laser needs to be increased and the etching frequency needs to be increased to ensure that the formed circuit wiring groove 3 is clear, and meanwhile, the phenomenon that the outline of the circuit wiring groove 3 is burned to cause a hollow phenomenon is avoided.
Further, step S31 is further included before step S4, in which the substrate 1 is chemically degreased, and the residual chemical agent is removed by washing with water after the chemical degreasing. Before the chemical plating of the substrate 1, impurities such as oil stains and the like on the substrate 1 need to be removed through a chemical agent, and then the residual chemical agent is removed through water washing, so that the metal layer 4 completely covers the circuit wiring groove 3, and the circuit formed on the substrate 1 is ensured to have good conductivity.
As shown in fig. 4, in step S4, a metal layer 4 is chemically plated in the circuit wiring groove 3 formed by laser etching on the substrate 1, so that a circuit is formed on the substrate 1 to realize the function of transmitting electrical signals, and the metal layer 4 may be made of copper, nickel or other metal with good electrical conductivity.
Further, step S4 is followed by step S5 of washing and drying the electroless plated substrate 1. Residual electroless plating solution and metal are remained on the surface of the substrate 1 after electroless plating, and the substrate 1 is washed by water to remove residues, and then the substrate 1 is dried to obtain a finished product of the product.
Further, step S6 is included after step S5, and the finished product is packaged.
In conclusion, the contour of the circuit wiring groove formed on the substrate by the LAP laser etching process provided by the invention is clear, the phenomenon that the edge of the circuit wiring groove is burnt during laser etching is avoided, the phenomenon of excessive plating or plating leakage during chemical plating is reduced, the product quality is improved, the defective product rate is reduced, compared with the traditional LAP process, the processing time is shortened, the production efficiency is improved, the obtained product quality is good, and the resource waste caused by defective products is reduced.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent changes made by using the contents of the present specification and the drawings, or applied directly or indirectly to the related technical fields, are included in the scope of the present invention.

Claims (10)

1. A LAP laser etching process is characterized in that: comprises the following steps of (a) carrying out,
s1, obtaining a plastic substrate;
s2, plating an oxide film on the surface of the substrate;
s3, manufacturing a circuit wiring groove on the surface of the substrate plated with the oxide film through laser;
and S4, plating a metal layer in the circuit wiring groove on the substrate.
2. The LAP laser etching process of claim 1, wherein: in step S2, an oxide film is formed by a PVD process.
3. The LAP laser etching process of claim 1, wherein: step S11 is further included before step S2, the surface of the substrate is cleaned and destaticizing is performed.
4. The LAP laser etching process of claim 3, wherein: step S12 is further included after step S11, and the surface of the substrate is polished and sandblasted.
5. The LAP laser etching process of claim 4, wherein: step S13 is further included after step S12, spraying a primer on the substrate, and baking the primer until the primer is set.
6. The LAP laser etching process of claim 1, wherein: in step S2, the oxide film is a silicon dioxide layer.
7. The LAP laser etching process of claim 1, wherein: and S21 is further included after the step S2, the finish paint is sprayed on the substrate, and the finish paint is baked until the finish paint is shaped.
8. The LAP laser etching process of claim 1, wherein: in step S3, the laser energy is 8W, the laser frequency is 40KHZ, the laser speed is 2500mm/S, and the laser filling pitch is 0.04 mm.
9. The LAP laser etching process of claim 1, wherein: in step S3, the number of laser engraving times of the substrate by laser is 8.
10. The LAP laser etching process of claim 1, wherein: step S31 is further included before step S4, the substrate is chemically degreased, and the residual chemical agent is removed by washing after the chemical degreasing.
CN202010515686.3A 2020-06-09 2020-06-09 LAP laser etching process Pending CN111805091A (en)

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CN112834953A (en) * 2020-12-29 2021-05-25 深圳市信维通信股份有限公司 PEP vibrator preparation process
CN113543481A (en) * 2021-06-04 2021-10-22 深圳市信维通信股份有限公司 3D circuit board manufacturing method

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CN112834953A (en) * 2020-12-29 2021-05-25 深圳市信维通信股份有限公司 PEP vibrator preparation process
CN113543481A (en) * 2021-06-04 2021-10-22 深圳市信维通信股份有限公司 3D circuit board manufacturing method

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Application publication date: 20201023