CN111799336A - SiC MPS diode device and preparation method thereof - Google Patents

SiC MPS diode device and preparation method thereof Download PDF

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CN111799336A
CN111799336A CN202010734370.3A CN202010734370A CN111799336A CN 111799336 A CN111799336 A CN 111799336A CN 202010734370 A CN202010734370 A CN 202010734370A CN 111799336 A CN111799336 A CN 111799336A
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injection
forming
region
diode device
mps diode
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CN111799336B (en
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何艳静
刘延聪
胡彦飞
袁昊
汤晓燕
宋庆文
张玉明
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Xidian University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/868PIN diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608Silicon carbide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/6609Diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/872Schottky diodes

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Abstract

The invention discloses a SiC MPS diode device and a preparation method thereof, belonging to the technical field of microelectronics, and comprising a cathode, an N + substrate, an N-epitaxial layer, a P + injection region and an anode which are sequentially arranged from bottom to top, wherein a groove structure is arranged between the two P + injection regions, the N + injection region is respectively arranged between the two sides of the groove structure and the P + injection region, and the P + injection region is surrounded by the N + injection region to form a well structure; the SiC MPS diode device is provided with the groove structure, the SiC MPS diode device integrated with the groove structure can make the internal potentials of the Pin structure and the Schottky structure more uniform when the device is conducted in the forward direction and approach the potential distribution situation in the Pin structure, the phenomenon of rapid return of voltage drop of the device is effectively inhibited, and on the basis of the groove type SiC MPS diode, N + injection is carried out on the original Pin diode for one time, so that the injection efficiency of the Pin transistor is improved, and the surge capacity of the device is improved.

Description

SiC MPS diode device and preparation method thereof
Technical Field
The invention belongs to the technical field of microelectronics, and particularly relates to a SiC MPS diode device and a preparation method thereof.
Background
In recent years, with the continuous development of power electronic systems, higher requirements are put on power devices in the systems. Si-based power electronics have not been able to meet the requirements of system applications due to the limitations of the materials themselves. Silicon carbide (SiC) materials, as representative of third generation semiconductor materials, are far better than Si materials in many properties.
In SiC power systems, a good rectifier requires a small turn-on voltage, a large conduction current, a low leakage current, a high breakdown voltage and a high switching speed, and having these characteristics at the same time is the most desirable goal we pursue. MPS (large PiN/Schottky) is a device combining the advantages of PiN and SBD, and the forward characteristics of the structure are similar to SBD, with small turn-on voltage, large conduction current, fast switching speed; the reverse characteristic is more like a PiN diode, and has low leakage current and high breakdown voltage. The use of MPS structure allows us to flexibly select metals with low barrier as schottky contacts without fear of increased reverse leakage current. In addition, the combination of the excellent performance of SiC materials and the advantages of MPS structure can exert greater advantages, and is also the trend of the development of current power rectifier devices.
Problems with SiC MPS diode devices: the current SiC MPS diode has a forward current bounce phenomenon called snapback when turned on, and the bipolar degradation causes the degradation of the forward function of the device.
Disclosure of Invention
In order to solve the above problems, the present invention provides a SiC MPS diode device and a method for manufacturing the same, in which a trench type SiC MPS diode device that performs N + injection can effectively suppress the occurrence of a forward current bounce phenomenon and increase the injection efficiency of the device.
The first purpose of the invention is to provide a SiC MPS diode device, which comprises a cathode, an N + substrate, an N-epitaxial layer, a P + injection region and an anode which are arranged from bottom to top in sequence, wherein a groove structure is arranged between the two P + injection regions, Schottky metal is deposited on the groove structure, the depth of the groove structure is less than that of the P + injection regions, and the surface of the P + injection region is an ohmic contact interface;
and N + injection regions are respectively arranged between the trench structure and the P + injection regions, the N + injection regions surround the P + injection regions at corresponding positions to form a well structure, and the edges of the N + injection regions are positioned on the trench structure but are not covered by Schottky metal.
Preferably, the width of the groove structure is 1-2 μm, and the depth is 0.5-0.8 μm.
Preferably, the depth of the P + injection region is 0.8-2 μm, and the distance between the edge of the trench structure and the P + injection region is 0.2-0.8 μm.
Preferably, the implantation concentration of the N + implantation region is higher than that of the N-epitaxial layer.
Preferably, the depth of the N + injection region is 3-4 μm.
Preferably, the schottky metal is Ti or Ni.
A second object of the present invention is to provide a method for manufacturing the above SiC MPS diode device, comprising the steps of:
s1, forming an N-epitaxial layer on the N + substrate through epitaxial growth, wherein the whole structure for forming the N-epitaxial layer is generally called an epitaxial wafer;
s2 preparation of SiO on N-epitaxial layer2A mask layer, forming a mask pattern by using a photoetching process, and forming an N + injection region by using an N ion injection means;
s3, cleaning the injection mask layer, forming a new mask layer on the surface, forming a mask pattern by using a photoetching process, and forming a P + injection region by using an Al ion injection means;
s4, cleaning the injection mask layer, forming a new mask layer on the surface, forming a mask pattern by using a photoetching process, and forming a groove structure by using an ICP (inductively coupled plasma) etching method;
s5, performing carbon film protection on the surface of the N-epitaxial layer, activating implanted ions through high-temperature annealing, and removing the carbon film through an oxidation method;
s6 deposition of SiO2Forming an isolation medium, photoetching and etching to form a P + injection region ohmic contact region, depositing ohmic contact metal on the front surface and the back surface of the epitaxial wafer, and performing a rapid thermal annealing process under the atmosphere of Ar to form ohmic contact;
s7, protecting the back of the epitaxial wafer, etching the front groove structure to form a Schottky contact window, depositing Schottky metal, forming an electrode pattern through a photoetching process, and forming Schottky contact in a Schottky region through a low-temperature rapid thermal annealing process;
and S8, forming thick electrodes on the front surface and the back surface of the epitaxial wafer through a metal deposition process.
Compared with the prior art, the invention has the following beneficial effects:
compared with the traditional SiC MPS diode device, the SiC MPS diode device provided by the invention is provided with the groove structure, the SiC MPS diode device integrated with the groove structure can enable the internal potential of the Pin structure and the Schottky structure to be more uniform when the device is conducted in the forward direction and approach the internal potential distribution condition of the Pin structure, the phenomenon of rapid return of voltage drop of the device is effectively inhibited, and on the basis of the groove type SiC MPS diode, N + injection is carried out on the original Pin diode for one time, so that the injection efficiency of the Pin transistor is improved, and the surge capacity of the device is improved.
Drawings
FIG. 1 is a schematic cross-sectional view of the structure of a SiC MPS diode device fabricated in example 1;
FIG. 2 is a schematic cross-sectional view of the structure of a SiC MPS diode device fabricated in example 2;
FIG. 3 is a forward characteristic curve of the SiC MPS diode device fabricated in example 1;
description of reference numerals:
wherein, 1, anode; 2. a P + implantation region; 3. an N + injection region; 4. an N-epitaxial layer; 5. an N + substrate; 6. a cathode; 7. and (5) a groove structure.
Detailed Description
In order to make the technical solutions of the present invention better understood and implemented by those skilled in the art, the present invention is further described below with reference to the following specific embodiments and the accompanying drawings, but the embodiments are not meant to limit the present invention. The following detection methods, unless otherwise specified, are all conventional methods; the materials are conventional materials and commercially available, unless otherwise specified.
The invention provides a SiC MPS diode device, which comprises a cathode 6, an N + substrate 5, an N-epitaxial layer 4, a P + injection region 2 and an anode 1 which are sequentially arranged from bottom to top, wherein a groove structure 7 is arranged between the two P + injection regions 2, Schottky metal is deposited on the groove structure 7, the depth of the groove structure 7 is smaller than that of the P + injection region 2, and the surface of the P + injection region 2 is an ohmic contact interface; an N + injection region 3 is respectively arranged between the trench structure 7 and the P + injection region 2, the N + injection region 3 surrounds the P + injection region 2 at a corresponding position to form a well structure, and the edge of the N + injection region 3 is located on the trench structure 7 but is not covered by schottky metal.
The SiC MPS diode device is provided with the groove structure, the SiC MPS diode device integrated with the groove structure can make the internal potentials of the Pin structure and the Schottky structure more uniform when the device is conducted in the forward direction and approach the potential distribution situation in the Pin structure, the phenomenon of rapid return of voltage drop of the device is effectively inhibited, and on the basis of the groove type SiC MPS diode, N + injection is carried out on the original Pin diode for one time, so that the injection efficiency of the Pin transistor is improved, and the surge capacity of the device is improved.
The preparation method of the SiC MPS diode device comprises the following steps:
s1: forming an N-epitaxial layer 4 on an N + substrate 5 through epitaxial growth; the overall structure forming the N-epitaxial layer is generally referred to as an epitaxial wafer;
s2: preparation of SiO on N-epitaxial layer 42A mask layer, a mask pattern is formed by using a photoetching process, and an N + injection region 3 is formed by an N ion injection means;
s3: cleaning the injection mask layer, forming a new mask layer on the surface, forming a mask pattern by using a photoetching process, and forming a P + injection region 2 by using an Al ion injection means;
s4: cleaning the injection mask layer, forming a new mask layer on the surface, forming a mask pattern by using a photoetching process, and forming a groove structure 7 by using an ICP (inductively coupled plasma) etching method;
s5: performing carbon film protection on the surface of the epitaxial layer, activating implanted ions through high-temperature annealing, and removing the carbon film through an oxidation method;
s6: deposition of SiO2Forming an isolation medium, photoetching and etching to form a P + injection region 2 ohmic contact region, depositing ohmic contact metal on the front surface and the back surface of the epitaxial wafer, and performing a rapid thermal annealing process under the atmosphere of Ar to form ohmic contact;
s7: protecting the back, etching the front groove structure 7 to form a Schottky contact window, depositing Schottky metal, forming an electrode pattern through a photoetching process, and forming Schottky contact in a Schottky region through a low-temperature rapid thermal annealing process;
s8: and forming thick electrodes on the front surface and the back surface by a metal deposition process.
The SiC MPS diode device and the method of manufacturing the same according to the present invention will be specifically explained by the following examples.
Example 1
FIG. 1 is a cross-sectional view of a trench SiPMS diode device with N + implantation according to the present invention, and the apparatus according to the present invention is described in detail with reference to FIG. 1;
a structure of a trench-type SiC MPS diode device with N + implantation is disclosed: comprises an N + substrate 5 with a doping concentration of 5 × 1018atom/cm3Is 350 mu m thick, and the lightly doped N-epitaxial layer 4 is positioned on the substrate layer 5; a cathode 6 is located below the substrate; the surface of the N-epitaxial layer 4 is provided with a groove structure 7; n-epitaxy with P + implantation region 2 around trench structure 7The surface of layer 4; the N + injection region 3 is positioned around the P + injection region 2, and the anode covers the whole surface of the P + injection region 2 and the surface of the groove structure 7.
The process comprises the following steps:
step 1, forming an N-epitaxial layer 4 on an N + substrate 5 by epitaxial growth, wherein the concentration of the N-epitaxial layer is 6 multiplied by 1015atom/cm3Thickness 10 μm; the overall structure forming the N-epitaxial layer is often referred to as an epitaxial wafer;
step 2, depositing SiO on the N-epitaxial layer 42A mask layer with a thickness of 2 μm, forming a mask pattern by photolithography and etching, and forming an N + implantation region 3 structure by N ion implantation with a surface concentration of 1 × 1016atom/cm3The depth of the N + injection region is 4 μm;
step 3, cleaning the mask layer, forming a mask pattern on the surface of the mask layer through a new mask layer of a deposition process and a photoetching process; forming a P + injection region 2 structure by Al ion injection, wherein the surface concentration of the P + injection region is 1 multiplied by 1019atom/cm3The depth is 1 μm, and the distance between the edge of the trench structure and the P + injection region is 0.5 μm;
step 4, cleaning the mask layer, forming a mask pattern on the surface of the mask layer through a new mask layer of a deposition process and a photoetching process; forming a groove structure 7 structure by an ICP (inductively coupled plasma) etching method, wherein the width of the groove structure is 2 microns, and the depth of the groove structure is 0.8 micron;
step 5, performing carbon film protection on the surface of the epitaxial layer by using a C film sputtering machine, and activating implanted ions by high-temperature annealing at 1650 ℃ for 45 min; removing the carbon film by an oxidation method;
step 6, depositing SiO2Forming an isolation medium, photoetching and etching to form a P + region ohmic contact region, depositing ohmic contact metal nickel on the front surface and the back surface of the epitaxial wafer, and performing a rapid thermal annealing process under the atmosphere of Ar to form ohmic contact;
step 7, protecting the back, etching the front groove structure 7 to form a Schottky contact window, depositing Schottky metal Ni, forming an electrode pattern through a photoetching process, forming Schottky contact in a Schottky region through a low-temperature rapid thermal annealing process, annealing at 700 ℃ for 2min, and enabling the edge of the N + injection region 3 to be located on the groove structure 7 but not covered by the Schottky metal;
and 8, forming an anode on the front surface by depositing Al metal, and forming a back electrode on the back surface by depositing Ti/Ni/Ag metal.
Example 2
FIG. 2 is a schematic cross-sectional view of a trench-type SiC MPS diode device with N + implantation according to the present invention, and the apparatus according to the present invention is described in detail below with reference to FIG. 2;
a structure of a trench type SiC MPS diode device with N + implantation is provided: comprises an N + substrate 5 with a doping concentration of 5 × 1018atom/cm3Is 350 mu m thick; the lightly doped N-epitaxial layer 4 is positioned on the substrate layer 5; a cathode 6 is located below the substrate; the surface of the N-epitaxial layer 4 is provided with a groove structure 7; the P + injection region 2 is positioned on the surface of the N-epitaxial layer 4 around the groove structure 7; the N + injection region 3 is positioned around the P + injection region 2, and the anode covers the whole surface of the P + injection region 2 and the surface of the groove structure 7.
The process comprises the following steps:
step 1, forming an N-epitaxial layer 4 on an N + substrate 5 by epitaxial growth, wherein the concentration of the N-epitaxial layer is 6 multiplied by 1015atom/cm3Thickness 10 μm; the overall structure forming the N-epitaxial layer is often referred to as an epitaxial wafer;
step 2, depositing SiO on the N-epitaxial layer 42Mask layer, mask thickness 2 μm. The mask pattern is formed by a photolithography etching process. Then, an N + implantation region 3 structure is formed by N ion implantation, the surface concentration of the N + implantation region is 5 multiplied by 1016atom/cm3(ii) a The depth of the N + injection region is 4 mu m;
step 3, cleaning the mask layer, forming a mask pattern on the surface of the mask layer through a new mask layer of a deposition process and a photoetching process; forming a P + injection region 2 structure by Al ion injection, wherein the surface concentration of the P + injection region is 1 multiplied by 1019atom/cm3(ii) a The depth is 1 μm, and the distance between the edge of the trench structure and the P + injection region is 0.5 μm;
step 4, cleaning the mask layer, forming a mask pattern on the surface of the mask layer through a new mask layer of a deposition process and a photoetching process; forming a groove structure 7 by an ICP (inductively coupled plasma) etching method, wherein the width of the groove structure is 1 mu m, and the depth of the groove structure is 0.5 mu m;
step 5, performing carbon film protection on the surface of the epitaxial layer by using a C film sputtering machine, and activating implanted ions by high-temperature annealing at 1650 ℃ for 45 min; removing the carbon film by an oxidation method;
step 6, depositing SiO2And forming an isolation medium, and photoetching to form a P + region ohmic contact region. Depositing ohmic contact metal Ni on the front surface and the back surface of the epitaxial wafer, and performing a rapid thermal annealing process under the atmosphere of Ar to form ohmic contact;
step 7, protecting the back, etching the groove structure on the front to form a Schottky contact window, depositing Schottky metal Ti, forming an electrode pattern through a photoetching process, forming Schottky contact in a Schottky region through a low-temperature rapid thermal annealing process, wherein the annealing temperature is 700 ℃, the annealing time is 2min, and the edge of the N + injection region 3 is positioned on the groove structure 7 but is not covered by the Schottky metal;
and 8, forming an anode on the front surface by depositing Al metal, and forming a back electrode on the back surface by depositing Ti/Ni/Ag metal.
The SiCMPS diode devices manufactured in the foregoing embodiments 1 and 2 are similar to each other, and the performance of the SiC MPS diode device manufactured in the following embodiments 1 is tested by taking only embodiment 1 as an example, fig. 3 is a forward characteristic curve of the device, which can be obtained from fig. 3, and the trench SiC MPS diode device performing N + implantation has a forward characteristic comparison diagram with the conventional normal MPS diode device. Therefore, compared with the traditional SiC MPS diode device, the SiC MPS diode device provided by the invention is provided with the groove structure, the SiC MPS diode device integrated with the groove structure can enable the internal potential of the Pin structure and the Schottky structure to be more uniform when the device is conducted in the forward direction and approach the internal potential distribution condition of the Pin structure, the phenomenon of rapid return of voltage drop of the device is effectively inhibited, and N + injection is carried out on the original Pin diode once on the basis of the groove type SiC MPS diode, so that the injection efficiency of the Pin transistor is improved, and the surge capacity of the device is improved.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, it is intended that such changes and modifications be included within the scope of the appended claims and their equivalents.

Claims (7)

1. The utility model provides a SiC MPS diode device, includes negative pole (6), N + substrate (5), N-epitaxial layer (4), P + injection zone (2) and positive pole (1) that set gradually from bottom to top, its characterized in that:
a trench structure (7) is arranged between the two P + injection regions (2), Schottky metal is deposited on the trench structure (7), the depth of the trench structure (7) is smaller than that of the P + injection regions (2), and the surface of the P + injection regions (2) is an ohmic contact interface;
an N + injection region (3) is arranged between the groove structure (7) and the P + injection region (2), the N + injection region (3) surrounds the P + injection region (2) at the corresponding position to form a well structure, and the edge of the N + injection region (3) is located on the groove structure (7) but is not covered by Schottky metal.
2. The SiC MPS diode device according to claim 1, characterized in that the trench structure (7) has a width of 1-2 μm and a depth of 0.5-0.8 μm.
3. The SiC MPS diode device according to claim 2, characterized in that the depth of the P + implant region (2) is 0.8-2 μm and the edge of the trench structure (7) is 0.2-0.8 μm apart from the P + implant region (2).
4. The SiC MPS diode device of claim 1, wherein said N + implanted region (3) has an implantation concentration higher than the concentration of said N-epitaxial layer (4).
5. The SiC MPS diode device of claim 1, wherein the N + implant region (3) is 3-4 μm deep.
6. The SiC MPS diode device of claim 1, wherein said schottky metal is Ti or Ni.
7. The method of fabricating the SiC MPS diode device of claim 1, comprising the steps of:
s1, forming an N-epitaxial layer (4) on the N + substrate (5) through epitaxial growth;
s2 preparation of SiO on N-epitaxial layer (4)2A mask layer, wherein a mask pattern is formed by using a photoetching process, and an N + injection region (3) is formed by using an N ion injection means;
s3, cleaning the injection mask layer, forming a new mask layer on the surface, forming a mask pattern by using a photoetching process, and forming a P + injection region (2) by using an Al ion injection means;
s4, cleaning the injection mask layer, forming a new mask layer on the surface, forming a mask pattern by using a photoetching process, and forming a groove structure (7) by using an ICP (inductively coupled plasma) etching method;
s5, performing carbon film protection on the surface of the N-epitaxial layer (4), activating implanted ions through high-temperature annealing, and removing the carbon film through an oxidation method;
s6 deposition of SiO2Forming an isolation medium, photoetching and etching to form a P + injection region (2) ohmic contact region, depositing ohmic contact metal on the front surface and the back surface of the epitaxial wafer, and performing a rapid thermal annealing process under the Ar atmosphere to form ohmic contact;
s7, protecting the back of the epitaxial wafer, etching the front groove structure (7) to form a Schottky contact window, depositing Schottky metal, forming an electrode pattern through a photoetching process, and forming Schottky contact in a Schottky region through a low-temperature rapid thermal annealing process;
and S8, forming thick electrodes on the front surface and the back surface of the epitaxial wafer through a metal deposition process.
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Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030042538A1 (en) * 2001-08-29 2003-03-06 Rajesh Kumar Silicon carbide power device having protective diode and method for manufacturing silicon carbide power device having protective diode
JP2007220878A (en) * 2006-02-16 2007-08-30 Shindengen Electric Mfg Co Ltd Silicon-carbide semiconductor device
US20150372154A1 (en) * 2011-07-28 2015-12-24 Rohm Co., Ltd. Semiconductor device
CN105742339A (en) * 2014-12-24 2016-07-06 Abb 技术有限公司 Junction barrier schottky rectifier
CN105957901A (en) * 2015-03-09 2016-09-21 罗伯特·博世有限公司 Semiconductor apparatus having a trench schottky barrier schottky diode
CN106783851A (en) * 2017-01-19 2017-05-31 北京世纪金光半导体有限公司 SiCJFET devices of integrated schottky diode and preparation method thereof
CN106876485A (en) * 2017-03-06 2017-06-20 北京世纪金光半导体有限公司 Double trench MOSFET devices of a kind of SiC of integrated schottky diode and preparation method thereof
CN109801958A (en) * 2019-01-21 2019-05-24 厦门市三安集成电路有限公司 A kind of silicon carbide trench schottky diode device and preparation method thereof
CN109860273A (en) * 2018-12-29 2019-06-07 厦门芯光润泽科技有限公司 MPS diode component and preparation method thereof
CN109888024A (en) * 2018-12-29 2019-06-14 厦门芯光润泽科技有限公司 MPS diode component and preparation method thereof

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030042538A1 (en) * 2001-08-29 2003-03-06 Rajesh Kumar Silicon carbide power device having protective diode and method for manufacturing silicon carbide power device having protective diode
JP2007220878A (en) * 2006-02-16 2007-08-30 Shindengen Electric Mfg Co Ltd Silicon-carbide semiconductor device
US20150372154A1 (en) * 2011-07-28 2015-12-24 Rohm Co., Ltd. Semiconductor device
CN105742339A (en) * 2014-12-24 2016-07-06 Abb 技术有限公司 Junction barrier schottky rectifier
CN105957901A (en) * 2015-03-09 2016-09-21 罗伯特·博世有限公司 Semiconductor apparatus having a trench schottky barrier schottky diode
CN106783851A (en) * 2017-01-19 2017-05-31 北京世纪金光半导体有限公司 SiCJFET devices of integrated schottky diode and preparation method thereof
CN106876485A (en) * 2017-03-06 2017-06-20 北京世纪金光半导体有限公司 Double trench MOSFET devices of a kind of SiC of integrated schottky diode and preparation method thereof
CN109860273A (en) * 2018-12-29 2019-06-07 厦门芯光润泽科技有限公司 MPS diode component and preparation method thereof
CN109888024A (en) * 2018-12-29 2019-06-14 厦门芯光润泽科技有限公司 MPS diode component and preparation method thereof
CN109801958A (en) * 2019-01-21 2019-05-24 厦门市三安集成电路有限公司 A kind of silicon carbide trench schottky diode device and preparation method thereof

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
WU, JP; REN, N; WANG, HY; SHENG, K: "1.2-kV 4H-SiC Merged PiN Schottky Diode With Improved Surge Current Capability", 《IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS》 *

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