CN111668355A - Vertical near ultraviolet light-emitting diode and preparation method thereof - Google Patents

Vertical near ultraviolet light-emitting diode and preparation method thereof Download PDF

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Publication number
CN111668355A
CN111668355A CN202010475530.7A CN202010475530A CN111668355A CN 111668355 A CN111668355 A CN 111668355A CN 202010475530 A CN202010475530 A CN 202010475530A CN 111668355 A CN111668355 A CN 111668355A
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layer
light
metal
electrode
emitting diode
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尉尊康
崔志勇
郭凯
薛建凯
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Shanxi Zhongke Advanced Ultraviolet Optoelectronics Technology Co ltd
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Shanxi Zhongke Advanced Ultraviolet Optoelectronics Technology Co ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/382—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body

Abstract

The patent discloses a vertical light emitting diode, include: a metal substrate disposed at the bottom; the light emitting layer is arranged above the metal substrate and comprises a P-type semiconductor material layer, a quantum well layer and an N-type semiconductor material layer which are arranged from bottom to top; the ITO layer is arranged on the upper surface of the N-type semiconductor material layer, through holes with fixed interval periods are uniformly formed in the ITO layer, and the heights of the ITO layer and the through holes are one fourth of the light-emitting wavelength of the light-emitting diode; fixedly arranging a first metal material electrode in the through hole; and a second metal material electrode which is in contact with the ITO layer and the first metal material electrode is arranged on the upper surface of the ITO layer. The light emitting efficiency of the light emitting diode is improved through the scheme.

Description

Vertical near ultraviolet light-emitting diode and preparation method thereof
Technical Field
The patent belongs to the technical field of semiconductor light emitting diodes, and particularly relates to a vertical near ultraviolet light emitting diode and a preparation method thereof.
Background
With the rapid development of LED technology, the wavelength range of the near ultraviolet LED is more and more wide in the range of 320-400 nm. Compared with the traditional ultraviolet light source, the ultraviolet LED has the advantages of more energy conservation, longer service life and no toxic substances. However, compared with a GaN-based near ultraviolet LED and a blue LED, the quantum efficiency of the ultraviolet LED is low, and the output power of the ultraviolet LED is lower due to the absorption effect of the metal reflector on ultraviolet band light. In the existing vertical structure LED, a GaN epitaxial layer is transferred from a sapphire substrate to a metal or silicon substrate with better conductivity and heat dissipation by utilizing bonding and laser lift-off technologies, the metal substrate is directly used as a P electrode, and an N electrode is a proper metal film evaporated on N-type GaN, so that the electrodes are distributed on two sides of a quantum well, and the current expansion is very uniform and suitable for the design of a high-power LED chip. However, the size of the high-power vertical LED chip is larger, and a larger power current is required to be injected, the size of the corresponding N electrode and the width of the expansion bar are increased, and light at the bottom of the N electrode in the area is absorbed by the metal film, which results in waste of the light emitting efficiency of the chip, so that the improvement of the light reflectivity at the bottom of the N electrode becomes an important research direction for optimizing the N electrode structure of the vertical LED.
In the prior art, a metal film with high reflectivity and low work function, such as Al or Ti/Al, is added at the bottom of an N electrode, and the structure from an epitaxial layer to the outside is N-GaN/Al/Ti/Au in sequence to form better ohmic contact. However, because of the particularity of the vertical structure LED, in order to improve the light extraction efficiency of the N-GaN surface, the surface is roughened, and the increased roughness causes the light on the bottom surface of the N-Pad to be scattered out of the interface between the N electrode and the N-GaN epitaxial layer more, so that the scattered light is absorbed by the N electrode metal thin layer to cause more light loss if the scattered light is not sufficiently reflected out, and meanwhile, the roughened surface condition of the interface causes the adhesion force with the electrode to be reduced, and the subsequent packaging wire bonding electrode is more likely to fall off.
Disclosure of Invention
The invention is based on the above situation in the prior art, and the technical problem to be solved by the invention is to provide a method for manufacturing a vertical near-ultraviolet light emitting diode, wherein the method can increase the reflectivity of light at the bottom of an N electrode so as to improve the light emitting efficiency of a chip according to one aspect of the invention, and improve the stability of a subsequent packaging routing electrode according to another aspect of the invention.
In order to solve the above technical problem in at least one aspect, the present patent provides a technical solution including:
a vertical light emitting diode, comprising: a metal substrate disposed at the bottom; the light emitting layer is arranged above the metal substrate and comprises a P-type semiconductor material layer, a quantum well layer and an N-type semiconductor material layer which are arranged from bottom to top; the ITO layer is arranged on the upper surface of the N-type semiconductor material layer, through holes with fixed interval periods are uniformly formed in the ITO layer, and the heights of the ITO layer and the through holes are one fourth of the light-emitting wavelength of the light-emitting diode; fixedly arranging a first metal material electrode in the through hole; and a second metal material electrode which is in contact with the ITO layer and the first metal material electrode is arranged on the upper surface of the ITO layer.
Preferably, the second metal material electrode covers the whole surface of the ITO layer.
Preferably, the light emitting diode emits light in the near ultraviolet light.
Preferably, a reflector layer is arranged between the metal substrate and the light-emitting layer, and the reflector layer is a metal reflector.
Preferably, the vertical light emitting diode further comprises a bonding layer disposed on the upper surface of the substrate.
Preferably, the first metal material electrode is an aluminum electrode, and the second metal material electrode is a Ti/Au electrode.
Preferably, SiO is further disposed on the upper surface of the vertical light emitting diode2And a passivation layer.
Preferably, the section of the through hole is a rectangular hole.
Preferably, the rectangular holes are square, the side length is 5um, and the interval period is 15 um.
The preparation method of the vertical near ultraviolet light-emitting diode comprises the following steps:
step one, manufacturing a GaN epitaxial light-emitting layer; in the step, firstly growing a GaN epitaxial light-emitting layer on a sapphire substrate by using organic metal chemical vapor deposition, wherein the GaN epitaxial light-emitting layer sequentially comprises a u-GaN layer, an N-GaN layer, a multi-quantum well layer and a P-GaN layer; step two, manufacturing a reflector layer; in the step, the reflector layer comprises a Ni/Ag metal reflector, the thicknesses of Ni are 3A and Ag is 2000A in sequence; step three, manufacturing a metal substrate; growing a bonding layer on the reflector by electron beam evaporation, and tightly connecting the metal substrate with the bonding layer by a bonding machine; step four, manufacturing a total reflection mirror; in the step, firstly, KOH alkaline solution is used for roughening the surface of the N-GaN; growing an ITO transparent conducting layer on the roughened N-GaN surface by electron beam evaporation and carrying out 480-degree annealing treatment; then, etching uniformly distributed through holes on the ITO layer; and then depositing a first metal material electrode in the hole and continuously manufacturing a second metal material electrode on the first metal material electrode.
In this patent, the ITO layer is provided with through holes periodically and uniformly distributed, the through holes are filled with high-reflectivity metal Al, and the metal Al (i.e., the in-hole electrode) penetrates through the holes and is connected to the N-type semiconductor material layer of the N-electrode and the light-emitting layer 5. Thus, an omnidirectional reflector (ODR) structure is formed by an N-type semiconductor material layer (N-GaN), a low-refractive-index dielectric layer (ITO) and a metal layer (Al) with complex refractive index. The omnidirectional reflector is a reflector which is composed of a plurality of medium thin-layer structures with high/low refractive index which are periodically arranged, reflects light at any angle by nearly 100 percent and has no absorption loss of a metal reflector. When the optical thickness of the middle medium layer is lambda/4 or odd multiple thereof, the phase of the wave function of the reflected light in the middle medium layer is the same as that of the wave function of the upper and lower adjacent interfaces of other medium layers, the light intensity is mutually enhanced, the reflectivity is close to 1 at the moment, the transmissivity is about 0, and thus the forbidden band structure of the omnidirectional reflector photonic crystal is formed, and the light with the frequency falling in the photonic forbidden band is forbidden to be transmitted. The forbidden band width of the medium can be expanded by simulating and calculating the ratio of high/low refractive index of the medium and the number of arrangement periods through a Maxwell equation set, so that the light with a specific wavelength has extremely high reflectivity. In the above mirror, when blue light is to be reflected, the thickness of the ITO layer is 1/4 of the wavelength (λ 455nm) of blue light, which can inhibit the reflection of light of other frequencies and form an extremely high reflectance for blue light.
Drawings
FIG. 1 is a schematic diagram of a vertical LED chip with an ODR added at the bottom of the N-Pad;
fig. 2 is an enlarged schematic view of the omnidirectional reflector.
Detailed Description
The technical solution described in this patent includes various embodiments and modifications made on the various embodiments. In the present embodiment, these technical solutions are exemplarily set forth by way of the drawings so that the inventive concept, technical features, effects of the technical features, and the like of the present patent become more apparent through the description of the present embodiment. It should be noted, however, that the scope of protection of the patent should obviously not be limited to what is described in the examples, but can be implemented in various ways under the inventive concept of the patent.
In the description of the present embodiment, attention is paid to the following reading references in order to be able to accurately understand the meaning of the words in the present embodiment:
first, in the drawings of the present patent, the same or corresponding elements will be denoted by the same reference numerals. Therefore, the explanation of the reference numerals or names of the elements, etc., which have been presented before may not be repeated later. Also, in the present embodiment, if the terms "first", "second", etc. are used to modify various elements or elements, the terms "first", "second", etc. do not denote any order but merely distinguish the elements or elements from one another. Furthermore, the singular forms "a", "an" and "the" do not refer to only the singular but also the plural unless the context clearly dictates otherwise.
Further, the inclusion or inclusion should be understood to be an open description that does not exclude the presence of other elements on the basis of the elements already described; further, when a layer, region or component is referred to as being "formed on", "disposed on" another layer, region or component, the layer, region or component may be directly or indirectly formed on the other layer, region or component, and similarly, when a relationship between two elements is expressed using terms such as connection, connection or the like, it may be either directly or indirectly connected without particular limitation. The term "and/or" connects two elements in a relational or an inclusive relationship.
In addition, in order to explain the technical solution of the present patent, the sizes of the elements described in the drawings of the present patent do not represent the dimensional proportional relationship of the actual elements, and the elements may be enlarged or reduced for convenience of expression in the present patent.
Example 1
The present embodiment provides a method for manufacturing a vertical near ultraviolet light emitting diode, which manufactures a vertical near ultraviolet light emitting diode. The structure of the vertical near ultraviolet light emitting diode is shown in figure 1:
it includes:
substrate 8
In this embodiment, the substrate is the base of the entire vertical structure LED chip, which is disposed at the bottom of the LED chip. The substrate is a copper/tungsten substrate, namely a conductive substrate, and the conductive substrate is connected with the P electrode.
Bonding layer 7
The bonding layer is provided on the upper surface of the substrate, typically using a thin layer 7 of Ti/Au.
Mirror layer 6
The reflector layer is arranged on the upper surface of the bonding layer, the light-emitting layer is arranged above the reflector layer 6, and light emitted downwards by the light-emitting layer is reflected out through the reflector layer, so that the light of the LED chip is emitted out from the upper surface of the whole chip. Generally, the reflecting mirror layer adopts a thin Ni/Ag layer, has good conductivity and can effectively reflect light.
In the prior art, for a large-power vertical LED chip, a large power current is required to be injected, the size of a corresponding N electrode and the width of an expansion strip are increased, and light at the bottom of the N electrode in the area is absorbed by a metal film, so that the light emitting efficiency of the chip is wasted. In the present embodiment, the features described later will solve the above technical problem in at least one aspect.
Light-emitting layer 5
The light-emitting layer mainly plays a role in forming a PN junction and generating ultraviolet rays. For example, one typical light emitting layer structure includes: the semiconductor device comprises a P-type semiconductor material layer, a quantum well layer and an N-type semiconductor material layer which are arranged from bottom to top.
The P-type semiconductor material layer is arranged on the upper surface of the reflector layer and is used as a P-type semiconductor material. A quantum well layer is arranged on the upper surface of the P-type semiconductor material layer, and the quantum well refers to a potential well of electrons or holes with quantum confinement effect formed by arranging 2 different semiconductor materials at intervals. In this embodiment mode, the quantum well layer is used as a light emitting layer, that is, the quantum well layer emits light after a current is formed between the N-type semiconductor layer and the P-type semiconductor layer through the quantum well layer. An N-type semiconductor material layer is disposed on an upper surface of the quantum well layer. This forms a PN junction that can emit light. Above the light-emitting layer 5, an N-pole material is provided as in a conventional vertical LED chip, and below the light-emitting layer 5, a P-pole material is provided.
ITO layer 1
The ITO is indium tin oxide or a conductive layer used on a semiconductor chip containing an indium tin oxide layer, and in a material used as a transparent electrode, the ITO has two characteristics, on one hand, the ITO provides good conductivity so as to provide electric energy for the light-emitting layer, and on the other hand, the ITO has a transparent characteristic, so that light of the light-emitting layer can pass through the ITO layer and be transmitted out.
In the present embodiment, the ITO layer is provided with through holes 2 periodically and uniformly distributed, the through holes are filled with high-reflectivity metal Al, and the through holes are penetrated through by the metal Al (i.e., the in-hole electrodes) and are simultaneously connected with the N-type semiconductor material layer of the N-electrode and the light-emitting layer 5. Thus, an omnidirectional reflector (omni-directional reflector) structure composed of an N-type semiconductor material layer (N-GaN), a low-refractive-index dielectric layer (ITO) and a metal layer (Al) with a complex refractive index is formed.
The omnidirectional reflector is a reflector which is composed of a plurality of medium thin-layer structures with high/low refractive index which are periodically arranged, reflects light at any angle by nearly 100 percent and has no absorption loss of a metal reflector. When the optical thickness of the middle medium layer is lambda/4 or odd multiple thereof, the phase of the wave function of the reflected light in the middle medium layer is the same as that of the wave function of the upper and lower adjacent interfaces of other medium layers, the light intensity is mutually enhanced, the reflectivity is close to 1 at the moment, the transmissivity is about 0, and thus the forbidden band structure of the omnidirectional reflector photonic crystal is formed, and the light with the frequency falling in the photonic forbidden band is forbidden to be transmitted. The forbidden band width of the medium can be expanded by simulating and calculating the ratio of high/low refractive index of the medium and the number of arrangement periods through a Maxwell equation set, so that the light with a specific wavelength has extremely high reflectivity.
In the above mirror, when blue light is to be reflected, the thickness of the ITO layer is 1/4 of the wavelength (λ 455nm) of blue light, which can inhibit the reflection of light of other frequencies and form an extremely high reflectance for blue light.
N electrode
The N electrode is formed on the upper surface of the ITO layer, is in contact with the ITO layer and the Al metal layer and provides an N pole of a power supply.
SiO2Passivation layer
SiO is also arranged on the upper surface of the LED chip2Passivation layers are used to provide protection and packaging.
Example 2
This example 2 provides a method for manufacturing a light emitting diode, which is used to manufacture the light emitting diode according to example 1. In order to improve the manufacturing quality of the light emitting diode and improve the light extraction efficiency.
The method in this embodiment 2 includes the following steps:
step one, manufacturing a GaN epitaxial luminous layer
In the step, firstly growing a GaN epitaxial light-emitting layer on a sapphire substrate by using organic metal chemical vapor deposition, wherein the GaN epitaxial light-emitting layer preferably sequentially comprises a u-GaN layer, an N-GaN layer, a multi-quantum well layer and a P-GaN layer; the manufacturing process can be formed by using a HMOCVD (high temperature vapor chemical deposition) method. This embodiment will not be described in detail since it belongs to the prior art.
Step two, manufacturing a reflector layer
In this step, the sapphire substrate can be first ground to be thinned from the thickness of 440um to the thickness of 410um or so, thereby meeting the requirements of the chip.
The mirror layer, as described in example 1, comprises a metal mirror, i.e. a commonly used Ni/Ag thin layer, with the thickness of Ni (3A)/Ag (2000A) in this order; the metal reflector can be made by electron beam evaporation in the prior art.
Step three, manufacturing a metal substrate
In this step, the method is mainly used for manufacturing a metal substrate bearing a vertical LED structure. The metal substrate is manufactured in the step by adopting the following substeps:
s101, growing and bonding POD Ti/Au thin layers on a reflector by electron beam evaporation, wherein the thicknesses of the POD Ti/Au thin layers are Ti (2000A)/Au (2000A)/Ti (2000A)/Au (4000A) in sequence; si02And tightly connecting the metal W/Cu substrate with the POD layer by using a bonding machine.
And after the metal substrate is bonded, separating the sapphire substrate from the epitaxial layer U-GaN by using a laser stripping machine.
Step four, manufacturing a total reflection mirror
In the step, firstly, KOH alkaline solution is used for roughening the surface of the N-GaN; evaporating and growing an ITO transparent conducting layer with the thickness of about 880A on the roughened N-GaN surface by using electron beams, and carrying out 480-degree annealing treatment; making positive photoresist patterns on the ITO layer by yellow light photoetching, wherein the positive photoresist patterns are ITO small holes or rectangular holes with the diameter of 5um and the interval period of 15um (assuming that the whole size of an electrode surface is 160 um-160 um square, 8-8 array arrangement can be made); etching ITO in the small hole with wet etching solution, depositing Al (15000A) in the small hole by electron beam evaporation, and sequentially depositing Ti (1000A)/Au (9000A) by electron beam evaporation after the height of the small hole is exceeded.
Then, the exposed N-GaN area of the N surface except the range of the electrode is deposited with SiO by PECVD2(2300A) The passivation layer protects.
The method comprises the following steps of firstly forming small holes with uniform and stable sizes on the ITO layer so as to form the stable total reflector. Meanwhile, an aluminum electrode and a titanium electrode are continuously grown, and the electrodes are implanted into the ITO layer, so that the strength of an electrode circuit can be improved. Through tests, the light power of the omnidirectional reflector structure is improved by about 10%.
The above is only the preferred technical solution of the present patent. All the technical features of the patent are deleted, substituted or modified under the inventive concept of the present patent. It is intended to cover such departures from the present disclosure as come within the known or customary practice in the art to which this invention pertains.

Claims (10)

1. A vertical light emitting diode, comprising:
a metal substrate disposed at the bottom;
the light emitting layer is arranged above the metal substrate and comprises a P-type semiconductor material layer, a quantum well layer and an N-type semiconductor material layer which are arranged from bottom to top;
the ITO layer is arranged on the upper surface of the N-type semiconductor material layer, through holes with fixed interval periods are uniformly formed in the ITO layer, and the heights of the ITO layer and the through holes are one fourth of the light-emitting wavelength of the light-emitting diode; fixedly arranging a first metal material electrode in the through hole; and a second metal material electrode which is in contact with the ITO layer and the first metal material electrode is arranged on the upper surface of the ITO layer.
2. The vertical light-emitting diode according to claim 1, wherein the second metal material electrode covers the entire surface of the ITO layer.
3. The led of claim 1, wherein said led light is near uv light.
4. The led of claim 1, wherein a reflector layer is disposed between the metal substrate and the light-emitting layer, and the reflector layer is a metal reflector.
5. The led of claim 1, further comprising a bonding layer disposed on the upper surface of the substrate.
6. The vertical light emitting diode of claim 1, wherein the first metal material electrode is an aluminum electrode and the second metal material electrode is a Ti/Au electrode.
7. The led of claim 1, wherein said led further comprises SiO disposed on the top surface of said led2And a passivation layer.
8. The led of claim 1, wherein said through hole has a rectangular cross section.
9. The vertical light emitting diode of claim 8, wherein the rectangular holes are square with a side length of 5um and a spacing period of 15 um.
10. A method for preparing a vertical near ultraviolet light-emitting diode (VLED), the method comprising the steps of:
step one, manufacturing a GaN epitaxial light emitting layer.
In the step, firstly growing a GaN epitaxial light-emitting layer on a sapphire substrate by using organic metal chemical vapor deposition, wherein the GaN epitaxial light-emitting layer sequentially comprises a u-GaN layer, an N-GaN layer, a multi-quantum well layer and a P-GaN layer;
step two, manufacturing a reflector layer
In the step, the reflector layer comprises a Ni/Ag metal reflector, the thicknesses of Ni are 3A and Ag is 2000A in sequence;
step three, manufacturing a metal substrate
Growing a bonding layer on the reflector by electron beam evaporation, and tightly connecting the metal substrate with the bonding layer by a bonding machine;
step four, manufacturing a total reflection mirror
In the step, firstly, KOH alkaline solution is used for roughening the surface of the N-GaN; growing an ITO transparent conducting layer on the roughened N-GaN surface by electron beam evaporation and carrying out 480-degree annealing treatment; then, etching uniformly distributed through holes on the ITO layer; and then depositing a first metal material electrode in the hole and continuously manufacturing a second metal material electrode on the first metal material electrode.
CN202010475530.7A 2020-05-29 2020-05-29 Vertical near ultraviolet light-emitting diode and preparation method thereof Pending CN111668355A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010475530.7A CN111668355A (en) 2020-05-29 2020-05-29 Vertical near ultraviolet light-emitting diode and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010475530.7A CN111668355A (en) 2020-05-29 2020-05-29 Vertical near ultraviolet light-emitting diode and preparation method thereof

Publications (1)

Publication Number Publication Date
CN111668355A true CN111668355A (en) 2020-09-15

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