CN111624532B - Magnetoresistive sensor system - Google Patents
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- CN111624532B CN111624532B CN202010525702.7A CN202010525702A CN111624532B CN 111624532 B CN111624532 B CN 111624532B CN 202010525702 A CN202010525702 A CN 202010525702A CN 111624532 B CN111624532 B CN 111624532B
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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- G01R33/02—Measuring direction or magnitude of magnetic fields or magnetic flux
- G01R33/06—Measuring direction or magnitude of magnetic fields or magnetic flux using galvano-magnetic devices
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- G01R33/095—Magnetoresistive devices extraordinary magnetoresistance sensors
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Abstract
The invention discloses a magnetic resistance sensor system, belonging to the technical field of magnetic resistance sensors, comprising: the first AMR magnetoresistive sensor is arranged on the first flat coil and comprises a first signal output end; the second AMR magnetoresistive sensor is arranged on the second flat coil and comprises a second signal output end; the differential amplifier comprises a first input end, a second input end, a feedback end and a voltage output end, wherein the first signal output end is connected with the first input end, and the second signal output end is connected with the second input end; a feedback circuit is arranged between the voltage output ends and outputs a feedback signal to the feedback end; the beneficial effects are that: not only the output rate of data is increased, but also the sensitivity of magnetic field measurement is improved.
Description
Technical Field
The invention relates to the technical field of magnetoresistive sensors, in particular to a dual-heterogeneous magnetoresistive sensor system.
Background
The basic structure of the AMR magnetoresistive sensor is composed of a Wheatstone bridge consisting of four magnetoresistors, and an external magnetic field value can be obtained by testing a differential voltage signal output by two output ends of the bridge. AMR magnetoresistive sensors are well suited for sensing geomagnetism and magnetic fields in the range of tens of gauss, which can be used to detect some ferromagnetic objects such as airplanes, trains, cars, but also has applications including magnetic compasses, rotational position sensing, current sensing, drilling orientation, line position measurement, yaw rate sensors, and head trajectory tracking in virtual reality.
As shown in fig. 1, the conventional magnetoresistive sensor system is usually a single-bridge magnetoresistive sensor system, and the magnetoresistive sensor system requires two stages (SET stage and RESET stage) to complete one magnetic field value measurement when performing magnetic field measurement, and two stages apply mutually opposite currents to the flat coils located under the AMR magnetoresistive sensor, so that the magnetization directions of the magnetoresistive sensor are also mutually opposite, and the voltage values output by the two stages are recorded, and then subtracted and divided by two to eliminate an offset error, thereby obtaining a voltage signal for representing the magnetic field value; however, the magnetoresistive sensor system takes two cycles at two stages in one magnetic field value measurement process, which results in a low data output rate.
Disclosure of Invention
According to the above problems in the prior art, a magnetoresistive sensor system is provided, in which an AMR magnetoresistive sensor is additionally provided, so that a magnetic field measurement only requires one measurement stage, the output rate of data is increased, and the sensitivity of the magnetic field measurement is improved.
The technical scheme specifically comprises the following steps:
a magnetoresistive sensor system, comprising:
the first AMR magnetoresistive sensor is arranged on the first flat coil and used for sensing a magnetic signal, and comprises a first signal output end;
the second AMR magnetoresistive sensor is arranged on the second flat coil and used for sensing a magnetic signal, and comprises a second signal output end;
the differential amplifier comprises a first input end, a second input end, a feedback end and a voltage output end, wherein the first signal output end is connected with the first input end, and the second signal output end is connected with the second input end;
and a feedback circuit is also arranged between the voltage output ends and outputs a feedback signal to the feedback end.
Preferably, wherein the feedback circuit further comprises:
the two ends of the first resistor are respectively connected with the anode of the voltage output end and the anode of the feedback end;
the two ends of the second resistor are respectively connected with the negative electrode of the voltage output end and the negative electrode of the feedback end;
and two ends of the third resistor are respectively connected with the anode of the feedback end and the cathode of the feedback end.
Preferably, wherein the first AMR magnetoresistive sensor is identical to the second AMR magnetoresistive sensor.
Preferably, the first resistor and the second resistor have the same resistance value.
Preferably, at the same time, the currents flowing in the first flat coil and the second flat coil are equal in magnitude and opposite in direction.
Preferably, wherein the differential amplifier further comprises:
the first differential transistor pair comprises a first field effect transistor and a second field effect transistor, and the grid electrode of the first field effect transistor and the grid electrode of the second field effect transistor jointly form the first input end;
the drain electrode of the first bias field effect transistor is respectively connected with the source electrode of the first field effect transistor and the source electrode of the second field effect transistor, the grid electrode of the first bias field effect transistor is connected with a bias voltage, and the source electrode of the first bias field effect transistor is grounded;
the second differential transistor pair comprises a third field effect transistor and a fourth field effect transistor, and a grid electrode of the third field effect transistor and a grid electrode of the fourth field effect transistor jointly form the second input end;
a drain electrode of the second bias field effect transistor is respectively connected with a source electrode of the third field effect transistor and a source electrode of the fourth field effect transistor, a grid electrode of the second bias field effect transistor is connected with the bias voltage, and a source electrode of the second bias field effect transistor is grounded;
the third differential transistor pair comprises a fifth field effect transistor and a sixth field effect transistor, and the grid electrode of the fifth field effect transistor and the grid electrode of the sixth field effect transistor jointly form the feedback end;
and the drain electrode of the third bias field effect transistor is respectively connected with the source electrode of the fifth field effect transistor and the source electrode of the sixth field effect transistor, the grid electrode of the third bias field effect transistor is connected with the bias voltage, and the source electrode of the third bias field effect transistor is grounded.
A source electrode of the seventh field effect transistor and a source electrode of the eighth field effect transistor are respectively connected with a fixed voltage end, and a grid electrode of the seventh field effect transistor and a grid electrode of the eighth field effect transistor are respectively connected with the bias voltage;
a source electrode of the ninth field effect transistor is simultaneously connected with a drain electrode of the seventh field effect transistor, a drain electrode of the first field effect transistor, a drain electrode of the third field effect transistor and a drain electrode of the fifth field effect transistor, a source electrode of the tenth field effect transistor is simultaneously connected with a drain electrode of the eighth field effect transistor, a drain electrode of the second field effect transistor, a drain electrode of the fourth field effect transistor and a drain electrode of the sixth field effect transistor, and a gate electrode of the ninth field effect transistor and a gate electrode of the tenth field effect transistor are respectively connected with the bias voltage;
the drain electrode of the eleventh field effect transistor is connected with the drain electrode of the ninth field effect transistor through a first connection point, the drain electrode of the twelfth field effect transistor is connected with the drain electrode of the tenth field effect transistor through a second connection point, the first connection point and the second connection point jointly form the voltage output end, and the grid electrode of the eleventh field effect transistor and the grid electrode of the twelfth field effect transistor are respectively connected with the bias voltage;
the drain electrode of the thirteenth field effect transistor is connected with the source electrode of the eleventh field effect transistor, the drain electrode of the fourteenth field effect transistor is connected with the source electrode of the twelfth field effect transistor, the source electrode of the thirteenth field effect transistor and the source electrode of the fourteenth field effect transistor are both grounded, and the grid electrode of the thirteenth field effect transistor and the grid electrode of the fourteenth field effect transistor are respectively connected with the bias voltage.
Preferably, the seventh fet, the eighth fet, the ninth fet, and the tenth fet are PMOS transistors.
Preferably, the eleventh field effect transistor, the twelfth field effect transistor, the thirteenth field effect transistor and the fourteenth field effect transistor are NMOS transistors.
Preferably, the first field effect transistor, the second field effect transistor, the third field effect transistor, the fourth field effect transistor, the fifth field effect transistor, and the sixth field effect transistor are NMOS transistors.
Preferably, the first bias voltage fet, the second bias voltage fet, and the third bias voltage fet are NMOS transistors.
The beneficial effects of the above technical scheme are that:
the magnetic resistance sensor system is provided, only one measuring stage is needed for magnetic field measurement by additionally adding one AMR magnetic resistance sensor, the output rate of data is increased, and the sensitivity of the magnetic field measurement is improved.
Drawings
FIG. 1 is a schematic diagram of a single bridge-resistance magnetoresistive sensor system;
FIG. 2 is a schematic diagram of a magnetoresistive sensor system according to a preferred embodiment of the present invention;
FIG. 3 is a schematic diagram of a differential amplifier according to a preferred embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without inventive efforts based on the embodiments of the present invention, shall fall within the scope of protection of the present invention.
It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict.
The invention is further described with reference to the following drawings and specific examples, which are not intended to be limiting.
A magnetoresistive sensor system, comprising:
the first AMR magnetoresistive sensor 1 is arranged on the first flat coil 2 and used for sensing a magnetic signal, and the first AMR magnetoresistive sensor 1 comprises a first signal output end Vo1;
the second AMR magnetoresistive sensor 3 is arranged on the second flat coil 4 and used for sensing a magnetic signal, and the second AMR magnetoresistive sensor 3 comprises a second signal output end Vo2;
the differential amplifier 5, the differential amplifier 5 includes a first input end Vin1, a second input end Vin2, a feedback end Vfb and a voltage output end Vout, the first signal output end Vo1 is connected to the first input end Vin1, and the second signal output end Vo2 is connected to the second input end Vin2;
a feedback circuit is further disposed between the voltage output terminals Vout, and the feedback circuit outputs a feedback signal to the feedback terminal Vfb.
As a preferred embodiment, the first plate coil 2 and the second plate coil 4 are both SET/RESET coils of a magnetoresistive sensor system, and are used for performing RESET and SET operations on four magnetoresistors forming a wheatstone bridge in an AMR magnetoresistive sensor, in a specific measurement process, the first AMR magnetoresistive sensor 1 and the second AMR magnetoresistive sensor 3 are simultaneously subjected to magnetization operations in different directions, that is, the first plate coil 2 and the second plate coil 4 are simultaneously applied with currents with equal magnitude and opposite directions, and at this time, signals output by the first signal output terminal Vo1 and the second signal output terminal Vo2 are subtracted from each other, so that a double magnetic field signal to be measured can be obtained; the differential amplifier 5 is configured to perform addition/subtraction operation on the signals output by the first signal output terminal Vo1 and the second signal output terminal Vo2 and amplify the signals, where the signals after the operation satisfy the following formula:
V out ＝A*(V o1 -V o2 )；
where a is used to indicate the amplification factor of the signal after passing through the differential amplifier 5, and the amplification factor of the signal is determined by the feedback circuit. Specifically, assume that the output voltage value of the first signal output Vo1 is v set The output voltage value of the second signal output terminal Vo2 is v rset Then v is set And v rset Respectively satisfy the following formulas:
v set ＝v sig +v os ；v rset ＝-v sig +v os ；
wherein v is sig For characterizing the voltage value, v, of the magnetic field signal to be measured os Then it is an offset error; subtracting the output voltage value of the first signal output end Vo1 from the output voltage value of the second signal output end Vo2 to obtain twice v sig . Therefore, the offset error v can be eliminated by subtracting the output signals of the first and second signal output terminals Vo1 and Vo2 by the differential amplifier 5 os (ii) a Therefore, through the technical scheme disclosed by the invention, the detection of the magnetic field signal can be completed only in one time period, namely, one time of current, so that the output rate of data is increased.
In a preferred embodiment of the present invention, the feedback circuit further comprises:
two ends of the first resistor R1 are respectively connected with the anode of the voltage output end Vout and the anode of the feedback end Vfb;
two ends of the second resistor R2 are respectively connected with the negative electrode of the voltage output end Vout and the negative electrode of the feedback end Vfb;
two ends of the third resistor R3 are respectively connected to the positive electrode of the feedback terminal Vfb and the negative electrode of the feedback terminal Vfb.
In a preferred embodiment of the present invention, the first AMR magnetoresistive sensor 1 is identical to the second AMR magnetoresistive sensor 3.
In the preferred embodiment of the present invention, the first resistor R1 and the second resistor R2 have the same resistance.
In the preferred embodiment of the present invention, the currents flowing in the first flat coil 2 and the second flat coil 4 are equal and opposite at the same time.
Specifically, in the above embodiment, the following formula is satisfied between the resistance values of the first resistor R1, the second resistor R2, and the third resistor R3 and the signal amplification factor a:
wherein r is 1 For representing the resistance values, R, of the first resistor R1 and the second resistor R2 2 The resistance values of the first resistor R1, the second resistor R2 and the third resistor R3 determine the amplification factor of the differential amplifier 5.
In a preferred embodiment of the present invention, the differential amplifier 5 further comprises:
the differential transistor pair comprises a first field effect transistor M1 and a second field effect transistor M2, and a grid electrode of the first field effect transistor M1 and a grid electrode of the second field effect transistor M2 jointly form a first input end Vin1;
a first bias field-effect transistor Mb1, a drain of the first bias field-effect transistor Mb1 being connected to a source of the first field-effect transistor M1 and a source of the second field-effect transistor M2, respectively, a gate of the first bias field-effect transistor Mb1 being connected to a bias voltage, and a source of the first bias field-effect transistor Mb1 being grounded;
the second differential transistor pair comprises a third field-effect tube M3 and a fourth field-effect tube M4, and a grid electrode of the third field-effect tube M3 and a grid electrode of the fourth field-effect tube M4 jointly form a second input end Vin2;
a second bias field-effect transistor Mb2, a drain of the second bias field-effect transistor Mb2 being connected to a source of the third field-effect transistor M3 and a source of the fourth field-effect transistor M4, respectively, a gate of the second bias field-effect transistor Mb2 being connected to a bias voltage, and a source of the second bias field-effect transistor Mb2 being grounded;
a third differential transistor pair, wherein the third differential transistor pair includes a fifth field-effect transistor M5 and a sixth field-effect transistor M6, and a gate of the fifth field-effect transistor M5 and a gate of the sixth field-effect transistor M6 jointly form a feedback end Vfb;
a drain of the third bias fet Mb3 is connected to the source of the fifth fet M5 and the source of the sixth fet M6, respectively, a gate of the third bias fet Mb3 is connected to a bias voltage, and a source of the third bias fet Mb3 is grounded.
The source electrode of the seventh field-effect tube M7 and the source electrode of the eighth field-effect tube M8 are respectively connected with a fixed voltage end, and the grid electrode of the seventh field-effect tube M7 and the grid electrode of the eighth field-effect tube M8 are respectively connected with bias voltage;
a ninth field-effect tube M9 and a tenth field-effect tube M10, wherein a source electrode of the ninth field-effect tube M9 is simultaneously connected with a drain electrode of the seventh field-effect tube M7, a drain electrode of the first field-effect tube M1, a drain electrode of the third field-effect tube M3 and a drain electrode of the fifth field-effect tube M5, a source electrode of the tenth field-effect tube M10 is simultaneously connected with a drain electrode of the eighth field-effect tube M8, a drain electrode of the second field-effect tube M2, a drain electrode of the fourth field-effect tube M4 and a drain electrode of the sixth field-effect tube M6, and a gate electrode of the ninth field-effect tube M9 and a gate electrode of the tenth field-effect tube M10 are respectively connected with a bias voltage;
the drain electrode of the eleventh field-effect tube M11 is connected with the drain electrode of the ninth field-effect tube M9 through a first connection point, the drain electrode of the twelfth field-effect tube M12 is connected with the drain electrode of the tenth field-effect tube M10 through a second connection point, the first connection point and the second connection point jointly form a voltage output end Vout, and the grid electrode of the eleventh field-effect tube M11 and the grid electrode of the twelfth field-effect tube M12 are respectively connected with bias voltage;
a thirteenth field effect transistor M13 and a fourteenth field effect transistor M14, wherein the drain of the thirteenth field effect transistor M13 is connected to the source of the eleventh field effect transistor M11, the drain of the fourteenth field effect transistor M14 is connected to the source of the twelfth field effect transistor M12, the sources of the thirteenth field effect transistor M13 and the fourteenth field effect transistor M14 are both grounded, and the gate of the thirteenth field effect transistor M13 and the gate of the fourteenth field effect transistor M14 are respectively connected to a bias voltage.
In the preferred embodiment of the present invention, the seventh fet M7, the eighth fet M8, the ninth fet M9, and the tenth fet M10 are PMOS transistors.
In the preferred embodiment of the present invention, the eleventh fet M11, the twelfth fet M12, the thirteenth fet M13, and the fourteenth fet M14 are NMOS transistors.
In the preferred embodiment of the present invention, the first fet M1, the second fet M2, the third fet M3, the fourth fet M4, the fifth fet M5, and the sixth fet M6 are NMOS transistors.
In a preferred embodiment of the present invention, the first bias fet Mb1, the second bias fet Mb2, and the third bias fet Mb3 are NMOS transistors.
The beneficial effects of the above technical scheme are that:
the magnetic resistance sensor system is provided, only one measuring stage is needed for magnetic field measurement by additionally adding an AMR magnetic resistance sensor, the output rate of data is increased, and the sensitivity of the magnetic field measurement is improved.
While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention.
Claims (10)
1. A magnetoresistive sensor system, comprising:
the first AMR magnetoresistive sensor is arranged on the first flat coil and used for sensing a magnetic signal, and comprises a first signal output end;
the second AMR magnetoresistive sensor is arranged on the second flat coil and used for sensing a magnetic signal, and comprises a second signal output end;
the differential amplifier comprises a first input end, a second input end, a feedback end and a voltage output end, wherein the first signal output end is connected with the first input end, and the second signal output end is connected with the second input end;
a feedback circuit is arranged between the voltage output ends and outputs a feedback signal to the feedback end;
the differential amplifier further comprises:
the first differential transistor pair comprises a first field effect transistor and a second field effect transistor, and the grid electrode of the first field effect transistor and the grid electrode of the second field effect transistor jointly form the first input end;
the second differential transistor pair comprises a third field effect transistor and a fourth field effect transistor, and a grid electrode of the third field effect transistor and a grid electrode of the fourth field effect transistor jointly form the second input end;
and the third differential transistor pair comprises a fifth field effect transistor and a sixth field effect transistor, and a gate of the fifth field effect transistor and a gate of the sixth field effect transistor jointly form the feedback end.
2. A magnetoresistive sensor system according to claim 1, wherein the feedback circuit further comprises:
the two ends of the first resistor are respectively connected with the anode of the voltage output end and the anode of the feedback end;
the two ends of the second resistor are respectively connected with the negative electrode of the voltage output end and the negative electrode of the feedback end;
and two ends of the third resistor are respectively connected with the anode of the feedback end and the cathode of the feedback end.
3. A magnetoresistive sensor system according to claim 1, wherein the first AMR magnetoresistive sensor is identical to the second AMR magnetoresistive sensor.
4. A magnetoresistive sensor system according to claim 2, wherein the first and second resistors are of equal resistance.
5. The magnetoresistive sensor system of claim 1, wherein the first plate coil and the second plate coil flow currents of equal magnitude and opposite direction at the same time.
6. The magnetoresistive sensor system of claim 1, wherein the differential amplifier further comprises:
the drain electrode of the first bias field effect transistor is respectively connected with the source electrode of the first field effect transistor and the source electrode of the second field effect transistor, the grid electrode of the first bias field effect transistor is connected with a bias voltage, and the source electrode of the first bias field effect transistor is grounded;
a drain electrode of the second bias field effect transistor is respectively connected with a source electrode of the third field effect transistor and a source electrode of the fourth field effect transistor, a grid electrode of the second bias field effect transistor is connected with the bias voltage, and a source electrode of the second bias field effect transistor is grounded;
a drain electrode of the third bias field effect transistor is respectively connected with a source electrode of the fifth field effect transistor and a source electrode of the sixth field effect transistor, a grid electrode of the third bias field effect transistor is connected with the bias voltage, and a source electrode of the third bias field effect transistor is grounded;
a source electrode of the seventh field effect transistor and a source electrode of the eighth field effect transistor are respectively connected with a fixed voltage end, and a grid electrode of the seventh field effect transistor and a grid electrode of the eighth field effect transistor are respectively connected with the bias voltage;
a source electrode of the ninth field effect transistor is simultaneously connected with a drain electrode of the seventh field effect transistor, a drain electrode of the first field effect transistor, a drain electrode of the third field effect transistor and a drain electrode of the fifth field effect transistor, a source electrode of the tenth field effect transistor is simultaneously connected with a drain electrode of the eighth field effect transistor, a drain electrode of the second field effect transistor, a drain electrode of the fourth field effect transistor and a drain electrode of the sixth field effect transistor, and a gate electrode of the ninth field effect transistor and a gate electrode of the tenth field effect transistor are respectively connected with the bias voltage;
the drain electrode of the eleventh field effect transistor is connected with the drain electrode of the ninth field effect transistor through a first connection point, the drain electrode of the twelfth field effect transistor is connected with the drain electrode of the tenth field effect transistor through a second connection point, the first connection point and the second connection point jointly form the voltage output end, and the grid electrode of the eleventh field effect transistor and the grid electrode of the twelfth field effect transistor are respectively connected with the bias voltage;
the drain electrode of the thirteenth field effect transistor is connected with the source electrode of the eleventh field effect transistor, the drain electrode of the fourteenth field effect transistor is connected with the source electrode of the twelfth field effect transistor, the source electrode of the thirteenth field effect transistor and the source electrode of the fourteenth field effect transistor are both grounded, and the grid electrode of the thirteenth field effect transistor and the grid electrode of the fourteenth field effect transistor are respectively connected with the bias voltage.
7. A magnetoresistive sensor system according to claim 6, wherein the seventh FET, the eighth FET, the ninth FET and the tenth FET are PMOS transistors.
8. The magnetoresistive sensor system of claim 7, wherein the eleventh fet, the twelfth fet, the thirteenth fet, and the fourteenth fet are NMOS transistors.
9. The magnetoresistive sensor system of claim 6, wherein the first, second, third, fourth, fifth, and sixth field effect transistors are NMOS transistors.
10. A magnetoresistive sensor system according to claim 6, wherein the first, second and third bias fets are NMOS transistors.
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| DE19834153A1 (en) * | 1998-07-29 | 2000-02-10 | Lust Antriebstechnik Gmbh | Process for evaluating signals from magnetoresistive sensors |
| US6376933B1 (en) * | 1999-12-31 | 2002-04-23 | Honeywell International Inc. | Magneto-resistive signal isolator |
| TWI365601B (en) * | 2007-09-27 | 2012-06-01 | Mstar Semiconductor Inc | High linearity mixer with programmable gain and associated transconductor |
| US8947082B2 (en) * | 2011-10-21 | 2015-02-03 | University College Cork, National University Of Ireland | Dual-axis anisotropic magnetoresistive sensors |
| CN103760505B (en) * | 2014-02-14 | 2017-06-06 | 太原理工大学 | A kind of faint magnetic signal acquisition processing unit of double differential type low noise |
| CN107615079B (en) * | 2015-07-01 | 2019-11-12 | 株式会社村田制作所 | Current sensor |
| US10782154B2 (en) * | 2017-06-26 | 2020-09-22 | Texas Instruments Incorporated | Tilted segmented anisotropic magneto-resistive angular sensor |
| CN209297191U (en) * | 2018-12-29 | 2019-08-23 | 陕西亚成微电子股份有限公司 | Its voltage-stablizer of a kind of amplifying unit, amplifier and application |
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