CN111613533A - 制作非对称低中压器件的方法及非对称低中压器件 - Google Patents

制作非对称低中压器件的方法及非对称低中压器件 Download PDF

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CN111613533A
CN111613533A CN201910142611.2A CN201910142611A CN111613533A CN 111613533 A CN111613533 A CN 111613533A CN 201910142611 A CN201910142611 A CN 201910142611A CN 111613533 A CN111613533 A CN 111613533A
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林威
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GTA Semiconductor Co Ltd
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
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Abstract

本发明公开了一种制作非对称低中压器件的方法及非对称低中压器件,其中方法包括:在非对称低中压器件的衬底区形成N阱和P阱;在N阱上方的衬底区的上表面制作闸极,闸极与P阱无重合区域;从P阱上方的衬底区的上表面打开窗口,并大角度注入第一掺杂离子形成第一掺杂区;从P阱上方的衬底区的上表面以小角度注入第二掺杂离子至第一掺杂区内形成第二掺杂区,第一掺杂区与第二掺杂区在横向上的间隔形成沟道。本发明通过在第一掺杂区和第二掺杂区间形成的沟道,与传统的非对称低中压器件中的沟道相比,沟通长度变短,有效地降低了导通电阻。

Description

制作非对称低中压器件的方法及非对称低中压器件
技术领域
本发明属于半导体器件制造技术领域,尤其涉及一种制作非对称低中压器件的方法及非对称低中压器件。
背景技术
6V~8V Asym-DEMOS(非对称低中压器件)在SWITCH(转换器)以及LDO(低压差线性稳压器)领域有很大的应用需求。图1中示出的是一典型的Asym-DEMOS的剖面图,其沟道区域由5V NMOS(N型金属氧化物半导体)的P阱11构成,衬底区的上表面的闸极13与P阱11的重合的P阱区域为沟道,沟道的的长度为L,漂移区由5V PMOS(P型金属氧化物半导体)的N阱12构成。
因为穿通电压与击穿电压都起着限制着晶体管最高工作电压的作用,P阱11与N阱12的击穿电压为16V(伏)左右,Asym-DEMOS的VDD(操作电压)在10V以内,低于16V的击穿电压,可保证Asym-DEMOS工作在正常电压范围内而不会击穿。
又因为受限于5V COMS穿通电压(punch-through)的要求,Asym-DEMOS器件的沟道长度L最低范围为0.5-0.6um(微米),无法再根据器件做进一步缩小,这就限制了导通电阻的进一步改善,导致电阻较大,从而导致Asym-DEMOS的性能不高。
发明内容
本发明要解决的技术问题是为了克服现有技术中Asym-DEMOS的导通电阻较大,导致Asym-DEMOS的性能不高的缺陷,提供一种制作非对称低中压器件的方法及非对称低中压器件。
本发明是通过下述技术方案来解决上述技术问题:
提供一种制作非对称低中压器件的方法,所述方法包括:
在非对称低中压器件的衬底区形成N阱和P阱;
在所述N阱上方的所述衬底区的上表面制作闸极,所述闸极与所述P阱无重合区域;
从所述P阱上方的所述衬底区的上表面打开窗口,并大角度注入第一掺杂离子形成第一掺杂区;
从所述P阱上方的所述衬底区的上表面以小角度注入第二掺杂离子至所述第一掺杂区内形成第二掺杂区,所述第一掺杂区与所述第二掺杂区在横向上的间隔形成沟道。
较佳地,所述从所述P阱上方的所述衬底区的上表面以小角度注入第二掺杂离子的步骤之后还包括:
在所述衬底区制作N型重掺杂区。
较佳地,在所述衬底区制作N型重掺杂区的步骤之后还包括:
在所述闸极和所述N阱对应的所述衬底区的上表面之间形成合金阻挡区。
较佳地,在所述非对称低中压器件的衬底区形成N阱和P阱步骤之前还包括:
在所述非对称低中压器件的基片上形成衬底区以及在所述非对称低中压器件的基片上制作STI。
较佳地,所述第一掺杂离子为硼离子,所述硼离子的掺杂浓度为1.8E12/立方厘米~2.2E12/立方厘米。
较佳地,在所述大角度注入第一掺杂离子以形成沟道的步骤中,所述大角度注入的角度范围为27~33度。
较佳地,所述沟道的长度范围为0.05~0.3微米。
较佳地,所述第二掺杂离子为砷离子,所述砷离子的掺杂浓度为5.5E14/立方厘米~6.1E14/立方厘米。
较佳地,所述小角度注入的角度范围为0~10度。
提供一种非对称低中压器件,所述非对称低中压器件包括:
衬底区;
位于所述衬底区中的N阱和P阱;
位于所述N阱上方的闸极,所述闸极与所述P阱无重合区域;
位于所述P阱上方第一掺杂区;
位于所述第一掺杂区内的第二掺杂区,所述第一掺杂区与所述第二掺杂区在横向上的间隔形成沟道。
本发明的积极进步效果在于:
本发明通过在第一掺杂区和第二掺杂区间形成的沟道,与传统的非对称低中压器件中的沟道相比,沟通长度变短,与传统的非对称低中压器件中的沟道相比,沟通长度变短,从而有效地降低导通电阻,进而进一步提高Asym-DEMOS的性能。
附图说明
图1为本发明的现有技术的非对称低中压器件的结构示意图。
图2为本发明的实施例1的制作非对称低中压器件的方法的流程示意图。
图3为本发明的实施例1的制作非对称低中压器件的方法中的步骤100的示意图。
图4为本发明的实施例1的制作非对称低中压器件的方法中的步骤101的示意图。
图5为本发明的实施例1的制作非对称低中压器件的方法中的步骤102的示意图。
图6为本发明的实施例1的制作非对称低中压器件的方法中的步骤103的示意图。
图7为本发明的实施例1的制作非对称低中压器件的方法中的步骤104的示意图。
图8为本发明的实施例1的制作非对称低中压器件的方法中的步骤105的示意图。
图9为本发明的实施例1的制作非对称低中压器件的方法中的步骤106的示意图。
具体实施方式
下面通过实施例的方式进一步说明本发明,但并不因此将本发明限制在所述的实施例范围之中。
实施例1
本实施例提供一种制作非对称低中压器件的方法,其方法流程示意图如图2所示,此方法包括:
步骤100、如图3所示,在非对称低中压器件的基片上形成衬底区以及在非对称低中压器件的基片上制作STI21。
步骤101、如图4所示,在非对称低中压器件的衬底区形成N阱22和P阱23。
步骤102、如图5所示,在N阱22上方的衬底区的上表面制作闸极24,闸极24与P阱23无重合区域。
闸极24与衬底区通过氧化层隔离。
步骤103、如图6所示,从P阱23上方的衬底区的上表面打开窗口,并大角度注入第一掺杂离子以形成第一掺杂区25。
闸极24作为自阻挡层,在沿箭头所示方向大角度的向P阱区区域注入第一掺杂离子形成第一掺杂区,大角度注入是本领域技术术语,本领域技术人员清楚大角度注入所采用的角度的范围。在本实施例中,大角度注入第一掺杂离子为硼离子,硼离子的掺杂浓度为1.8E12/立方厘米~2.2E12/立方厘米,大角度注入的角度范围为27~33度。
步骤104、如图7所示,从P阱上方的衬底区的上表面以小角度注入第二掺杂离子至第一掺杂区内形成第二掺杂区26,第一掺杂区25与第二掺杂区26在横向上的间隔形成沟道LL。
第二掺杂离子为砷离子。砷离子的掺杂浓度为5.5E14/立方厘米~6.1E14/立方厘米;沿箭头所示方向注入的小角度注入的范围为0~10度,注入深度为0.025-0.03微米,第一掺杂区与第二掺杂区在横向上的间隔形成的沟道LL的长度范围为0.05~0.3微米。
本实施例采用Halo注入(晕环注入,一种半导体器件制造工艺)广泛应用于低压(例如,1.8伏)CMOS器件的制作,主要原理是在LDD(轻掺杂漏区)注入中加入相反类型的掺杂以抑制短沟道效应。
步骤105、如图8所示,在衬底区制作N型重掺杂区27。
步骤106、如图9所示,在闸极24和N阱22对应的衬底区的上表面之间形成合金阻挡区29。
在闸极24边缘形成氧化层和金属电极28,在闸极24和N阱22对应的衬底区的上表面之间形成合金阻挡区29。
本实施例的方法形成的沟道,与传统的非对称低中压器件中的沟道相比,沟通长度变短,从而有效地降低导通电阻,并且也没有增加任何的光罩层次,降低了成本,同时还可以维持比较高的击穿电压范围,进而进一步提高Asym-DEMOS的性能。
实施例2
提供一种非对称低中压器件,如图9所示,非对称低中压器件包括衬底区、位于衬底区中的N阱22和P阱23、位于N阱上方的闸极24,闸极与P阱23无重合区域、位于P阱23上方的第一掺杂区25、位于第一掺杂区内的第二掺杂区26,第一掺杂区25与第二掺杂区26在横向上的间隔形成沟道LL。
虽然以上描述了本发明的具体实施方式,但是本领域的技术人员应当理解,这仅是举例说明,本发明的保护范围是由所附权利要求书限定的。本领域的技术人员在不背离本发明的原理和实质的前提下,可以对这些实施方式做出多种变更或修改,但这些变更和修改均落入本发明的保护范围。

Claims (10)

1.一种制作非对称低中压器件的方法,其特征在于,所述方法包括:
在非对称低中压器件的衬底区形成N阱和P阱;
在所述N阱上方的所述衬底区的上表面制作闸极,所述闸极与所述P阱无重合区域;
从所述P阱上方的所述衬底区的上表面打开窗口,并大角度注入第一掺杂离子形成第一掺杂区;
从所述P阱上方的所述衬底区的上表面以小角度注入第二掺杂离子至所述第一掺杂区内形成第二掺杂区,所述第一掺杂区与所述第二掺杂区在横向上的间隔形成沟道。
2.如权利要求1所述的制作非对称低中压器件的方法,其特征在于,所述从所述P阱上方的所述衬底区的上表面以小角度注入第二掺杂离子的步骤之后还包括:
在所述衬底区制作N型重掺杂区。
3.如权利要求2所述的制作非对称低中压器件的方法,其特征在于,在所述衬底区制作N型重掺杂区的步骤之后还包括:
在所述闸极和所述N阱对应的所述衬底区的上表面之间形成合金阻挡区。
4.如权利要求1所述的制作非对称低中压器件的方法,其特征在于,在所述非对称低中压器件的衬底区形成N阱和P阱步骤之前还包括:
在所述非对称低中压器件的基片上形成衬底区以及在所述非对称低中压器件的基片上制作STI。
5.如权利要求1所述的制作非对称低中压器件的方法,其特征在于,所述第一掺杂离子为硼离子,所述硼离子的掺杂浓度为1.8E12/立方厘米~2.2E12/立方厘米。
6.如权利要求1所述的制作非对称低中压器件的方法,其特征在于,在所述大角度注入第一掺杂离子以形成沟道的步骤中,所述大角度注入的角度范围为27~33度。
7.如权利要求1所述的制作非对称低中压器件的方法,其特征在于,所述沟道的长度范围为0.05~0.3微米。
8.如权利要求1所述的制作非对称低中压器件的方法,其特征在于,所述第二掺杂离子为砷离子,所述砷离子的掺杂浓度为5.5E14/立方厘米~6.1E14/立方厘米。
9.如权利要求1所述的制作非对称低中压器件的方法,其特征在于,所述小角度注入的角度范围为0~10度。
10.一种非对称低中压器件,其特征在于,所述非对称低中压器件包括:
衬底区;
位于所述衬底区中的N阱和P阱;
位于所述N阱上方的闸极,所述闸极与所述P阱无重合区域;
位于所述P阱上方第一掺杂区;
位于所述第一掺杂区内的第二掺杂区,所述第一掺杂区与所述第二掺杂区在横向上的间隔形成沟道。
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