CN111613524B - Packaging wafer back grinding structure and grinding method - Google Patents
Packaging wafer back grinding structure and grinding method Download PDFInfo
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- CN111613524B CN111613524B CN202010436259.6A CN202010436259A CN111613524B CN 111613524 B CN111613524 B CN 111613524B CN 202010436259 A CN202010436259 A CN 202010436259A CN 111613524 B CN111613524 B CN 111613524B
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- 238000000227 grinding Methods 0.000 title claims abstract description 37
- 238000000034 method Methods 0.000 title claims abstract description 21
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 17
- 239000003292 glue Substances 0.000 claims abstract description 62
- 239000006059 cover glass Substances 0.000 claims abstract description 36
- 239000002390 adhesive tape Substances 0.000 claims abstract description 12
- 238000005498 polishing Methods 0.000 claims abstract description 10
- 239000013078 crystal Substances 0.000 claims abstract description 9
- 238000010438 heat treatment Methods 0.000 claims abstract description 4
- 239000003795 chemical substances by application Substances 0.000 claims description 14
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 6
- 229910052782 aluminium Inorganic materials 0.000 claims description 6
- 239000003822 epoxy resin Substances 0.000 claims description 6
- 239000011888 foil Substances 0.000 claims description 6
- 229920000647 polyepoxide Polymers 0.000 claims description 6
- 238000002156 mixing Methods 0.000 claims description 2
- 238000012805 post-processing Methods 0.000 claims description 2
- 238000003756 stirring Methods 0.000 claims description 2
- 238000007517 polishing process Methods 0.000 claims 4
- 230000000694 effects Effects 0.000 abstract description 8
- 238000002360 preparation method Methods 0.000 abstract description 6
- 238000012423 maintenance Methods 0.000 abstract description 2
- 238000004458 analytical method Methods 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 3
- 244000137852 Petrea volubilis Species 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000013467 fragmentation Methods 0.000 description 1
- 238000006062 fragmentation reaction Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02013—Grinding, lapping
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/34—Accessories
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N1/00—Sampling; Preparing specimens for investigation
- G01N1/28—Preparing specimens for investigation including physical details of (bio-)chemical methods covered elsewhere, e.g. G01N33/50, C12Q
- G01N1/286—Preparing specimens for investigation including physical details of (bio-)chemical methods covered elsewhere, e.g. G01N33/50, C12Q involving mechanical work, e.g. chopping, disintegrating, compacting, homogenising
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N1/00—Sampling; Preparing specimens for investigation
- G01N1/28—Preparing specimens for investigation including physical details of (bio-)chemical methods covered elsewhere, e.g. G01N33/50, C12Q
- G01N1/36—Embedding or analogous mounting of samples
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N1/00—Sampling; Preparing specimens for investigation
- G01N1/28—Preparing specimens for investigation including physical details of (bio-)chemical methods covered elsewhere, e.g. G01N33/50, C12Q
- G01N1/44—Sample treatment involving radiation, e.g. heat
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2898—Sample preparation, e.g. removing encapsulation, etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02016—Backside treatment
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N1/00—Sampling; Preparing specimens for investigation
- G01N1/28—Preparing specimens for investigation including physical details of (bio-)chemical methods covered elsewhere, e.g. G01N33/50, C12Q
- G01N1/286—Preparing specimens for investigation including physical details of (bio-)chemical methods covered elsewhere, e.g. G01N33/50, C12Q involving mechanical work, e.g. chopping, disintegrating, compacting, homogenising
- G01N2001/2866—Grinding or homogeneising
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N1/00—Sampling; Preparing specimens for investigation
- G01N1/28—Preparing specimens for investigation including physical details of (bio-)chemical methods covered elsewhere, e.g. G01N33/50, C12Q
- G01N1/36—Embedding or analogous mounting of samples
- G01N2001/364—Embedding or analogous mounting of samples using resins, epoxy
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Biochemistry (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- General Health & Medical Sciences (AREA)
- Life Sciences & Earth Sciences (AREA)
- Immunology (AREA)
- Pathology (AREA)
- Health & Medical Sciences (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Analytical Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Mechanical Engineering (AREA)
- General Engineering & Computer Science (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Sampling And Sample Adjustment (AREA)
Abstract
The invention discloses a packaging wafer back grinding structure and a grinding method, wherein the grinding method comprises the following steps: preparing glue; preparing a sample: a piece of cover glass is adhered to an adhesive tape, the prepared glue is dripped on the cover glass, a sample is slowly placed into the glue until the sample is completely immersed in the glue, the sample is lightly pressed to discharge bubbles at the bottom of the sample, the sample is stood and whether bubbles are generated or not is observed, and the prepared sample is obtained after the generated bubbles are burst, placed on a heating table for baking; post-treatment: and after the sample is cooled, removing the adhesive tape, polishing off the redundant cover glass, adjusting to a proper size, and starting to grind the back of the packaging crystal. The invention has the advantages of simple structure, convenient sample preparation, reduced stress on the sample, flatness maintenance during grinding, increased grinding area, high sample preparation success rate, better observation effect and the like.
Description
Technical Field
The present invention relates to semiconductor integrated circuit manufacturing methods, and more particularly, to a package backside polishing structure and a polishing method.
Background
Semiconductor chips often fail during development, mass production, and consumer use. With the rapid development of electronic science and technology, the integration level is continuously improved, the semiconductor chip is more and more complex, and the requirements of people on the quality and the reliability of products are continuously improved. However, the quality and reliability are relevant to failure analysis techniques, and the importance of failure analysis techniques can be seen. Through chip failure analysis, the integrated circuit designer can be helped to find out the design defect, the technological parameter is out of specification or the problem of improper operation.
In general, when performing hot spot positioning, some chips often choose to perform positioning analysis from the back of the die under the condition that the front positioning effect is poor. Since the sample is opened from the front side, the thickness of the chip package is gradually reduced in the wafer back grinding process even if the glue is sealed again, and when the thickness of the chip package cannot bear pressure, the chip is cracked. The sample with smaller size cannot be firmly adhered to the double-sided adhesive tape when being ground, and is easy to drop during grinding, so that the flatness is poor, and the grinding of the back of the crystal is easy to fail. When CSP (CHIP SCALE PACKAGE ) packages samples are ground on the wafer back, the periphery of the chips is uneven, so that the expected observation effect cannot be achieved.
Disclosure of Invention
In order to solve the problems, the invention provides a packaging wafer back grinding structure and a packaging wafer back grinding method, wherein a sample is prepared through AB glue, so that the stress on the sample is reduced, the flatness during grinding is kept, the grinding area is increased, and the packaging wafer back grinding structure has the advantages of high sample preparation success rate, better observation effect and the like.
The invention is realized by the following technical scheme: a method for grinding a back of a package wafer comprises the following steps:
Preparing glue;
preparing a sample: a piece of cover glass is adhered to an adhesive tape, the prepared glue is dripped on the cover glass, a sample is slowly placed into the glue until the sample is completely immersed in the glue, the sample is lightly pressed to discharge bubbles at the bottom of the sample, the sample is stood and whether bubbles are generated or not is observed, and the prepared sample is obtained after the generated bubbles are burst, placed on a heating table for baking;
post-treatment: and after the sample is cooled, removing the adhesive tape, polishing off the redundant cover glass, adjusting to a proper size, and starting to grind the back of the packaging crystal.
In some embodiments, the glue adopts a double-component epoxy resin AB glue, and the glue is prepared by mixing the agent A and the agent B in a weight ratio of 1:10, uniformly stirring, and standing.
In some embodiments, in the step of preparing the sample, the sample rest time is 5 minutes.
In some embodiments, in the step of preparing the sample, the amount of glue dropped onto the coverslip is 3-5 drops.
In some embodiments, in the step of preparing the sample, the sample is placed obliquely to the glue at an angle of 45 ° to the cover slip.
In some embodiments, in the step of preparing the sample, the baking is performed at a temperature of 110 ℃ for a baking time of 30 minutes to 40 minutes.
In some embodiments, in the step of post-processing, excess of the cover slip is sanded, and the cover slip is sized to fit the packaging size of the sample.
A packaged wafer back grinding structure comprising a cover glass, glue dripped on the cover glass, and a sample completely immersed in the glue, wherein the sample has a front surface formed with an integrated circuit and a back surface corresponding to the front surface, and the back surface of the sample is adhered on the cover glass through the glue.
In some embodiments, the glue is a two-component epoxy resin AB glue, and is prepared by adopting an agent A and an agent B in a weight ratio of 1:10.
In some embodiments, the bottom of the cover slip is adhered to an aluminum foil tape.
By adopting the technical scheme, the invention has at least the following beneficial effects:
1. the structure is simple, and the sample preparation is convenient;
2. the glue clamp has strong clamping force, so that the sample is prevented from falling off in the grinding process;
3. The sample is effectively reduced from generating inclination and bubbles;
4. the occurrence of fragmentation and uneven corners of the back of the crystal in the grinding process of the sample is effectively reduced;
5. The sample is imaged clearly and has good observation effect.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a front view of a package backside polishing structure according to an embodiment of the present invention.
Fig. 2 is a top view of the embodiment of fig. 1.
The corresponding relation of the marks in the figure is as follows: 1-glue, 2-sample, 3-cover glass.
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention.
Embodiments of the present invention will be described in further detail below with reference to the drawings and specific examples.
Referring to fig. 1 and 2, an embodiment of the present invention provides an advanced method for polishing a back of a package die, which may be used in a hotspot locating apparatus, and mainly includes the following steps:
(1) Preparing glue 1:
In this embodiment, the glue 1 is a two-component epoxy resin AB glue (hereinafter referred to as "AB glue") (or G1 glue).
Specifically, when the AB glue is prepared, the agent A (main agent) and the agent B (hardening agent) are mixed according to the weight ratio of 1:10, and are stirred uniformly, and the glue is obtained after standing.
(2) Sample 2 was prepared:
first, a piece of cover glass 3 is taken and stuck on an adhesive tape (not shown in the figure), the adhesive tape is preferably a thickened aluminum foil adhesive tape, and glue 1 is arranged on the cover glass 3 in a dripping way, preferably, the quantity of the glue 1 is about 3-5 droppers, so that the sample 2 can be completely wrapped.
Next, sample 2 is slowly put in glue 1 with tweezers in order to reduce bubble generation until sample 2 is completely immersed in glue 1, wherein sample 2 has a front surface formed with an integrated circuit and a back surface corresponding to the front surface, and when sample 1 is put in glue 1, the back surface of sample 1 is directed downward toward the upper surface (side of the non-adhesive tape) of cover glass 3, preferably, when sample 1 is put in glue 1, sample 1 is put obliquely in a state in which an angle of about 45 ° is maintained between sample 1 and the upper surface of cover glass 3, and the putting process is as slow as possible in order to reduce bubble generation. At this time, the glue 1 is not fully cured.
Finally, the sample 2 was gently pressed with tweezers, and air bubbles between the bottom of the sample 2 and the upper surface of the cover glass 3 were discharged as much as possible. After standing for several minutes, observing whether bubbles are generated or not, standing for about 5 minutes, picking up bubbles visible to naked eyes, placing on a heating table for baking, wherein the temperature used for baking is about 110 ℃, the baking time is about 30-40 minutes, and curing the glue 1 to obtain a prepared sample.
(3) Post-treatment:
after the sample is cooled, removing the aluminum foil tape on the lower surface of the cover glass, polishing the redundant cover glass by using sand paper, and adjusting to a proper size. And (5) starting to grind the back of the packaging crystal. Preferably, in the post-treatment, the type of sand paper used in polishing the excess coverslip is P320 and is adjusted to a size that approximates the size of the sample package.
With reference to fig. 1 and 2, the fig. shows a packaged wafer back grinding structure obtained by adopting the packaged wafer back grinding method in the above embodiment, which mainly includes a cover glass 3, glue 1 dropped on the cover glass 3, and a sample 2 completely immersed in the glue 1, wherein the sample 2 has a front surface formed with an integrated circuit and a back surface corresponding to the front surface, the back surface of the sample 2 is adhered to the upper surface of the cover glass 3 through the glue 1, and the front surface and the periphery of the sample 2 are completely wrapped in the glue 1, so that the sample 2 can be protected in the grinding process by wrapping the glue 1, and chipping and uneven corners of the wafer back in the grinding process of the sample can be effectively reduced, so that the sample after wafer back grinding is imaged clearly, and the observation effect is good.
The glue 1 is preferably prepared from a double-component epoxy resin AB glue, the weight ratio of the agent A to the agent B is 1:10, the AB glue clamp has strong clamping force, and the sample is prevented from falling from a cover glass in the grinding process.
Further, the bottom of the cover glass can be adhered to the aluminum foil tape in advance, the cover glass is positioned, then the operations of glue dripping, sample placement, baking and the like are performed on the cover glass, the sample is prepared, the prepared sample is obtained, then the aluminum foil tape can be conveniently removed after the sample is cooled, the subsequent polishing operation on the cover glass is not affected, and the back grinding of the packaged crystal is performed.
The packaging wafer back grinding structure and the grinding method have the advantages of simple structure, convenient sample preparation, reduced stress on the sample, flatness maintenance during grinding, increased grinding area, high sample preparation success rate, better observation effect and the like.
It should be noted that, the structures, proportions, sizes and the like shown in the drawings attached to the present specification are used for understanding and reading only in conjunction with the disclosure of the present specification, and are not intended to limit the applicable limitations of the present invention, so that any structural modification, change of proportion or adjustment of size does not have any technical significance, and all fall within the scope of the disclosure of the present invention without affecting the efficacy and achievement of the present invention. Also, the terms such as "upper," "lower," "left," "right," "middle," and "a" and the like recited in the present specification are merely for descriptive purposes and are not intended to limit the scope of the invention, but are intended to provide relative positional changes or modifications without materially altering the technical context in which the invention may be practiced.
The present invention is not limited to the above-mentioned embodiments, but is not limited to the above-mentioned embodiments, and any simple modification, equivalent changes and modification made to the above-mentioned embodiments according to the technical matters of the present invention can be made by those skilled in the art without departing from the scope of the present invention.
Claims (7)
1. The method for grinding the back of the packaging crystal is characterized by comprising the following steps of:
Preparing glue, namely mixing the agent A and the agent B in a weight ratio of 1:10 by adopting a double-component epoxy resin AB glue, uniformly stirring, and standing to obtain the prepared glue;
Preparing CSP packaging samples: a piece of cover glass is adhered to an adhesive tape, the prepared glue is dripped on the cover glass, a CSP packaging sample is slowly put into the glue, the sample is obliquely put into the glue in a state of forming an included angle of 45 degrees with the cover glass until the sample is completely immersed in the glue, the sample is lightly pressed to discharge bubbles at the bottom of the sample, the sample is stood, whether bubbles are generated or not is observed, and the prepared sample is obtained by baking the sample on a heating table after the generated bubbles are burst;
post-treatment: after the sample is cooled, removing the adhesive tape, polishing off redundant cover slips, adjusting to a proper size, and starting to grind the back of the packaging crystal;
The sample has a front surface on which an integrated circuit is formed and a back surface corresponding to the front surface, and the back surface of the sample is directed downward toward the upper surface of the cover glass when the sample is put into the glue;
the back of the sample is stuck on the upper surface of the cover glass through the glue, and the front and the periphery of the sample are completely wrapped in the glue.
2. The method of polishing a back side of a package as claimed in claim 1, wherein: in the step of preparing the sample, the sample was left standing for 5 minutes.
3. The method of polishing a back side of a package as claimed in claim 1, wherein: in the step of preparing the sample, the cover glass was dripped with glue in an amount of 3-5 drops.
4. The method of polishing a back side of a package as claimed in claim 1, wherein: in the step of preparing the sample, the baking temperature is 110 ℃ and the baking time is 30-40 minutes.
5. The method of polishing a back side of a package as claimed in claim 1, wherein: in the post-processing step, the excess cover glass is sanded and adjusted to a size suitable for the packaging size of the sample.
6. The utility model provides a packaging crystal back grinding structure which characterized in that: the packaged wafer back grinding method according to any one of claims 1-5, wherein the packaged wafer back grinding structure comprises a cover glass, glue dripped on the cover glass, and a CSP (chip scale package) packaged sample completely immersed in the glue, the sample has a front surface on which an integrated circuit is formed and a back surface corresponding to the front surface, and the back surface of the sample is adhered to the cover glass through the glue; the glue is a double-component epoxy resin AB glue, and is prepared by adopting an agent A and an agent B according to a weight ratio of 1:10.
7. The package backside grinding structure of claim 6, wherein: the bottom of the cover glass is stuck on the aluminum foil adhesive tape.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010436259.6A CN111613524B (en) | 2020-05-21 | 2020-05-21 | Packaging wafer back grinding structure and grinding method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010436259.6A CN111613524B (en) | 2020-05-21 | 2020-05-21 | Packaging wafer back grinding structure and grinding method |
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| Publication Number | Publication Date |
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| CN111613524A CN111613524A (en) | 2020-09-01 |
| CN111613524B true CN111613524B (en) | 2024-05-24 |
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112345336B (en) * | 2020-10-12 | 2023-02-03 | 上海华力集成电路制造有限公司 | Method for polishing back of ultra-small sample |
| CN113008643A (en) * | 2021-03-12 | 2021-06-22 | 苏试宜特(深圳)检测技术有限公司 | Method for removing laminated packaging above chip |
| CN114486439B (en) * | 2022-01-27 | 2023-08-29 | 上海季丰电子股份有限公司 | Method for taking crystal grains in back-illuminated CMOS sensor and application |
| CN114252319B (en) * | 2022-03-01 | 2022-12-09 | 江山季丰电子科技有限公司 | Fault analysis method of semiconductor laser, preparation method of sample and system |
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| CN111613524A (en) | 2020-09-01 |
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