CN111585244B

CN111585244B - Leakage protection circuit, integrated circuit, electronic device, and method

Info

Publication number: CN111585244B
Application number: CN202010457524.9A
Authority: CN
Inventors: 陈敏
Original assignee: Chipsea Technologies Shenzhen Co Ltd
Current assignee: Chipsea Technologies Shenzhen Co Ltd
Priority date: 2020-05-26
Filing date: 2020-05-26
Publication date: 2022-09-16
Anticipated expiration: 2040-05-26
Also published as: CN115360667A; CN115441399A; CN111585244A

Abstract

The embodiment of the application provides an electric leakage protection circuit, an integrated circuit, electronic equipment and a method, wherein the electric leakage protection circuit comprises an electric leakage detection circuit, a compensation trigger circuit and an electric leakage compensation circuit, the electric leakage detection circuit comprises a detection capacitor and is used for connecting a circuit to be detected and charging the detection capacitor by using the electric leakage current of the circuit to be detected; the compensation trigger circuit is connected with the leakage detection circuit and used for detecting the magnitude of leakage current during the charging period of the detection capacitor and outputting a trigger signal when the leakage current is greater than or equal to a preset threshold value; the leakage compensation circuit is connected to the compensation trigger circuit and used for providing compensation current corresponding to the leakage current for the circuit to be tested according to the trigger signal. The leakage protection circuit provided by the embodiment can effectively eliminate the influence of system leakage and improve the detection range and the accuracy of signals.

Description

Leakage protection circuit, integrated circuit, electronic device, and method

Technical Field

The present application relates to the field of electronic circuit technology, and in particular, to a leakage protection circuit, an integrated circuit, an electronic device, and a method.

Background

The Internet of Things (IoT) is a highly integrated and comprehensive application of a new generation of information technology. The architecture of the Internet of things is divided into a sensing layer, a network layer and an application layer. The sensing layer of the Internet of things is composed of a sensor and a gateway, information is obtained through the sensor, and a control instruction is obtained through the gateway.

The sensor is used as the most basic link in the internet of things, and can condition (for example, acquisition, amplification, offset compensation, temperature compensation, linear compensation and the like) various weak signals (for example, pressure signals, gas signals and the like). However, in the process of processing the small signal, any leakage of the system affects the quality of the small signal processing, thereby causing signal distortion. Therefore, how to perform leakage protection on the system is important.

Disclosure of Invention

In view of the above problems, embodiments of the present application provide a leakage protection circuit, an integrated circuit, an electronic device, and a method to solve the above technical problems.

The embodiment of the application is realized by adopting the following technical scheme:

a leakage protection circuit comprises a leakage detection circuit, a compensation trigger circuit and a leakage compensation circuit, wherein the leakage detection circuit comprises a detection capacitor and is used for connecting a circuit to be detected and charging the detection capacitor by using the leakage current of the circuit to be detected; the compensation trigger circuit is connected with the leakage detection circuit and is used for detecting the magnitude of leakage current during the charging period of the detection capacitor and outputting a trigger signal when the leakage current is greater than or equal to a preset threshold value; the leakage compensation circuit is connected to the compensation trigger circuit and used for providing compensation current corresponding to the leakage current for the circuit to be tested according to the trigger signal.

In some embodiments, a compensation trigger circuit includes a comparison circuit, a clock control circuit, and a counter; the comparison circuit is connected with the electric leakage detection circuit, preset with reference voltage and used for outputting a comparison signal according to the voltage of the detection capacitor and the reference voltage; the clock control circuit is connected with the comparison circuit and the electric leakage detection circuit and used for outputting a clock signal according to the comparison signal and controlling the electric leakage detection circuit to charge or discharge the detection capacitor through the clock signal; the counter is connected with the clock control circuit and used for detecting the magnitude of the leakage current during the charging period of the detection capacitor according to the clock signal and outputting a trigger signal when the leakage current is larger than or equal to a preset threshold value.

In some embodiments, the clock signal comprises a first level signal and a second level signal, and the leakage current comprises a first leakage current of the circuit to be tested leaking to the ground and a second leakage current between the circuit to be tested and the power supply; the clock control circuit is used for outputting a first level signal according to the comparison signal and outputting a second level signal after delaying for a preset time, and the electric leakage detection circuit is used for controlling the detection capacitor to discharge within the preset time according to the first level signal and charging the detection capacitor by using a first electric leakage current according to the second level signal; or the clock control circuit is used for outputting a second level signal according to the comparison signal and outputting a first level signal after delaying for a preset time, and the leakage detection circuit is used for controlling the detection capacitor to discharge within the preset time according to the second level signal and charging the detection capacitor by using a second leakage current according to the first level signal.

In some embodiments, the counter is further configured to count according to a preset reference clock when the leakage detection circuit charges the detection capacitor with the first leakage current according to the second level signal, so as to detect a magnitude of the first leakage current; or, the counter is further configured to count according to a preset reference clock when the leakage detection circuit charges the detection capacitor with the second leakage current according to the first level signal, so as to detect a magnitude of the second leakage current.

In some embodiments, the clock control circuit includes a D flip-flop connected to the comparison circuit and an RS flip-flop connected to the D flip-flop.

In some embodiments, the leakage compensation circuit includes a compensation control circuit connected to the compensation trigger circuit and a current source unit connected to the compensation control circuit, and the compensation control circuit is configured to determine a magnitude of the leakage current according to the trigger signal and provide a compensation current corresponding to the magnitude of the leakage current to the circuit to be tested through the current source unit.

In some embodiments, the current source unit is a current source array, and the compensation control current is used for selecting a current source corresponding to the magnitude of the leakage current in the current source array according to the magnitude of the leakage current to provide the compensation current.

In some embodiments, the leakage detection circuit includes a first leakage detection circuit and a second leakage detection circuit, and the detection capacitor includes a first detection capacitor and a second detection capacitor; the first leakage detection circuit is used for connecting a circuit to be detected and charging the first detection capacitor by using first leakage current when the circuit to be detected leaks electricity to the ground; the second leakage detection circuit is used for connecting the circuit to be detected and charging the second detection capacitor by using second leakage current between the circuit to be detected and the power supply.

In some embodiments, the first leakage detection circuit includes a first switch, a second switch, and a first detection capacitor; one end of the first detection capacitor is connected with the power supply, and the other end of the first detection capacitor is connected with the first switch; the second switch is connected in parallel with two ends of the first detection capacitor; the connection node of the first detection capacitor and the first switch is connected with the compensation trigger circuit; the second leakage detection circuit comprises a third switch, a fourth switch and a second detection capacitor; one end of the second detection capacitor is grounded, the other end of the second detection capacitor is connected to the third switch, and the other end of the third switch is connected to the other end of the first switch; the fourth switch is connected in parallel with two ends of the second detection capacitor; the connection node of the second detection capacitor and the third switch is connected with the compensation trigger circuit; the connection node of the first switch and the third switch is used for connecting a circuit to be tested; the first switch, the second switch, the third switch and the fourth switch are controlled by a clock signal.

In some embodiments, the comparison circuit includes a first comparator and a second comparator, the reference voltage includes a first reference voltage and a second reference voltage; a first reference voltage is preset at a first input end of the first comparator, a second input end of the first comparator is connected to a connecting node of the first detection capacitor and the first switch, and an output end of the first comparator is connected to the clock control circuit; the first input end of the second comparator is connected with the connecting node of the second detection capacitor and the third switch, the second input end is preset with a second reference voltage, and the output end is connected with the clock control circuit.

In some embodiments, the compensation trigger circuit further comprises a gating circuit connected between the comparison circuit and the clock control circuit and configured to select one of the first comparator and the second comparator to be connected to the clock control circuit.

In some embodiments, the current source unit includes a first current source unit and a second current source unit, the compensation control circuit is configured to determine a magnitude of a leakage current when the circuit to be tested leaks electricity to the ground according to the trigger signal, and provide a compensation current corresponding to the magnitude of the leakage current for the circuit to be tested through the first current source unit; the compensation control circuit is also used for determining the magnitude of leakage current between the circuit to be tested and the power supply according to the trigger signal and providing compensation current corresponding to the leakage current for the circuit to be tested through the second current source unit.

An embodiment of the present application further provides an integrated circuit including the leakage protection circuit described above.

The embodiment of the application also provides electronic equipment which comprises an equipment main body and the integrated circuit arranged in the equipment main body.

The embodiment of the application also provides a leakage protection method which is applied to any one of the leakage protection circuits, and the method comprises the steps of charging a detection capacitor by using the leakage current of the circuit to be detected; detecting the magnitude of leakage current during the charging period of the detection capacitor, and outputting a trigger signal when the leakage current is greater than or equal to a preset threshold value; and providing compensation current corresponding to the leakage current for the circuit to be tested according to the trigger signal.

In the leakage protection circuit, the integrated circuit, the electronic device and the method provided by the embodiment of the application, the leakage protection circuit is provided with a leakage detection circuit, a compensation trigger circuit and a leakage compensation circuit, and the leakage detection circuit comprises a detection capacitor; charging the detection capacitor by using the leakage current of the circuit to be detected through the leakage detection circuit; detecting the magnitude of leakage current during the charging period of the detection capacitor through a compensation trigger circuit, and outputting a trigger signal when the leakage current is greater than or equal to a preset threshold value; and finally, providing a compensation current corresponding to the leakage current for the circuit to be detected through the leakage compensation circuit according to the trigger signal, thereby effectively eliminating the influence of system leakage and improving the detection range and precision of the signal.

These and other aspects of the present application will be more readily apparent from the following description of the embodiments.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

Fig. 1 shows a block diagram of a leakage protection circuit provided in an embodiment of the present application.

Fig. 2 shows another block diagram of the leakage protection circuit provided in the embodiment of the present application.

Fig. 3 shows another block diagram of the leakage protection circuit provided in the embodiment of the present application.

Fig. 4 shows a schematic circuit structure diagram of a leakage protection circuit provided in an embodiment of the present application.

Fig. 5 shows a schematic structural diagram of a reference voltage generating circuit provided in an embodiment of the present application.

Fig. 6 shows a schematic circuit diagram of the negative leakage protection provided in the embodiment of the present application.

Fig. 7 shows a schematic circuit diagram of the forward leakage protection provided by the embodiment of the present application.

Fig. 8 shows a schematic flowchart of a leakage protection method according to an embodiment of the present application.

Detailed Description

Reference will now be made in detail to embodiments of the present application, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present application.

In order to make those skilled in the art better understand the technical solutions of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

As shown in fig. 1, fig. 1 schematically shows a block diagram of an electrical leakage protection circuit 100 provided in an embodiment of the present application, where the electrical leakage protection circuit 100 may be connected to a circuit to be tested 10 and perform electrical leakage protection on the circuit to be tested 10. In measurement applications, the circuit under test 10 may be a sensor, which may be a pressure sensor, a temperature sensor, a humidity sensor, or the like. Taking a pressure sensor as an example, the leakage protection circuit 100 can perform leakage protection on a pressure detection system formed by a wheatstone bridge in the pressure sensor. Of course, the embodiments of the present application may also be applied to other fields, and the circuit to be tested 10 may also be any other circuit having a risk of leakage.

The leakage protection circuit 100 includes a leakage detection circuit 110, a compensation trigger circuit 120, and a leakage compensation circuit 130. The leakage detection circuit 110 includes a detection capacitor, and the leakage detection circuit 110 is configured to connect to the circuit to be detected 10 and charge the detection capacitor with a leakage current of the circuit to be detected 10; the compensation trigger circuit 120 is connected to the leakage detection circuit 110, and is configured to detect a magnitude of a leakage current during the detection of the capacitor charging period, and output a trigger signal when the leakage current is greater than or equal to a preset threshold; the leakage compensation circuit 130 is connected to the compensation trigger circuit 120, and is configured to provide a compensation current corresponding to the leakage current for the circuit to be tested 10 according to the trigger signal.

When the circuit 10 to be detected leaks electricity, the detection capacitor is charged by using the leakage current, and in the charging time window of the detection capacitor, the magnitude of the leakage current can be detected because the charging current of the detection capacitor is related to the leakage current. When the leakage current is greater than or equal to the preset threshold, it indicates that the leakage of the circuit to be tested 10 exceeds the given leakage threshold, which may affect the detection of the signal. At this time, the compensation current is provided to the circuit to be detected 10, the compensation current is a current opposite to the direction of the leakage current, the compensation current can completely compensate the leakage current, and can also partially compensate the leakage current to reduce the leakage current to a given threshold value, so that the influence of the leakage current on signal detection is eliminated, and the precision of the signal detection is improved.

The leakage protection circuit provided by the embodiment of the application is provided with a leakage detection circuit, a compensation trigger circuit and a leakage compensation circuit, wherein the leakage detection circuit comprises a detection capacitor; charging the detection capacitor by using the leakage current of the circuit to be detected through the leakage detection circuit; detecting the magnitude of leakage current during the charging period of the detection capacitor through a compensation trigger circuit, and outputting a trigger signal when the leakage current is greater than or equal to a preset threshold value; and finally, providing a compensation current corresponding to the leakage current for the circuit to be detected through the leakage compensation circuit according to the trigger signal, thereby effectively eliminating the influence of system leakage and improving the detection range and precision of the signal.

As shown in fig. 2, the embodiment of the present application further provides a leakage protection circuit 200, where the leakage protection circuit 200 has a leakage detection circuit 210, a compensation trigger circuit 220 and a leakage compensation circuit 230 that are the same as the leakage protection circuit 100, and on this basis, the compensation trigger circuit 220 includes a comparison circuit 221, a clock control circuit 222 and a counter 223.

The comparison circuit 221 is connected to the leakage detection circuit 210, preset with a reference voltage, and configured to output a comparison signal according to the voltage of the detection capacitor and the reference voltage; the clock control circuit 222 is connected to the comparison circuit 221 and the leakage detection circuit 210, and configured to output a clock signal according to the comparison signal, and control the leakage detection circuit 210 to charge or discharge the detection capacitor through the clock signal; the counter 223 is connected to the clock control circuit 222, and is configured to detect a magnitude of the leakage current during the charging period of the detection capacitor according to the clock signal, and output a trigger signal when the leakage current is greater than or equal to a preset threshold.

In this embodiment, the leakage current includes at least one of a first leakage current of the circuit to be tested 10 leaking to the ground and a second leakage current between the circuit to be tested 10 and the power supply. The clock signal includes a first level signal and a second level signal. The clock control circuit 222 is further configured to output a first level signal according to the comparison signal, delay a preset time and then output a second level signal, and the leakage detection circuit 210 is configured to control the detection capacitor to discharge within the preset time according to the first level signal and charge the detection capacitor with a first leakage current according to the second level signal; or, the clock control circuit 222 is configured to output a second level signal according to the comparison signal, delay a preset time, and output a first level signal, and the leakage detection circuit 210 is configured to control the detection capacitor to discharge within the preset time according to the second level signal, and charge the detection capacitor with a second leakage current according to the first level signal.

Specifically, the comparison circuit 221 in this embodiment is connected to the clock control circuit 222 to form an oscillation circuit, so that the clock control circuit 222 alternately outputs a first level signal and a second level signal at a certain frequency, thereby controlling the detection capacitor to alternately discharge and charge at a certain frequency. When the circuit to be tested 10 generates a leakage current and the leakage current is the first leakage current, the second level signal may control the leakage detecting circuit 210 to charge the detection capacitor with the first leakage current in a time period when the clock control circuit 222 outputs the second level signal. When the voltage charged to the two ends of the detection capacitor can change the output of the comparison circuit 221, the comparison circuit 221 outputs a comparison signal to the clock control circuit 222, and after receiving the comparison signal, the clock control circuit 222 outputs a first level signal to the leakage detection circuit 210 to control the leakage detection circuit 210 to discharge the detection capacitor, that is, the detection capacitor is not charged by the first leakage current. Meanwhile, the clock control circuit 222 starts to delay, which is the discharge time of the detection capacitor, and after the delay for a preset time, the clock control circuit 222 outputs the second level signal to the leakage detection circuit 210 again, so that the leakage detection circuit 210 performs a new round of detection on the first leakage current. In this embodiment, the clock control circuit 222 may include a D flip-flop and an RS flip-flop. Through the process, the continuous detection of the first leakage current of the circuit to be detected for the ground leakage can be realized, and the quick response can be further carried out on the leakage of the circuit to be detected 10.

When the circuit to be tested 10 generates a leakage current and the leakage current is the second leakage current, the first level signal may control the leakage detecting circuit 210 to charge the detection capacitor with the second leakage current in a time period when the clock control circuit 222 outputs the first level signal. When the voltage charged to the two ends of the detection capacitor can change the output of the comparison circuit 221, the comparison circuit 221 outputs a comparison signal to the clock control circuit 222, and after receiving the comparison signal, the clock control circuit 222 outputs a second level signal to the leakage detection circuit 210 to control the leakage detection circuit 210 to discharge the detection capacitor, that is, the detection capacitor is not charged by the second leakage current. Meanwhile, the clock control circuit 222 starts to delay, which is the discharge time of the detection capacitor, and after the delay for a preset time, the clock control circuit 222 outputs the first level signal to the leakage detection circuit 210 again, so that the leakage detection circuit 210 performs a new round of detection on the second leakage current. In this embodiment, the clock control circuit 222 may include a D flip-flop and an RS flip-flop. Through the process, the continuous detection of the second leakage current of the circuit to be detected for the power leakage can be realized, and the quick response can be further carried out on the leakage of the circuit to be detected 10.

Alternatively, the first leakage current and the second leakage current may be alternately detected by a leakage detecting circuit 210 and a comparing circuit 221 in a time-sharing manner; the detection of the first leakage current and the second leakage current may be performed by the two leakage detection circuits 210 and the two comparison circuits 221, respectively.

Furthermore, the counter is also used for counting according to a preset reference clock when the leakage detection circuit charges the detection capacitor by using the first leakage current according to the second level signal so as to detect the magnitude of the first leakage current; or, the counter is further configured to count according to a preset reference clock when the leakage detection circuit charges the detection capacitor with the second leakage current according to the first level signal, so as to detect a magnitude of the second leakage current.

During the charging of the detection capacitor, the counter 223 starts counting. In this embodiment, when the leakage current is the first leakage current, the counter 223 counts by using the high frequency reference clock within the pulse width window of the second level signal to detect the magnitude of the first leakage current. Wherein the high frequency reference clock is the input clock of the counter 223. The pulse width window of the second level signal is also the high level time window of the second level signal, and the detection capacitor is charged in the high level time window. In the charging time window of the detection capacitor, if the high-frequency count is less than or equal to the given count threshold, that is, it indicates that the first leakage current is greater than or equal to the preset threshold, and the leakage of the circuit to be detected 10 to the ground exceeds the given range, at this time, the counter 223 outputs a trigger signal to the leakage compensation circuit 230 to trigger the leakage compensation circuit 230 to compensate the first leakage current.

When the leakage current is the second leakage current, the counter 223 counts by using the high frequency reference clock within the pulse width window of the first level signal to detect the magnitude of the second leakage current. Wherein the high frequency reference clock is the input clock of the counter 223. The pulse width window of the first level signal is also the high level time window of the first level signal, and in the high level time window, the detection capacitor is charging. In the charging time window of the detection capacitor, if the high-frequency count is less than or equal to the given count threshold, that is, it indicates that the second leakage current is greater than or equal to the preset threshold, the leakage of the circuit to be detected 10 to the power supply exceeds the given range, at this time, the counter 223 outputs a trigger signal to the leakage compensation circuit 230 to trigger the leakage compensation circuit 230 to compensate the second leakage current.

It should be noted that the lower the high frequency count of the counter 223, i.e., the shorter the time required to detect the charging of the capacitor to the reference voltage, the greater the leakage current. Through the above process of the counter 223, the magnitudes of the first leakage current and the second leakage current can be accurately detected, and leakage compensation is triggered accordingly.

Further, the leakage compensation circuit 230 provided by the present embodiment includes a compensation control circuit 231 connected to the compensation trigger circuit 220 and a current source unit 232 connected to the compensation control circuit 231, and the current source unit 232 is further connected to the circuit under test 10. The compensation control circuit 231 is configured to determine a magnitude of the leakage current according to the trigger signal, and provide a compensation current corresponding to the magnitude of the leakage current for the circuit to be tested 10 through the current source unit 232. When the compensation control circuit 231 receives the trigger signal output by the counter 223, the compensation control circuit 231 may determine the magnitude of the leakage current, and then control the current source unit 232 to generate a reverse current opposite to the direction of the leakage current, and input the reverse current to the circuit under test 10 to counteract the influence of the leakage current. In this embodiment, the magnitude of the reverse current may be equal to the magnitude of the leakage current, so as to completely offset the leakage current and eliminate the influence of the leakage current. In some embodiments, the magnitude of the reverse current may be greater than a difference between the leakage current and a predetermined threshold, so as to partially cancel the leakage current, and reduce the influence of the leakage current to within a given threshold.

In this embodiment, the current source unit 232 may be a current source array. The compensation control circuit 231 is configured to select a current source corresponding to the magnitude of the leakage current in the current source array according to the magnitude of the leakage current, so as to provide the compensation current. Through the current source array, the current corresponding to the magnitude of the leakage current can be matched, and then the leakage current can be dynamically compensated.

Further, when the circuit to be tested 10 leaks to the ground, the leakage is negative leakage, that is, the first leakage current flows to the ground, and the first leakage current is negative leakage current; when the circuit to be tested 10 leaks to the power supply, the current is positive leakage, that is, a second leakage current leaks from the power supply, and the second leakage current is positive leakage current. As shown in fig. 3 and 4, in the present embodiment, the leakage detecting circuit 210 includes a first leakage detecting circuit 211 and a second leakage detecting circuit 212, the first leakage detecting circuit 211 includes a first detecting capacitor C1, and the second leakage detecting circuit 212 includes a second detecting capacitor C2. The first leakage detection circuit 211 is configured to be connected to the circuit to be detected 10, and charge the first detection capacitor C1 with a leakage current when the circuit to be detected 10 leaks to the ground, that is, the first leakage detection circuit 211 is configured to detect a negative leakage current. The second leakage detecting circuit 212 is configured to connect the circuit to be tested 10, and charge the second detecting capacitor C2 with a leakage current between the circuit to be tested 10 and a power supply, that is, the second leakage detecting circuit 212 is configured to detect a forward leakage current. Through the detection of the positive and negative bidirectional electric leakage by the electric leakage detection circuit 210, the electric leakage protection circuit 200 can compensate the positive and negative bidirectional electric leakage, and further eliminate the influence of the positive and negative bidirectional electric leakage on signal detection.

Specifically, as shown in fig. 3 and 4, the first leakage detecting circuit 211 includes a first switch S1, a second switch S2, and a first detecting capacitor C1; one end of the first detection capacitor C1 is connected to the power supply VDD, and the other end is connected to the first switch S1; the second switch S2 is connected in parallel across the first detection capacitor C1; the connection node of the first detection capacitor C1 and the first switch S1 is connected with the compensation trigger circuit; the second leakage detecting circuit 212 includes a third switch S3, a fourth switch S4, and a second detecting capacitor C2; one end of the second detection capacitor C2 is grounded, the other end is connected to one end of the third switch S3, and the other end of the third switch S3 is connected to the other end of the first switch S1; the fourth switch S4 is connected in parallel across the second detection capacitor C2; the connection node of the second detection capacitor C2 and the third switch S3 is connected with the compensation trigger circuit; the connection node of the first switch S1 and the third switch S3 is used for connecting the circuit to be tested 10; the first switch S1, the second switch S2, the third switch S3, and the fourth switch S4 are controlled by a clock signal.

The comparison circuit 221 includes a first comparator CMP1 and a second comparator CMP 2. The reference voltages include a first reference voltage Vpos and a second reference voltage Vneg, and the first reference voltage Vpos and the second reference voltage Vneg have the same magnitude. A first input terminal of the first comparator CMP1 is used for receiving the first reference voltage Vpos, a second input terminal is connected to a connection node of the first detection capacitor C1 and the first switch S1, and an output terminal is connected to the clock control circuit 222; the second comparator CMP2 has a first input terminal connected to the connection node of the second detection capacitor C2 and the third switch S3, a second input terminal for receiving the second reference voltage Vneg, and an output terminal connected to the clock control circuit 222. In this embodiment, the first input terminal of the first comparator CMP1 is a non-inverting input terminal, and the second input terminal is an inverting input terminal; the first input terminal of the second comparator CMP2 is a non-inverting input terminal and the second input terminal is an inverting input terminal.

The first reference voltage Vpos and the second reference voltage Vneg may be generated by an external reference voltage generating circuit. As shown in fig. 5, the reference voltage generating circuit may include a first MOS transistor Q1, a second MOS transistor Q2, a third MOS transistor Q3, a fourth MOS transistor Q4, a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4. Taking the first MOS transistor Q1 and the third MOS transistor Q3 as N-MOS transistors, and the second MOS transistor Q2 and the fourth MOS transistor Q4 as P-MOS transistors as an example, the drain of the first MOS transistor Q1 is connected to the power supply VDD through a first resistor R1, the source is connected to the source of the second MOS transistor Q2, and the gate is connected to the gate of the third MOS transistor Q3; the drain electrode of the first MOS transistor Q1 is connected with the grid electrode; the drain electrode of the second MOS transistor Q2 is grounded through a second resistor R2, and the gate electrode of the second MOS transistor Q2 is connected with the gate electrode of the fourth MOS transistor Q4; the drain electrode of the second MOS tube Q2 is connected with the grid electrode; the drain electrode of the third MOS transistor Q3 is connected with a power supply VDD through a third resistor R3, and the source electrode of the third MOS transistor Q3 is connected with the source electrode of the fourth MOS transistor Q4; the drain of the fourth MOS transistor Q4 is connected to ground through a fourth resistor R4. A connection node of the third MOS transistor Q3 and the third resistor R3 is connected to a first input terminal of the first comparator CMP1 to supply the first reference voltage Vpos to the first comparator CMP 1; a connection node of the fourth MOS transistor Q4 and the fourth resistor R4 is connected to a second input terminal of the second comparator CMP2 to supply the second reference voltage Vneg to the second comparator CMP 2. The current Ithreshold is a threshold current, the first reference voltage Vpos is (VDD-Ithreshold R), the second reference voltage Vneg is (Ithreshold R), and the resistances of the first resistor R1 to the fourth resistor R4 are all R.

As shown in fig. 4, in the present embodiment, the leakage protection circuit further includes a gating circuit 240. The gating circuit 240 is connected between the comparing circuit 221 and the clock control circuit 222, and is used to select one of the first comparator CMP1 and the second comparator CMP2 to be connected to the clock control circuit 222. The gate circuit 240 includes a switch Smux1, a switch Smux2, a switch Smux3, a switch Smux4, a switch Smux5, and a switch Smux 6. The clock control circuit 222 includes a D flip-flop and an RS flip-flop. A switch Smux1 and a switch Smux2 which are connected in series with each other are connected between the output terminal of the first comparator CMP1 and the output terminal of the second comparator CMP 2. The input end D of the D flip-flop is connected to the connection node of the switch Smux1 and the switch Smux 2. The output Q0 of the D flip-flop and a preset RST signal are connected to the reset R0 of the D flip-flop through an or gate, and the RST signal is a circuit initial reset signal. A switch Smux3 and a switch Smux4 which are connected in series with each other are connected between the output end of the first comparator CMP1 and the output end Q0 of the D flip-flop; a switch Smux5 and a switch Smux6 which are connected in series with each other are connected between the output terminal of the second comparator CMP2 and the output terminal Q0 of the D flip-flop. The set end S of the RS trigger is connected to the connection node of the switch Smux3 and the switch Smux 4; the reset terminal R1 of the RS flip-flop is connected to the connection node of the switch Smux5 and the switch Smux 6.

As shown in fig. 3 and 4, the counter 223 includes a first counter and a second counter. The RS flip-flop includes a first output Q1 and a second output QB, wherein the first output Q1 and the second output QB are two complementary outputs, that is, when the first output Q1 outputs a high level, the second output QB outputs a low level; when the first output terminal Q1 outputs a low level, the second output terminal QB outputs a high level. The enable terminal EN1 of the first counter is connected to the first output terminal Q of the RS flip-flop, and the enable terminal EN2 of the second counter is connected to the second output terminal QB of the RS flip-flop. The clock input end CLK1 of the first counter and the clock input end CLK2 of the second counter are both connected with the high-frequency reference clock, and the output ends of the first counter and the second counter are both connected with the leakage compensation circuit 230.

The leakage compensation circuit 230 includes a compensation control circuit 231 and a current source unit 232. The Compensation control circuit 231 is an Auto-Current Compensation (Auto-Current Compensation) circuit, and the Current source unit 232 is a Current source array. The input terminal of the compensation control circuit 231 is connected to the output terminals of the first counter and the second counter, and the output terminal of the compensation control circuit 231 is connected to the current source array. The current source array comprises a positive current source array and a negative current source array connected with the positive current source array. One end of each forward current source in the forward current source array is connected to the circuit to be tested 10, and the other end is connected to a power supply VDD through a switch; one end of each positive current source in the negative current source array is connected to the circuit to be tested 10, and the other end is grounded through the switch.

The principle of the leakage protection circuit provided in this embodiment will be described below with reference to fig. 6 to 7.

The switch Smux1, the switch Smux2, the switch Smux3, the switch Smux4, the switch Smux5, and the switch Smux6 may be controlled by external timing. By controlling the timing of the switches, switching between positive and negative leakage protection is possible.

As shown in fig. 6, when the switch Smux1, the switch Smux3 and the switch Smux5 are closed and the switch Smux2, the switch Smux4 and the switch Smux6 are opened, the leakage detection system performs negative leakage protection, and the current Ileakage is a negative leakage current flowing from the circuit to be tested 10 to the ground. At this time, the output terminal of the first comparator CMP1 is connected to the input terminal D of the D flip-flop and the set terminal S of the RS flip-flop. The reset terminal R0 of the D flip-flop is connected with the output terminal Q0 of the D flip-flop, and the reset terminal R1 of the RS flip-flop is connected between the output terminal Q0 of the D flip-flop and the reset terminal R0 of the D flip-flop. The clock input CLK0 of the D flip-flop is clocked with a high frequency reference clock. The first output end Q1 of the RS flip-flop outputs a first clock signal CK1 to the leakage detection circuit 210 to control the on/off of the second switch S2 and the third switch S3; the second output terminal QB of the RS flip-flop outputs the second clock signal CK2 to the leakage detecting circuit 210 to control the on/off of the first switch S1 and the fourth switch S4. And the first output terminal Q1 of the RS flip-flop outputs the first clock signal CK1 to the first counter; the second output terminal QB of the RS flip-flop outputs the second clock signal CK2 to the second counter. In this embodiment, the first level signal is the first clock signal CK1 being equal to 1 and the second clock signal CK2 being equal to 0, that is, the first clock signal is a high level signal and the second clock signal is a low level signal; the second level signal is the first clock signal CK1 being equal to 0 and the second clock signal CK2 being equal to 1, that is, the first clock signal is a low level signal and the second clock signal is a high level signal. It is noted that the first clock signal and the second clock signal are a set of non-overlapping clock signals.

When the RS flip-flop outputs the second level signal, that is, the first clock signal CK1 is equal to 0, and the second clock signal CK2 is equal to 1, the first switch S1 and the fourth switch S4 are respectively controlled by the second clock signal CK2 to be turned on, and the second switch S2 and the third switch S3 are respectively controlled by the first clock signal CK1 to be turned off. The first switch S1, which is now leaky and conductive for the power supply VDD, provides a charging loop for the detection capacitor C1, the detection capacitor C1 starts to charge, and the charging current is the leakage current Ileakage. In the process of charging the sensing capacitor C1, the node voltage Va, which is an input voltage of the inverting input terminal of the first comparator CMP1, decreases from the power supply voltage, and when the sensing capacitor C1 is charged until the node voltage Va is less than the first reference voltage Vpos, the first comparator CMP1 outputs a high level signal. When the output of the first comparator CMP1 changes from a low level signal to a high level signal, the high level signal is input to the set terminal S of the RS flip-flop, so that the first clock signal CK1 output from the first output terminal Q1 of the RS flip-flop is inverted from 0 to 1, and the second clock signal CK2 output from the second output terminal QB of the RS flip-flop is inverted from 1 to 0. Meanwhile, when the output of the first comparator CMP1 changes from a low level signal to a high level signal, and after the high frequency reference clock edge of the D flip-flop is triggered, the output Q0 of the D flip-flop outputs the high level signal, and the high level signal output by the D flip-flop and the RST signal are or-operated, the D flip-flop is reset, so that the output Q0 of the D flip-flop is changed to the low level signal.

At this time, the RS flip-flop outputs the first level signal, that is, the first clock signal CK1 is equal to 1, and the second clock signal CK2 is equal to 0, so that the first switch S1 is turned off, the second switch S2 is turned on, the third switch S3 is turned on, and the fourth switch S4 is turned off. The sensing capacitor C1 starts discharging through the turned-on second switch S2, so that the node voltage Va gradually increases to the power supply voltage. Meanwhile, the D flip-flop starts to delay, and after the delay for the preset time Tdelay, the D flip-flop outputs a high pulse signal to the reset terminal R1 of the RS flip-flop, so that the RS flip-flop is reset, and further, the first clock signal is inverted to CK1 ═ 0, the second clock signal is inverted to CK2 ═ 1, and the detection capacitor starts to perform a new round of charging. In this process, the discharging time of the detection capacitor C1 is also the preset time Tdelay, the charging time is (Ithreshold R × C1/Ileakage), and the low-frequency oscillation period T is (Tdelay + Ithreshold R × C1/Ileakage).

During the charging process of the detection capacitor C1, the enable terminal EN2 of the second counter becomes high level due to the first clock signal CK1 being equal to 0 and the second clock signal CK2 being equal to 1, and the second counter starts to operate. In the input clock high-frequency reference clock of the second counter, in a charging time window (Ithreshold R C1/Ileakage) of the detection capacitor C1, since the charging current of the detection capacitor C1 is the leakage current Ileakage, the high-frequency counting result of the second counter can directly reflect the magnitude of the leakage current Ileakage. Further, if the high frequency count is less than a given count threshold Nthreshold, i.e. Ithreshold R C1/Ileakage Fclk < Nthreshold, it can be deduced that Ileakage > Ithreshold R C1/(Fclk ntreshold), i.e. the leakage current Ileakage exceeds a preset leakage threshold, and Ithreshold R C1/(Fclk ntreshold), i.e. a preset leakage threshold.

When the leakage current Ileakage exceeds the preset leakage threshold, the compensation control circuit 231 selects the forward current corresponding to the leakage current Ileakage by controlling the switch in the forward current source array and inputs the forward current to the circuit to be tested 10, so as to dynamically compensate the circuit to be tested 10. Alternatively, the output current of each current source in the forward current source array may be the same or different, and the compensation control circuit 231 may select to connect a current source with an appropriate output current to the circuit to be tested to compensate for the leakage current Ileakage, or may select to simultaneously connect a plurality of current sources to the circuit to be tested 10 to superimpose sufficient output currents to compensate for the leakage current Ileakage. In other words, compensation can be performed by switching the switched-in current sources, and compensation can also be performed by controlling the number of switched-in current sources.

As shown in fig. 7, when the switch Smux2, the switch Smux4 and the switch Smux6 are closed and the switch Smux1, the switch Smux3 and the switch Smux5 are opened, the leakage detection system performs forward leakage protection, and the current Ileakage is a forward leakage current flowing from the power supply VDD to the circuit under test 10. At this time, the output terminal of the second comparator CMP2 is connected to the input terminal D of the D flip-flop and the reset terminal R1 of the RS flip-flop. The reset terminal R0 of the D flip-flop is connected with the output terminal Q0 of the D flip-flop, and the reset terminal R1 of the RS flip-flop is connected between the output terminal Q0 of the D flip-flop and the reset terminal R0 of the D flip-flop. The clock input terminal CLK0 of the D flip-flop is connected to a high frequency reference clock. The first output end Q1 of the RS flip-flop outputs a first clock signal CK1 to the leakage detection circuit 210 to control the on/off of the second switch S2 and the third switch S3; the second output terminal QB of the RS flip-flop outputs the second clock signal CK2 to the leakage detecting circuit 210 to control the on/off of the first switch S1 and the fourth switch S4. And the first output terminal Q1 of the RS flip-flop outputs the first clock signal CK1 to the first counter; the second output terminal QB of the RS flip-flop outputs the second clock signal CK2 to the second counter. In this embodiment, the first level signal is the first clock signal CK1 being equal to 1 and the second clock signal CK2 being equal to 0, that is, the first clock signal is a high level signal and the second clock signal is a low level signal; the second level signal is the first clock signal CK1 being equal to 0 and the second clock signal CK2 being equal to 1, that is, the first clock signal is a low level signal and the second clock signal is a high level signal. It is noted that the first clock signal and the second clock signal are a set of non-overlapping clock signals.

When the RS flip-flop outputs the first level signal, that is, the first clock signal CK1 is equal to 1, and the second clock signal CK2 is equal to 0, the first switch S1 and the fourth switch S4 are respectively controlled by the second clock signal CK2 to be turned off, and the second switch S2 and the third switch S3 are respectively controlled by the first clock signal CK1 to be turned on. The power supply VDD and the conducting third switch S3 provide a charging loop for the detection capacitor C2, the detection capacitor C2 starts to charge, and the charging current is the leakage current Ileakage. During the charging process of the detection capacitor C2, the node voltage Vb increases from zero, the node voltage Vb is the input voltage of the non-inverting input terminal of the second comparator, and when the detection capacitor C2 is charged until the node voltage Va is greater than the second reference voltage Vneg, the second comparator CMP2 outputs a high level signal. When the output of the second comparator CMP2 changes from a low level signal to a high level signal, and after the high frequency reference clock edge of the D flip-flop is triggered, the output Q0 of the D flip-flop outputs a high level signal to the set terminal S of the RS flip-flop, so that the first clock signal CK1 output by the first output Q1 of the RS flip-flop is 0, and the second clock signal CK2 output by the second output QB of the RS flip-flop is 1. When the output Q0 of the D flip-flop goes high, the high signal output by the D flip-flop is ored with the RST signal and then the D flip-flop is reset, so that the output Q0 of the D flip-flop is converted into a low signal.

At this time, when the RS flip-flop outputs the second level signal, i.e., the first clock signal CK1 is equal to 0 and the second clock signal CK2 is equal to 1, the first switch S1 is turned on, the second switch S2 is turned off, the third switch S3 is turned off, and the fourth switch S4 is turned on. The sensing capacitor C2 begins to discharge through the turned-on fourth switch S3, so that the node voltage VB gradually decreases to zero. Meanwhile, the D flip-flop starts to delay, and after the delay time is delayed for the preset time Tdelay, the D flip-flop outputs a high pulse signal to the set terminal S of the RS flip-flop, so that the first clock signal CK1 is equal to 1, the second clock signal CK2 is equal to 0, and the detection capacitor C2 starts to charge for a new round. In this process, the discharging time of the detection capacitor C2 is also the preset time Tdelay, the charging time is (Ithreshold R × C2/Ileakage), and the low-frequency oscillation period T is (Tdelay + Ithreshold R × C1/Ileakage).

During the charging process of the detection capacitor C2, the enable terminal EN1 of the first counter becomes high level due to the first clock signal CK1 being 1 and the second clock signal CK2 being 0, and the first counter starts to operate. In the input clock high-frequency reference clock of the first counter, in a charging time window (Ithreshold R C2/Ileakage) of the detection capacitor C2, the charging current of the detection capacitor C2 is the leakage current Ileakage, so the high-frequency counting result of the first counter can directly reflect the magnitude of the leakage current Ileakage. Further, if the high frequency count is less than a given count threshold nth, i.e., Ithreshold R C2/Ileakage Fclk < nth, it can be derived that Ileakage > Ithreshold R C2/(Fclk nth), i.e., leakage current Ileakage exceeds a preset leakage threshold, and Ithreshold R C1/(Fclk nth) is a preset leakage threshold.

When the leakage current Ileakage exceeds the preset leakage threshold, the compensation control circuit 231 selects a negative current corresponding to the leakage current Ileakage by controlling the switch in the negative current source array and inputs the negative current to the circuit to be detected 10, so as to dynamically compensate the circuit to be detected 10. Alternatively, the output currents of each current source in the negative current source array may be the same or different, and the compensation control circuit 231 may select to connect a current source with an appropriate output current to the circuit to be tested to compensate for the leakage current Ileakage, or may select to simultaneously connect a plurality of current sources to the circuit to be tested 10 to superimpose sufficient output currents to compensate for the leakage current Ileakage. In other words, compensation can be performed by switching the switched-in current sources, and compensation can also be performed by controlling the number of switched-in current sources.

In some embodiments, a smaller leakage threshold may be set for identifying leakage. For example, when the high-frequency count of the counter 223 is smaller than a count threshold that is larger than the count threshold nth, it indicates that the circuit under test 10 has an electric leakage; when the high frequency count of the counter 223 is smaller than the count threshold value nth, it indicates that the leakage of the circuit under test 10 exceeds the preset leakage threshold value.

As shown in fig. 3-4 and 6-7, the first branch formed by the first leakage detecting circuit 211 and the first comparator CMP1 and the second branch formed by the second leakage detecting circuit 212 and the second comparator CMP2 are symmetric to each other, and the operating clock levels are opposite, so that in the leakage protection circuit of this embodiment, the first branch and the second branch may be simultaneously arranged, and positive leakage detection and negative leakage detection may be performed by two different branches respectively; or only the first branch or the second branch can be arranged, and under the action of the clock signal, the positive electric leakage detection and the negative electric leakage detection are alternately carried out through a single branch in a time-sharing manner.

The leakage protection circuit provided by the embodiment can realize different types of leakage detection through the first detection capacitor or the second detection capacitor (i.e. a single detection capacitor). When the circuit 10 to be tested has positive and negative leakage, a closed loop feedback is formed by detecting the charge and discharge of a capacitor, a comparator, a D trigger, an RS trigger and the like to form a low-frequency oscillator, the oscillation period T of the low-frequency oscillator is (Tdelay + Ithreshold R × C1/Ileakage), and a low-frequency clock signal with a high low-level duty ratio can be formed by adjusting the preset time Tdelay, wherein the low-level time window of the low-frequency clock signal represents the charging time window of the detection capacitor, and the high-level time window represents the discharging time window of the detection capacitor. And then, the counter 223 counts the high-frequency reference clock in a low-level time window of the low-frequency oscillator in an accumulated manner, and when the positive and negative leakage exceeds a certain range, the system outputs related identification bits (NegSideLeak, PosSideLeak) to perform leakage identification. Meanwhile, when the positive and negative leakage currents exceed a given range, the leakage compensation circuit 230 can be activated to perform reverse current cancellation, so that the influence of the leakage current is effectively eliminated, and the detection range and the detection precision of the signal are improved.

The embodiment of the present application further provides an integrated circuit, which includes the leakage protection circuit 100 or the leakage protection circuit 200. In this embodiment, the integrated circuit may be a leakage protection chip.

The integrated circuit provided by the embodiment is provided with a leakage detection circuit, a compensation trigger circuit and a leakage compensation circuit, wherein the leakage detection circuit comprises a detection capacitor; charging the detection capacitor by using the leakage current of the circuit to be detected through the leakage detection circuit; detecting the magnitude of leakage current during the charging period of the detection capacitor through a compensation trigger circuit, and outputting a trigger signal when the leakage current is greater than or equal to a preset threshold value; and finally, providing a compensation current corresponding to the leakage current for the circuit to be detected through the leakage compensation circuit according to the trigger signal, thereby effectively eliminating the influence of system leakage and improving the detection range and precision of the signal.

The embodiment of the application also provides the electronic equipment, the electronic equipment main body and the integrated circuit arranged in the equipment main body. In this embodiment, the electronic device includes, but is not limited to, at least one of a temperature sensor, a pressure sensor, an infrared sensor, an ultrasonic sensor, a humidity sensor, a light sensor, and a gravity sensor.

The electronic device provided by the embodiment is provided with an electric leakage detection circuit, a compensation trigger circuit and an electric leakage compensation circuit, wherein the electric leakage detection circuit comprises a detection capacitor; charging a detection capacitor by using the leakage current of the circuit to be detected through a leakage detection circuit; detecting the magnitude of leakage current during the charging period of the detection capacitor through a compensation trigger circuit, and outputting a trigger signal when the leakage current is greater than or equal to a preset threshold value; and finally, providing a compensation current corresponding to the leakage current for the circuit to be detected through the leakage compensation circuit according to the trigger signal, thereby effectively eliminating the influence of system leakage and improving the detection range and precision of the signal.

As shown in fig. 8, the present embodiment further provides a leakage protection method 300, which is applied to the leakage protection circuit 100 or the leakage protection circuit 200. The earth leakage protection method 300 includes the following steps S1 to S3.

S1: and charging the detection capacitor by using the leakage current of the circuit to be detected.

When the circuit to be detected leaks electricity, the detection capacitor is charged by using the leakage current of the circuit to be detected, and the charging current of the detection capacitor is also the leakage current of the circuit to be detected.

And in the charging process of the detection capacitor, changing the charging and discharging state of the detection capacitor according to the voltage at two ends of the detection capacitor and the reference voltage. Specifically, when the voltage across the detection capacitor rises to the reference voltage or falls to the reference voltage, the detection capacitor is changed to the discharge state. After the detection capacitor is changed into the discharging state, delaying for a preset time, so that the detection capacitor is changed into the charging state from the discharging state again.

In one embodiment, the voltage of the detection capacitor may be input to the comparator, and when the output state of the comparator changes (i.e., the output signal of the comparator changes from a high level signal to a low level signal or from a low level signal to a high level signal), a comparison signal is generated to the oscillation circuit formed by the D flip-flop and the RS flip-flop, so that the oscillation circuit outputs the first clock signal to the control switch of the detection capacitor, thereby changing the detection capacitor from the charging state to the discharging state. After the detection capacitor is converted into the discharging state, the oscillation circuit delays the preset time to output a second clock signal to the control switch of the detection capacitor, and then the detection capacitor is converted into the charging state from the discharging state again.

Further, the leakage current comprises a first leakage current of the circuit to be tested which leaks electricity to the ground and a second leakage current between the circuit to be tested and the power supply. The oscillating circuit alternately outputs a first clock signal and a second clock signal at a certain frequency, thereby controlling the detection capacitor to alternately discharge and charge at a certain frequency. When the leakage current is the first leakage current, the detection capacitor may be charged with the first leakage current in a time period in which the oscillation circuit outputs the second clock signal. When the voltage charged to the two ends of the detection capacitor can change the output of the comparator, the comparator outputs a comparison signal to the oscillating circuit, and after the oscillating circuit receives the comparison signal, the oscillating circuit outputs a first clock signal to the control switch of the detection capacitor so as to control the discharge of the detection capacitor, namely the first leakage current is not used for charging the detection capacitor. And meanwhile, the oscillating circuit starts to delay, namely the discharge time of the detection capacitor is detected during the delay, and the oscillating circuit outputs a second clock signal to the control switch of the detection capacitor again after delaying the preset time, so that the first leakage current is detected for a new round.

When the leakage current is the second leakage current, the detection capacitor may be charged with the second leakage current in a time period in which the oscillation circuit outputs the first clock signal. When the voltage charged to the two ends of the detection capacitor can change the output of the comparator, the comparator outputs a comparison signal to the oscillation circuit, and after the oscillation circuit receives the comparison signal, the oscillation circuit outputs a second clock signal to the control switch of the detection capacitor so as to control the discharge of the detection capacitor, namely the second leakage current is not used for charging the detection capacitor. And meanwhile, the oscillating circuit starts to delay, namely the discharge time of the detection capacitor is detected during the delay, and the oscillating circuit outputs the first clock signal to the control switch of the detection capacitor again after delaying the preset time, so that the second leakage current is detected for a new round.

S2: and detecting the magnitude of the leakage current during the charging period of the detection capacitor, and outputting a trigger signal when the leakage current is greater than or equal to a preset threshold value.

Since the leakage current is the charging current of the detection capacitor, the magnitude of the leakage current can be detected within the charging time window of the detection capacitor. When the leakage current is larger than or equal to the preset threshold value, the leakage of the circuit to be tested reaches the given leakage threshold value, and at the moment, the trigger signal is output.

In one embodiment, when the detection capacitor is changed from the discharging state to the charging state, a clock pulse is output to an enabling end of the counter through an oscillating circuit formed by a D trigger and an RS trigger, and then the counter counts a high-frequency reference clock in a charging time window of the detection capacitor, and the counting value of the counter can reflect the magnitude of the leakage current. It should be noted that the smaller the count value of the counter, the shorter the time for detecting the charging of the capacitor, the larger the leakage current. When the counting value of the counter is smaller than the counting threshold value, the leakage current of the circuit to be tested reaches the given leakage threshold value, and the counting signal of the counter is equivalent to a trigger signal.

Further, when the leakage current is the first leakage current, the counter counts by using the high-frequency reference clock within the pulse width window of the second clock signal to detect the magnitude of the first leakage current. Wherein, the high frequency reference clock is the input clock of the counter. The pulse width window of the second clock signal is also the high level time window of the second clock signal, and the detection capacitor is charged in the high level time window. And in the charging time window of the detection capacitor, if the high-frequency count is less than or equal to a given count threshold, that is, the first leakage current is greater than or equal to a preset threshold, the leakage of the circuit to be detected to the ground exceeds a given range, and at the moment, the counter outputs a trigger signal to trigger the compensation of the first leakage current.

When the leakage current is the second leakage current, the counter counts by using the high-frequency reference clock in the pulse width window of the first clock signal so as to detect the magnitude of the second leakage current. Wherein, the high frequency reference clock is the input clock of the counter. The pulse width window of the first clock signal is also the high level time window of the first clock signal, and the detection capacitor is charged in the high level time window. And in the charging time window of the detection capacitor, if the high-frequency count is less than or equal to a given count threshold, that is, the second leakage current is greater than or equal to a preset threshold, the leakage of the circuit to be detected to the power supply exceeds a given range, and at the moment, the counter outputs a trigger signal to trigger the compensation of the second leakage current.

S3: and providing compensation current corresponding to the leakage current for the circuit to be tested according to the trigger signal.

According to the trigger signal, a compensation current corresponding to the leakage current can be provided for the circuit to be tested. The compensation current is a reverse current opposite to the direction of the leakage current, can completely compensate the leakage current, and can also partially compensate the leakage current to reduce the leakage current to within a given threshold value, thereby eliminating the influence of the leakage current on signal detection and improving the precision of the signal detection.

In one embodiment, the automatic current compensation control circuit can control the current source to generate a reverse current corresponding to the leakage current, and the reverse current is input to the circuit to be tested to provide current compensation for the circuit to be tested. The automatic current compensation control circuit can select to connect a current source with proper output current with a circuit to be detected to compensate the leakage current, and can also select to simultaneously connect a plurality of current sources with the circuit to be detected to superpose enough output current to compensate the leakage current. In other words, compensation can be performed by switching the switched-in current sources, and compensation can also be performed by controlling the number of switched-in current sources.

According to the leakage protection method provided by the embodiment of the application, the detection capacitor is charged by using the leakage current of the circuit to be detected; detecting the magnitude of the leakage current in the charging period of the detection capacitor, and outputting a trigger signal when the leakage current is greater than or equal to a preset threshold value; and finally, providing compensation current corresponding to the leakage current for the circuit to be detected according to the trigger signal, thereby effectively eliminating the influence of system leakage and improving the detection range and precision of the signal.

Although the present application has been described with reference to the preferred embodiments, it is to be understood that the present application is not limited to the disclosed embodiments, but rather, the present application is intended to cover various modifications, equivalents and alternatives falling within the spirit and scope of the present application.

Claims

1. An earth leakage protection circuit, comprising:

the leakage detection circuit comprises a detection capacitor, and is used for connecting a circuit to be detected and charging the detection capacitor by using leakage current of the circuit to be detected, wherein the leakage current comprises first leakage current of the circuit to be detected for earth leakage and second leakage current between the circuit to be detected and a power supply, the first leakage current is negative leakage current, and the second leakage current is positive leakage current;

the compensation trigger circuit is connected with the leakage detection circuit and used for detecting the magnitude of the leakage current during the charging period of the detection capacitor and outputting a trigger signal when the leakage current is greater than or equal to a preset threshold value; and

and the leakage compensation circuit is connected with the compensation trigger circuit and used for providing compensation current corresponding to the leakage current for the circuit to be detected according to the trigger signal so as to compensate the positive and negative bidirectional leakage of the circuit to be detected.

2. The leakage protection circuit of claim 1, wherein the compensation trigger circuit comprises:

the comparison circuit is connected with the electric leakage detection circuit, is preset with reference voltage and is used for outputting a comparison signal according to the voltage of the detection capacitor and the reference voltage;

the clock control circuit is connected with the comparison circuit and the electric leakage detection circuit and used for outputting a clock signal according to the comparison signal and controlling the electric leakage detection circuit to charge or discharge the detection capacitor through the clock signal; and

and the counter is connected with the clock control circuit and used for detecting the magnitude of the leakage current during the charging period of the detection capacitor according to the clock signal and outputting a trigger signal when the leakage current is greater than or equal to the preset threshold value.

3. The leakage protection circuit of claim 2, wherein the clock signal comprises a first level signal and a second level signal;

the clock control circuit is used for outputting the first level signal according to the comparison signal and outputting the second level signal after delaying for a preset time, and the electric leakage detection circuit is used for controlling the detection capacitor to discharge within the preset time according to the first level signal and charging the detection capacitor by using the first electric leakage current according to the second level signal; alternatively, the first and second electrodes may be,

the clock control circuit is used for outputting the second level signal according to the comparison signal and outputting the first level signal after delaying for a preset time, and the electric leakage detection circuit is used for controlling the detection capacitor to discharge within the preset time according to the second level signal and charging the detection capacitor by using the second electric leakage current according to the first level signal.

4. The leakage protection circuit of claim 3,

the counter is further configured to count according to a preset reference clock when the leakage detection circuit charges the detection capacitor with the first leakage current according to the second level signal, so as to detect a magnitude of the first leakage current; alternatively, the first and second electrodes may be,

the counter is further configured to count according to a preset reference clock when the leakage detection circuit charges the detection capacitor with the second leakage current according to the first level signal, so as to detect a magnitude of the second leakage current.

5. The leakage protection circuit of claim 3 wherein said clock control circuit comprises a D flip-flop connected to said comparison circuit and an RS flip-flop connected to said D flip-flop.

6. The leakage protection circuit of claim 3, wherein the leakage compensation circuit comprises a compensation control circuit connected to the compensation trigger circuit and a current source unit connected to the compensation control circuit, and the compensation control circuit is configured to determine a magnitude of the leakage current according to the trigger signal and provide a compensation current corresponding to the magnitude of the leakage current to the circuit under test through the current source unit.

7. The leakage protection circuit of claim 6, wherein the current source unit is a current source array, and the compensation control circuit is configured to select a current source corresponding to the leakage current in the current source array according to the magnitude of the leakage current to provide the compensation current.

8. The leakage protection circuit of claim 6 wherein said leakage detection circuit comprises a first leakage detection circuit and a second leakage detection circuit, said detection capacitor comprising a first detection capacitor and a second detection capacitor;

the first leakage detection circuit is used for being connected with the circuit to be detected and charging the first detection capacitor by utilizing the first leakage current when the circuit to be detected leaks electricity to the ground;

the second leakage detection circuit is used for being connected with the circuit to be detected and charging the second detection capacitor by utilizing the second leakage current between the circuit to be detected and the power supply.

9. The leakage protection circuit of claim 8 wherein said first leakage detection circuit comprises a first switch, a second switch, and said first detection capacitor; one end of the first detection capacitor is connected to a power supply, and the other end of the first detection capacitor is connected to the first switch; the second switch is connected in parallel to two ends of the first detection capacitor; the connection node of the first detection capacitor and the first switch is connected with the compensation trigger circuit;

the second leakage detection circuit comprises a third switch, a fourth switch and the second detection capacitor; one end of the second detection capacitor is grounded, the other end of the second detection capacitor is connected to the third switch, and the other end of the third switch is connected to the other end of the first switch; the fourth switch is connected in parallel with two ends of the second detection capacitor; the connection node of the second detection capacitor and the third switch is connected to the compensation trigger circuit; the connection node of the first switch and the third switch is used for connecting the circuit to be tested; the first switch, the second switch, the third switch, and the fourth switch are controlled by the clock signal.

10. The leakage protection circuit of claim 9, wherein the comparison circuit comprises a first comparator and a second comparator, and the reference voltage comprises a first reference voltage and a second reference voltage;

the first reference voltage is preset at the first input end of the first comparator, the second input end of the first comparator is connected to the connection node of the first detection capacitor and the first switch, and the output end of the first comparator is connected to the clock control circuit;

the first input end of the second comparator is connected to the connection node of the second detection capacitor and the third switch, the second reference voltage is preset at the second input end, and the output end is connected to the clock control circuit.

11. The leakage protection circuit of claim 10 wherein said compensation trigger circuit further comprises a gating circuit connected between said comparison circuit and said clock control circuit and configured to select one of said first comparator and said second comparator to be connected to said clock control circuit.

12. The earth leakage protection circuit of claim 10, wherein the current source unit comprises a first current source unit and a second current source unit, the compensation control circuit is configured to determine a magnitude of an earth leakage current when the circuit to be tested leaks electricity to earth according to the trigger signal, and provide a compensation current corresponding to the magnitude of the earth leakage current for the circuit to be tested through the first current source unit; the compensation control circuit is further used for determining the magnitude of leakage current between the circuit to be tested and the power supply according to the trigger signal, and providing compensation current corresponding to the leakage current for the circuit to be tested through the second current source unit.

13. An integrated circuit comprising the leakage protection circuit as claimed in any one of claims 1 to 12.

14. An electronic device comprising a device body and the integrated circuit of claim 13 disposed within the device body.

15. An earth leakage protection method applied to the earth leakage protection circuit according to any one of claims 1 to 12, comprising:

charging the detection capacitor by using the leakage current of the circuit to be detected;

detecting the magnitude of the leakage current during the charging period of the detection capacitor, and outputting a trigger signal when the leakage current is greater than or equal to a preset threshold value; and

and providing compensation current corresponding to the leakage current for the circuit to be tested according to the trigger signal.