CN111538005B - SAR front-side-looking imaging method based on FPGA and multiple multi-core DSPs - Google Patents
SAR front-side-looking imaging method based on FPGA and multiple multi-core DSPs Download PDFInfo
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Abstract
The invention provides an SAR front side-looking imaging method based on an FPGA and a plurality of multi-core DSPs, which is used for solving the technical problem of poor imaging algorithm real-time performance existing in the existing high-speed aircraft SAR imaging platform and comprises the following implementation steps: 1. initializing a signal processor and SAR parameters; 2, the FPGA acquires and transmits an echo signal matrix block; DSPn echo signal matrix blockPerforming distance dimension FFT interpolation; 4. Echo signal matrix block after DSPn interpolation FFTCarrying out BP integral; DSPn vs { S 1 ,S 2 ,···,S x ,···,And performing sub-aperture image fusion.
Description
Technical Field
The invention belongs to the technical field of digital signal processing, relates to an SAR front-side-looking imaging method, in particular to an SAR front-side-looking imaging method based on an FPGA and a plurality of multi-core DSPs, and can be applied to the fields of rapid imaging processing of high-speed aircrafts and the like.
Background
Synthetic Aperture Radar (SAR) is the main body of Radar imaging, and has the widest application range. The synthetic aperture radar imaging technology obtains an SAR image with high resolution in two dimensions of distance dimension and azimuth dimension by carrying out two-dimensional processing on a radar echo signal matrix, clearly shows the shape and fine structure characteristics of a target, and greatly improves the detection and identification capability of the target.
In practical application, because a high-speed aircraft needs to have certain maneuverability to perform actions such as turning and turning, a radar is required to observe a target scene in advance, and thus an SAR imaging algorithm is required to work in a front side view mode, compared with a traditional front side view mode, the SAR imaging algorithm has the defects that the calculation amount is large, the imaging real-time performance is difficult to guarantee, and the application of the SAR imaging technology in the high-speed aircraft is limited. Existing SAR front-side view imaging algorithms can be divided into two categories: one is a frequency domain SAR imaging algorithm based on Fourier transform, and the other is a time domain SAR imaging algorithm based on pixel-by-pixel interpolation and coherent accumulation. However, most frequency domain SAR imaging algorithms approximate a target transmission function, and the approximation conditions in the imaging algorithms are sensitive to SAR parameters, which brings about severe space-variant errors in large-scene imaging, resulting in poor SAR image quality, thereby limiting the application range of the SAR imaging technology in high-speed aircrafts.
In order to solve the above problems, the current research situation is to use a frequency domain SAR imaging algorithm and control a scene range of SAR imaging. The method reduces the operation complexity of the SAR imaging algorithm and ensures the real-time performance of SAR imaging. However, the method is only suitable for the condition that the imaging scene range is not large, and under the condition that the imaging scene range is large, the operation complexity of the imaging method is increased, and the real-time performance of SAR imaging is reduced; on the other hand, a time domain SAR imaging algorithm is adopted, and the number of digital signal processing chips on the signal processor is increased. The time domain imaging algorithm has flexible observation geometry, high focusing precision and controllable image resolution, has higher parallelism, but has huge calculation complexity, and can effectively solve the problem of poor real-time performance of the time domain imaging algorithm caused by huge calculation complexity by increasing the number of digital signal processing chips on a signal processor. In the technical text for realizing the multi-core DSP parallel architecture named as the large squint time domain SAR imaging algorithm published in 2019 by Haohao, a processing method for realizing the large squint time domain SAR imaging algorithm by utilizing four multi-core DSPs and grouping pairwise and adopting a mode of in-group running water and inter-group ping-pong is disclosed. However, the disadvantages of this method are: firstly, the time domain SAR imaging algorithm adopted by the method realizes sub-aperture image fusion by utilizing a two-dimensional interpolation mode, so that the calculation complexity of the time domain SAR imaging algorithm is increased, the time for forming an SAR front side view image by the method needs 2058ms, and the problem of poor real-time performance of the time domain SAR imaging algorithm still exists. Secondly, the multi-core DSP parallel architecture designed by the method cannot fully utilize the signal processing capability of the multi-core DSP chip, uses more hardware resources and has larger power consumption of a signal processor.
Disclosure of Invention
The invention aims to provide an SAR front-side-looking imaging method based on an FPGA and a plurality of multi-core DSPs (digital signal processors) aiming at the defects in the technology, and is used for solving the technical problem of poor imaging algorithm real-time performance in the existing high-speed aircraft SAR imaging platform.
In order to achieve the purpose, the technical scheme adopted by the invention comprises the following steps:
(1) Initializing a signal processor and SAR parameters:
initializing FPGA on a signal processor to acquire SAR and transmitting carrier frequency f to a target scene c The echo sampling matrix generated by the linear frequency modulation signal is S M×N (ii) a Initializing g parallel arranged multi-core DSP chips on the signal processor as { DSP1, DSP2, \8230;, DSPn, \8230;, DSPg }; the initialization includes the synthetic aperture length L, the sub-aperture length L sub And the pitch R s The SAR parameter of (1); wherein M is the number of distance dimension sampling points, N is the number of azimuth dimension sampling points, DSPn is the nth DSP chip containing Q cores, g is the number of multi-core DSP chips, Q is more than or equal to 8, g is more than or equal to 3, N belongs to [1, g ]];
(2) The FPGA acquires an echo signal matrix block and sends the echo signal matrix block:
echo sampling matrix S by FPGA M×N Performing distance dimension pulse compression to obtain an echo signal matrix after the distance dimension pulse compressionAnd will>Dividing the signal into g echo signal matrix blocks with the same number as that of the multi-core DSP chips according to the azimuth dimensionThen the nth echo signal matrix block is evaluated>Sending the data to a corresponding DSPn memory, wherein g n Is->P is distance dimension pulse compression;
DSPn matrix block of echo signalsDivision into Q echo signal matrix blocks according to azimuth dimensionAnd J is an interpolation multiple pair ^ based on the qth core>Performing distance dimension FFT interpolation to obtain an echo signal matrix block ^ after the distance dimension FFT interpolation> Represents the q +1 th echo signal matrix block after the FFT interpolation of the distance dimension, wherein, g n(q+1) Is->K is the number of distance dimension points after distance dimension FFT interpolation is carried out, K = M multiplied by J, I is FFT interpolation, and Q belongs to {0,1, \8230;, Q-1};
(4) Echo signal matrix block after DSPn distance dimension FFT interpolationBP integration was performed:
(4a) DSPn calculates SAR to any point target U (r, theta) in a unified polar coordinate system (r, theta) taking the synthetic aperture center of SAR as a pole and the track of SAR as a polar axis U ,θ U ) Is measured at a distance R (D; r is U ,θ U ) Wherein r and θ are the polar diameter and polar angle, respectively, r U Is the polar diameter of the target U in (r, theta) at any point, theta U The polar angle of the target U in (r, theta) is taken as an arbitrary point, D is the polar diameter of SAR in (r, theta), and D epsilon [ -L/2, L/2);
(4b) DSPn echo signal matrix block after FFT interpolation according to azimuth dimensionDivide into->Block of echo signal matrix>And use of R (D; R) U ,θ U ) Is paired and/or matched>BP integration is performed to obtain a low resolution sub-aperture image->Wherein it is present>For the x-th echo signal matrix block, g nx Is->The number of columns of (a) is,S x for the xth low-resolution sub-aperture image, ->
(5a) DSPn according to the carrier frequency f of the chirp signal c Synthetic aperture length L, sub-aperture length L sub Slope distance R s Calculating S x True wave number spectrum center K of x And through K x To S x The wave number spectrum center is corrected to obtain a low-resolution sub-aperture image after the wave number spectrum center is correctedS x ' is the x-th low-resolution sub-aperture image after wave number spectrum center correction;
(5b) Low resolution sub-aperture images with center correction of the DSPn versus wavenumber spectraIFFT is performed in the azimuth dimension to get->Amplitude-time domain sub-aperture image-> The x-th time domain sub-aperture image after wave number spectrum center correction is obtained, wherein T is a time domain;
(5c) DSPn pairAmplitude-time domain sub-aperture image->Superposing in the azimuth dimension to obtain a full aperture wave number spectrum SAR image;
(5d) And the DSPn performs FFT on the full-aperture wave number spectrum SAR image in an azimuth dimension to obtain an SAR front side view image.
Compared with the prior art, the method has the following advantages:
1. according to the invention, through carrying out wave number spectrum center correction and azimuth dimension IFFT processing on a low-resolution sub-aperture image obtained after BP integration, and finally realizing sub-aperture image fusion through a sub-aperture image superposition method, compared with the prior art which adopts two-dimensional interpolation in a distance dimension and an azimuth dimension to realize sub-aperture image fusion, the imaging algorithm disclosed by the invention has the advantages that the calculation complexity is greatly reduced, the load and the expense of a multi-core DSP chip are reduced, the real-time performance of a time domain SAR imaging algorithm is greatly improved, and the time for forming an SAR front side view image only needs 789ms.
2. When the BP integration is carried out on the echo data after the FFT interpolation, the method of carrying out the BP integration on the echo data by rows is adopted, compared with the existing method of carrying out the block BP integration on the azimuth dimension of the echo data, the method solves the problem that the BP integration has to run in a DSP memory with lower calculation speed due to large echo data amount, so that less hardware resources are used, the real-time performance of an imaging algorithm can be ensured, and the power consumption of a signal processor is lower.
Drawings
FIG. 1 is a block diagram of a signal processor employed in the present invention;
FIG. 2 is a flow chart of an implementation of the present invention;
FIG. 3 is an echo sampling matrix S according to the present invention M×N The DSP chip data dividing schematic diagram;
fig. 4 is a SAR front side view image obtained by processing measured data according to the present invention.
Detailed Description
The invention is described in further detail below with reference to the following figures and specific examples:
referring to fig. 1, a signal processor adopted in the present invention includes an FPGA chip and three multi-core DSP chips, where the FPGA chip used in this embodiment is XC7VX485TFFG1927-2 produced by Xilinx corporation, the number of logic units of the chip reaches 485760, the number of DSP slices reaches 2800, the number of available pins for a user is 700, and the number of high-speed serial transceivers is 56, so as to implement various high-speed serial bus protocols, and the DSP chip used in this embodiment is TMSC320C6678 produced by TI corporation, and 8 processor cores are integrated in the chip, so that the dominant frequency can reach 1.4GHz, and many core processors are allowed to execute computation tasks in parallel at full speed;
referring to fig. 2, the present invention includes the steps of:
step 1) initializing a signal processor and SAR parameters:
initializing FPGA on signal processor to acquire SAR and send carrier frequency f to target scene c The echo sampling matrix generated by the linear frequency modulation signal is S M×N (ii) a Initializing g parallel arranged multi-core DSP chips on the signal processor as { DSP1, DSP2, \8230;, DSPn, \8230;, DSPg }; the initialization includes a synthetic aperture length L, a sub-aperture length L sub And the pitch R s The SAR parameter of (1); wherein M is the number of distance dimension sampling points, N is the number of azimuth dimension sampling points, DSPn is the nth DSP chip containing Q cores, g is the number of multi-core DSP chips, Q is more than or equal to 8, g is more than or equal to 3, N belongs to [1, g ]];
In this embodiment, the FPGA on the signal processor acquires the echo sampling matrix S through the analog-to-digital conversion chip ADS5463 M×N The distance dimension sampling point number M is 1024, the azimuth dimension sampling point number N is 2048, the number g of the multi-core DSP chips is 3, and the number Q of the DSPn cores is 8;
step 2), the FPGA acquires an echo signal matrix block and sends the echo signal matrix block:
FPGA echo sampling matrix S M×N Performing distance dimension pulse compression to obtain an echo signal matrix after the distance dimension pulse compressionAnd will be combined with reference to fig. 3>Mean division into and multi-nuclei according to azimuth dimensionG echo signal matrix blocks with equal number of DSP chips>Then the nth echo signal matrix block is evaluated>Sending the data to a corresponding DSPn memory, wherein g n Is->P is distance dimension pulse compression;
in this embodiment, a high-speed serial data interface Rapid IO is adopted to send g divided echo signal matrix blocks to a corresponding DSPn memory, wherein a data transmission link of the high-speed serial data interface Rapid IO is configured in a 4x mode, the transmission rate of each link is 3.125Gb/s, and the DSPn memory refers to a DDR SDRAM chip connected with the DSPn and having a capacity of 2 Gb;
DSPn matrix block of echo signalsDivision into Q echo signal matrix blocks according to azimuth dimensionAnd J is an interpolation multiple pair ^ based on the qth kernel>Performing distance dimension FFT interpolation to obtain an echo signal matrix block ^ after the distance dimension FFT interpolation> Represents the q +1 th echo signal matrix block after the FFT interpolation of the distance dimension, wherein, g n(q+1) Is->In the embodiment, Q cores of DSPn acquire echo signal matrix blocks corresponding to the cores from a DDR SDRAM chip in an EDMA mode to perform FFT interpolation in a secondary cache, after the FFT interpolation is completed, the Q cores of DSPn store the echo signal matrix blocks after the FFT interpolation in an EDMA mode to the DDR SDRAM, and the value of an interpolation multiple J is 8;
step 4) DSPn echo signal matrix block after distance dimension FFT interpolationBP integration was performed:
step 4 a) DSPn calculates SAR to any point target U (r, theta) in a unified polar coordinate system (r, theta) with the synthetic aperture center of SAR as a pole and the track of SAR as a polar axis U ,θ U ) Is measured at a distance R (D; r is U ,θ U ) The calculation formula is as follows:
wherein r and θ are respectively the polar diameter and polar angle, r U The pole diameter in (r, theta) of the target U is an arbitrary point, theta U The polar angle of the target U in (R, theta) at any point, D is the polar diameter of SAR in (R, theta), and D belongs to [ -L/2, L/2), in the embodiment, in order to improve the running speed calculated by the imaging algorithm, DSPn is calculated for the instantaneous distance R (D; r is U ,θ U ) The calculation of (2) is carried out in the second-level cache;
step 4 b) DSPn is used for interpolating the echo signal matrix block after FFT according to the azimuth dimensionDivide into->An echo signal matrix block->And use of R (D; R) U ,θ U ) Is paired and/or matched>BP integration is performed to obtain a low resolution sub-aperture image->The calculation formula is as follows:
wherein exp [. C]Is an exponential function with e as the base, j is an imaginary number, K rc =4 π/λ is the distance wave number center, λ is the carrier frequency f of the chirp signal c Corresponding to the wavelength, dD is the differential of the variable D,for the x-th echo signal matrix block, g nx Is composed ofNumber of columns, S x For the xth low-resolution sub-aperture image, ->
In this embodiment, DSPn is an echo signal matrix blockPoint-by-point and column-by-column with the exponential term exp jK rc R(D;r U ,θ U )]Multiplying and accumulating the calculation results of all the columns to obtain a low-resolution sub-aperture image S x ;
step 5 a) DSPn according to the carrier frequency f of the chirp signal c Synthetic aperture length L, sub-aperture length L sub Slope distance R s Calculating S x True wave number spectrum center K of x And through K x To S x The wave number spectrum center is corrected to obtain a low-resolution sub-aperture image after the wave number spectrum center is correctedS x ' is the x-th low-resolution sub-aperture image after wave number spectrum center correction;
step 5a 1) DSPn calculation S x True wavenumber spectrum center of (c):
step 5a 2) DSPn will pass K x The wave number spectrum center obtained by calculation corrects the phase H x And S x Is taken as the product of S x The wave number spectrum center correction result of (1), wherein:
step 5 b) low resolution sub-aperture image with DSPn corrected for wave number spectral centerIFFT is performed in the azimuth dimension to get->Amplitude-time domainSub-aperture image-> The x-th time domain sub-aperture image after wave number spectrum center correction is obtained, wherein T is a time domain;
in this embodiment, the low resolution sub-aperture image S is processed x When IFFT is carried out in azimuth dimension, Q cores of DSPn carry out IFFT on data blocks corresponding to the cores line by line in parallel;
step 5 c) DSPn pairsAmplitude-time domain sub-aperture image->Superposing in the azimuth dimension to obtain a full aperture wave number spectrum SAR image;
step 5c 1) randomly selecting one multi-core DSP chip in { DSP1, DSP2, \ 8230;, DSPn, \ 8230;, DSPg } to be set as DSP a And the rest g-1 multi-core DSP chipsSend to the DSP a A memory, wherein a ∈ [1,g ]];
In this embodiment, DSP a For DSP2 on the signal processor, DSP1 and DSP3 respectively use high-speed serial data interface Hyperlink and PCIE to connect the chipSending the data to DDR SDRAM on DSP 2;
step 5c 2) DSP a Superposing the time domain sub-aperture images in the memory of the SAR and the time domain sub-aperture images in the g-1 multi-core DSP chips in the azimuth dimension to obtain a full aperture wave number spectrum SAR image;
in this embodiment, DSP a Each kernel of (a) superimposes the time domain sub-aperture images line by line, time domain sub-aperturesThe diameter image overlapping part is 50% of the original time domain sub-aperture image;
and step 5 d) the DSPn performs FFT on the full aperture wave number spectrum SAR image in an azimuth dimension to obtain an SAR front side view image, as shown in FIG. 4, FIG. 4 is a front side view image which is formed by processing actual measurement data of the radar and has a scene size of 5km multiplied by 5km, and the imaging effect is good.
The above description is only one embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.
Claims (5)
1. An SAR front-side view imaging method based on an FPGA and a plurality of multi-core DSPs is characterized by comprising the following steps:
(1) Initializing a signal processor and SAR parameters:
initializing FPGA on signal processor to acquire SAR and send carrier frequency f to target scene c The echo sampling matrix generated by the linear frequency modulation signal is S M×N (ii) a Initializing g parallel arranged multi-core DSP chips on the signal processor as { DSP1, DSP2, \8230;, DSPn, \8230;, DSPg }; the initialization includes a synthetic aperture length L, a sub-aperture length L sub And the pitch R s The SAR parameter of (1); wherein M is the distance dimension sampling point number, N is the azimuth dimension sampling point number, DSPn is the nth DSP chip containing Q cores, Q is more than or equal to 8, g is more than or equal to 3, N belongs to [1, g ]];
(2) The FPGA acquires an echo signal matrix block and sends the echo signal matrix block:
FPGA echo sampling matrix S M×N Performing distance dimension pulse compression to obtain an echo signal matrix after the distance dimension pulse compressionAnd will beDividing the signal into g echo signal matrix blocks with the same number as that of the multi-core DSP chips according to the azimuth dimensionThen, the nth echo signal matrix block is processedSending the data to a corresponding DSPn memory, wherein g n Is composed ofP is distance dimension pulse compression;
DSPn matrix block of echo signalsDivision into Q echo signal matrix blocks according to azimuth dimensionAnd J is used as an interpolation multiple pair through a q-th kernelPerforming distance dimension FFT interpolation to obtain echo signal matrix block after distance dimension FFT interpolationWherein the content of the first and second substances,representing the q +1 th echo signal matrix block, g, after distance dimension FFT interpolation n(q+1) Is composed ofK is the number of distance dimension points after distance dimension FFT interpolation is carried out, K = M multiplied by J, I is FFT interpolation, and Q belongs to {0,1, \8230;, Q-1};
(4) Echo signal matrix block after DSPn distance dimension FFT interpolationBP integration was performed:
(4a) DSPn calculates SAR to any point target U (r, theta) in a unified polar coordinate system (r, theta) taking the synthetic aperture center of SAR as a pole and the track of SAR as a polar axis U ,θ U ) Is measured at a distance R (D; r is a radical of hydrogen U ,θ U ) Wherein r and θ are respectively the polar diameter and polar angle, r U The pole diameter in (r, theta) of the target U is an arbitrary point, theta U The polar angle of the target U in (r, theta) is taken as an arbitrary point, D is the polar diameter of SAR in (r, theta), and D epsilon [ -L/2, L/2);
(4b) DSPn echo signal matrix block after FFT interpolation according to azimuth dimensionIs divided intoAn echo signal matrix blockAnd use of R (D; R) U ,θ U ) To pairBP integral is carried out to obtain a low-resolution sub-aperture imageWherein the content of the first and second substances,for the x-th echo signal matrix block, g nx Is composed ofNumber of columns, S x For the x-th low-resolution sub-aperture image,
(5a) DSPn according to the carrier frequency f of the chirp signal c Synthetic aperture length L, sub-aperture length L sub Slope distance R s Calculating S x True wave number spectrum center K of x And through K x To S x The wave number spectrum center is corrected to obtain a low-resolution sub-aperture image after the wave number spectrum center is correctedS x ' is the x-th low-resolution sub-aperture image after wave number spectrum center correction;
(5b) Low resolution sub-aperture images with center correction of the DSPn versus wavenumber spectraIFFT is carried out in the azimuth dimension to obtainAmplitude-time domain sub-aperture image The x-th time domain sub-aperture image after wave number spectrum center correction is obtained, wherein T is a time domain;
(5c) DSPn pairAmplitude-time domain sub-aperture imageSuperposing in the azimuth dimension to obtain a full aperture wave number spectrum SAR image;
(5d) And the DSPn performs FFT on the full-aperture wave number spectrum SAR image in an azimuth dimension to obtain an SAR front side view image.
3. the SAR front-side view imaging method based on FPGA and multiple multi-core DSP of claim 1 characterized in that R (D; R) is utilized in step (4 b) U ,θ U ) To pairBP integral is carried out, and the calculation formula is as follows:
wherein, exp [ ·]Is an exponential function with e as the base, j is an imaginary number, K rc =4 π/λ is the distance wave number center, λ is the carrier frequency f of the chirp signal c Corresponding to the wavelength, dD is the differential of the variable D.
4. The SAR front-side view imaging method based on FPGA and multiple multi-core DSPs according to claim 1, characterized by steps of(5a) Through K as described in x To S x The wave number spectrum center of (2) is corrected, and the method comprises the following steps:
(5a1) DSPn calculates S x True wavenumber spectrum center of (c):
(5a2) DSPn will pass K x The wave number spectrum center obtained by calculation corrects the phase H x And S x Is taken as the product of S x The wave number spectrum center correction result of (1), wherein:
5. the method for SAR front-side view imaging based on FPGA and multi-core DSP of claim 1, characterized in that the pair in step (5 c)Amplitude-time domain sub-aperture imageAnd performing superposition in an orientation dimension, comprising the following steps:
(5c1) Randomly selecting one multi-core DSP chip in { DSP1, DSP2, \8230;, DSPn, \8230;, DSPg } to be set as DSP a And the rest g-1 multi-core DSP chips are connectedSend to the DSP a Memory, wherein a ∈ [1,g ]];
(5c2)DSP a And superposing the time domain sub-aperture images in the memory of the SAR and the time domain sub-aperture images in the g-1 multi-core DSP chips in the azimuth dimension to obtain a full-aperture wave number spectrum SAR image.
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