CN111538005A - SAR front-side-looking imaging method based on FPGA and multiple multi-core DSPs - Google Patents

SAR front-side-looking imaging method based on FPGA and multiple multi-core DSPs Download PDF

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CN111538005A
CN111538005A CN202010400279.8A CN202010400279A CN111538005A CN 111538005 A CN111538005 A CN 111538005A CN 202010400279 A CN202010400279 A CN 202010400279A CN 111538005 A CN111538005 A CN 111538005A
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sar
dspn
aperture
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echo signal
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CN111538005B (en
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谢荣
张政
刘峥
何志超
冉磊
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Xidian University
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S13/00—Systems using the reflection or reradiation of radio waves, e.g. radar systems; Analogous systems using reflection or reradiation of waves whose nature or wavelength is irrelevant or unspecified
    • G01S13/88—Radar or analogous systems specially adapted for specific applications
    • G01S13/89—Radar or analogous systems specially adapted for specific applications for mapping or imaging
    • G01S13/90—Radar or analogous systems specially adapted for specific applications for mapping or imaging using synthetic aperture techniques, e.g. synthetic aperture radar [SAR] techniques
    • G01S13/904—SAR modes
    • G01S13/9043—Forward-looking SAR
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S13/00—Systems using the reflection or reradiation of radio waves, e.g. radar systems; Analogous systems using reflection or reradiation of waves whose nature or wavelength is irrelevant or unspecified
    • G01S13/88—Radar or analogous systems specially adapted for specific applications
    • G01S13/89—Radar or analogous systems specially adapted for specific applications for mapping or imaging
    • G01S13/90—Radar or analogous systems specially adapted for specific applications for mapping or imaging using synthetic aperture techniques, e.g. synthetic aperture radar [SAR] techniques
    • G01S13/904—SAR modes
    • G01S13/9041—Squint mode
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S13/00—Systems using the reflection or reradiation of radio waves, e.g. radar systems; Analogous systems using reflection or reradiation of waves whose nature or wavelength is irrelevant or unspecified
    • G01S13/88—Radar or analogous systems specially adapted for specific applications
    • G01S13/89—Radar or analogous systems specially adapted for specific applications for mapping or imaging
    • G01S13/90—Radar or analogous systems specially adapted for specific applications for mapping or imaging using synthetic aperture techniques, e.g. synthetic aperture radar [SAR] techniques
    • G01S13/9004—SAR image acquisition techniques
    • G01S13/9017—SAR image acquisition techniques with time domain processing of the SAR signals in azimuth
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
    • G01S7/41—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00 using analysis of echo signal for target characterisation; Target signature; Target cross-section

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Abstract

The invention provides an SAR front side-looking imaging method based on an FPGA and a plurality of multi-core DSPs, which is used for solving the technical problem of poor imaging algorithm real-time performance existing in the existing high-speed aircraft SAR imaging platform and comprises the following implementation steps: 1. initializing a signal processor and SAR parameters; 2, the FPGA acquires and sends an echo signal matrix block; DSPn echo signal matrix block
Figure DDA0002489128940000011
Performing distance dimension FFT interpolation; 4, DSPn is to echo signal matrix block after FFT interpolation
Figure DDA0002489128940000012
Carrying out BP integral; DSPn vs { S1,S2,···,Sx,···,
Figure DDA0002489128940000013
And performing sub-aperture image fusion.

Description

SAR front-side-looking imaging method based on FPGA and multiple multi-core DSPs
Technical Field
The invention belongs to the technical field of digital signal processing, relates to an SAR front-side-looking imaging method, in particular to an SAR front-side-looking imaging method based on an FPGA and a plurality of multi-core DSPs, and can be applied to the fields of rapid imaging processing of high-speed aircrafts and the like.
Background
Synthetic Aperture Radar (SAR) is the main body of Radar imaging, and has the widest application range. The synthetic aperture radar imaging technology obtains an SAR image with two-dimensional high resolution ratio of the distance dimension and the azimuth dimension by carrying out two-dimensional processing of the distance dimension and the azimuth dimension on a radar echo signal matrix, clearly shows the shape and the fine structure characteristics of a target, and greatly improves the detection and identification capability of the target.
In practical application, because a high-speed aircraft needs to have certain maneuverability to perform actions such as turning and turning, a radar is required to observe a target scene in advance, and thus an SAR imaging algorithm is required to work in a front side view mode, compared with a traditional front side view mode, the SAR imaging algorithm has the defects that the calculation amount is large, the imaging real-time performance is difficult to guarantee, and the application of the SAR imaging technology in the high-speed aircraft is limited. Existing SAR front-side view imaging algorithms can be divided into two categories: one is a frequency domain SAR imaging algorithm based on Fourier transform, and the other is a time domain SAR imaging algorithm based on pixel-by-pixel interpolation and coherent accumulation. However, most frequency domain SAR imaging algorithms approximate a target transmission function, and the approximation conditions in the imaging algorithms are sensitive to SAR parameters, which brings about severe space-variant errors in large-scene imaging, resulting in poor SAR image quality, thereby limiting the application range of the SAR imaging technology in high-speed aircrafts.
In order to solve the above problems, the current research situation is to use a frequency domain SAR imaging algorithm and control a scene range of SAR imaging. The method reduces the operation complexity of the SAR imaging algorithm and ensures the real-time performance of SAR imaging. However, the method is only suitable for the condition that the imaging scene range is not large, and under the condition that the imaging scene range is large, the operation complexity of the imaging method is increased, and the real-time performance of SAR imaging is reduced; on the other hand, a time domain SAR imaging algorithm is adopted, and the number of digital signal processing chips on the signal processor is increased. The time domain imaging algorithm has flexible observation geometry, high focusing precision and controllable image resolution, has higher parallelism, but has huge calculation complexity, and can effectively solve the problem of poor real-time performance of the time domain imaging algorithm caused by huge calculation complexity by increasing the number of digital signal processing chips on a signal processor. In the technical text for realizing the multi-core DSP parallel architecture named as the large squint time domain SAR imaging algorithm published in 2019 by Haohao, a processing method for realizing the large squint time domain SAR imaging algorithm by utilizing four multi-core DSPs and grouping pairwise and adopting a mode of in-group running water and inter-group ping-pong is disclosed. However, the disadvantages of this method are: firstly, the time domain SAR imaging algorithm adopted by the method realizes sub-aperture image fusion by utilizing a two-dimensional interpolation mode, so that the calculation complexity of the time domain SAR imaging algorithm is increased, the time for forming an SAR front side view image by the method needs 2058ms, and the problem of poor real-time performance of the time domain SAR imaging algorithm still exists. Secondly, the multi-core DSP parallel architecture designed by the method cannot fully utilize the signal processing capability of a multi-core DSP chip, uses more hardware resources and has larger power consumption of a signal processor.
Disclosure of Invention
The invention aims to provide an SAR front-side-looking imaging method based on an FPGA and a plurality of multi-core DSPs (digital signal processors) aiming at the defects in the technology, and is used for solving the technical problem of poor imaging algorithm real-time performance in the existing high-speed aircraft SAR imaging platform.
In order to achieve the purpose, the technical scheme adopted by the invention comprises the following steps:
(1) initializing a signal processor and SAR parameters:
initializing FPGA on signal processor to acquire SAR and send carrier frequency to target sceneIs fcThe echo sampling matrix generated by the linear frequency modulation signal is SM×N(ii) a Initializing g multi-core DSP chips arranged in parallel on the signal processor as { DSP1, DSP2, …, DSPn, …, DSPg }; the initialization includes a synthetic aperture length L, a sub-aperture length LsubAnd the pitch RsWherein M is a distance dimension sampling point number, N is an orientation dimension sampling point number, DSPn is the nth DSP chip containing Q cores, g is the number of the multi-core DSP chip, Q is not less than 8, g is not less than 3, N ∈ [1, g]；
(2) The FPGA acquires an echo signal matrix block and sends the echo signal matrix block:
FPGA echo sampling matrix SM×NPerforming distance dimension pulse compression to obtain an echo signal matrix after the distance dimension pulse compression
Figure BDA0002489128920000021
And will be
Figure BDA0002489128920000022
Dividing the signal into g echo signal matrix blocks with the same number as that of the multi-core DSP chips according to the azimuth dimension
Figure BDA0002489128920000023
Then, the nth echo signal matrix block is processed
Figure BDA0002489128920000024
Sending the data to a corresponding DSPn memory, wherein gnIs composed of
Figure BDA0002489128920000025
P is distance dimension pulse compression;
(3) DSPn echo signal matrix block
Figure BDA0002489128920000026
Performing distance dimension FFT interpolation:
DSPn matrix block of echo signals
Figure BDA0002489128920000027
Division into Q echo signal matrix blocks according to azimuth dimension
Figure BDA0002489128920000028
And J is used as an interpolation multiple pair through a q-th kernel
Figure BDA0002489128920000029
Performing distance dimension FFT interpolation to obtain echo signal matrix block after distance dimension FFT interpolation
Figure BDA00024891289200000210
Figure BDA00024891289200000211
Represents the q +1 th echo signal matrix block after the FFT interpolation of the distance dimension, wherein, gn(q+1)Is composed of
Figure BDA0002489128920000031
K is the number of distance dimension points after distance dimension FFT interpolation, K is M × J, I is FFT interpolation, Q ∈ {0,1, …, Q-1 };
(4) echo signal matrix block after DSPn distance dimension FFT interpolation
Figure BDA0002489128920000032
BP integration was performed:
(4a) DSPn calculates SAR to any point target U (r, theta) in a unified polar coordinate system (r, theta) taking the synthetic aperture center of SAR as a pole and the track of SAR as a polar axisU,θU) Is measured at a distance R (D; r isU,θU) Wherein r and θ are the polar diameter and polar angle, respectively, rUThe pole diameter in (r, theta) of the target U is an arbitrary point, thetaUThe polar angle of the target U in (r, theta) is an arbitrary point, D is the polar diameter of SAR in (r, theta), D ∈ [ -L/2, L/2);
(4b) DSPn echo signal matrix block after FFT interpolation according to azimuth dimension
Figure BDA0002489128920000033
Is divided into
Figure BDA0002489128920000034
An echo signal matrix block
Figure BDA0002489128920000035
And use of R (D; R)U,θU) To pair
Figure BDA0002489128920000036
BP integral is carried out to obtain a low-resolution sub-aperture image
Figure BDA0002489128920000037
Wherein the content of the first and second substances,
Figure BDA0002489128920000038
for the x-th echo signal matrix block, gnxIs composed of
Figure BDA0002489128920000039
Number of columns, SxFor the x-th low-resolution sub-aperture image,
Figure BDA00024891289200000310
(5) DSPn pair
Figure BDA00024891289200000311
Performing sub-aperture image fusion;
(5a) DSPn according to the carrier frequency f of the chirp signalcSynthetic aperture length L, sub-aperture length LsubSlope distance RsCalculating SxTrue wave number spectrum center K ofxAnd through KxTo SxThe wave number spectrum center is corrected to obtain a low-resolution sub-aperture image after the wave number spectrum center is corrected
Figure BDA00024891289200000312
Sx' is the x-th low-resolution sub-aperture image after wave number spectrum center correction;
(5b) low resolution sub-aperture images with center correction of the DSPn versus wavenumber spectra
Figure BDA00024891289200000313
IFFT is carried out in the azimuth dimension to obtain
Figure BDA00024891289200000314
Amplitude-time domain sub-aperture image
Figure BDA00024891289200000315
Figure BDA00024891289200000316
The x-th time domain sub-aperture image after wave number spectrum center correction is obtained, wherein T is a time domain;
(5c) DSPn pair
Figure BDA00024891289200000317
Amplitude-time domain sub-aperture image
Figure BDA00024891289200000318
Superposing in the azimuth dimension to obtain a full aperture wave number spectrum SAR image;
(5d) and the DSPn performs FFT on the full-aperture wave number spectrum SAR image in an azimuth dimension to obtain an SAR front side view image.
Compared with the prior art, the method has the following advantages:
1. according to the invention, through carrying out wave number spectrum center correction and azimuth dimension IFFT processing on a low-resolution sub-aperture image obtained after BP integration, and finally realizing sub-aperture image fusion through a sub-aperture image superposition method, compared with the prior art which adopts two-dimensional interpolation in a distance dimension and an azimuth dimension to realize sub-aperture image fusion, the imaging algorithm disclosed by the invention has the advantages that the calculation complexity is greatly reduced, the load and the expense of a multi-core DSP chip are reduced, the real-time performance of a time domain SAR imaging algorithm is greatly improved, and the time for forming an SAR front side view image only needs 789 ms.
2. When the echo data after the FFT interpolation is subjected to BP integration, the method for carrying out BP integration on the echo data by rows is adopted, and compared with the existing method for carrying out block BP integration on the echo data in the azimuth dimension, the method solves the problem that the BP integration must be operated in a DSP memory with lower calculation speed due to large echo data amount, so that fewer hardware resources are used, the real-time performance of an imaging algorithm can be ensured, and the power consumption of a signal processor is lower.
Drawings
FIG. 1 is a block diagram of a signal processor employed in the present invention;
FIG. 2 is a flow chart of an implementation of the present invention;
FIG. 3 is an echo sampling matrix S according to the present inventionM×NThe DSP chip data dividing schematic diagram;
fig. 4 is a SAR front side view image obtained by processing measured data according to the present invention.
Detailed Description
The invention is described in further detail below with reference to the following figures and specific examples:
referring to fig. 1, a signal processor adopted in the present invention includes one FPGA chip and three multi-core DSP chips, where the FPGA chip used in this embodiment is XC7VX485TFFG1927-2 produced by Xilinx corporation, the number of logic units of the chip reaches 485760, the number of DSP Slice reaches 2800, the number of available pins for a user is 700, and the number of high-speed serial transceivers is 56, so as to implement various high-speed serial bus protocols, and the DSP chip used in this embodiment is TMSC320C6678 produced by TI corporation, and 8 processor cores are integrated in the chip, the master frequency can reach up to 1.4GHz, and the multi-core processors are allowed to execute computation tasks at full speed in parallel;
referring to fig. 2, the present invention includes the steps of:
step 1) initializing a signal processor and SAR parameters:
initializing FPGA on signal processor to acquire SAR and send carrier frequency f to target scenecThe echo sampling matrix generated by the linear frequency modulation signal is SM×N(ii) a Initializing g multi-core DSP chips arranged in parallel on the signal processor as { DSP1, DSP2, …, DSPn, …, DSPg }; the initialization includes a synthetic aperture length L, a sub-aperture length LsubAnd the pitch RsWherein M is a distance dimension sampling point number, N is an orientation dimension sampling point number, DSPn is the nth DSP chip containing Q cores, g is the number of the multi-core DSP chip, Q is not less than 8, g is not less than 3, N ∈ [1, g]；
In this embodiment, a signal processorThe FPGA acquires the echo sampling matrix S through the analog-to-digital conversion chip ADS5463M×NThe distance dimension sampling point number M is 1024, the azimuth dimension sampling point number N is 2048, the number g of the multi-core DSP chips is 3, and the number Q of the DSPn cores is 8;
step 2), the FPGA acquires an echo signal matrix block and sends the echo signal matrix block:
FPGA echo sampling matrix SM×NPerforming distance dimension pulse compression to obtain an echo signal matrix after the distance dimension pulse compression
Figure BDA0002489128920000051
And with reference to fig. 3 will
Figure BDA0002489128920000052
Averagely dividing the signal into g echo signal matrix blocks with the number equal to that of the multi-core DSP chips according to the azimuth dimension
Figure BDA0002489128920000053
Then, the nth echo signal matrix block is processed
Figure BDA0002489128920000054
Sending the data to a corresponding DSPn memory, wherein gnIs composed of
Figure BDA0002489128920000055
P is distance dimension pulse compression;
in this embodiment, a high-speed serial data interface Rapid IO is adopted to send g divided echo signal matrix blocks to a corresponding DSPn memory, wherein a data transmission link of the high-speed serial data interface Rapid IO is configured in a 4x mode, the transmission rate of each link is 3.125Gb/s, and the DSPn memory refers to a DDR SDRAM chip connected with the DSPn and having a capacity of 2 Gb;
step 3) DSPn echo signal matrix block
Figure BDA0002489128920000056
Performing distance dimension FFT interpolation:
DSPn matrix block of echo signals
Figure BDA0002489128920000057
Division into Q echo signal matrix blocks according to azimuth dimension
Figure BDA0002489128920000058
And J is used as an interpolation multiple pair through a q-th kernel
Figure BDA0002489128920000059
Performing distance dimension FFT interpolation to obtain echo signal matrix block after distance dimension FFT interpolation
Figure BDA00024891289200000510
Figure BDA00024891289200000511
Represents the q +1 th echo signal matrix block after the FFT interpolation of the distance dimension, wherein, gn(q+1)Is composed of
Figure BDA00024891289200000512
In the embodiment, Q cores of the DSPn acquire an echo signal matrix block corresponding to each core from a DDR SDRAM chip in an EDMA mode to a secondary cache for FFT interpolation, after the FFT interpolation is completed, the Q cores of the DSPn store the echo signal matrix block after the FFT interpolation in a DDR SDRAM chip in an EDMA mode, and an interpolation multiple J takes a value of 8;
step 4) DSPn echo signal matrix block after distance dimension FFT interpolation
Figure BDA0002489128920000061
BP integration was performed:
step 4a) DSPn calculates SAR to any point target U (r, theta) in a unified polar coordinate system (r, theta) with the synthetic aperture center of SAR as a pole and the track of SAR as a polar axisU,θU) Is measured at a distance R (D; r isU,θU) The calculation formula is as follows:
Figure BDA0002489128920000062
wherein r and theta are the polar diameter and the polar angle, respectively, rUThe pole diameter in (r, theta) of the target U is an arbitrary point, thetaUThe polar angle of the target U in (R, theta) is an arbitrary point, D is the polar diameter of SAR in (R, theta), D ∈ [ -L/2, L/2), and in the embodiment, DSPn is the instantaneous distance R (D; R) to increase the running speed calculated by the imaging algorithmU,θU) The calculation of (2) is carried out in the second-level cache;
step 4b) DSPn is used for interpolating the echo signal matrix block after FFT according to the azimuth dimension
Figure BDA0002489128920000063
Is divided into
Figure BDA0002489128920000064
An echo signal matrix block
Figure BDA0002489128920000065
And use of R (D; R)U,θU) To pair
Figure BDA0002489128920000066
BP integral is carried out to obtain a low-resolution sub-aperture image
Figure BDA0002489128920000067
The calculation formula is as follows:
Figure BDA0002489128920000068
wherein exp [. C]Is an exponential function with e as the base, j is an imaginary number, Krc4 pi/lambda is distance wave number center, lambda is linear frequency modulation signal carrier frequency fcCorresponding to the wavelength, dD is the differential of the variable D,
Figure BDA0002489128920000069
for the x-th echo signal matrix block, gnxIs composed of
Figure BDA00024891289200000610
Number of columns, SxFor the x-th low-resolution sub-aperture image,
Figure BDA00024891289200000611
in this embodiment, DSPn is an echo signal matrix block
Figure BDA00024891289200000614
Dot-by-dot, column-by-column, with the exponential term exp jKrcR(D；rU,θU)]Multiplying and accumulating the calculation results of all the columns to obtain a low-resolution sub-aperture image Sx；
Step 5) DSPn pairs
Figure BDA00024891289200000612
Performing sub-aperture image fusion;
step 5a) DSPn according to the carrier frequency f of the chirp signalcSynthetic aperture length L, sub-aperture length LsubSlope distance RsCalculating SxTrue wave number spectrum center K ofxAnd through KxTo SxThe wave number spectrum center is corrected to obtain a low-resolution sub-aperture image after the wave number spectrum center is corrected
Figure BDA00024891289200000613
Sx' is the x-th low-resolution sub-aperture image after wave number spectrum center correction;
step 5a1) DSPn calculates SxTrue wavenumber spectrum center of (c):
Figure BDA0002489128920000071
wherein, αuIs the center of the u-th sub-aperture,
Figure BDA0002489128920000072
step 5a2) DSPn will pass KxThe wave number spectrum center obtained by calculation corrects the phase HxAnd SxIs taken as the product of SxWave number spectrum center ofCorrecting the result, wherein:
Figure BDA0002489128920000073
step 5b) low resolution sub-aperture image with DSPn corrected for wave number spectral center
Figure BDA0002489128920000074
IFFT is carried out in the azimuth dimension to obtain
Figure BDA0002489128920000075
Amplitude-time domain sub-aperture image
Figure BDA0002489128920000076
Figure BDA0002489128920000077
The x-th time domain sub-aperture image after wave number spectrum center correction is obtained, wherein T is a time domain;
in this embodiment, the low resolution sub-aperture image S is processedxWhen IFFT is carried out in azimuth dimension, Q cores of DSPn carry out IFFT on data blocks corresponding to the cores line by line in parallel;
step 5c) DSPn pairs
Figure BDA0002489128920000078
Amplitude-time domain sub-aperture image
Figure BDA0002489128920000079
Superposing in the azimuth dimension to obtain a full aperture wave number spectrum SAR image;
step 5c1) randomly selecting one multi-core DSP chip in { DSP1, DSP2, …, DSPn, … and DSPg } as DSPaAnd the rest g-1 multi-core DSP chips
Figure BDA00024891289200000710
Send to the DSPaMemory, wherein, a ∈ [1, g]；
In this embodiment, DSPaFor DSP2 on the signal processor, DSP1 and DSP3 pass high respectivelyOn-chip Hyperlink and PCIE serial data interface
Figure BDA00024891289200000711
Sending to DDR SDRAM on DSP 2;
step 5c2) DSPaSuperposing the time domain sub-aperture images in the memory of the SAR and the time domain sub-aperture images in the g-1 multi-core DSP chips in the azimuth dimension to obtain a full aperture wave number spectrum SAR image;
in this embodiment, DSPaEach core of the time domain sub-aperture image is overlapped line by line, and the overlapped part of the time domain sub-aperture image is 50 percent of the original time domain sub-aperture image;
and step 5d) the DSPn performs FFT on the full aperture wave number spectrum SAR image in an azimuth dimension to obtain an SAR front side view image, as shown in FIG. 4, FIG. 4 is a front side view image which is formed by processing actual measurement data of the radar and has a scene size of 5km multiplied by 5km, and the imaging effect is good.
The above description is only one embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.

Claims (5)

1. An SAR front-side view imaging method based on an FPGA and a plurality of multi-core DSPs is characterized by comprising the following steps:
(1) initializing a signal processor and SAR parameters:
initializing FPGA on signal processor to acquire SAR and send carrier frequency f to target scenecThe echo sampling matrix generated by the linear frequency modulation signal is SM×N(ii) a Initializing g multi-core DSP chips arranged in parallel on the signal processor as { DSP1, DSP2, …, DSPn, …, DSPg }; the initialization includes a synthetic aperture length L, a sub-aperture length LsubAnd the pitch RsThe SAR parameter of (1); wherein M is the number of distance dimension sampling points, N is the number of azimuth dimension sampling points, and DSPn isThe nth DSP chip containing Q cores, Q is more than or equal to 8, g is more than or equal to 3, n ∈ [1, g]；
(2) The FPGA acquires an echo signal matrix block and sends the echo signal matrix block:
FPGA echo sampling matrix SM×NPerforming distance dimension pulse compression to obtain an echo signal matrix after the distance dimension pulse compression
Figure FDA0002489128910000011
And will be
Figure FDA0002489128910000012
Dividing the signal into g echo signal matrix blocks with the same number as that of the multi-core DSP chips according to the azimuth dimension
Figure FDA0002489128910000013
Then, the nth echo signal matrix block is processed
Figure FDA0002489128910000014
Sending the data to a corresponding DSPn memory, wherein gnIs composed of
Figure FDA0002489128910000015
P is distance dimension pulse compression;
(3) DSPn echo signal matrix block
Figure FDA0002489128910000016
Performing distance dimension FFT interpolation:
DSPn matrix block of echo signals
Figure FDA0002489128910000017
Division into Q echo signal matrix blocks according to azimuth dimension
Figure FDA0002489128910000018
And J is used as an interpolation multiple pair through a q-th kernel
Figure FDA0002489128910000019
Performing distance dimension FFT interpolation to obtain echo signal matrix block after distance dimension FFT interpolation
Figure FDA00024891289100000110
Wherein the content of the first and second substances,
Figure FDA00024891289100000111
representing the q +1 th echo signal matrix block, g, after distance dimension FFT interpolationn(q+1)Is composed of
Figure FDA00024891289100000112
K is the number of distance dimension points after distance dimension FFT interpolation, K is M × J, I is FFT interpolation, Q ∈ {0,1, …, Q-1 };
(4) echo signal matrix block after DSPn interpolation on distance dimension and distance dimension FFT
Figure FDA00024891289100000113
BP integration was performed:
(4a) DSPn calculates SAR to any point target U (r, theta) in a unified polar coordinate system (r, theta) taking the synthetic aperture center of SAR as a pole and the track of SAR as a polar axisU,θU) Is measured at a distance R (D; r isU,θU) Wherein r and θ are the polar diameter and polar angle, respectively, rUThe pole diameter in (r, theta) of the target U is an arbitrary point, thetaUThe polar angle of the target U in (r, theta) is an arbitrary point, D is the polar diameter of SAR in (r, theta), D ∈ [ -L/2, L/2);
(4b) DSPn echo signal matrix block after FFT interpolation according to azimuth dimension
Figure FDA0002489128910000021
Is divided into
Figure FDA0002489128910000022
An echo signal matrix block
Figure FDA0002489128910000023
And use of R (D; R)U,θU) To pair
Figure FDA0002489128910000024
BP integral is carried out to obtain a low-resolution sub-aperture image
Figure FDA0002489128910000025
Wherein the content of the first and second substances,
Figure FDA0002489128910000026
for the x-th echo signal matrix block, gnxIs composed of
Figure FDA0002489128910000027
Number of columns, SxFor the x-th low-resolution sub-aperture image,
Figure FDA0002489128910000028
(5) DSPn pair
Figure FDA0002489128910000029
Performing sub-aperture image fusion;
(5a) DSPn according to the carrier frequency f of the chirp signalcSynthetic aperture length L, sub-aperture length LsubSlope distance RsCalculating SxTrue wave number spectrum center K ofxAnd through KxTo SxThe wave number spectrum center is corrected to obtain a low-resolution sub-aperture image after the wave number spectrum center is corrected
Figure FDA00024891289100000210
Sx' is the x-th low-resolution sub-aperture image after wave number spectrum center correction;
(5b) low resolution sub-aperture images with center correction of the DSPn versus wavenumber spectra
Figure FDA00024891289100000211
IFFT is carried out in the azimuth dimension to obtain
Figure FDA00024891289100000212
Amplitude-time domain sub-aperture image
Figure FDA00024891289100000213
Figure FDA00024891289100000214
The x-th time domain sub-aperture image after wave number spectrum center correction is obtained, wherein T is a time domain;
(5c) DSPn pair
Figure FDA00024891289100000215
Amplitude-time domain sub-aperture image
Figure FDA00024891289100000216
Superposing in the azimuth dimension to obtain a full aperture wave number spectrum SAR image;
(5d) and the DSPn performs FFT on the full-aperture wave number spectrum SAR image in an azimuth dimension to obtain an SAR front side view image.
2. The method of claim 1, wherein the SAR-to-arbitrary point target U (r) is calculated in step (4a) by using the SAR front-view imaging method based on the FPGA and the multiple multi-core DSPsU,θU) Is measured at a distance R (D; r isU,θU) The calculation formula is as follows:
Figure FDA0002489128910000031
3. the SAR front-side view imaging method based on FPGA and multiple multi-core DSP of claim 1 characterized in that R (D; R) is utilized in step (4b)U,θU) To pair
Figure FDA0002489128910000032
BP integral is carried out, and the calculation formula is as follows:
Figure FDA0002489128910000033
wherein exp [. C]Is an exponential function with e as the base, j is an imaginary number, Krc4 pi/lambda is distance wave number center, lambda is linear frequency modulation signal carrier frequency fcCorresponding to the wavelength, dD is the differential of the variable D.
4. The SAR front-side view imaging method based on FPGA and multiple multi-core DSP of claim 1, characterized in that, the pass K in step (5a)xTo SxThe wave number spectrum center of (2) is corrected, and the method comprises the following steps:
(5a1) DSPn calculates SxTrue wavenumber spectrum center of (c):
Figure FDA0002489128910000034
wherein, αuIs the center of the u-th sub-aperture,
Figure FDA0002489128910000035
(5a2) DSPn will pass KxThe wave number spectrum center obtained by calculation corrects the phase HxAnd SxIs taken as the product of SxThe wave number spectrum center correction result of (1), wherein:
Figure FDA0002489128910000036
5. the SAR front-side view imaging method based on FPGA and multiple multi-core DSP of claim 1, characterized in that the pair in step (5c)
Figure FDA0002489128910000037
Amplitude-time domain sub-aperture image
Figure FDA0002489128910000038
The superposition is carried out in the direction dimension,the method comprises the following steps:
(5c1) randomly selecting one multi-core DSP chip in { DSP1, DSP2, …, DSPn, … and DSPg } as DSPaAnd the rest g-1 multi-core DSP chips
Figure FDA0002489128910000039
Send to the DSPaMemory, wherein, a ∈ [1, g]；
(5c2)DSPaAnd superposing the time domain sub-aperture images in the memory of the SAR and the time domain sub-aperture images in the g-1 multi-core DSP chips in the azimuth dimension to obtain a full-aperture wave number spectrum SAR image.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112924966A (en) * 2021-01-25 2021-06-08 电子科技大学 Terahertz video SAR real-time processing system
CN113156435A (en) * 2021-02-08 2021-07-23 西安电子科技大学 Missile-borne SAR front-side view time domain imaging method based on embedded GPU
CN113254214A (en) * 2021-06-08 2021-08-13 西安科技大学 OpenMP-based flip chip acoustic-time-frequency-domain and time-domain imaging method
WO2022166605A1 (en) * 2021-02-08 2022-08-11 北京灵汐科技有限公司 Signal processing method based on many-core chip, and electronic device and medium

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006266775A (en) * 2005-03-23 2006-10-05 Mitsubishi Electric Corp Radar device
CN108120980A (en) * 2017-12-13 2018-06-05 南京航空航天大学 A kind of implementation method of the FPGA of satellite-borne SAR multi-modal imaging signal processing algorithm
CN110488289A (en) * 2019-08-21 2019-11-22 苏州兴钊防务研究院有限公司 Photoelectric-synergetic synthetic aperture radar image-forming processing method based on overlapping sub-aperture

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006266775A (en) * 2005-03-23 2006-10-05 Mitsubishi Electric Corp Radar device
CN108120980A (en) * 2017-12-13 2018-06-05 南京航空航天大学 A kind of implementation method of the FPGA of satellite-borne SAR multi-modal imaging signal processing algorithm
CN110488289A (en) * 2019-08-21 2019-11-22 苏州兴钊防务研究院有限公司 Photoelectric-synergetic synthetic aperture radar image-forming processing method based on overlapping sub-aperture

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
崔爱欣等: "基于FPGA的星载SAR成像信号处理技术", 《现代雷达》 *

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112924966A (en) * 2021-01-25 2021-06-08 电子科技大学 Terahertz video SAR real-time processing system
CN112924966B (en) * 2021-01-25 2022-04-22 电子科技大学 Terahertz video SAR real-time processing system
CN113156435A (en) * 2021-02-08 2021-07-23 西安电子科技大学 Missile-borne SAR front-side view time domain imaging method based on embedded GPU
WO2022166605A1 (en) * 2021-02-08 2022-08-11 北京灵汐科技有限公司 Signal processing method based on many-core chip, and electronic device and medium
CN113156435B (en) * 2021-02-08 2023-09-15 西安电子科技大学 Missile-borne SAR front side view time domain imaging method based on embedded GPU
CN113254214A (en) * 2021-06-08 2021-08-13 西安科技大学 OpenMP-based flip chip acoustic-time-frequency-domain and time-domain imaging method
CN113254214B (en) * 2021-06-08 2023-03-10 西安科技大学 OpenMP-based flip chip acoustic-time-frequency-domain and time-domain imaging method

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