CN111462682A - Light emitting diode L ED drive circuit and light emitting diode L ED display system - Google Patents
Light emitting diode L ED drive circuit and light emitting diode L ED display system Download PDFInfo
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- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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Abstract
The invention discloses a light emitting diode L ED driving circuit and a light emitting diode L ED display system, wherein the driving circuit comprises a differential interface sub-circuit used for receiving differential signals, a display logic control sub-circuit connected with the differential interface sub-circuit and used for extracting L ED display first logic control data from the differential signals and sending the first logic control data to a first controller so that the first controller controls the on-off state of a second controller based on the first logic control data, and a display control switch sub-circuit connected with the differential interface sub-circuit and used for extracting L ED display second logic control data from the differential signals and sending the second logic control data to a third controller so that the third controller controls the on-off state of a fourth controller based on the second logic control data.
Description
Technical Field
The invention relates to the technical field of L ED drive control, in particular to a light emitting diode L ED drive circuit and a light emitting diode L ED display system.
Background
Currently, the communication control mode of the existing light Emitting Diode (L light Emitting Diode, abbreviated as L ED) driving chip is Serial Peripheral Interface (SPI), fig. 1 is a schematic diagram of an SPI Interface according to the communication control mode of the existing L ED driving chip, and specifically shows that as shown in fig. 1, the communication control mode of the existing L ED driving chip, the communication control mode of the existing MOS integrated IC, and the communication control mode of the existing independent MOS are shown, whereas the existing L ED driving chip is a low-speed TT L communication control mode, and includes five signals DC L K, GC L K, SDI, SDO, <tttransmission & "&tttl &ttt/t >t6E, wherein DC L K is responsible for data transmission and synchronization, several common driving chips may share data signals, SDI is responsible for data transmission, SDI 42 is responsible for data transmission, and the Serial input control chip is responsible for data output control of the Serial Peripheral Interface (SPI Interface) chip, and the Serial input control chip is responsible for data output control of the Serial Peripheral Interface (SPI) chip, and the Serial input control chip is responsible for controlling the Serial input of the Serial input chip 42.
As can be seen from fig. 1, the conventional PCB layout has complex circuits and occupies a large area of the PCB.
Aiming at the problems of complex design and high cost of a PCB (printed circuit board) of a display module of an L ED (electronic device) driving chip in the related art, an effective solution is not provided at present.
Disclosure of Invention
The embodiment of the invention provides a light-emitting diode L ED driving circuit and a light-emitting diode L ED display system, which at least solve the technical problems that a PCB (printed circuit board) of a display module of a L ED driving chip in the related art is relatively complex in design and relatively high in cost.
According to an aspect of the embodiment of the invention, the light emitting diode L ED driving circuit is integrated on a L ED driving chip and comprises a differential interface sub-circuit, a display logic control sub-circuit and a display control switch sub-circuit, wherein the differential interface sub-circuit is used for receiving differential signals, the display logic control sub-circuit is connected with the differential interface sub-circuit and used for extracting L ED display first logic control data from the differential signals and sending the first logic control data to a first controller so that the first controller controls the on-off state of a second controller based on the first logic control data, and the display control switch sub-circuit is connected with the differential interface sub-circuit and used for extracting L ED display second logic control data from the differential signals and sending the second logic control data to a third controller so that the third controller controls the on-off state of a fourth controller based on the second logic control data.
Optionally, the differential interface sub-circuit is further configured to connect the L ED driver chip with a L ED driver chip in a L ED array adjacent to the L ED driver chip, so as to enable communication between multiple driver chips in the L ED array.
Optionally, the differential signals include a first differential signal, a second differential signal, and a third differential signal, where the first differential signal is a clock differential signal and is used to control the display timing of the L ED, the second differential signal is a signal corresponding to the first logic control data, and the third differential signal is a signal corresponding to the second logic control data.
Optionally, the first logic control data comprises three primary color RGB logic control data for the L ED display and beat control data for the L ED display.
Optionally, the display logic control sub-circuit is further configured to extract the RGB logic control data from the second differential signal based on a transmission relationship between the first differential signal and the second differential signal, and store the RGB logic control data in an RGB buffer.
Optionally, the display logic control sub-circuit is further configured to extract the beat control data from the second differential signal based on a transmission relationship between a first differential signal and a second differential signal, and transmit the beat control data to the first controller, where the first controller is a display control metronome.
Optionally, the display control metronome transfers the RGB logic control data stored in the RGB buffer to a galvanostat according to the beat control data.
Optionally, the galvanostat is configured to generate L ED display logic current based on the RGB logic control data, where the L ED display logic current is configured to control an on/off state of the second controller, and the second controller is an RGB switch controller.
Optionally, the second logic control data comprises switch logic control data for the L ED display and switch beat data for the L ED display.
Optionally, the display control switch sub-circuit is further configured to extract the switch logic control data from the third differential signal based on a transmission relationship between the first differential signal and the third differential signal, and store the switch logic control data in a switch state buffer.
Optionally, the display logic control sub-circuit is further configured to extract the switching beat data from the third differential signal based on a transmission relationship between the first differential signal and the third differential signal, and transmit the switching beat data to the third controller, where the third controller is a display switching beat device.
Optionally, the display switch metronome transmits the switch logic control data to the fourth controller according to the switch beat data to control the on-off state of the MOS transistor in the L ED, wherein the fourth controller is a switch state controller.
According to another aspect of the embodiments of the present invention, there is provided a light emitting diode L ED display system, including a L ED array, and a light emitting diode L ED driving circuit of any one of the above embodiments for driving the L ED array.
In the embodiment of the invention, a differential interface sub-circuit is adopted for receiving differential signals, a display logic control sub-circuit is connected with the differential interface sub-circuit and is used for extracting L first logic control data for ED display from the differential signals and sending the first logic control data to a first controller so as to enable the first controller to control the on-off state of a second controller based on the first logic control data, and a display control switch sub-circuit is connected with the differential interface sub-circuit and is used for extracting L second logic control data for ED display from the differential signals and sending the second logic control data to a third controller so as to enable the third controller to control the on-off state of a fourth controller based on the second logic control data.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention. In the drawings:
FIG. 1 is a schematic diagram of an SPI interface for communication control of an L ED driver chip according to the prior art;
FIG. 2 is a schematic diagram of an LED L ED driving circuit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of interface differential signal data relationships of a differential interface subcircuit according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a display logic control sub-circuit according to an embodiment of the present invention;
FIG. 5 is a data structure diagram of a display control metronome and RGB buffer according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of a display control switch sub-circuit according to an embodiment of the present invention;
FIG. 7 is a data structure diagram showing a switch metronome and a switch state buffer according to an embodiment of the present invention;
fig. 8 is a schematic diagram of an alternative led L ED driver circuit in accordance with the present invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
For convenience of understanding, some nouns or terms appearing in the embodiments of the present invention are explained below.
Differential Signal (DS): the difference between two physical quantities is represented by a numerical value.
Low voltage differential signaling (L VDS) is a low swing differential signaling technique that enables signals to be transmitted at rates of several hundred Mbps on differential PCB wire pairs or balanced cables, with low voltage swing and low current drive output achieving low noise and low power consumption.
According to an aspect of the embodiments of the present invention, there is provided a light emitting diode L ED driving circuit integrated on a L ED driving chip, fig. 2 is a schematic diagram of a light emitting diode L ED driving circuit according to an embodiment of the present invention, and as shown in fig. 2, the light emitting diode L ED driving circuit includes a differential interface sub-circuit 21, a display logic control sub-circuit 23, and a display control switch sub-circuit 25, and the light emitting diode L ED driving circuit is explained below.
A differential interface sub-circuit 21 for receiving differential signals.
And a display logic control sub-circuit 23 connected to the differential interface sub-circuit 21, for extracting L first logic control data for ED display from the differential signal, and sending the first logic control data to the first controller, so that the first controller controls the open/close state of the second controller based on the first logic control data.
And a display control switch sub-circuit 25 connected to the differential interface sub-circuit 21 for extracting L second logic control data for ED display from the differential signal and sending the second logic control data to the third controller so that the third controller controls the on/off state of the fourth controller based on the second logic control data.
As can be seen from the above, in the embodiment of the present invention, the led L ED driving circuit is integrated on the L ED driving chip, the differential interface sub-circuit is used to receive the differential signal, the display logic control sub-circuit connected to the differential interface sub-circuit is used to extract L ED display first logic control data from the differential signal, and send the first logic control data to the first controller, so that the first controller controls the on/off state of the second controller based on the first logic control data, and the display control switch sub-circuit connected to the differential interface sub-circuit is used to extract L ED display second logic control data from the differential signal, and send the second logic control data to the third controller, so that the third controller controls the on/off state of the fourth controller based on the second logic control data, thereby implementing the differential communication mode applied to the L ED driving chip to drive the L ED display, and achieving the simplified design of the display module L and the reduced cost of the PCB L.
Therefore, the light emitting diode L ED driving circuit provided by the embodiment of the invention solves the technical problems of complex PCB design and high cost of a L ED driving chip in the related art.
In an alternative embodiment, the differential interface subcircuit is further configured to connect L ED driver chips with L ED driver chips in the L ED array and adjacent to the L ED driver chips to enable communication between multiple driver chips in the L ED array.
In this embodiment, a differential interface subcircuit may be used to cascade a plurality of L ED driver chips in an L ED array to achieve display control of a L ED array.
The differential signals comprise a first differential signal, a second differential signal and a third differential signal, wherein the first differential signal is a clock differential signal and is used for controlling L ED display time sequence, the second differential signal is a signal corresponding to first logic control data, and the third differential signal is a signal corresponding to second logic control data.
Fig. 3 is a schematic diagram of an interface differential signal DATA relationship of a differential interface sub-circuit according to an embodiment of the present invention, and as shown in fig. 3, the differential interface sub-circuit may be mainly responsible for serially connecting different driver chips (i.e., L ED driver chips) to achieve communication interconnection of the plurality of driver chips, where DS1 is a clock differential signal (i.e., a first differential signal), DS2 is a DATA1 differential signal (i.e., a second differential signal), where DATA1 may be display content of L ED, DS2 is a DATA2 differential signal (i.e., a third differential signal), where DATA2 is RGB display switch control DATA, C580K is a clock signal (i.e., a first differential signal), and DS 5811/DS L/C L K is a differential clock signal in different positions in the diagram, where DS1 represents an interface external to the DS L ED driver chip, DS L represents an interface internal to the L ED driver chip, DS 2/L/DATA 1 represents a differential clock signal in different positions, where the DS 72/8672 b represents an external interface 3 b for the DATA signal (i.e., an external DATA signal 3 a 3 b, where the DATA signal is also represented by an external DATA signal 3 a 3 b, and 3 b is also represented by an external DATA signal (3 b).
In fig. 3, DS1 and DS2 can be used as a set of processing signals, and DS1 and DS3 can also be used as a set of processing signals, RGB corresponds to 8 bits of 0-7, wherein each bit can be represented by a state identification bit 0 or 1, 1 represents on, and 0 represents off, where scan _ a, scan _ b, and scan _ c represent three sets of switching signals transmitted in the data2 signal for L ED switches.
It should be noted that the differential signal in the embodiment of the present invention is preferably a low-voltage differential signal L VDS.
In the embodiment of the invention, the first logic control data comprises L RGB logic control data for ED display and L beat control data for ED display.
The first logic control data further includes L ED display content, i.e., RGB display content control data.
In one aspect, the display logic control sub-circuit is further configured to extract the RGB logic control data from the second differential signal based on a transmission relationship between the first differential signal and the second differential signal, and store the RGB logic control data in the RGB buffer.
In another aspect, the display logic control sub-circuit is further configured to extract beat control data from the second differential signal based on a transmission relationship between the first differential signal and the second differential signal, and transmit the beat control data to the first controller, where the first controller is a display control metronome.
The display control metronome transmits the RGB logic control data stored in the RGB buffer to the galvanostat according to the beat control data.
The galvanostat is configured to generate L ED display logic current based on the RGB logic control data, where L ED display logic current is used to control an on/off state of the second controller, and the second controller is an RGB switch controller.
Fig. 4 is a schematic diagram of a display logic control sub-circuit according to an embodiment of the present invention, and as shown in fig. 4, the display logic control sub-circuit may include a display logic controller respectively connected to an R buffer, a G buffer, and a B buffer, where the R buffer, the G buffer, and the B buffer are respectively connected to corresponding galvanostat, and the galvanostat is respectively connected to corresponding L ED, so as to control L ED display content and display tempo.
In addition, in order to realize the control of L ED display beat, the display logic control sub-circuit also comprises a display control metronome which is respectively connected with the display logic controller, the buffer, the galvanostat and the switch controller so as to realize the control of L ED display content and display beat.
In the embodiment, the transmission relationship between DS1(C L K) and DS2(DATA1) is utilized to extract the RGB control logic for L ED display from DS2 and store the extracted RGB control logic in the RGB buffer, the transmission relationship between DS1(C L K) and DS2(DATA1) is utilized to extract L ED display control beat signals from DS2 and transmit the extracted control beat signals to the display control metronome, the display control metronome transmits the control logic in the RGB display buffer to the galvanostat according to the beat signals to control the RGB galvanostat to generate L ED display logic current, and the on and off of the RGB switch controller are controlled.
Fig. 5 is a data structure diagram of a display control metronome and RGB buffers according to an embodiment of the present invention, and as shown in fig. 5, command _ a includes 8 bits of data, i.e., 256 combinations, which are transmitted to the display control metronome, L RGB data for display by ED, wherein R1/B1/G1 represents the first pixel, 0-7 represents the display contents of each primary color, and 256 display content levels are provided.
In an alternative embodiment, the second logic control data comprises L ED display switch logic control data and L ED display switch beat data.
In one aspect, the display control switch sub-circuit is further configured to extract the switch logic control data from the third differential signal based on a transmission relationship between the first differential signal and the third differential signal, and store the switch logic control data in the switch state buffer.
In another aspect, the display logic control sub-circuit is further configured to extract the switching beat data from the third differential signal based on a transmission relationship between the first differential signal and the third differential signal, and transmit the switching beat data to the third controller, where the third controller is a display switching beat device.
The display switch metronome transmits switch logic control data to the fourth controller according to the switch beat data so as to control the on-off state of an MOS (metal oxide semiconductor) tube in L ED, wherein the fourth controller is a switch state controller.
Fig. 6 is a schematic diagram of a display control switch sub-circuit according to an embodiment of the present invention, and as shown in fig. 6, the display control switch sub-circuit may further include: the display switch logic device is connected with the switch state buffer; the switch state buffer may be connected with the switch state controller, so that the switch state controller controls the MOS transistor (e.g., MOS1, MOS2, MOS3, MOS4, MOS5, MOS6, MOS7 … … MOSn in fig. 6) based on the switch logic control data.
Specifically, as shown in fig. 6, the display switch metronome is connected to the switch state controller, the switch state buffer, and the display switch logic, so that the display switch logic can transmit the switch logic control data to the switch state controller according to the switch beat data to control the on-off state of the MOS transistor in L ED.
In the embodiment, the switch control logic for L ED display can be extracted from DS3 by using the transmission relation between DS1(C L K) and DS3(DATA2), and then stored in the switch state buffer, the switch beat signal for L ED display can be extracted from DS3 by using the transmission relation between DS1(C L K) and DS3(DATA2), and then transmitted to the display switch metronome, and the display switch metronome transmits the switch state in the switch state buffer to the switch state controller according to the beat signal, so as to control the on and off actions of the MOS.
FIG. 7 is a data structure diagram showing a switch metronome and a switch status buffer according to an embodiment of the present invention, command _ b contains 8 bits of data, i.e., 256 combinations; the data are transmitted to a display switch metronome; the scan _ a/b/c respectively comprises 8 bits of data, and 24 bits of switching data are realized through the combination of the a/b/c, and the switching data are transmitted to the switch state buffer.
Fig. 8 is a schematic diagram of a real-time alternative led L ED driver circuit according to the present invention, as shown in fig. 8, including a differential interface sub-circuit, a display logic control sub-circuit, and a display control switch sub-circuit, which are integrated on a L ED driver chip, wherein the L ED driver chip can be used to drive L ED array, which inputs three sets of differential signals, as shown in DS1, DS2, and DS3, and inputs for cascading a next stage L ED driver chip.
According to the light emitting diode L ED driving circuit, a differential communication mode is applied to a L ED driving chip, the differential communication mode is integrated with a display control logic circuit and a display control switch circuit, wherein the L VDS communication mode is preferably adopted as the differential communication mode, the communication control mode is simple, the L ED display module PCB is simple in design, the required PCB cost is low, and the L ED display module has good EMI characteristics.
According to another aspect of the embodiments of the present invention, there is provided a light emitting diode L ED display system, including a L ED array, a light emitting diode L ED driving circuit of any one of the above, for driving the L ED array.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
In the above embodiments of the present invention, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed technology can be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units may be a logical division, and in actual implementation, there may be another division, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, units or modules, and may be in an electrical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (13)
1. An LED L ED driving circuit, integrated on a L ED driving chip, comprising:
a differential interface sub-circuit for receiving differential signals;
a display logic control sub-circuit, connected to the differential interface sub-circuit, for extracting L ED display-purpose first logic control data from the differential signal, and sending the first logic control data to a first controller, so that the first controller controls the on/off state of a second controller based on the first logic control data;
and the display control switch sub-circuit is connected with the differential interface sub-circuit and is used for extracting L ED display second logic control data from the differential signal and sending the second logic control data to a third controller so that the third controller controls the on-off state of a fourth controller based on the second logic control data.
2. The LED L ED driver circuit of claim 1, wherein the differential interface sub-circuit is further configured to connect the L ED driver chip to L ED driver chips in the L ED array that are adjacent to the L ED driver chip, to enable communication between multiple driver chips in the L ED array.
3. The LED L ED driving circuit of claim 1, wherein the differential signals comprise a first differential signal, a second differential signal and a third differential signal, wherein the first differential signal is a clock differential signal for controlling the display timing of the L ED, the second differential signal is a signal corresponding to the first logic control data, and the third differential signal is a signal corresponding to the second logic control data.
4. The LED L ED driving circuit of claim 3, wherein the first logic control data includes RGB (red, green, blue) logic control data for the L ED display and clock control data for the L ED display.
5. The LED L ED driving circuit according to claim 4, wherein the display logic control sub-circuit is further configured to extract the RGB logic control data from the second differential signal based on the transmission relationship between the first differential signal and the second differential signal, and store the RGB logic control data in an RGB buffer.
6. The led L driving circuit according to claim 5, wherein the display logic control sub-circuit is further configured to extract the beat control data from the second differential signal based on the transmission relationship between the first and second differential signals, and transmit the beat control data to the first controller, wherein the first controller is a display control metronome.
7. The LED L ED driving circuit according to claim 6, wherein the display control metronome transfers the RGB logic control data stored in the RGB buffer to a galvanostat according to the beat control data.
8. The LED L ED driving circuit of claim 7, wherein the galvanostat is configured to generate L ED display logic current based on the RGB logic control data, wherein the L ED display logic current is configured to control the on/off state of the second controller, and the second controller is an RGB switch controller.
9. The LED L ED driving circuit of claim 3, wherein the second logic control data includes switching logic control data for the L ED display and switching cycle data for the L ED display.
10. The led L driving circuit according to claim 9, wherein the display control switch sub-circuit is further configured to extract the switch logic control data from the third differential signal based on the transmission relationship between the first differential signal and the third differential signal, and store the extracted switch logic control data in a switch status buffer.
11. The led L driving circuit according to claim 10, wherein the display logic control sub-circuit is further configured to extract the switching clock data from a third differential signal based on the transmission relationship between the first differential signal and the third differential signal, and transmit the switching clock data to the third controller, wherein the third controller is a display switching clock.
12. The LED L ED driving circuit of claim 11, wherein the display switch metronome transfers the switch logic control data to the fourth controller according to the switch beat data to control the on/off states of MOS transistors in the L ED, and wherein the fourth controller is a switch state controller.
13. A light emitting diode L ED display system, comprising:
l ED array;
the light emitting diode L ED driving circuit of any one of claims 1 to 12, used for driving the light emitting diode L ED
L ED array.
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| CN202010373828.7A CN111462682A (en) | 2020-05-06 | 2020-05-06 | Light emitting diode L ED drive circuit and light emitting diode L ED display system |
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| CN202010373828.7A CN111462682A (en) | 2020-05-06 | 2020-05-06 | Light emitting diode L ED drive circuit and light emitting diode L ED display system |
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| CN (1) | CN111462682A (en) |
Cited By (1)
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