CN111405271A - Micro display driving system - Google Patents
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- CN111405271A CN111405271A CN202010219695.8A CN202010219695A CN111405271A CN 111405271 A CN111405271 A CN 111405271A CN 202010219695 A CN202010219695 A CN 202010219695A CN 111405271 A CN111405271 A CN 111405271A
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- 230000005236 sound signal Effects 0.000 claims abstract description 13
- 238000012545 processing Methods 0.000 claims description 6
- 239000011159 matrix material Substances 0.000 claims description 4
- 238000012937 correction Methods 0.000 claims description 3
- 230000000694 effects Effects 0.000 description 10
- 238000010586 diagram Methods 0.000 description 6
- 230000005540 biological transmission Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N13/00—Stereoscopic video systems; Multi-view video systems; Details thereof
- H04N13/30—Image reproducers
- H04N13/356—Image reproducers having separate monoscopic and stereoscopic modes
- H04N13/359—Switching between monoscopic and stereoscopic modes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N13/00—Stereoscopic video systems; Multi-view video systems; Details thereof
- H04N13/30—Image reproducers
- H04N13/385—Image reproducers alternating rapidly the location of the left-right image components on the display screens
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/438—Interfacing the downstream path of the transmission network originating from a server, e.g. retrieving encoded video stream packets from an IP network
- H04N21/4382—Demodulation or channel decoding, e.g. QPSK demodulation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/439—Processing of audio elementary streams
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/765—Interface circuits between an apparatus for recording and another apparatus
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Abstract
The invention relates to the technical field of micro display, and discloses a micro display driving system which comprises a single chip microcomputer, an HDMI interface, an MH L2.1.1 interface, a video decoder, a video coding chip, a display screen, an audio demodulator, earphones, a key input module and a serial port, wherein the video decoder is respectively connected with the HDMI interface and the MH L2.1.1 interface and used for converting HDMI high-definition signals into standard 24-bit RGB YCbCr4:4:4 format digital signals and I2S digital audio signals, the single chip microcomputer is connected with the video decoder, the video coding chip, the key input module and the serial port, the video coding chip is connected with the video decoder and the display screen and used for converting the decoded data stream signals into three-primary-color RGB signals, and the audio demodulator demodulates the I2S digital audio signals into high-fidelity 3D audio to the earphones.
Description
Technical Field
The invention relates to the technical field of micro display, in particular to a micro display driving system.
Background
Under the promotion of modern science and technology, the related technology of micro-display is changing day by day, and the development of global virtual reality head-mounted display equipment is advancing towards microminiaturization. Portable and low-power consumption head-mounted display equipment is more and more favored by people, and mobile phones (mobile phones) and laptop computers are popularized in daily life, but because the screens of the mobile products are small, the audio effect is not very good, and the portable and low-power consumption head-mounted display equipment cannot generate shocking effects when being used for watching high-definition films and videos.
Disclosure of Invention
The technical problem to be solved by the present invention is to provide a miniature display driving system capable of generating large-screen and shocking-sound cinema entertainment effect and realizing left-right format 3D display effect, aiming at the above defects of the prior art.
The technical scheme includes that a micro display driving system is constructed and comprises a single chip microcomputer, an HDMI interface, an MH L2.1.1 interface, a video decoder, a video coding chip, a display screen, an audio demodulator, earphones, a key input module and a serial port, wherein the video decoder is respectively connected with the HDMI interface and the MH L2.1.1 interface and is used for converting HDMI high-definition signals into standard 24-bit RGB YCbCr4:4:4 format digital signals and I2S digital audio signals, the single chip microcomputer is respectively connected with the video decoder, the video coding chip, the key input module and the serial port and is used for controlling the work of all modules, the video coding chip is respectively connected with the video decoder and the display screen and is used for converting decoded data stream signals into three-primary-color RGB signals through a decoding matrix circuit and converting the three-color data stream signals into RGB signals through gain/offset control, gamma correction, dithering processing and graphic zooming processing, the RGB signals are output to the display screen, and the audio demodulator is respectively connected with the video decoder and the earphones and is used for demodulating the I2S digital audio signals into high-fidelity earphones 3D.
In the miniature display driving system, the video standard displayed by the display screen is ITU-RIBT.656.
In the miniature display driving system of the present invention, the video decoder employs a single-port HDMI receiver of type IT6801 FN.
In the miniature display driving system, the type of the video coding chip is A912, and the video coding chip is written into a register through an I2C instruction of the singlechip to complete the display function.
In the miniature display driving system, the video coding chip writes in a register through an I2C instruction of the single chip to complete a display function specifically comprises the steps that the video coding chip writes in proper display screen parameters according to the specification number of a display screen to be lightened, the display screen parameters at least comprise resolution, line field frequency, pixel clock, line field synchronous width and line field front and rear edge width, the video coding chip selects an input signal format and whether an input signal channel is YUV0 or YUV1 and opens a digital port for control, the video coding chip sets the line field starting and ending positions of a display area, sets the gain and the offset of an ADC (analog to digital converter), and sets ADC _ P LL control according to input synchronization.
In the micro display driving system, the model of the single chip microcomputer is STC 15L 2K61S 2.
In the miniature display driving system, the model of the audio demodulator is CS 42L 22, the CS 43L 22 adopts 40-pin QFN package, and the power consumption of a play mode for driving a stereo earphone under the voltage condition of 1.8V is 13 mW.
In the micro display driving system, when the brightness of the display screen needs to be adjusted, the brightness of the display screen is controlled through the key input module, effective input of the key input module is divided into long pressing and short pressing, the short pressing is pressing for less than 1s, the long pressing is pressing for more than 1s, the long pressing can control the micro display driving system to be started and shut down, and the short pressing controls the micro display driving system to stop running in a starting state.
The micro display driving system has the advantages that the micro display driving system is provided with the single chip microcomputer, the HDMI interface, the MH L2.1.1 interface, the video decoder, the video coding chip, the display screen, the audio demodulator, the earphones, the key input module and the serial port, the video decoder converts HDMI high-definition signals into standard YCbCr4:4:4 format digital signals and I2S digital audio signals, the single chip microcomputer controls the work of the modules, the video coding chip is used for converting decoded data stream signals into three-primary-color RGB signals through a decoding matrix circuit and converting the three-primary-color RGB signals into RGB signals through gain/offset control, gamma correction, shaking processing and graphic scaling, the RGB signals are output to the display screen, the audio demodulator is used for demodulating the I2S digital audio signals into high-fidelity 3D audio to the earphones, the micro display driving system can generate a large-screen and shocking cinema entertainment effect, and can achieve the left-right format 3D display effect.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic structural diagram of an embodiment of a micro display driving system according to the present invention;
FIG. 2 is a flow chart of the driving display performed by the microdisplay driving system in the embodiment;
FIG. 3 is a flow chart of an algorithm implemented by the video coding chip in the embodiment;
FIG. 4 is a flowchart of an algorithm implemented by the key input module in the embodiment;
FIG. 5 is a schematic circuit diagram of a video decoder in the embodiment;
FIG. 6 is a flowchart showing the operation of the video decoder in the embodiment;
FIG. 7 is a schematic circuit diagram of an audio demodulator in the embodiment;
fig. 8 is a flowchart of the operation of the audio demodulator in the embodiment.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the embodiment of the miniature display driving system of the invention, the structural schematic diagram of the miniature display driving system is shown in fig. 1, the miniature display driving system comprises a single chip microcomputer 1, an HDMI interface 2, an MH L2.1 interface 3, a video decoder U4, a video coding chip 5, a display screen 6, an audio demodulator 7, earphones 8, a key input module 9 and a serial port 10, wherein the video decoder U4 is respectively connected with the HDMI interface 2 and the MH L.1 interface 3 and is used for converting HDMI high-definition signals into digital signals in standard 24-bit RGB YCbCr4:4:4 format and I2S digital audio signals, the single chip microcomputer 1 is respectively connected with the video decoder U4, the video coding chip 5, the key input module 9 and the serial port 10 and is used for controlling the work of the modules, the video coding chip 5 is respectively connected with the video decoder U4 and the display screen 6 and is used for converting decoded data stream signals into three primary color RGB signals through a decoding matrix circuit, and outputting gamma signals into high-fidelity display graphics signals 356 and audio signals which are respectively connected with the earphone I decoder 3 and the earphone decoder 368 and is used for demodulating the audio demodulator.
In this embodiment, the type of the single chip microcomputer 1 is STC 15L 2K61S 2.
The video decoder U4 realizes HDMI high-definition signal decoding, outputs 24-bit RGB YCbCr4:4:4 format digital signals and I2S digital audio signals, the singlechip 1 controls various parameters of the video decoder U4 through I2C, such as brightness, contrast, chroma and the like, the singlechip 1 controls the video coding chip 5 through I2C, the video coding chip 5 displays the 24-bit RGB YCbCr4:4:4 format digital signals output by the video decoder U4 on the display screen 6, the I2S digital audio signals are decoded by controlling the audio demodulator 7, and high-fidelity audio is output to the earphone 8.
The miniature display driving system adopts a WVGA standard definition miniature display module, has an internal visual angle up to 32 degrees of optical amplification, can generate large-screen and shocking cinema entertainment effect only by connecting the HDMI interface 2 with a mobile phone or a computer, and can realize the 3D display effect of left and right formats.
Fig. 2 is a flowchart of the driving display performed by the micro display driving system in this embodiment, in fig. 2, after the micro display driving system is initialized, the video decoder U4 starts to operate, but after detecting the video signal, the analog video signal is demodulated to the digital signal to be displayed on the display screen 6, and meanwhile, the key input module 9 can adjust the appropriate brightness to achieve the best viewing effect.
The video coding chip 5 and the display screen 6 form a video module which can display 24-bit digital signals in YCbCr4:4:4 format of RGB, if the video decoder U4 works normally, the video module can be used for obtaining analog video signals, and the input images can be obtained by connecting the video coding chip 5 and the display screen 6. The video standard displayed by the display screen 6 is ITU-RI bt.656.
A brief introduction to the video standard is as follows: ITU-R BT.601 is the "studio DTV coding parameters" standard, while ITU-R BT.656 is the digital interface standard in ITU-R BT.601 annex A. The ITU-R BT.656 outputs a data format of 8 bits Y: Cb: Cr ═ 4:2:2, and the synchronous signals are embedded in the data stream to be output in series or can be output in parallel with the data stream by a single pin.
The method comprises the steps that after receiving standard ITU-RI BT.656 or no video signal, the single chip microcomputer 1 controls the working state of the single chip microcomputer 1 through I2C, the model of the video coding chip 5 is A912, the video coding chip 5 can also be called a liquid crystal graphic scaling engine, the video coding chip 5 writes in a register through an I2C instruction of the single chip microcomputer 1 to complete a display function, the video coding chip 5 writes in appropriate display screen parameters through an I2C instruction of the single chip microcomputer 1 to complete the display function specifically, the video coding chip selects an input signal format and an input signal channel to be 0 or 1 and opens a digital port to control, the video coding chip sets the starting position and the ending position of a line field of a display area, sets the gain and the offset of the ADC and sets the ADC _ P LL control according to the input synchronization.
Fig. 3 is a flowchart of an algorithm implemented by the video coding chip in this embodiment, and when the micro display driving system receives the control signal, the operation of the whole micro display driving system is controlled according to the control instruction. The key input module 9 can manually control the operating state of the display driving system of this type. The upper key in the key input module 9 is used to control the increase of the brightness, and the lower key is used to control the decrease of the brightness. When the brightness of the display screen 6 needs to be adjusted, the brightness of the display screen 6 is controlled through the key input module 9, effective input of the key input module 9 is divided into long pressing and short pressing, the short pressing is pressing for less than 1s, the long pressing is pressing for more than 1s, the long pressing can control the micro display driving system to be started and shut down, and the short pressing controls the micro display driving system to stop running in a starting state.
Fig. 4 is a flowchart of an algorithm implemented by the key input module in this embodiment.
The video decoder U4 employs a single-port HDMI receiver model IT6801FN, which can operate in two dual modes of HDMI1.4 and MH L.1, which is compatible with MH L.1, HDMI interface 1.4a3D and HDCP1.4, and fully backward with DVI1.0 specification ITs dark color capability IT6801FN (up to 36 bits) ensures reliable reception of high quality uncompressed video content, the IT68 FN also supports all major 3D formats, which is the 3D specification compliant with the HDMI1.4a specification, the IT6801FN, in addition to various video output format support, receives and provides up to 4 channel I2 digital audio output, sample rate up to 192kHz and sample size up to 24 bits, facilitates direct connection to the industry standard' S low cost audio DAC, an S/PDIF output is a low cost DAC that provides compressed audio supporting up to 4 kHz, HDCP content up to 192kHz, a unique HDCP key transmission consistent with HDCP specification, HDCP 26, and a safe HDCP transmission of HDCP 1.26 to provide HDCP at a high definition.
The Video decoder U4 mainly supports HDMI1.4a dual-mode input of 1I/O format 1, Single port MH L.1/HDMI1.4a receiver 2, SupportMH L.1, 3, MH L/HDMI mode automatic detection 4, MH L RCP command HDMI CEC interactive translation 5, compatible and MH L.1, HDMI interface 1.4a3D, HDCP1.4 and DVI1.0 specification 6, Supporting up to 3.0Gbps connection speed (clock rate of 300MHz link) 4K2K or 1080P @120Hz solution, Supporting up to 1080/24P 23 crowded pixel mode 7, Supporting all main 3D formats up to 1080P @60Hz upper MH L crowded pixel mode 7, Supporting up to 3D specification 1.4a specification 3D specification, Supporting3D specification 1080, Supporting 24P @60Hz upper MH L crowded pixel mode 7, Supporting up to 30.59/24/23 Hz full pixel rate of 24/24H 2I, HDP 95/24/23 Hz frame rate lowering side by side (e.g, Video frequency of two full HDP 94/24H, 8, 24/24H, 8, 24, 8, 24, 8, 24, 8, 24, 8, 5, 24, 5.
The singlechip 1 controls various working states of the video decoder U4 through I2C. The working flow is as follows: FIG. 5 is a schematic circuit diagram of a video decoder according to the present embodiment; fig. 6 is a flowchart illustrating the operation of the video decoder according to the present embodiment.
In this embodiment, the model of the audio demodulator 7 is CS 42L, CS 43L is a 40-pin QFN package, the power consumption of the play mode driving the stereo headphone under 1.8V voltage is 13 mw.cs42L, and the integrated class D speaker driver can also be directly connected to the battery power supply, synchronously monitor the power supply and compensate for voltage attenuation, has a digital signal processing engine, a digital volume control, headphone/speaker detection switches, and flexible signal routing capability including an analog bypass mode, CS 43L has a dynamic range of 98dB, and can provide high-performance audio output with low noise.
FIG. 7 is a schematic circuit diagram of the audio demodulator of the present embodiment; fig. 8 is a flowchart illustrating the operation of the audio demodulator according to the present embodiment. The single chip microcomputer 1 mainly controls various working states of the audio demodulator 7 through a standard I2C.
In short, in this embodiment, the single chip microcomputer 1 is used as a control center, the HDMI video conversion chips IT6801 and CS 43L 22 are used as hardware cores, the circuit encodes HDMI video signals into ITU-R bt.656 type data streams, the single chip microcomputer 1 manages the whole work flow, the video encoding chip 5 performs image processing to convert the data streams into RGB signals, and finally, a display image is obtained on the display screen 6, the display screen 6 is light and thin in structure, the circuit is simple, the performance is reliable, the image display is clear and stable, the audio is clear and distortion-free, and a3D display effect in a left-right format can be realized.
The miniature display driving system meets the requirement of a personal cinema system which can be used movably, adopts a video glasses display module, is matched with a circuit of the miniature display driving system, and can be connected with a mobile phone or a portable computer to watch virtual large-screen video programs.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (8)
1. A miniature display driving system is characterized by comprising a single chip microcomputer, an HDMI interface, an MH L2.1.1 interface, a video decoder, a video coding chip, a display screen, an audio demodulator, earphones, a key input module and a serial port, wherein the video decoder is respectively connected with the HDMI interface and the MH L2.1.1 interface and used for converting HDMI high-definition signals into standard 24-bit RGB YCbCr4:4:4 format digital signals and I2S digital audio signals, the single chip microcomputer is respectively connected with the video decoder, the video coding chip, the key input module and the serial port and used for controlling the work of all the modules, the video coding chip is respectively connected with the video decoder and the display screen and used for converting decoded data stream signals into RGB signals through a decoding matrix circuit and converting the RGB signals into RGB signals through gain/offset control, gamma correction, dithering processing and graphic scaling and outputting the RGB signals to the display screen, and the audio demodulator is respectively connected with the video decoder and the earphones and used for demodulating the I2S digital audio signals into high-fidelity 3D audio signals.
2. The microdisplay drive system of claim 1 in which the video display is of ITU-r i bt.656.
3. The microdisplay drive system of claim 1 in which the video decoder uses a single-port HDMI receiver model IT6801 FN.
4. The miniature display driving system according to claim 1, wherein the model of the video coding chip is a912, and the video coding chip is written into a register through an I2C instruction of the single chip to complete a display function.
5. The microdisplay driving system of claim 4 in which the video encoder chip writes appropriate display parameters including resolution, line field frequency, pixel clock, line field sync width and line field front and back edge width into the register via I2C commands from the single chip, the video encoder chip selects the input signal format and whether the input signal channel is YUV0 or YUV1 and opens the digital port control, the video encoder chip sets the display area line field start and end positions, sets the ADC gain and offset, and sets ADC _ P LL control based on the input sync.
6. The microdisplay drive system according to any one of claims 1-5 in which the single-chip microcomputer is of the type STC 15L 2K61S 2.
7. The microdisplay driving system according to any one of claims 1-5, wherein the audio demodulator is of model number CS 42L 22, the CS 43L 22 is a 40-pin QFN package, and the playback mode power consumption for driving stereo headphones under 1.8V voltage is 13 mW.
8. The microdisplay driving system according to any one of claims 1-5, wherein when the brightness of the display screen needs to be adjusted, the brightness of the display screen is controlled by the key input module, the effective input of the key input module is divided into a long press and a short press, the short press is a press less than 1s, the long press is a press greater than 1s, the long press can control the microdisplay driving system to be turned on and off, and the short press controls the microdisplay driving system to be stopped in the on state.
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