CN111384974B - Confidence quantization method, device and decoder for multi-system LDPC code - Google Patents

Confidence quantization method, device and decoder for multi-system LDPC code Download PDF

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CN111384974B
CN111384974B CN201811645868.1A CN201811645868A CN111384974B CN 111384974 B CN111384974 B CN 111384974B CN 201811645868 A CN201811645868 A CN 201811645868A CN 111384974 B CN111384974 B CN 111384974B
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confidence
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confidence coefficient
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CN111384974A (en
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朱永辉
沈梓荣
文宇波
高峰
许祥滨
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Techtotop Microelectronics Co Ltd
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148Structural properties of the code parity-check or generator matrix
    • H03M13/1171Parity-check or generator matrices with non-binary elements, e.g. for non-binary LDPC codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0057Block codes
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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Abstract

The embodiment of the invention is suitable for the technical field of encoding and decoding, and provides a confidence quantization method, a device and a decoder of a multi-system LDPC code, wherein the method comprises the following steps: respectively acquiring confidence coefficient sets of the multi-system LDPC codes, wherein the confidence coefficient sets comprise a plurality of confidence coefficients corresponding to a plurality of symbols of the multi-system LDPC codes one by one; identifying a confidence maximum in the confidence set; respectively determining numerical differences between each confidence degree in the confidence degree set and the maximum value of the confidence degrees; and according to the magnitude relation between the numerical value difference and a preset threshold value, each confidence is quantized into a limited numerical value, and the preset threshold value is determined by the preset bit number of quantization processing. According to the distribution characteristics and the physical meanings of the confidence coefficient of the multi-system LDPC code, the storage space of the confidence coefficient can be optimized by carrying out non-uniform quantization on each confidence coefficient, and the complexity of an NB-LDPC decoding algorithm is reduced.

Description

Confidence quantization method, device and decoder for multi-system LDPC code
Technical Field
The present invention relates to a confidence quantization method for a multilevel LDPC code, a confidence quantization device for a multilevel LDPC code, a decoder and a computer readable storage medium, which belong to the technical field of encoding and decoding.
Background
Binary Low-Density-Parity-Check (B-LDPC) codes are packet error correction codes with sparse Check matrixes, are applicable to almost all channels, can quickly approach the channel capacity of shannon theory in the form of code length indexes, and are research hot spots in recent years of the coding industry. However, when the code length is relatively short, the performance of the B-LDPC code may be degraded to some extent. Therefore, a learner proposes a multi-system LDPC (Non-Binary Low-Density-Party-Check, abbreviated as NB-LDPC) code on the basis of the B-LDPC code. Compared with B-LDPC codes, in particular when the code length is short, NB-LDPC codes have better performance in theory, and at present, NB-LDPC codes are gradually adopted as coding standards by related industries. For example, beidou satellite navigation system (BDS).
The application of NB-LDPC codes also brings about more complex decoding algorithms. To reduce the time complexity of NB-LDPC decoding algorithms, it is common practice to convert the probability represented in confidence in the decoding algorithm into logarithmic form, which in turn changes the multiplication operation into an addition operation. However, representing the confidence in logarithmic form takes up excessive memory space, further increasing the complexity of the memory space. Therefore, there is a need to optimize the way in which confidence in NB-LDPC decoding algorithms are stored.
Disclosure of Invention
In view of this, the embodiments of the present invention provide a method, an apparatus, and a decoder for quantifying confidence of a multi-system LDPC code, so as to solve the problem that the confidence of the multi-system LDPC code represented in logarithmic form in the prior art occupies too much storage space.
A first aspect of an embodiment of the present invention provides a confidence quantization method for a multi-system LDPC code, including:
respectively acquiring confidence coefficient sets of the multi-system LDPC codes, wherein the confidence coefficient sets comprise a plurality of confidence coefficients corresponding to a plurality of symbols of the multi-system LDPC codes one by one;
identifying a confidence maximum in the confidence set;
respectively determining numerical differences between each confidence degree in the confidence degree set and the maximum value of the confidence degrees;
and according to the magnitude relation between the numerical value difference and a preset threshold value, each confidence is quantized into a limited numerical value, and the preset threshold value is determined by the preset bit number of quantization processing.
Optionally, the step of separately obtaining confidence sets of the multi-system LDPC code includes:
acquiring initial confidence coefficients of a plurality of multi-system LDPC codes, wherein the initial confidence coefficients are floating point type initial confidence coefficients or integer type initial confidence coefficients;
and rounding the floating point type initial confidence coefficient to generate a confidence coefficient set of the multi-system LDPC code.
Optionally, the method further comprises:
determining the bit number N of quantization processing;
quantizing the confidence maximum to a signed integer maximum of 2 corresponding to the number of bits N-1 -1。
Optionally, the step of measuring each confidence as a limited value according to the magnitude relation between the value difference and a preset threshold value includes:
if the numerical value difference is more than or equal to 1-2 N The confidence is quantized to the numerical difference and 2 N-1 -sum of 1;
if the numerical difference is less than 1-2 N The confidence is quantized to-2 N-1
A second aspect of an embodiment of the present invention provides a confidence quantization apparatus for a multi-system LDPC code, including:
the acquisition module is used for respectively acquiring confidence coefficient sets of the multi-system LDPC codes, wherein the confidence coefficient sets comprise a plurality of confidence coefficients which are in one-to-one correspondence with a plurality of symbols of the multi-system LDPC codes;
the identification module is used for identifying the maximum value of the confidence coefficient in the confidence coefficient set;
a determining module, configured to determine a numerical difference between each confidence coefficient in the confidence coefficient set and the confidence coefficient maximum value; and, a step of, in the first embodiment,
and the quantization module is used for quantizing each confidence into a limited numerical value according to the magnitude relation between the numerical value difference and a preset threshold value, and the preset threshold value is determined by the preset bit number of quantization processing.
Optionally, the acquiring module includes:
the initial confidence coefficient acquisition sub-module is used for acquiring initial confidence coefficients of a plurality of multi-system LDPC codes, wherein the initial confidence coefficients are floating point type initial confidence coefficients or integer type initial confidence coefficients;
and the confidence coefficient conversion sub-module is used for rounding the floating point type initial confidence coefficient and generating a confidence coefficient set of the multi-system LDPC code.
Optionally, the method further comprises:
a bit number determining module, configured to determine a bit number N of quantization processing;
a confidence maximum quantization module for quantizing the confidence maximum to a signed integer maximum 2 corresponding to the number of bits N-1 -1。
Optionally, the quantization module includes:
a first confidence quantization sub-module for, if the value difference is greater than or equal to 1-2 N The confidence is quantized to the numerical difference and 2 N-1 -sum of 1;
a second confidence quantization sub-module for if the value difference is less than 1-2 N The confidence is quantized to-2 N -1
A third aspect of an embodiment of the present invention provides a decoder, including a memory, a processor, and a computer program stored in the memory and executable on the processor, the processor implementing the steps of the confidence quantization method of a multi-system LDPC code described above when the computer program is executed.
A fourth aspect of the embodiments of the present invention provides a computer readable storage medium storing a computer program which, when executed by a processor, implements the steps of the confidence quantization method of a multi-system LDPC code described above.
Compared with the prior art, the embodiment of the invention has the following advantages:
according to the embodiment of the invention, according to the distribution characteristics of the confidence coefficient of the multi-system LDPC code and the physical meaning of the confidence coefficient, each confidence coefficient can be represented in the form of a limit value by carrying out non-uniform quantization on each confidence coefficient, more bits are used for distinguishing the part with larger confidence coefficient, fewer bits are used for distinguishing the part with smaller confidence coefficient, namely the part with larger confidence coefficient occupies more bit numbers, the smaller part occupies fewer bit numbers, and even under the condition of limited quantized bit numbers, no bit number is occupied, so that the storage space of the opposite confidence coefficient can be optimized, and the complexity of an NB-LDPC decoding algorithm is reduced.
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In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings that are required to be used in the embodiments or the description of the prior art. It is evident that the figures in the following description are only some embodiments of the invention, from which other figures can be obtained without inventive effort for a person skilled in the art.
FIG. 1 is a flowchart illustrating a method for confidence quantization of a multi-system LDPC code according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a confidence quantization apparatus of a multi-system LDPC code according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a decoder according to an embodiment of the present invention.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth such as the particular system architecture, techniques, etc., in order to provide a thorough understanding of the embodiments of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.
The technical scheme of the invention is described below through specific examples.
In general, to reduce the time complexity of NB-LDPC decoding algorithms, the probabilities represented in confidence in the decoding algorithm can be converted to logarithmic form, which in turn changes the multiplication operation to an addition operation.
In general, the confidence LDR (Log-Density-Ratio) may be defined as:
Figure BDA0001932047770000051
wherein p (c=s n ) Representing codeword c as symbol s n Is a probability of (2).
Meanwhile, in order to reduce the spatial complexity of the multi-system LDPC decoding, LDR is required to be performed n Quantization is performed and represented by a limited number. When the signal-to-noise ratio is high, the probability of receiving the codeword c as a certain symbol is very large, and the probability of receiving the codeword c as other symbols is very small, namely the probability distribution of the symbols is very concentrated; the symbol probability distribution is relatively uniform when the signal-to-noise ratio is low. According to the definition of LDR, the LDR variation range is large at high signal-to-noise ratio, and is smaller at low signal-to-noise ratio. Notably, the larger the LDR value, the more rich the decoding information it provides. In other words, more bits must be used to distinguish between the larger LDR value portions during quantization, and fewer bits must be used to distinguish between the smaller LDR value portions, i.e., the larger LDR value portions occupy more bits, the smaller portions occupy fewer bits, and even no bits in the case of a limited number of quantization bits.
Therefore, according to the above-mentioned LDR value distribution characteristics and the physical meanings thereof, the core concept of the present embodiment is that the confidence of each symbol of the multi-system LDPC code is unevenly quantized based on the LDR of the maximum value, and each confidence is represented in the form of a limited value.
Referring to fig. 1, a flowchart illustrating a method for quantifying confidence of a multi-system LDPC code according to an embodiment of the present invention may specifically include the following steps:
s101, respectively acquiring confidence coefficient sets of the multi-system LDPC codes, wherein the confidence coefficient sets comprise a plurality of confidence coefficients corresponding to a plurality of symbols of the multi-system LDPC codes one by one;
it should be noted that the method can be applied to the decoding process of the multi-system LDPC (NB-LDPC) code.
In the embodiment of the invention, the confidence of a plurality of symbols of the multi-system LDPC code can be obtained first and expressed as a confidence set.
In a specific implementation, initial confidence of a plurality of symbols of the multi-system LDPC code may be first obtained, where the initial confidence is Floating Point (Floating Point) or Integer (intelger) initial confidence.
Floating point numbers are digital representations of numbers belonging to a particular subset of rational numbers that can be used in a computer to represent any real number in an approximation.
Taking 64 LDPC as an example, a total of 64 symbols, which can be expressed as S 0 -S 63 Assuming that there is a multi-system LDPC code denoted Cn, the decoding process is the process of determining which symbol Cn is, and the confidence set is the confidence level of Cn for different symbols.
In the embodiment of the invention, the floating point type initial confidence coefficient can be rounded, and the floating point type initial confidence coefficient is converted into the confidence coefficient in an integer form, so that a confidence coefficient set of the multi-system LDPC code is generated.
The confidence set of a multi-system LDPC code may be expressed as { LDR } kk (k=1, 2,..k), where β represents the symbol to which the codeword corresponds, i.e., sn in the confidence definition above.
S102, identifying a confidence maximum value in the confidence coefficient set;
after obtaining the confidence coefficient set, the numerical values of the confidence coefficients can be compared to determine the maximum value of the confidence coefficient in the set
Figure BDA0001932047770000061
In the embodiment of the present invention, the confidence maximum may be first quantized to a signed integer maximum of N bits, where the signed integer maximum may be 2 N-1 -1。
Taking n=5 as an example, the unsigned numerical range is 0 to 31, and the signed numerical range is-16 to 15.
Therefore, before this step, the number of bits N of the quantization process needs to be determined first, and the number of bits N of the quantization process needs to be determined according to the decoding performance to be achieved and the requirement of the storage space, and needs to be determined by a compromise between the two factors.
After quantizing the confidence maximum to a signed integer maximum of N bits, the quantized elements may be represented as
Figure BDA0001932047770000062
S103, respectively determining numerical differences between each confidence coefficient in the confidence coefficient set and the maximum value of the confidence coefficient;
in the embodiment of the invention, each element { LDR (Linear data Rate) in the confidence coefficient set can be selected one by one kk ' calculate LDR k And the maximum LDR max Numerical difference DLDR of (2) k . Then, step S104 is performed to quantify each confidence according to the magnitude relation between the numerical value difference and the preset threshold.
S104, according to the magnitude relation between the numerical value difference and a preset threshold value, each confidence is quantized into a limited numerical value, and the preset threshold value is determined by the preset bit number of quantization processing.
In the embodiment of the present invention, the preset threshold may be determined according to the number of bits N of the quantization process, that is, the preset threshold may be expressed as 1-2 N
In the embodiment of the present invention, if the numerical difference is greater than or equal to the preset threshold value 1-2 N The confidence can be quantized to the value difference and 2 N-1 -sum of 1; if the difference is less than 1-2 N The confidence can be directly quantized to-2 N-1
That is, if the difference is greater than or equal to the preset threshold value 1-2 N Then LDR can be used k Quantitated to 2 N-1 -1+DLDR k The quantized element may be represented as {2 } N-1 -1+DLDR kk -a }; if the difference is less than 1-2 N Then LDR can be used k Direct quantization to-2 N-1 The quantized element may be represented as { -2 N-1k }。
Also taking n=5 as an example, if the confidence value before quantization is [31,28, -4], the confidence maximum 31 may be quantized to 15 first according to the foregoing description; since 28-31= -3, -3 is larger than-31, 28 can be quantized to 12 (15-3); since-4-31= -35, -35 is smaller than-31, -4 can be quantized to-16. The quantized values were obtained as [15,12, -16].
According to the distribution characteristics of the confidence coefficient of the multi-system LDPC code and the physical meaning of the confidence coefficient, each confidence coefficient can be represented in a form of limiting values by non-uniformly quantizing each confidence coefficient, more bits are used for distinguishing the part with larger confidence coefficient, fewer bits are used for distinguishing the part with smaller confidence coefficient, namely the part with larger confidence coefficient occupies more bit numbers, the smaller part occupies fewer bit numbers, and even under the condition of limited quantized bit numbers, no bit number is occupied, so that the memory space of the opposite confidence coefficient can be optimized, and the complexity of an NB-LDPC decoding algorithm is reduced.
It should be noted that, the sequence number of each step in the above embodiment does not mean the sequence of execution sequence, and the execution sequence of each process should be determined by its function and internal logic, and should not limit the implementation process of the embodiment of the present invention in any way.
Referring to fig. 2, a schematic diagram of a confidence quantization apparatus of a multi-system LDPC code according to an embodiment of the present invention may include the following modules:
an obtaining module 201, configured to obtain confidence coefficient sets of the multi-system LDPC code, where the confidence coefficient sets include a plurality of confidence coefficients corresponding to a plurality of symbols of the multi-system LDPC code one by one;
an identification module 202 for identifying a confidence maximum value in the confidence set;
a determining module 203, configured to determine a numerical difference between each confidence in the confidence set and the maximum confidence value; and, a step of, in the first embodiment,
and the quantization module 204 is configured to quantize each confidence into a limited value according to a magnitude relation between the value difference and a preset threshold, where the preset threshold is determined by a preset number of bits in quantization.
In the embodiment of the present invention, the obtaining module 201 may specifically include the following sub-modules:
the initial confidence coefficient acquisition sub-module is used for acquiring initial confidence coefficients of a plurality of multi-system LDPC codes, wherein the initial confidence coefficients are floating point type initial confidence coefficients or integer type initial confidence coefficients;
and the confidence coefficient conversion sub-module is used for rounding the floating point type initial confidence coefficient and generating a confidence coefficient set of the multi-system LDPC code.
In an embodiment of the present invention, the apparatus may further include the following modules:
a bit number determining module, configured to determine a bit number N of quantization processing;
a confidence maximum quantization module for quantizing the confidence maximum to a signed integer maximum 2 corresponding to the number of bits N-1 -1。
In an embodiment of the present invention, the quantization module 204 may specifically include the following sub-modules:
a first confidence quantization sub-module for, if the value difference is greater than or equal to 1-2 N The confidence is quantized to the numerical difference and 2 N-1 -sum of 1;
a second confidence quantization sub-module for if the value difference is less than 1-2 N The confidence is quantized to-2 N -1
For the device embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference should be made to the description of the method embodiments.
Referring to fig. 3, a schematic diagram of a decoder of one embodiment of the present invention is shown. As shown in fig. 3, the decoder 300 of the present embodiment includes: a processor 310, a memory 320 and a computer program 321 stored in said memory 320 and executable on said processor 310. The processor 310 implements the steps of the embodiments of the confidence quantization method of the above-described multi-system LDPC code when executing the computer program 321, for example, steps S101 to S104 shown in fig. 1. Alternatively, the processor 310 may perform the functions of the modules/units of the apparatus embodiments described above, such as the functions of the modules 201 to 204 shown in fig. 2, when executing the computer program 321.
Illustratively, the computer program 321 may be partitioned into one or more modules/units that are stored in the memory 320 and executed by the processor 310 to accomplish the present invention. The one or more modules/units may be a series of computer program instruction segments capable of performing a specific function, which may be used to describe the execution of the computer program 321 in the decoder 300. For example, the computer program 321 may be divided into an acquisition module, an identification module, a determination module and a quantization module, where each module specifically functions as follows:
the acquisition module is used for respectively acquiring confidence coefficient sets of the multi-system LDPC codes, wherein the confidence coefficient sets comprise a plurality of confidence coefficients which are in one-to-one correspondence with a plurality of symbols of the multi-system LDPC codes;
the identification module is used for identifying the maximum value of the confidence coefficient in the confidence coefficient set;
a determining module, configured to determine a numerical difference between each confidence coefficient in the confidence coefficient set and the confidence coefficient maximum value;
and the quantization module is used for quantizing each confidence into a limited numerical value according to the magnitude relation between the numerical value difference and a preset threshold value, and the preset threshold value is determined by the preset bit number of quantization processing.
The decoder 300 may be a computing device such as a desktop computer, a notebook computer, a palm computer, a cloud server, a navigation module, a time service module, etc. The decoder 300 may include, but is not limited to, a processor 310, a memory 320. It will be appreciated by those skilled in the art that fig. 3 is merely an example of a decoder 300 and is not intended to limit the decoder 300, and may include more or fewer components than shown, or may combine certain components, or different components, e.g., the decoder 300 may further include input and output devices, network access devices, buses, etc.
The processor 310 may be a central processing unit (Central Processing Unit, CPU), but may also be other general purpose processors, digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), off-the-shelf programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The memory 320 may be an internal storage unit of the decoder 300, such as a hard disk or a memory of the decoder 300. The memory 320 may also be an external storage device of the decoder 300, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card) or the like, which are provided on the decoder 300. Further, the memory 320 may also include both internal storage units and external storage devices of the decoder 300. The memory 320 is used to store the computer program 321 and other programs and data required by the decoder 300. The memory 320 may also be used to temporarily store data that has been output or is to be output.
It will be apparent to those skilled in the art that the foregoing functional unit and module divisions are merely illustrative for convenience and brevity of description. In practical applications, the above-mentioned functions may be distributed by different functional units and modules according to the needs, that is, the internal structure of the apparatus/terminal device is divided into different functional units or modules, so as to complete all or part of the functions described above. The functional units and modules in the embodiment may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit, where the integrated units may be implemented in a form of hardware or a form of a software functional unit. In addition, the specific names of the functional units and modules are only for distinguishing from each other, and are not used for limiting the protection scope of the present invention. The specific working process of the units and modules in the above system may refer to the corresponding process in the foregoing method embodiment, which is not described herein again.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and in part, not described or illustrated in any particular embodiment, reference may be made to related descriptions of other embodiments.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus/terminal device and method may be implemented in other manners. For example, the apparatus/terminal device embodiments described above are merely illustrative, e.g., the division of the modules or units is merely a logical function division, and there may be additional divisions in actual implementation, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. On the other hand, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection via interfaces, devices or units, which may be in electrical, mechanical or other forms.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present invention may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated modules/units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the present invention may implement all or part of the flow of the method of the above embodiment, or may be implemented by instructing the relevant hardware by a computer program, where the computer program may be stored in a computer readable storage medium, and the computer program may implement the steps of each of the method embodiments described above when executed by a processor. Wherein the computer program comprises computer program code which may be in source code form, object code form, executable file or some intermediate form etc. The computer readable storage medium may include: any entity or device capable of carrying the computer program code, a recording medium, a U disk, a removable hard disk, a magnetic disk, an optical disk, a computer Memory, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), an electrical carrier signal, a telecommunications signal, a software distribution medium, and so forth. It should be noted that the computer readable storage medium may include content that is subject to appropriate increases and decreases as required by jurisdictions and by jurisdictions in which such computer readable storage medium does not include electrical carrier signals and telecommunications signals.
The above embodiments are only for illustrating the technical solution of the present invention, and are not limited thereto. Although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention, and are intended to be included in the scope of the present invention.

Claims (6)

1. A confidence quantization method for a multilevel LDPC code, comprising:
respectively acquiring confidence coefficient sets of the multi-system LDPC codes, wherein the confidence coefficient sets comprise a plurality of confidence coefficients corresponding to a plurality of symbols of the multi-system LDPC codes one by one;
identifying a confidence maximum in the confidence set;
respectively determining numerical differences between each confidence degree in the confidence degree set and the maximum value of the confidence degrees;
measuring each confidence coefficient into a limited value according to the magnitude relation between the value difference and a preset threshold value, wherein the preset threshold value is determined by the preset bit number of quantization processing;
wherein the method further comprises:
determining the bit number N of quantization processing;
quantizing the confidence maximum to a signed integer maximum of 2 corresponding to the number of bits N-1 -1;
Correspondingly, the step of measuring each confidence as a limited value according to the magnitude relation between the value difference and a preset threshold value comprises the following steps:
if the numerical value difference is more than or equal to 1-2 N The confidence is quantized to the numerical difference and 2 N-1 -1.
2. The method of claim 1, wherein the step of separately obtaining confidence sets of the multi-system LDPC code comprises:
acquiring initial confidence coefficients of a plurality of multi-system LDPC codes, wherein the initial confidence coefficients are floating point type initial confidence coefficients or integer type initial confidence coefficients;
and rounding the floating point type initial confidence coefficient to generate a confidence coefficient set of the multi-system LDPC code.
3. A confidence quantization apparatus for a multilevel LDPC code, comprising:
the acquisition module is used for respectively acquiring confidence coefficient sets of the multi-system LDPC codes, wherein the confidence coefficient sets comprise a plurality of confidence coefficients which are in one-to-one correspondence with a plurality of symbols of the multi-system LDPC codes;
the identification module is used for identifying the maximum value of the confidence coefficient in the confidence coefficient set;
a determining module, configured to determine a numerical difference between each confidence coefficient in the confidence coefficient set and the confidence coefficient maximum value; and, a step of, in the first embodiment,
the quantization module is used for quantizing each confidence into a limited value according to the magnitude relation between the numerical value difference and a preset threshold value, and the preset threshold value is determined by the preset bit number of quantization processing;
wherein the apparatus further comprises:
a bit number determining module, configured to determine a bit number N of quantization processing;
a confidence maximum quantization module for quantizing the confidence maximum to a signed integer maximum 2 corresponding to the number of bits N-1 -1;
Accordingly, the quantization module includes:
a first confidence quantization sub-module for, if the value difference is greater than or equal to 1-2 N The confidence is quantized to the numerical difference and 2 N-1 -1.
4. The apparatus of claim 3, wherein the acquisition module comprises:
the initial confidence coefficient acquisition sub-module is used for acquiring initial confidence coefficients of a plurality of multi-system LDPC codes, wherein the initial confidence coefficients are floating point type initial confidence coefficients or integer type initial confidence coefficients;
and the confidence coefficient conversion sub-module is used for rounding the floating point type initial confidence coefficient and generating a confidence coefficient set of the multi-system LDPC code.
5. Decoder comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the steps of the confidence quantization method of a multi-system LDPC code according to claim 1 or 2 when the computer program is executed.
6. A computer readable storage medium storing a computer program, characterized in that the computer program when executed by a processor implements the steps of the confidence quantization method of a multi-system LDPC code according to claim 1 or 2.
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* Cited by examiner, † Cited by third party
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CN103873068A (en) * 2012-12-14 2014-06-18 咏传电子科技(上海)有限公司 Low-density-parity-check decoding method and electronic device
CN105141317A (en) * 2015-08-28 2015-12-09 中南民族大学 Two-stage selective flipping decoding method for reducing LDPC error floor
CN106936444A (en) * 2015-12-29 2017-07-07 北京航空航天大学 One kind set interpretation method and set decoder

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103873068A (en) * 2012-12-14 2014-06-18 咏传电子科技(上海)有限公司 Low-density-parity-check decoding method and electronic device
CN105141317A (en) * 2015-08-28 2015-12-09 中南民族大学 Two-stage selective flipping decoding method for reducing LDPC error floor
CN106936444A (en) * 2015-12-29 2017-07-07 北京航空航天大学 One kind set interpretation method and set decoder

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