CN111344845A - Semiconductor process sheet and semiconductor package manufacturing method - Google Patents

Semiconductor process sheet and semiconductor package manufacturing method Download PDF

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Publication number
CN111344845A
CN111344845A CN201880074101.XA CN201880074101A CN111344845A CN 111344845 A CN111344845 A CN 111344845A CN 201880074101 A CN201880074101 A CN 201880074101A CN 111344845 A CN111344845 A CN 111344845A
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China
Prior art keywords
semiconductor
adhesive
chip
layer
sealing material
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CN201880074101.XA
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Chinese (zh)
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志贺豪士
佐藤慧
高本尚英
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Nitto Denko Corp
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Nitto Denko Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B27/00—Layered products comprising a layer of synthetic resin
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00—Adhesives in the form of films or foils
    • C09J7/30—Adhesives in the form of films or foils characterised by the adhesive composition
    • C09J7/38—Pressure-sensitive adhesives [PSA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/20—Structure, shape, material or disposition of high density interconnect preforms
    • H01L2224/21—Structure, shape, material or disposition of high density interconnect preforms of an individual HDI interconnect
    • H01L2224/214—Connecting portions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape
    • H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
    • H01L2924/18162—Exposing the passive side of the semiconductor or solid-state body of a chip with build-up interconnect

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Adhesive Tapes (AREA)
  • Dicing (AREA)
  • Die Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Laminated Bodies (AREA)
  • Control And Other Processes For Unpacking Of Materials (AREA)

Abstract

The semiconductor process sheet of the present invention comprises a double-sided adhesive sheet (10) and a partial sealant layer (20). A double-sided pressure-sensitive adhesive sheet (10) comprises a substrate (11), a pressure-sensitive adhesive layer (13) having reduced adhesive strength, and a pressure-sensitive adhesive layer (12) having pressure-sensitive properties, for example, in a laminated structure between pressure-sensitive adhesive surfaces (10a, 10 b). A part of the sealant layer (20) is located on the adhesive surface (10b) of the double-sided adhesive sheet (10). The method of the present invention includes, for example: mounting a plurality of semiconductor chips on a part of the sealant layer (20) of the semiconductor process sheet having the adhesive surface (10a) bonded to the support; a step of curing the sealant supplied so as to embed the semiconductor chip and a part of the sealant layer (20) to form a sealing material portion; a step of separating the sealing material portion from the adhesive surface (10 b); forming a wiring structure portion on the sealing material portion; and a step of dividing the sealing material portion and the wiring structure portion into individual semiconductor chips. The semiconductor process sheet and the method are suitable for efficiently manufacturing a semiconductor package.

Description

Semiconductor process sheet and semiconductor package manufacturing method
Technical Field
The present invention relates to a semiconductor wafer which can be used for manufacturing a semiconductor package, and a semiconductor package manufacturing method.
Background
In the manufacture of a so-called semiconductor package having a semiconductor element therein, conventionally, after each element of the semiconductor element is sealed with a resin material, a wiring or an external electrode electrically connected to the semiconductor element in a sealing resin is sometimes formed on the surface of the sealing resin. A technique for manufacturing a semiconductor package is described in patent document 1 below, for example.
Documents of the prior art
Patent document
Patent document 1: japanese patent laid-open publication No. 2017-88782
Disclosure of Invention
Problems to be solved by the invention
In the manufacturing process of the semiconductor package, performing a sealing process, a wiring forming process, and the like for each element easily causes complication in the manufacturing process of the semiconductor package and an increase in cost. As the miniaturization and densification of semiconductor devices have been advanced, the semiconductor package tends to have a higher number of terminals and a higher number of fine wirings, and the influence of manufacturing costs and the like due to the sealing step and the wiring forming step for each device has become greater.
The present invention has been made in view of the above circumstances, and an object thereof is to provide a semiconductor wafer suitable for efficiently manufacturing a semiconductor package, and a semiconductor package manufacturing method.
Means for solving the problems
According to the 1 st aspect of the present invention, a semiconductor process wafer is provided. The semiconductor process sheet includes a double-sided adhesive sheet and a partial sealant layer. The double-sided pressure-sensitive adhesive sheet has a 1 st pressure-sensitive adhesive surface and a 2 nd pressure-sensitive adhesive surface opposed to the 1 st pressure-sensitive adhesive surface, and has a laminated structure including at least a pressure-sensitive adhesive layer of reduced adhesive strength, a pressure-sensitive adhesive layer, and a substrate positioned therebetween. The adhesive force-reducing adhesive layer is preferably a heat-expandable adhesive layer or a radiation-curable adhesive layer. Part of the sealant layer is releasably adhered to the 2 nd adhesive surface of the double-sided adhesive sheet. In the laminated structure of the double-sided adhesive sheet, for example, the adhesive strength reducing adhesive layer is closer to the 1 st adhesive surface side than the substrate, and the adhesive layer is closer to the 2 nd adhesive surface side than the substrate. In this case, the adhesive force reducing type adhesive layer may be a layer forming the 1 st adhesive surface, and the adhesive layer may be a layer forming the 2 nd adhesive surface. Alternatively, in the laminated structure of the double-sided adhesive sheet, the adhesive force reducing adhesive layer may be closer to the 2 nd adhesive surface side than the substrate, and the adhesive layer may be closer to the 1 st adhesive surface side than the substrate. In this case, the adhesive force reducing type adhesive layer may be a layer forming the 2 nd adhesive surface, and the adhesive layer may be a layer forming the 1 st adhesive surface. The present semiconductor wafer having such a configuration can be used in a process for manufacturing a semiconductor package, as described later with respect to aspect 2 of the present invention.
Part of the sealant layer in the semiconductor process sheet is preferably an adhesive layer for embedding the chip electrode. In this case, the ratio of the thickness of the adhesive layer for embedding the chip electrode to the height of the chip electrode to be embedded is preferably 0.1 to 10, and more preferably 0.2 to 9.
The thickness of the partial sealant layer in the semiconductor process sheet is preferably 1 to 300 μm, more preferably 5 to 250 μm, and still more preferably 10 to 200 μm.
In the semiconductor process sheet, the ratio of the peel adhesion force exhibited to the stainless steel plane in the peel test under the conditions of 23 ℃, peel angle 180 DEG and tensile speed 300 mm/min on the 1 st adhesive surface of the double-sided adhesive sheet to the peel adhesion force in the peel test under the conditions of 23 ℃, peel angle 180 DEG and tensile speed 300 mm/min between the 2 nd adhesive surface of the double-sided adhesive sheet and a part of the sealant layer is preferably 0.003 to 3, and more preferably 0.004 to 2.5. For example, in the case where the adhesive force-reducing adhesive layer forms the 1 st adhesive surface and the adhesive layer forms the 2 nd adhesive surface in the double-sided adhesive sheet, the ratio of the peel adhesion force exhibited by the adhesive force-reducing adhesive layer to the stainless steel plane in a peel test under the conditions of 23 ℃, a peel angle of 180 ° and a stretching speed of 300 mm/min to the peel adhesion force between the adhesive layer and a part of the sealant layer in a peel test under the conditions of 23 ℃, a peel angle of 180 ° and a stretching speed of 300 mm/min is preferably 0.003 to 3, and more preferably 0.004 to 2.5.
According to the 2 nd aspect of the present invention, there is provided a semiconductor package manufacturing method. The manufacturing method is a method for manufacturing a semiconductor package using the semiconductor wafer according to claim 1, and includes at least the following chip mounting step, sealing step, separating step, wiring forming step, and singulation step.
In the die mounting step, a plurality of semiconductor chips are mounted on a part of the encapsulant layer in the semiconductor process sheet having the 1 st adhesive surface side bonded to the support. The semiconductor chip is, for example, a semiconductor chip with an extended electrode having a chip body and at least one chip electrode extending from the chip body. In this step, the semiconductor chip may be mounted with the chip electrode facing downward, or the semiconductor chip may be mounted with the side opposite to the chip electrode facing upward.
In the sealing step, a sealing agent is supplied onto the semiconductor process sheet so as to embed the plurality of semiconductor chips, and the sealing agent and a part of the sealing agent layer are cured to form a sealing material portion. This results in a sealing material portion (chip embedding sealing material portion) embedding the semiconductor chip.
In the present manufacturing method, the curing step of curing a part of the sealant layer may be performed after the chip mounting step and before the sealant is supplied onto the semiconductor process sheet. In this case, in the sealing step, the sealant supplied to the semiconductor process sheet so as to embed the plurality of semiconductor chips is cured on the cured partial sealant layer to form the sealing material portion. According to such a configuration, the sealing step is performed in a state where the holding force of the semiconductor chip by the semiconductor process sheet is strengthened by curing a part of the sealant layer. Therefore, this configuration is suitable for suppressing the positional displacement of the semiconductor chip caused by shrinkage during curing of the sealant in the sealing step. Such suppression of the positional displacement of the semiconductor chip is preferable, for example, in terms of accurately forming a wiring structure portion including a wiring for each semiconductor chip in a subsequent wiring forming step.
The separation step includes separating the 2 nd adhesive surface of the double-sided adhesive sheet from the sealing material portion in the semiconductor process sheet. The separation process preferably includes an adhesive force reducing measure for the adhesive force reducing type adhesive layer in the semiconductor process sheet. When the adhesive force-reducing adhesive layer is a heat-expandable adhesive layer, the adhesive force-reducing measure is heating under a predetermined condition. When the adhesive force-reducing pressure-sensitive adhesive layer is a radiation-curable pressure-sensitive adhesive layer, the adhesive force is reduced by irradiation with radiation such as ultraviolet irradiation at a predetermined irradiation dose. By such a separation step, the chip embedding sealing material portion can be removed from the support. After the separation step, the sealing material portion may be subjected to grinding for exposing the chip electrodes of the semiconductor chips in the sealing material portion to the outside, as necessary.
In the wiring forming step, a wiring structure portion including a wiring for each semiconductor chip is formed on the sealing material portion. The wiring of each semiconductor chip includes external electrodes such as bump electrodes in each semiconductor package to be manufactured for each semiconductor chip by the present manufacturing method.
In the singulation step, the sealing material portion and the wiring structure portion are divided for each semiconductor chip to obtain semiconductor packages. Operating as described above, a semiconductor package is manufactured.
The method for manufacturing a semiconductor package according to aspect 2 of the present invention is suitable for efficiently manufacturing a semiconductor package. The reason for this is as follows.
In the case of manufacturing a semiconductor package using a conventional semiconductor process sheet including a double-sided adhesive sheet having no partial sealant layer, a plurality of semiconductor chips are mounted on the other surface of the double-sided adhesive sheet having one surface thereof bonded to a support in the chip mounting step. At this time, the semiconductor chip is mounted with the side opposite to the chip electrode bonded to the double-sided adhesive sheet facing upward. Next, a sealing material portion for embedding the plurality of semiconductor chips is formed on the double-sided adhesive sheet. Next, the double-sided adhesive sheet is peeled from the sealing material portion (conventional chip embedding sealing material portion) embedding the plurality of semiconductor chips (separation step). In the conventional chip embedding sealing material portion, the so-called back surface of each semiconductor chip is exposed on the surface from which the double-sided adhesive sheet is peeled. Next, a predetermined resin sheet is bonded to the surface of the sealing member portion from which the double-sided adhesive sheet has been peeled. The sealing material portion is exposed from the back surface of each semiconductor chip on the side from which the double-sided adhesive sheet is peeled as described above, and the sealing material portion is inevitably warped because of low symmetry in the thickness direction thereof. In such a state where warpage occurs, the subsequent process cannot be appropriately performed. Therefore, in the semiconductor package manufacturing method using the conventional semiconductor process sheet including the double-sided adhesive sheet, it is necessary to apply a predetermined resin sheet to the side of the sealing material portion from which the double-sided adhesive sheet is peeled after the separation step, and to control so-called warping (warping) of the conventional chip embedding sealing material portion.
In contrast, in the method for manufacturing a semiconductor package according to claim 2 of the present invention, a special step for controlling the warpage of the chip-embedding sealing material portion after the separation step is not required. Because the above-described semiconductor process sheet of the 1 st aspect of the present invention is used in the present manufacturing method. Specifically, this is because: in the die mounting step, a plurality of semiconductor chips are mounted on a part of the encapsulant layer of the semiconductor process sheet, and in the sealing step, the encapsulant portion is formed by the encapsulant provided so as to embed the plurality of semiconductor chips and the part of the encapsulant layer or the cured part of the encapsulant layer. The present manufacturing method, which does not require a step for controlling the warpage of the chip-embedding sealing material portion, is suitable for efficiently manufacturing a semiconductor package.
As described above, the semiconductor wafer according to the 1 st aspect and the semiconductor package manufacturing method according to the 2 nd aspect of the present invention are suitable for efficiently manufacturing a semiconductor package.
In the chip mounting step of the semiconductor package manufacturing method of the present invention, it is preferable that the semiconductor chips with the extension electrodes are mounted on a part of the encapsulant layer so that the chip electrodes enter the part of the encapsulant layer (face-down mounting).
In such a face-down chip mounting step, it is preferable that each semiconductor chip is mounted on a part of the sealant layer of the semiconductor process sheet so that the chip electrode of the semiconductor chip enters the part of the sealant layer and reaches the 2 nd adhesive surface of the double-sided adhesive sheet. In this case, in the subsequent wiring forming step, a wiring structure portion including a wiring electrically connected to the chip electrode exposed on the surface of the sealing material portion is formed. According to the above configuration, when the chip mounting step is performed in a face-up manner as described later, the wiring structure portion can be appropriately formed without performing the step of grinding the sealing material portion, which is required before the wiring forming step. Therefore, this configuration is preferable in terms of efficiently manufacturing the semiconductor package.
In the chip mounting step of the semiconductor package manufacturing method according to the present invention, the semiconductor chip with the extension electrodes is mounted on a partial sealant layer so as to be bonded to the partial sealant layer on the side of the chip body opposite to the chip electrodes. In this case, the method for manufacturing a semiconductor package further includes a grinding step of grinding the sealing material portion to expose the chip electrodes of the semiconductor chip after the separation step, and the wiring forming step forms the wiring structure portion including the wirings electrically connected to the chip electrodes exposed on the surface of the sealing material portion. With this configuration, the wiring structure portion can be formed appropriately.
Drawings
FIG. 1 is a schematic partial cross-sectional view of a semiconductor process wafer in accordance with one embodiment of the present invention.
Fig. 2 shows a part of the steps in the method for manufacturing a semiconductor package using the semiconductor process sheet shown in fig. 1.
Fig. 3 shows a part of the steps in the method for manufacturing a semiconductor package using the semiconductor process sheet shown in fig. 1.
Fig. 4 shows a part of the steps in the method for manufacturing a semiconductor package using the semiconductor process sheet shown in fig. 1.
Fig. 5 shows a part of the steps in the method for manufacturing a semiconductor package using the semiconductor process sheet shown in fig. 1.
Fig. 6 shows a part of the steps in the method for manufacturing a semiconductor package using the semiconductor process sheet shown in fig. 1.
Fig. 7 shows a part of the steps in the method for manufacturing a semiconductor package using the semiconductor process sheet shown in fig. 1.
Detailed Description
Fig. 1 is a schematic partial cross-sectional view of a semiconductor process wafer X according to an embodiment of the present invention. The semiconductor process sheet X is used in the process of manufacturing a semiconductor package, and includes a double-sided adhesive sheet 10 and a partial sealant layer 20. The double-sided pressure-sensitive adhesive sheet 10 has a pressure-sensitive adhesive surface 10a and a pressure-sensitive adhesive surface 10b opposite thereto, and has a laminated structure including a substrate 11, a pressure-sensitive adhesive layer 12 of reduced adhesive strength, and a pressure-sensitive adhesive layer 13 between the pressure- sensitive adhesive surfaces 10a, 10 b. The partial sealant layer 20 is releasably adhered to the adhesive surface 10b of the double-sided adhesive sheet 10.
The substrate 11 of the double-sided adhesive sheet 10 is an element that functions as a support in the double-sided adhesive sheet 10 and/or the semiconductor wafer X. The substrate 11 is, for example, a plastic substrate, and a plastic film can be suitably used as the plastic substrate. Examples of the material constituting the plastic base include polyvinyl chloride, polyvinylidene chloride, polyolefin, polyester, polyurethane, polycarbonate, polyether ether ketone, polyimide, polyether imide, polyamide, wholly aromatic polyamide, polyphenylene sulfide, aramid, fluorine resin, cellulose resin, and silicone resin. Examples of the polyolefin include low-density polyethylene, linear low-density polyethylene, medium-density polyethylene, high-density polyethylene, ultra-low-density polyethylene, random copolymer polypropylene, block copolymer polypropylene, homopolypropylene, polybutene, polymethylpentene, ethylene-vinyl acetate copolymer (EVA), ionomer resin, ethylene- (meth) acrylic acid copolymer, ethylene- (meth) acrylate copolymer, ethylene-butene copolymer, and ethylene-hexene copolymer. Examples of the polyester include polyethylene terephthalate (PET), polyethylene naphthalate, and polybutylene terephthalate (PBT). The substrate 11 may be formed of one material, or may be formed of two or more materials. The substrate 11 may have a single-layer structure or a multi-layer structure. When the substrate 11 includes a plastic film, the film may be a non-stretched film, a uniaxially stretched film, or a biaxially stretched film.
The surface of the substrate 11 on which the pressure-sensitive adhesive layer 12 is disposed and the surface of the substrate on which the pressure-sensitive adhesive layer 13 is disposed may be subjected to physical treatment, chemical treatment, or undercoating treatment for improving adhesion to the pressure-sensitive adhesive layer. Examples of the physical treatment include corona treatment, plasma treatment, blast extinction treatment, ozone exposure treatment, flame exposure treatment, high-voltage shock exposure treatment, and ionizing radiation treatment. The chemical treatment may be, for example, a chromic acid treatment.
The thickness of the substrate 11 is preferably 5 μm or more, and more preferably 10 μm or more, from the viewpoint of ensuring strength for allowing the substrate 11 to function as a support in the double-sided adhesive sheet 10 and/or the semiconductor process sheet X. The thickness of the substrate 11 is preferably 300 μm or less, and more preferably 200 μm or less, from the viewpoint of achieving appropriate flexibility of the double-sided adhesive sheet 10 and/or the semiconductor process sheet X.
The adhesive layer 12 of the double-sided adhesive sheet 10 contains an adhesive of reduced adhesive force type. Examples of the adhesive force-reducing adhesive agent include a thermal expansion type adhesive agent and a type (type 1) of radiation-curable adhesive agent in which the adhesive force is reduced by irradiation with radiation to such an extent that the adhesive force cannot be used in the semiconductor package manufacturing process. In the pressure-sensitive adhesive layer 12 of the present embodiment, one kind of the pressure-sensitive adhesive having a reduced adhesive strength may be used, or two or more kinds of the pressure-sensitive adhesive having a reduced adhesive strength may be used.
The heat-expandable adhesive used for the adhesive layer 12 contains at least an adhesive main agent and a component that expands and expands by heating, for example. In the heat-expandable pressure-sensitive adhesive layer, when the expandable component and the foamable component contained therein are sufficiently heated, the expandable component expands, and a surface (adhesive surface) thereof has an uneven shape. When the heat-expandable pressure-sensitive adhesive layer is subjected to such heating in a state where the pressure-sensitive adhesive surface is in contact with a predetermined adherend, the pressure-sensitive adhesive layer expands to form irregularities on the pressure-sensitive adhesive surface, thereby reducing the total area of adhesion to the adherend and lowering the adhesive force to the adherend.
Examples of the main adhesive agent for a heat-expandable adhesive include acrylic polymers, rubber adhesives, and silicone adhesives, which are acrylic adhesives.
The acrylic polymer as the acrylic adhesive preferably contains a monomer unit derived from an acrylate and/or a methacrylate as the largest monomer unit in mass proportion. "(meth) acrylic acid" means "acrylic acid" and/or "methacrylic acid".
Examples of the (meth) acrylate used as a monomer unit for forming the acrylic polymer include hydrocarbon group-containing (meth) acrylates such as alkyl (meth) acrylates, cycloalkyl (meth) acrylates, and aryl (meth) acrylates. Examples of the alkyl (meth) acrylate include methyl ester, ethyl ester, propyl ester, isopropyl ester, butyl ester, isobutyl ester, sec-butyl ester, tert-butyl ester, pentyl ester, isopentyl ester, hexyl ester, heptyl ester, octyl ester, 2-ethylhexyl ester, isooctyl ester, nonyl ester, decyl ester, isodecyl ester, undecyl ester, dodecyl ester, tridecyl ester, tetradecyl ester, hexadecyl ester, octadecyl ester, and eicosyl ester of (meth) acrylic acid. Examples of the cycloalkyl (meth) acrylate include cyclopentyl and cyclohexyl (meth) acrylates. Examples of the aryl (meth) acrylate include phenyl (meth) acrylate and benzyl (meth) acrylate. As the monomer used for forming the monomer unit of the acrylic polymer, one kind of (meth) acrylate may be used, or two or more kinds of (meth) acrylates may be used. The proportion of the (meth) acrylate in the total monomer components for forming the acrylic polymer is preferably 40 mass% or more, and more preferably 60 mass% or more, from the viewpoint that the acrylic adhesive suitably exhibits basic characteristics such as adhesiveness with a (meth) acrylate.
For the acrylic polymer, in order to modify the cohesive force, heat resistance, etc. thereof, a monomer unit derived from one or two or more other monomers copolymerizable with the (meth) acrylate ester may be contained. Examples of such other monomers include functional group-containing monomers such as carboxyl group-containing monomers, acid anhydride monomers, hydroxyl group-containing monomers, glycidyl group-containing monomers, sulfonic acid group-containing monomers, phosphoric acid group-containing monomers, acrylamides, and acrylonitriles. Examples of the carboxyl group-containing monomer include acrylic acid, methacrylic acid, carboxyethyl (meth) acrylate, carboxypentyl (meth) acrylate, itaconic acid, maleic acid, fumaric acid, and crotonic acid. Examples of the acid anhydride monomer include maleic anhydride and itaconic anhydride. Examples of the hydroxyl group-containing monomer include 2-hydroxyethyl (meth) acrylate, 2-hydroxypropyl (meth) acrylate, 4-hydroxybutyl (meth) acrylate, 6-hydroxyhexyl (meth) acrylate, 8-hydroxyoctyl (meth) acrylate, 10-hydroxydecyl (meth) acrylate, 12-hydroxydodecyl (meth) acrylate, and (4-hydroxymethylcyclohexyl) methyl (meth) acrylate. Examples of the glycidyl group-containing monomer include glycidyl (meth) acrylate and methylglycidyl (meth) acrylate. Examples of the sulfonic acid group-containing monomer include styrenesulfonic acid, allylsulfonic acid, 2- (meth) acrylamido-2-methylpropanesulfonic acid, (meth) acrylamidopropanesulfonic acid, sulfopropyl (meth) acrylate, and (meth) acryloyloxynaphthalenesulfonic acid. Examples of the monomer having a phosphoric acid group include 2-hydroxyethyl acryloyl phosphate.
The acrylic polymer may contain a monomer unit derived from a polyfunctional monomer copolymerizable with a monomer such as a (meth) acrylate ester in order to form a crosslinked structure in the polymer skeleton thereof. Examples of such a polyfunctional monomer include hexanediol di (meth) acrylate, (poly) ethylene glycol di (meth) acrylate, (poly) propylene glycol di (meth) acrylate, neopentyl glycol di (meth) acrylate, pentaerythritol di (meth) acrylate, trimethylolpropane tri (meth) acrylate, pentaerythritol tri (meth) acrylate, dipentaerythritol hexa (meth) acrylate, epoxy (meth) acrylate (i.e., poly (glycidyl (meth) acrylate), polyester (meth) acrylate, and urethane (meth) acrylate. As the monomer for the acrylic polymer, one kind of polyfunctional monomer may be used, or two or more kinds of polyfunctional monomers may be used. The proportion of the polyfunctional monomer in the total monomer components used for forming the acrylic polymer is preferably 40% by mass or less, more preferably 30% by mass or less, from the viewpoint of appropriately exhibiting basic characteristics such as adhesiveness with a (meth) acrylate ester in the acrylic adhesive.
The acrylic polymer can be obtained by polymerizing a raw material monomer for forming the acrylic polymer. Examples of the polymerization method include solution polymerization, emulsion polymerization, bulk polymerization, and suspension polymerization.
From the viewpoint of high cleanliness in the method for producing a semiconductor package using the double-sided adhesive sheet 10 and/or the semiconductor wafer X, the low-molecular-weight component in each adhesive layer in the double-sided adhesive sheet 10 is preferably small, and the number average molecular weight of the acrylic polymer is preferably 10 ten thousand or more, and more preferably 20 to 300 ten thousand. The number average molecular weight of the acrylic polymer can be controlled by, for example, the polymerization method to be employed, the kind and amount of the polymerization initiator to be used, the temperature and time of the polymerization reaction, the concentrations of the respective monomers in the entire monomer components, the monomer dropping rate, and the like.
As the polymerization initiator, for example, azo polymerization initiators, peroxide polymerization initiators, redox polymerization initiators, and the like are used according to the polymerization method. Examples of the azo polymerization initiator include 2,2 '-azobisisobutyronitrile, 2' -azobis-2-methylbutyronitrile, dimethyl 2,2 '-azobis (2-methylpropionate), and 4, 4' -azobis-4-cyanovaleric acid. Examples of the peroxide-based polymerization initiator include dibenzoyl peroxide and tert-butyl maleate.
In order to increase the number average molecular weight of the acrylic polymer, for example, an external crosslinking agent may be blended in the pressure-sensitive adhesive layer-forming composition. Examples of the external crosslinking agent for forming a crosslinked structure by reacting with an acrylic polymer include polyisocyanate compounds, epoxy compounds, polyol compounds (polyphenol compounds and the like), aziridine compounds, and melamine crosslinking agents. The content of the external crosslinking agent in the main adhesive agent is preferably 6 parts by mass or less, and more preferably 0.1 to 5 parts by mass, per 100 parts by mass of the acrylic polymer.
Examples of the component that foams and expands by heating for the heat-expandable adhesive include a foaming agent and heat-expandable microspheres.
Examples of the foaming agent for the heat-expandable adhesive include various inorganic foaming agents and organic foaming agents. Examples of the inorganic blowing agent include ammonium carbonate, ammonium hydrogen carbonate, sodium hydrogen carbonate, ammonium nitrite, sodium borohydride, and azides. Examples of the organic blowing agent include chlorofluorinated alkanes such as trichloromonofluoromethane and dichloromonofluoromethane, azo compounds such as azobisisobutyronitrile, azodicarbonamide and barium azodicarboxylate, p-toluenesulfonylhydrazide and diphenylsulfone-3, 3' -disulfonylhydrazide, hydrazine compounds such as 4,4 ' -oxybis (benzenesulfonylhydrazide) and allylbis (sulfonyl hydrazide), semicarbazide compounds such as p-toluenesulfonylsemicarbazide and 4,4 ' -oxybis (benzenesulfonylsemicarbazide), triazole compounds such as 5-morpholino-1, 2,3, 4-thiatriazole, and N-nitroso compounds such as N, N ' -dinitrosopentamethylenetetramine and N, N ' -dimethyl-N, N ' -dinitrosoterephthalamide.
Examples of the thermally expandable microspheres for a heat-expandable adhesive include microspheres in which a material that is easily vaporized by heating and expands is sealed in a shell. Examples of the substance which is easily vaporized and expanded by heating include isobutane, propane, and pentane. The thermally expandable microspheres can be produced by enclosing a substance which is easily vaporized by heating and expands in a shell-forming substance by an agglomeration method, an interfacial polymerization method, or the like. As the shell-forming substance, a substance exhibiting thermal fusibility, a substance which may be broken by the action of thermal expansion of the enclosed substance, may be used. Examples of such a substance include a vinylidene chloride-acrylonitrile copolymer, polyvinyl alcohol, polyvinyl butyral, polymethyl methacrylate, polyacrylonitrile, polyvinylidene chloride, and polysulfone.
When the pressure-sensitive adhesive layer 12 is a pressure-sensitive adhesive layer of reduced adhesive strength (heat-expandable pressure-sensitive adhesive layer) including a heat-expandable pressure-sensitive adhesive, the thickness of the pressure-sensitive adhesive layer 12 is, for example, 5 to 100 μm.
Examples of the type 1 radiation-curable pressure-sensitive adhesive that can be used for the pressure-sensitive adhesive layer 12 include additive type radiation-curable pressure-sensitive adhesives containing a base polymer such as an acrylic polymer as an acrylic pressure-sensitive adhesive, and a radiation-polymerizable monomer component and oligomer component having a functional group such as a radiation-polymerizable carbon-carbon double bond.
As the acrylic polymer used for forming the radiation curable pressure-sensitive adhesive of the above type 1, those described above as the acrylic polymer forming the main adhesive agent in the thermal expansion type pressure-sensitive adhesive can be used.
Examples of the radiation-polymerizable monomer component used for forming the type 1 radiation-curable pressure-sensitive adhesive include trimethylolpropane tri (meth) acrylate, pentaerythritol tetra (meth) acrylate, dipentaerythritol monohydroxypenta (meth) acrylate, dipentaerythritol hexa (meth) acrylate, and 1, 4-butanediol di (meth) acrylate. Examples of the radiation polymerizable oligomer component used for forming the type 1 radiation curable pressure-sensitive adhesive include various oligomers such as urethane type, polyether type, polyester type, polycarbonate type, and polybutadiene type, and the molecular weight is preferably about 100 to 30000. The total content of the radiation-polymerizable monomer component and oligomer component in the radiation-curable pressure-sensitive adhesive is determined within a range in which the adhesive strength of the pressure-sensitive adhesive layer 12 to be formed can be appropriately reduced by irradiation with radiation, and is, for example, 5 to 500 parts by mass, preferably 40 to 150 parts by mass, relative to 100 parts by mass of a base polymer such as an acrylic polymer. As the additive type radiation-curable pressure-sensitive adhesive, for example, one disclosed in Japanese patent application laid-open No. 60-196956 can be used.
Examples of the type 1 radiation-curable pressure-sensitive adhesive that can be used for the pressure-sensitive adhesive layer 12 include internal type radiation-curable pressure-sensitive adhesives containing a base polymer having a functional group such as a radiation-polymerizable carbon-carbon double bond at a polymer side chain, a polymer main chain, or a polymer main chain end. Such an internal radiation curable pressure-sensitive adhesive is suitable in terms of suppressing an undesirable change in the adhesive properties with time due to the movement of low-molecular-weight components in the pressure-sensitive adhesive layer 12 to be formed.
The base polymer contained in the internal radiation curable pressure-sensitive adhesive preferably has an acrylic polymer as a basic skeleton. As the acrylic polymer forming such a basic skeleton, those described above as the acrylic polymer forming the main adhesive agent in the thermal expansion type adhesive can be used. Examples of the method for introducing a radiation-polymerizable carbon-carbon double bond into an acrylic polymer include the following methods: a method in which a compound having a predetermined functional group (2 nd functional group) capable of bonding by reaction with the 1 st functional group and a radiation-polymerizable carbon-carbon double bond is subjected to a condensation reaction or an addition reaction with an acrylic polymer while maintaining the radiation-polymerizability of the carbon-carbon double bond after a raw material monomer containing a monomer having the predetermined functional group (1 st functional group) is copolymerized to obtain the acrylic polymer.
Examples of the combination of the 1 st functional group and the 2 nd functional group include a carboxyl group and an epoxy group, an epoxy group and a carboxyl group, a carboxyl group and an aziridine group, an aziridine group and a carboxyl group, a hydroxyl group and an isocyanate group, and an isocyanate group and a hydroxyl group, among which a combination of a hydroxyl group and an isocyanate group and a combination of an isocyanate group and a hydroxyl group are suitable from the viewpoint of easiness of reaction follow-up, and further, since it is difficult to prepare a polymer having an isocyanate group with high reactivity, it is more suitable when the 1 st functional group on the acrylic polymer side is a hydroxyl group and the 2 nd functional group is an isocyanate group from the viewpoint of easiness of preparation or obtainment of an acrylic polymer, and examples of the cyanate compound having both a polymerizable carbon-carbon double bond and an isocyanate group as the 2 nd functional group include radiation rays of methacryloyl isocyanate, 2-methacryloyloxyethyl isocyanate (MOI), and m-isopropenyl- α -dimethylbenzyl isocyanate.
Examples of the photopolymerization initiator include α -ketol compounds, acetophenone compounds, benzoin ether compounds, ketal compounds, aromatic sulfonyl chloride compounds, photoactive oxime compounds, benzophenone compounds, thioxanthone compounds, camphorquinone, halogenated ketones, acylphosphine oxides, and acyl phosphate esters, examples of the α -ketol compounds include 4- (2-hydroxyethoxy) phenyl (2-hydroxy-2-propyl) ketone, α -hydroxy- α' -dimethylacetophenone, 2-methyl-2-hydroxypropiophenone, and 1-hydroxycyclohexylphenylketone, examples of the acetophenone compounds include methoxyacetophenone, 2-dimethoxy-1, 2-diphenylethane-1-one, 2-diethoxyacetophenone, and 2-methyl-1- [4- (methylthio) -phenyl ] -2-morpholinopropane-1-one, examples of the benzoin compounds include benzoin compounds, 2-diethoxy acetophenone compounds, 2-methyl-1- [4- (methylthio) -phenyl ] -2-morpholinopropane-1-one, 2-diethoxy acetophenone compounds, and 2-methyl-1- [4- (methylthio) -phenyl ] -2-morpholinopropane-1-one, 2-dimethylthioketal compounds, 2-diethylthioketal compounds, examples of the photopolymerization initiator include 2-dimethylthiobenzophenone compounds, 2-dimethylthioketal compounds, 2-dimethylthiobenzophenone compounds, and 2-dimethylthioketal compounds, etc., as well as photopolymerization initiators, and as well as photopolymerization initiators, such as a photopolymerization initiator, a photopolymerization initiator.
As the radiation curable adhesive for the adhesive layer 12, for example, an adhesive of a type that is cured by irradiation with electron beam, ultraviolet ray, α ray, β ray, γ ray, or X ray, particularly an adhesive of a type that is cured by irradiation with ultraviolet ray (ultraviolet curable adhesive) can be suitably used.
When the pressure-sensitive adhesive layer 12 is a reduced-adhesive-force pressure-sensitive adhesive layer (radiation-curable pressure-sensitive adhesive layer) including the radiation-curable pressure-sensitive adhesive of type 1, the thickness of the pressure-sensitive adhesive layer 12 is, for example, 2 to 50 μm.
The pressure-sensitive adhesive layer 12 may contain a tackifier, an antioxidant, a colorant, and the like in addition to the above components. Examples of the colorant include pigments and dyes. The colorant may be a compound that is colored by irradiation with radiation. Examples of such compounds include leuco dyes.
The adhesive layer 13 of the double-sided adhesive sheet 10 contains an adhesive. Examples of the pressure-sensitive adhesive used for the pressure-sensitive adhesive layer 13 include a pressure-sensitive adhesive and a radiation-curable pressure-sensitive adhesive of a type (type 2) in which the adhesive strength is reduced by irradiation with radiation but the adhesive strength is maintained to such an extent that the adhesive strength can be utilized in the manufacturing process of a semiconductor package. In the pressure-sensitive adhesive layer 13 of the present embodiment, one kind of pressure-sensitive adhesive may be used, or two or more kinds of pressure-sensitive adhesives may be used.
As the pressure-sensitive adhesive that can be used for the pressure-sensitive adhesive layer 13, acrylic polymers, rubber-based adhesives, and silicone-based adhesives, which are acrylic adhesives, can be cited. As the acrylic polymer for pressure-sensitive adhesives, those described above as the acrylic polymer forming the main adhesive agent in the heat-expandable adhesive can be used.
As the type 2 radiation-curable pressure-sensitive adhesive that can be used for the pressure-sensitive adhesive layer 13, for example, an additive type radiation-curable pressure-sensitive adhesive containing a base polymer such as an acrylic polymer as an acrylic pressure-sensitive adhesive, and a radiation-polymerizable monomer component and oligomer component having a functional group such as a radiation-polymerizable carbon-carbon double bond can be used. As the component for constituting the pressure-sensitive adhesive, for example, the components described above with respect to the additive type radiation-curable pressure-sensitive adhesive for the pressure-sensitive adhesive layer 12 can be used. The degree of decrease in adhesive strength due to radiation irradiation in the additive-type radiation-curable pressure-sensitive adhesive can be controlled by, for example, the content of a functional group such as a radiation-polymerizable carbon-carbon double bond, the type and the amount of a photopolymerization initiator.
Examples of the type 2 radiation-curable pressure-sensitive adhesive that can be used for the pressure-sensitive adhesive layer 13 include internal type radiation-curable pressure-sensitive adhesives containing a base polymer having a functional group such as a radiation-polymerizable carbon-carbon double bond at a polymer side chain, a polymer main chain, or a polymer main chain end. As the component for constituting the pressure-sensitive adhesive, for example, the components described above with respect to the internal type radiation-curable pressure-sensitive adhesive for the pressure-sensitive adhesive layer 12 can be used. The degree of decrease in adhesive strength due to irradiation with radiation in the internal radiation-curable pressure-sensitive adhesive can be controlled by, for example, the content of a functional group such as a radiation-polymerizable carbon-carbon double bond, and the type and amount of a photopolymerization initiator.
The thickness of the adhesive layer 13 is, for example, 1 to 50 μm.
The pressure-sensitive adhesive layer 13 may contain a tackifier, an antioxidant, a colorant, and the like in addition to the above components. Examples of the colorant include pigments and dyes. The colorant may be a compound that is colored by irradiation with radiation. Examples of such compounds include leuco dyes.
In the present embodiment, as described above, the pressure-sensitive adhesive layer 12 as the pressure-sensitive adhesive force reducing type pressure-sensitive adhesive layer is closer to the pressure-sensitive adhesive surface 10a side than the substrate 11, and the pressure-sensitive adhesive layer 13 is closer to the pressure-sensitive adhesive surface 10b side than the substrate 11. In the double-sided adhesive sheet 10 of the semiconductor process sheet X, the adhesive layer 12 may be closer to the adhesive surface 10b than the substrate 11 and the adhesive layer 13 may be closer to the adhesive surface 10a than the substrate 11, instead of the laminated structure.
The double-sided adhesive sheet 10 of the semiconductor process sheet X may include other layers in the laminated structure in addition to the substrate 11, the adhesive force reducing adhesive layer 12, and the adhesive layer 13 as described above. Examples of such other layers include a thin pressure-sensitive adhesive layer provided on the pressure-sensitive adhesive layer 12 to form a pressure-sensitive adhesive surface when the pressure-sensitive adhesive layer 12 is a thermally foamable pressure-sensitive adhesive layer, and a rubbery organic elastic layer provided between the pressure-sensitive adhesive layer 12 and the substrate 11 when the pressure-sensitive adhesive layer 12 is a thermally foamable pressure-sensitive adhesive layer.
When the heat-expandable pressure-sensitive adhesive layer expands by heating and deforms the surface irregularities in a state where the thin pressure-sensitive adhesive layer covering the surface of the heat-expandable pressure-sensitive adhesive layer is in contact with a predetermined adherend, the thin pressure-sensitive adhesive layer is deformed accordingly, the total area of the adhesive layer bonded to the adherend is reduced, and the adhesive force to the adherend is reduced. It is possible to utilize the adhesive force reducing function of the heat-expandable adhesive and to utilize the desired adhesive force in a thin adhesive layer. The thickness of the thin adhesive layer on the heat-expandable adhesive layer is, for example, 2 to 30 μm.
By providing the rubbery organic elastic layer between the base material and the heat-expandable pressure-sensitive adhesive layer, the heat-expandable pressure-sensitive adhesive layer can be easily expanded preferentially in the thickness direction thereof by heating and can be expanded with high uniformity. Such a rubber-like organic elastic layer is formed of, for example, natural rubber, synthetic rubber, or synthetic resin having rubber elasticity and a shore D hardness of 50 or less according to ASTM D-2240. Examples of the synthetic rubber and the synthetic resin for the rubber-like organic elastic layer include synthetic rubbers such as nitrile-based, diene-based, and acrylic-based rubbers, thermoplastic elastomers such as polyolefin-based and polyester-based rubbers, and synthetic resins having rubber elasticity such as ethylene-vinyl acetate copolymers, polyurethanes, polybutadienes, and soft polyvinyl chlorides. The thickness of the rubber-like organic elastic layer is, for example, 1 to 500. mu.m.
As described above, the partial sealant layer 20 in the semiconductor process sheet X is releasably adhered to the adhesive surface 10b of the double-sided adhesive sheet 10. The thickness of the partial sealant layer 20 is, for example, 1 to 300 μm.
The partial encapsulant layer 20 may be a chip electrode embedding adhesive layer for embedding a chip electrode of a semiconductor chip that is a component of a semiconductor package to be manufactured. That is, the semiconductor process sheet X may be designed to mount the semiconductor chip face down to the partial encapsulant layer 20. The thickness of the partial sealant layer 20 as the adhesive layer for embedding the chip electrodes is preferably 1 to 300 μm, more preferably 5 to 250 μm, and still more preferably 10 to 200 μm. The ratio of the thickness of the partial sealant layer 20 as the adhesive layer for embedding the chip electrodes to the height of the chip electrodes to be embedded is preferably 0.1 to 10, and more preferably 0.2 to 9.
The partial sealant layer 20 has a composition containing, for example, a thermosetting resin and a thermoplastic resin as resin components. Alternatively, part of the sealant layer 20 may have a composition containing, as a resin component, a thermoplastic resin having a thermosetting functional group capable of reacting with a curing agent to form a bond. The semiconductor process sheet X is subjected to the semiconductor package manufacturing process in a state where such a part of the encapsulant layer 20 is uncured.
When the partial sealant layer 20 has a composition containing a thermosetting resin and a thermoplastic resin, examples of the thermosetting resin include an epoxy resin, a phenol resin, an amino resin, an unsaturated polyester resin, a polyurethane resin, a silicone resin, and a thermosetting polyimide resin. The partial sealant layer 20 may contain one kind of thermosetting resin, or may contain two or more kinds of thermosetting resins. The epoxy resin is preferably a thermosetting resin in the partial sealant layer 20 because of a tendency that the content of ionic impurities and the like which may cause corrosion of the semiconductor chip is small. As a curing agent for making the epoxy resin thermosetting, a phenol resin is preferable.
Examples of the epoxy resin include bifunctional epoxy resins and polyfunctional epoxy resins such as bisphenol a type epoxy resin, bisphenol F type epoxy resin, bisphenol S type epoxy resin, brominated bisphenol a type epoxy resin, hydrogenated bisphenol a type epoxy resin, bisphenol AF type epoxy resin, biphenyl type epoxy resin, naphthalene type epoxy resin, fluorene type epoxy resin, phenol novolac type epoxy resin, o-cresol novolac type epoxy resin, trishydroxyphenylmethane type epoxy resin, and tetrakis (phenylhydroxy) ethane (Tetraphenylolethane) type epoxy resin. Examples of the epoxy resin include hydantoin type epoxy resins, triglycidyl isocyanurate type epoxy resins, and glycidyl amine type epoxy resins. The partial sealant layer 20 may contain one kind of epoxy resin, or may contain two or more kinds of epoxy resins.
The phenol resin functions as a curing agent for the epoxy resin, and examples of such phenol resins include novolac-type phenol resins such as phenol novolac resin, phenol aralkyl resin, cresol novolac resin, tert-butylphenol novolac resin, and nonylphenol novolac resin. Examples of the phenol resin include resol-type phenol resins and polyoxystyrenes such as polyoxystyrene. Particularly preferred phenolic resins for the partial sealant layer 20 are phenol novolac resins and phenol aralkyl resins. The partial sealant layer 20 may contain one kind of phenol resin as a curing agent for the epoxy resin, or may contain two or more kinds of phenol resins.
When the partial sealant layer 20 contains an epoxy resin and a phenol resin as a curing agent thereof, the two resins are blended in a ratio of preferably 0.5 to 2.0 equivalents, more preferably 0.8 to 1.2 equivalents, to 1 equivalent of an epoxy group in the epoxy resin and to a hydroxyl group in the phenol resin. Such a configuration is preferable in view of sufficiently advancing the curing reaction of the epoxy resin and the phenol resin at the time of curing the partial sealant layer 20.
The content ratio of the thermosetting resin in the partial sealant layer 20 is preferably 5 to 60% by mass, and more preferably 10 to 50% by mass, from the viewpoint of appropriately curing the partial sealant layer 20.
Examples of the thermoplastic resin in the partial sealant layer 20, which functions as an adhesive, include acrylic resins, natural rubber, butyl rubber, isoprene rubber, chloroprene rubber, ethylene-vinyl acetate copolymers, ethylene-acrylic acid ester copolymers, polybutadiene resins, polycarbonate resins, thermoplastic polyimide resins, polyamide resins such as 6-nylon and 6, 6-nylon, phenoxy resins, saturated polyester resins such as polyethylene terephthalate and polybutylene terephthalate, polyamide-imide resins, and fluorine resins when the partial sealant layer 20 has a composition containing a thermosetting resin and a thermoplastic resin. The partial sealant layer 20 may contain one kind of thermoplastic resin, or may contain two or more kinds of thermoplastic resins. The acrylic resin is preferably used as the thermoplastic resin in the partial sealant layer 20 because of its low content of ionic impurities and high heat resistance.
In the case where the partial sealant layer 20 contains an acrylic resin as the thermoplastic resin, the acrylic polymer forming the acrylic resin preferably contains the largest number of monomer units derived from (meth) acrylic acid esters in mass proportion. Examples of the (meth) acrylate used as a monomer unit for forming the acrylic polymer include alkyl (meth) acrylates, cycloalkyl (meth) acrylates, and aryl (meth) acrylates. Examples of the alkyl (meth) acrylate include methyl ester, ethyl ester, propyl ester, isopropyl ester, butyl ester, isobutyl ester, sec-butyl ester, tert-butyl ester, pentyl ester, isopentyl ester, hexyl ester, heptyl ester, octyl ester, 2-ethylhexyl ester, isooctyl ester, nonyl ester, decyl ester, isodecyl ester, undecyl ester, dodecyl ester, tridecyl ester, tetradecyl ester, hexadecyl ester, octadecyl ester, and eicosyl ester of (meth) acrylic acid. Examples of the cycloalkyl (meth) acrylate include cyclopentyl and cyclohexyl (meth) acrylates. Examples of the aryl (meth) acrylate include phenyl (meth) acrylate and benzyl (meth) acrylate. As the monomer used for forming the monomer unit of the acrylic polymer, one kind of (meth) acrylate may be used, or two or more kinds of (meth) acrylates may be used. Such an acrylic polymer can be obtained by polymerizing a raw material monomer for forming the acrylic polymer. Examples of the polymerization method include solution polymerization, emulsion polymerization, bulk polymerization, and suspension polymerization.
For the acrylic polymer, monomer units derived from one or two or more other monomers copolymerizable with the (meth) acrylate ester may be contained for the purpose of modification of its cohesive force, heat resistance. Examples of such other monomers include carboxyl group-containing monomers, acid anhydride monomers, hydroxyl group-containing monomers, epoxy group-containing monomers, sulfonic acid group-containing monomers, phosphoric acid group-containing monomers, acrylamide, and acrylonitrile. Examples of the carboxyl group-containing monomer include acrylic acid, methacrylic acid, carboxyethyl (meth) acrylate, carboxypentyl (meth) acrylate, itaconic acid, maleic acid, fumaric acid, and crotonic acid. Examples of the acid anhydride monomer include maleic anhydride and itaconic anhydride. Examples of the hydroxyl group-containing monomer include 2-hydroxyethyl (meth) acrylate, 2-hydroxypropyl (meth) acrylate, 4-hydroxybutyl (meth) acrylate, 6-hydroxyhexyl (meth) acrylate, 8-hydroxyoctyl (meth) acrylate, 10-hydroxydecyl (meth) acrylate, 12-hydroxylauryl (meth) acrylate, and (4-hydroxymethylcyclohexyl) methyl (meth) acrylate. Examples of the epoxy group-containing monomer include glycidyl (meth) acrylate and methyl glycidyl (meth) acrylate. Examples of the sulfonic acid group-containing monomer include styrenesulfonic acid, allylsulfonic acid, 2- (meth) acrylamido-2-methylpropanesulfonic acid, (meth) acrylamidopropanesulfonic acid, and (meth) acryloyloxynaphthalenesulfonic acid. Examples of the monomer having a phosphoric acid group include 2-hydroxyethyl acryloyl phosphate.
When the part of the sealant layer 20 has a composition containing a thermoplastic resin having a thermosetting functional group, an acrylic resin having a thermosetting functional group can be used as the thermoplastic resin, for example. The acrylic polymer used to form the thermosetting functional group-containing acrylic resin preferably contains the most monomer units derived from (meth) acrylate ester in a mass ratio. As such a (meth) acrylate, for example, the same (meth) acrylate as described above as a constituent monomer of an acrylic polymer for forming the acrylic resin contained in the partial sealant layer 20 can be used. On the other hand, examples of the thermosetting functional group used for forming the thermosetting functional group-containing acrylic resin include glycidyl groups, carboxyl groups, hydroxyl groups, and isocyanate groups. Among these, glycidyl groups and carboxyl groups can be suitably used. That is, as the acrylic resin having a thermosetting functional group, a glycidyl group-containing acrylic polymer or a carboxyl group-containing acrylic polymer can be suitably used. Further, a curing agent capable of reacting with the thermosetting functional group is selected according to the kind of the thermosetting functional group in the thermosetting functional group-containing acrylic resin. When the thermosetting functional group of the thermosetting functional group-containing acrylic resin is a glycidyl group, the same phenol resin as described above as the curing agent for epoxy resin can be used as the curing agent.
The composition used to form the partial sealant layer 20 preferably contains a thermal curing catalyst. The compounding of the heat curing catalyst into the partial sealant layer-forming composition is preferable in terms of sufficiently advancing the curing reaction of the resin component at the time of curing the partial sealant layer 20 or increasing the curing reaction speed. Examples of such a thermosetting catalyst include imidazole compounds, triphenylphosphine compounds, amine compounds, and trihaloborane compounds. Examples of the imidazole-based compound include 2-methylimidazole, 2-undecylimidazole, 2-heptadecylimidazole, 1, 2-dimethylimidazole, 2-ethyl-4-methylimidazole, 2-phenylimidazole, 2-phenyl-4-methylimidazole, 1-benzyl-2-phenylimidazole, 1-cyanoethyl-2-methylimidazole, 1-cyanoethyl-2-undecylimidazole, 1-cyanoethyl-2-phenylimidazolium trimellitate, 2, 4-diamino-6- [2 '-methylimidazolyl- (1') ] -ethyl-s-triazine, 2, 4-diamino-6- [2 ' -undecylimidazolyl- (1 ') ] -ethyl-s-triazine, 2, 4-diamino-6- [2 ' -ethyl-4 ' -methylimidazolyl- (1 ') ] -ethyl-s-triazine, 2, 4-diamino-6- [2 ' -methylimidazolyl- (1 ') ] -ethyl-s-triazine isocyanuric acid adduct, 2-phenyl-4, 5-dihydroxymethylimidazole, and 2-phenyl-4-methyl-5-hydroxymethylimidazole. Examples of the triphenylphosphine-based compound include triphenylphosphine, tris (butylphenyl) phosphine, tris (p-methylphenyl) phosphine, tris (nonylphenyl) phosphine, diphenyltolylphosphine, tetraphenylphosphonium bromide, methyltriphenylphosphonium chloride, methoxymethyltriphenylphosphonium chloride, and benzyltriphenylphosphonium chloride. The triphenylphosphine-based compound also includes a compound having both a triphenylphosphine structure and a triphenylborane structure. Examples of such compounds include tetraphenylphosphine tetraphenylboronate, tetraphenylphosphine tetra-p-tolylboronate, benzyltriphenylphosphine tetraphenylboronate, and triphenylphosphine triphenylborane. Examples of the amine compound include monoethanolamine trifluoroborate and dicyandiamide. Examples of the trihaloborane-based compound include trichloroborane. The composition for forming a partial sealant layer may contain one kind of heat curing catalyst, or may contain two or more kinds of heat curing catalysts.
Portions of the sealant layer 20 may contain a filler. The filler is preferably blended in the partial sealant layer 20 in view of adjusting physical properties such as elastic modulus, yield strength, and elongation at break of the partial sealant layer 20. Examples of the filler include inorganic fillers and organic fillers. Examples of the constituent material of the inorganic filler include aluminum hydroxide, magnesium hydroxide, calcium carbonate, magnesium carbonate, calcium silicate, magnesium silicate, calcium oxide, magnesium oxide, aluminum nitride, aluminum borate whisker, boron nitride, crystalline silica, and amorphous silica. Examples of the constituent material of the inorganic filler include simple metals such as aluminum, gold, silver, copper, and nickel, alloys, amorphous carbon, and graphite. Examples of the constituent material of the organic filler include polymethyl methacrylate (PMMA), polyimide, polyamideimide, polyether ether ketone, polyetherimide, and polyesterimide. The partial sealant layer 20 may contain one kind of filler, or may contain two or more kinds of fillers. The filler may have various shapes such as a spherical shape, a needle shape, and a plate shape. When the partial sealant layer 20 contains a filler, the filler preferably has an average particle diameter of 0.002 to 10 μm, more preferably 0.05 to 1 μm. Such a structure that the average particle diameter of the filler is 10 μm or less is suitable from the viewpoint of obtaining a sufficient filler addition effect and securing heat resistance of the partial sealant layer 20. The average particle diameter of the filler can be determined, for example, by using a photometric particle size distribution meter (trade name "LA-910", manufactured by horiba, Ltd.). When the partial sealant layer 20 contains a filler, the content of the filler is preferably 10% by mass or more, more preferably 15% by mass or more, and still more preferably 20% by mass or more. The content is preferably 50% by mass or less, more preferably 47% by mass or less, and still more preferably 45% by mass or less.
The partial sealant layer 20 contains a colorant in the present embodiment. The colorant may be a pigment or a dye. Examples of the colorant include a black colorant, a cyan colorant, a magenta colorant, and a yellow colorant. Examples of the black-based colorant include azo-based pigments such as copper oxide, manganese dioxide, azomethine azo black, aniline black, perylene black, titanium black, cyanine black, activated carbon, ferrite, magnetite, chromium oxide, iron oxide, molybdenum disulfide, complex oxide-based black pigments, anthraquinone-based organic black dyes, and azo-based organic black dyes. Examples of the black-based colorant include c.i. solvent black 3, c.i. solvent black 7, c.i. solvent black 22, c.i. solvent black 27, c.i. solvent black 29, c.i. solvent black 34, c.i. solvent black 43, and c.i. solvent black 70. Examples of the black-based colorant include c.i. direct black 17, c.i. direct black 19, c.i. direct black 22, c.i. direct black 32, c.i. direct black 38, c.i. direct black 51, and c.i. direct black 71. Examples of the black-based colorant include c.i. acid black 1, c.i. acid black 2, c.i. acid black 24, c.i. acid black 26, c.i. acid black 31, c.i. acid black 48, c.i. acid black 52, c.i. acid black 107, c.i. acid black 109, c.i. acid black 110, c.i. acid black 119, and c.i. acid black 154. Examples of the black-based colorant include c.i. disperse black 1, c.i. disperse black 3, c.i. disperse black 10, and c.i. disperse black 24. Examples of the black-based colorant include c.i. pigment black 1 and c.i. pigment black 7. The partial sealant layer 20 may contain one kind of colorant, or may contain two or more kinds of colorants. The content of the colorant in the partial sealant layer 20 is, for example, 0.5 wt% or more, preferably 1 wt% or more, and more preferably 2 wt% or more. The content is, for example, 10 wt% or less, preferably 8 wt% or less, and more preferably 5 wt% or less.
The partial sealant layer 20 may contain one or two or more other components as required, for example, a flame retardant, a silane coupling agent, and an ion scavenger, for example, antimony trioxide, antimony pentoxide, and a brominated epoxy resin, for example, β - (3, 4-epoxycyclohexyl) ethyltrimethoxysilane, γ -epoxypropoxypropyltrimethoxysilane, and γ -epoxypropylmethyldiethoxysilane, for example, hydrotalcite, bismuth hydroxide, hydrous antimony oxide (for example, "IXE-300" manufactured by Tokyania synthesis Co., Ltd.), zirconium phosphate having a specific structure (for example, "IXE-100" manufactured by Tokyania synthesis Co., Ltd.), magnesium silicate (for example, "KYOWAD 600" manufactured by Kyokoku Co., Ltd.), magnesium silicate (for example, a silicate forming a complex with a metal ion capturing agent, as an ion capturing compound, as a bis (2-bis (2-hydroxyphenyl) benzotriazole, 2-hydroxy-2- (2-bis (2-hydroxyphenyl) benzotriazole, 2-bis (2-hydroxyphenyl) phenyl) ethyl-2- (2-hydroxy-2-phenyl) benzotriazole, 2-bis (2-tert-2-hydroxyphenyl) phenyl) benzotriazole, 2- (2-hydroxy-2-tert-butyl) phenyl) benzotriazole, 5-2-tert-butyl) phenyl) ethyl-2-1-2-hydroxy-2-phenyl) benzotriazole, 5-2-1-tert-2-butyl-2-1-butyl-2-phenyl) benzotriazole, 5-2-1-2-1-2-1-2-1-hydroxy-2-1-2-1-hydroxy-2-phenyl) benzotriazole, 5-2-phenyl-2-hydroxy-2-phenyl-2-phenyl) phenyl-hydroxy-phenyl) phenyl-2-1-2-phenyl-2.
In the semiconductor process sheet X described above, the ratio of the peel adhesion (2 nd adhesion) exhibited on the stainless steel plane in the peel test under the conditions of 23 ℃, peel angle 180 ° and stretching speed 300 mm/min on the adhesive surface 10a of the double-sided adhesive sheet 10 to the peel adhesion (1 st adhesion) in the peel test under the conditions of 23 ℃, peel angle 180 ° and stretching speed 300 mm/min between the adhesive surface 10b of the double-sided adhesive sheet 10 and the partial sealant layer 20 is preferably 0.003 to 3, and more preferably 0.004 to 2.5.
The 1 st adhesive force can be measured using a tensile tester (trade name "Autograph AG-X", manufactured by shimadzu corporation.) a method of manufacturing a test piece for measurement and a method of measurement are specifically as follows.first, a single-sided adhesive tape (trade name "BT-315", manufactured by ritonan corporation) is bonded to the surface of the semiconductor process sheet X on the side of the partial sealant layer 20. the bonding is performed by a press bonding operation of reciprocating a 2kg hand roller 1 time, then, a test piece having a laminated structure of the semiconductor process sheet X (double-sided adhesive sheet 10, partial sealant layer 20) and the single-sided adhesive tape and having a width of 20mm × and a length of 100mm is cut out from the bonded body, and then, a peel test is performed on the test piece using a tensile tester under conditions of 23 ℃, a peel angle of 180 ° and a tensile speed of 300 mm/min, and the peel adhesive force between the adhesive surface 10b of the double-sided semiconductor process sheet X and the partial sealant layer 10b (the peel adhesive tape) is measured using a tensile tester (trade name "Autograph AG-X, manufactured by shimadzu corporation).
The 2 nd adhesive force can be measured using a tensile tester (trade name "Autograph AG-X", manufactured by shimadzu corporation.) a method of producing a test piece for the measurement and a method of measuring the same are specifically as follows.first, a test piece having a width of 20mm × and a length of 100mm is cut out from a double-sided adhesive sheet 10 having no partial sealant layer 20. next, the test piece is bonded to a stainless steel plate with its adhesive surface 10a, the bonding is performed by a pressure bonding operation of reciprocating a 2kg hand roller 1 time, and then, the test piece is subjected to a peel test using a tensile tester, trade name "Autograph AG-X", manufactured by shimadzu corporation) under conditions of 23 ℃, a peel angle of 180 ° and a tensile speed of 300 mm/min, and the peel adhesive force (2 nd adhesive force) of the adhesive surface 10a of the double-sided adhesive sheet 10 in the semiconductor process sheet X to the stainless steel plate is measured.
The semiconductor process sheet X having the above-described configuration may be produced by forming a partial sealant layer 20 on the adhesive surface 10b of the double-sided adhesive sheet 10, or may be produced by bonding a partial sealant layer 20 formed on a separator to the adhesive surface 10b side of a separately produced double-sided adhesive sheet 10. The double-sided adhesive sheet 10 may be produced by forming the adhesive layers 12 and 13 on the substrate 11, or may be produced by bonding the adhesive layer 12 formed on a separator and the adhesive layer 13 formed on another separator to the substrate 11. Each layer can be formed, for example, by coating and drying a predetermined composition prepared for each layer.
Fig. 2 to 7 show a method for manufacturing a semiconductor package according to an embodiment of the present invention. The present manufacturing method is a method for manufacturing a semiconductor package using a semiconductor wafer X, and includes the following chip mounting step, sealing step, separating step, wiring forming step, thinning step, and singulation step in the present embodiment.
First, in the chip mounting step, as shown in fig. 2 (a) and 2 (b), a plurality of semiconductor chips C are mounted on a part of the sealant layer 20 in the semiconductor process sheet X having the adhesive surface 10a side bonded to the support S. The support S is made of, for example, metal, glass, or transparent resin. The semiconductor chip C has a chip body and a chip electrode E extending from the chip body. In the present embodiment, the chip electrode E of the semiconductor chip C is mounted so as to face downward toward the partial encapsulant layer 20. Each semiconductor chip C is preferably mounted on the partial sealant layer 20 so that the chip electrode E of the semiconductor chip C enters the partial sealant layer 20 in the semiconductor process sheet X and reaches the adhesive surface 10b of the double-sided adhesive sheet 10.
Next, in the sealing step, as shown in fig. 3 (a), the sealant 30 'is supplied onto the semiconductor process sheet X so as to embed the plurality of semiconductor chips C, and then, as shown in fig. 3 (b), the sealant 30' and a part of the sealant 20 are cured to form the sealing material portion 30. Thus, a package P (chip embedding sealing material portion) is obtained as the sealing material portion 30 embedding the semiconductor chip C. The sealing agent 30' is a composition containing a curing agent such as an epoxy resin or a phenol resin, an inorganic filler, a curing accelerator, and a black coloring agent, and may be supplied in any form of a liquid composition, a powder, and a sheet in the sealing step. As a constituent material of the sealant 30', for example, the same constituent material as described above as a constituent material of the partial sealant layer 20 of the semiconductor wafer X can be used. In this step, the heating temperature for forming the sealing material portion 30 is, for example, 150 to 185 ℃, and the heating time is, for example, 60 seconds to several hours.
In the present manufacturing method, after the above-described die mounting step with reference to fig. 2 and before the sealant 30' is supplied onto the semiconductor process sheet X, a part of the sealant layer 20 may be cured as shown in fig. 4 a (curing step). In this case, in the sealing step, as shown in fig. 4 (b), the sealant 30 'is first supplied onto the semiconductor process sheet X so as to embed the plurality of semiconductor chips C, and then the sealant 30' is cured on the cured partial sealant 20, thereby forming the sealing material portion 30 as shown in fig. 3 (b). With this configuration, the sealing step is performed in a state where the holding force of the semiconductor chip C by the semiconductor process sheet X is strengthened by curing a part of the sealant layer 20. Therefore, this configuration is suitable for suppressing the positional displacement of the semiconductor chip C due to shrinkage during curing of the sealant 30' in the sealing step. Such suppression of the positional displacement of the semiconductor chip is preferable, for example, in terms of accurately forming a wiring structure portion including a wiring for each semiconductor chip C in a subsequent wiring forming step.
Next, in the separation step, as shown in fig. 5 (a), the support state of the package P by the support S is released. In this step, for example, the semiconductor process sheet X and the support S are separated from each other, and thereafter, the double-sided adhesive sheet 10 and/or the adhesive surface 10b thereof are separated from the package P (chip embedding sealing material portion). Alternatively, after the package P is separated from the double-sided adhesive sheet 10 on the support S, the double-sided adhesive sheet 10 is peeled off from the support S.
In the case where the pressure-sensitive adhesive layer 12 (adhesive force reducing pressure-sensitive adhesive layer) of the double-sided pressure-sensitive adhesive sheet 10 in the semiconductor process sheet X is a heat-expandable pressure-sensitive adhesive layer, the adhesive force of the pressure-sensitive adhesive layer 12 and/or the pressure-sensitive adhesive surface 10a can be reduced by heating as a measure for reducing the adhesive force, and the support S and the double-sided pressure-sensitive adhesive sheet 10 can be separated from each other. The heating temperature for the heating is, for example, 170 to 200 ℃.
In the case where the pressure-sensitive adhesive layer 12 (adhesive strength-reducing pressure-sensitive adhesive layer) of the double-sided pressure-sensitive adhesive sheet 10 in the semiconductor process sheet X is the radiation-curable pressure-sensitive adhesive layer of the above-described type 1, the adhesive strength of the pressure-sensitive adhesive layer 12 and/or the pressure-sensitive adhesive surface 10a is reduced by irradiation with radiation such as ultraviolet irradiation as a measure for reducing the adhesive strength, and the support S and the double-sided pressure-sensitive adhesive sheet 10 are separated from each other. When the irradiation with the radiation ray is ultraviolet irradiation, the dose of the irradiation is, for example, 50 to 500mJ/cm2。
In the above-described die mounting step with the face down, when the die electrodes E of the semiconductor chips C do not reach the adhesive surface 10b of the double-sided adhesive sheet 10 of the semiconductor process sheet X, the seal member 30 is ground to expose the die electrodes E of the semiconductor chips C in the seal member 30 to the outside after the separation step.
Next, in the wiring forming step, as shown in fig. 5 (b), the wiring structure portion 40 including the wiring for each semiconductor chip C is formed on the sealing material portion 30 and/or the package P. The wiring of each semiconductor chip C includes external electrodes 41 such as bump electrodes in each semiconductor package to be manufactured for each semiconductor chip C by the present manufacturing method.
Next, in the thinning step, as shown in fig. 6 (a), the back grinding tape Y is bonded to the wiring structure portion 40 side, and then, as shown in fig. 6 (b), the sealing material portion 30 is ground to thin the package P. The back grinding tape Y has an adhesive layer Ya capable of embedding the thickness of the external electrode 41 of the wiring structure portion 40. In this step, for example, the sealing material portion 30 is ground so as to expose a so-called back surface (upper surface in fig. 6) of the semiconductor chip C.
Next, as shown in fig. 7 (a), a dicing tape-integrated back surface protection film Z is bonded to the package P held on the back surface polishing tape Y. The dicing tape-integrated back surface protection film Z includes a dicing tape 50 having an adhesive layer and a curable film 60 for protecting the back surface of the semiconductor chip on the adhesive layer, and the film 60 side of the dicing tape-integrated back surface protection film Z is bonded to the ground surface of the package P. The film 60 for protecting the back surface of the semiconductor chip is an adhesive film containing a colorant such as a black colorant. As the colorant for the film 60, for example, the same colorants as those described above as the colorants for the partial sealant layer 20 can be used. The film 60 may be a thermosetting adhesive film, or may be a non-curable adhesive film that can exhibit sufficient adhesion force to an adherend by bonding to the adherend at a temperature of about 70 ℃.
Subsequently, the back grinding tape Y is removed. When the film 60 is a thermosetting adhesive film, after the back grinding tape Y is removed, the film 60 is cured by heating as shown in fig. 7 (b).
Next, in the singulation step, as shown in fig. 7C, the sealing material portion 30 and the wiring structure portion 40 are divided for each semiconductor chip C by, for example, dicing (the dividing portions are schematically indicated by thick lines in fig. 7C). Each semiconductor package thus singulated is thereafter picked up from the dicing tape 50.
Operating as described above, the semiconductor package may be manufactured using the semiconductor process sheet X. Such a method for manufacturing a semiconductor package is suitable for efficiently manufacturing a semiconductor package. The reason for this is as follows.
In the case of manufacturing a semiconductor package using a conventional semiconductor process sheet including a double-sided adhesive sheet without a partial sealant layer 20, a plurality of semiconductor chips C are mounted on one surface of the double-sided adhesive sheet bonded to the support S in the chip mounting step. At this time, the semiconductor chip C is mounted with the side opposite to the chip electrode E facing upward and bonded to the double-sided adhesive sheet. Next, a sealing material portion for embedding the plurality of semiconductor chips C is formed on the double-sided adhesive sheet. Next, the double-sided adhesive sheet is peeled from the sealing material portion (the conventional chip embedding sealing material portion) embedding the plurality of semiconductor chips C (separation step). In the conventional chip embedding sealing material portion, the so-called back surface of each semiconductor chip C is exposed on the surface from which the double-sided adhesive sheet is peeled. Next, a predetermined resin sheet is bonded to the surface of the sealing member portion from which the double-sided adhesive sheet has been peeled. The sealing material portion, on the side from which the double-sided adhesive sheet is peeled, exposes the back surface of each semiconductor chip C as described above, and the sealing material portion has low symmetry in the thickness direction, and therefore warpage of the sealing material portion inevitably occurs. In such a state where warpage occurs, the subsequent process cannot be appropriately performed. Therefore, in the semiconductor package manufacturing method using the conventional semiconductor process sheet including the double-sided adhesive sheet, it is necessary to apply a predetermined resin sheet to the surface of the sealing material portion on the side from which the double-sided adhesive sheet is peeled after the separation step, and to control so-called warping (warping) of the conventional chip embedding sealing material portion.
In contrast, in the method for manufacturing a semiconductor package according to the present invention, a special step for controlling the warpage of the package P (the chip embedding sealing material portion 30) after the separation step described above with reference to fig. 5 (a) is not required. This is because the semiconductor process sheet X having the partial sealant layer 20 on the double-sided adhesive sheet 10 is used in the present manufacturing method. Specifically, the reason is that, in the above-described chip mounting step with reference to fig. 2, a plurality of semiconductor chips C are mounted on the partial sealant layer 20 of the semiconductor process sheet X, and in the subsequent sealing step, the sealing material portion 30 is formed by the sealant 30' provided so as to embed the plurality of semiconductor chips C and the partial sealant layer 20 or the cured partial sealant layer 20, and the chip embedding sealing material portion 30 (package P) formed in this way has higher symmetry in the thickness direction than the conventional chip embedding material portion, and is suitable for suppressing warpage. The present manufacturing method, which does not require the step of controlling the warpage of the chip embedding sealing material portion 30 and/or the package P, is suitable for efficiently manufacturing a semiconductor package.
As described above, the semiconductor wafer X and the method for manufacturing a semiconductor package using the same are suitable for efficiently manufacturing a semiconductor package.
In the chip mounting step of the present embodiment, as described above, each semiconductor chip C is preferably mounted on the partial sealant layer 20 so that the chip electrode E of the semiconductor chip C enters the partial sealant layer 20 in the semiconductor process sheet X and reaches the adhesive surface 10b of the double-sided adhesive sheet 10. In this case, the wiring structure portion 40 is formed in the subsequent wiring forming step, and the wiring structure portion 40 includes a wiring electrically connected to the chip electrode E exposed on the surface of the sealing material portion 30. According to the above configuration, when the chip mounting step is performed in a face-up manner as described later, the wiring structure portion 40 can be appropriately formed without performing the grinding step of the sealing material portion 30 required before the wiring forming step. Therefore, this configuration is preferable in terms of efficiently manufacturing the semiconductor package.
In the chip mounting step in the semiconductor package manufacturing method according to the present invention, instead of the face-down mounting, the semiconductor chip C may be mounted on the partial encapsulant layer 20 so that the semiconductor chip C is bonded to the partial encapsulant layer 20 on the side of the chip body opposite to the chip electrodes E. In this case, the semiconductor package manufacturing method further includes a grinding step of grinding the sealing material portion 30 to expose the chip electrodes E of the semiconductor chips C after the separation step described above with reference to fig. 5 (a), and the wiring structure portion 40 including the wiring electrically connected to the chip electrodes E exposed on the surface of the sealing material portion 30 is formed in the wiring formation step described above with reference to fig. 5 (b). With this configuration, the wiring structure 40 can be formed appropriately.
As a summary of the above, the following describes the structure of the present invention and modifications thereof in the form of attached notes.
[ appendix 1 ]
A semiconductor process sheet, comprising:
a double-sided adhesive sheet having a laminated structure including at least an adhesive force-reducing adhesive layer, an adhesive layer, and a substrate therebetween, and having a 1 st adhesive surface and a 2 nd adhesive surface opposite to the 1 st adhesive surface; and
and a partial sealant layer which is releasably adhered to the 2 nd adhesive surface of the double-sided adhesive sheet.
[ Note 2 ]
The semiconductor process sheet according to supplementary note 1, wherein the partial sealant layer is a chip electrode embedding adhesive layer.
[ Note 3 ]
The semiconductor process sheet according to supplementary note 2, wherein the ratio of the thickness of the adhesive layer for chip electrode embedding to the height of the chip electrode to be embedded is 0.1 to 10 or 0.2 to 9.
[ tag 4 ]
The semiconductor process sheet according to any one of supplementary notes 1, wherein the partial sealant layer has a thickness of 1 to 300 μm, 5 to 250nm, or 10 to 200 nm.
[ tag 5 ]
The semiconductor process sheet according to any one of supplementary notes 1 to 4, wherein the adhesive force-reducing adhesive layer is a heat-expandable adhesive layer or a radiation-curable adhesive layer.
[ appendix note 6 ]
The semiconductor process sheet according to any one of supplementary notes 1 to 5, wherein the adhesive force-reducing adhesive layer is located closer to the 1 st adhesive surface side than the base material in the laminated structure,
the pressure-sensitive adhesive layer is closer to the 2 nd pressure-sensitive adhesive surface side than the base material in the laminated structure.
[ additional note 7 ]
The semiconductor process sheet according to any one of supplementary notes 1 to 6, wherein a ratio of a peel adhesion force exhibited to a stainless steel plane in a peel test under conditions of 23 ℃, a peel angle of 180 ° and a tensile speed of 300 mm/min at the 1 st adhesive surface of the double-sided adhesive sheet to a peel adhesion force in a peel test under conditions of 23 ℃, a peel angle of 180 ° and a tensile speed of 300 mm/min between the 2 nd adhesive surface and the partial sealant layer of the double-sided adhesive sheet is 0.003 to 3 or 0.004 to 2.5.
[ tag 8 ]
A method for manufacturing a semiconductor package using the semiconductor process sheet described in any of supplementary notes 1 to 7, the method comprising:
a chip mounting step of mounting a plurality of semiconductor chips on the part of the sealing agent layer of the semiconductor process sheet having the 1 st adhesive surface side bonded to the support;
a sealing step of supplying a sealing agent to the semiconductor process sheet so as to embed the plurality of semiconductor chips, and curing the sealing agent and the partial sealing agent to form a sealing material portion;
a separation step of separating the sealing material portion from the 2 nd adhesive surface;
a wiring forming step of forming a wiring structure portion including a wiring for each semiconductor chip on the sealing material portion; and
and a singulation step of dividing the sealing material portion and the wiring structure portion into individual semiconductor chips to obtain semiconductor packages.
[ tag 9 ]
A method for manufacturing a semiconductor package using the semiconductor process sheet described in any of supplementary notes 1 to 7, the method comprising:
a chip mounting step of mounting a plurality of semiconductor chips on the partial encapsulant layer of the semiconductor process sheet having the 1 st adhesive surface side bonded to the support;
a curing step of curing the partial sealant layer;
a sealing step of supplying a sealing agent to the semiconductor process sheet so as to embed the plurality of semiconductor chips, and curing the sealing agent on the cured partial sealing agent layer to form a sealing material portion;
a separation step of separating the sealing material portion from the 2 nd adhesive surface;
a wiring forming step of forming a wiring structure portion including a wiring for each semiconductor chip on the sealing material portion; and
and a singulation step of dividing the sealing material portion and the wiring structure portion into individual semiconductor chips to obtain semiconductor packages.
[ attached note 10 ]
The method of manufacturing a semiconductor package according to supplementary note 8 or 9, wherein the semiconductor chip has: a chip body, and at least one chip electrode extending from the chip body,
in the die mounting step, each semiconductor chip is mounted on the partial encapsulant layer so that the chip electrode enters the partial encapsulant layer.
[ additional note 11 ]
The method of manufacturing a semiconductor package according to supplementary note 10, wherein in the die attach step, the semiconductor chips are attached to the partial encapsulant layer so that the chip electrodes enter the partial encapsulant layer and reach the 2 nd adhesive surface.
[ additional note 12 ]
The method of manufacturing a semiconductor package according to supplementary note 11, wherein in the wiring forming step, a wiring structure portion including a wiring electrically connected to the chip electrode exposed on the surface of the sealing material portion is formed.
[ appendix note 13 ]
The method of manufacturing a semiconductor package according to supplementary note 8 or 9, wherein the semiconductor chip has: a chip body, and at least one chip electrode extending from the chip body,
in the chip mounting step, each semiconductor chip is mounted on the partial encapsulant layer so that the side of the chip body opposite to the chip electrodes is bonded to the partial encapsulant layer.
[ tag 14 ]
The method of manufacturing a semiconductor package according to supplementary note 13, wherein the separating step further includes a step of grinding the sealing material portion to expose the chip electrode of the semiconductor chip,
in the wiring forming step, a wiring structure portion including a wiring electrically connected to the chip electrode exposed on the surface of the sealing material portion is formed.
[ tag 15 ]
The method of manufacturing a semiconductor package according to any one of supplementary notes 8 to 14, wherein the separating step includes a measure for reducing the adhesive force to the adhesive force reducing adhesive layer in the semiconductor process sheet.
Description of the reference numerals
X semiconductor process sheet
10 double-sided adhesive sheet
10a, 10b adhesive surface
11 base material
12 pressure-sensitive adhesive layer (pressure-sensitive adhesive layer having reduced adhesive force)
13 adhesive layer
20 partial sealant layer
30' sealant
30 sealing material portion
40 wiring structure part
41 external electrode
C semiconductor chip
P-type package

Claims (15)

1. A semiconductor process sheet, comprising:
a double-sided adhesive sheet having a laminated structure including at least an adhesive force-reducing adhesive layer, an adhesive layer, and a substrate therebetween, and having a 1 st adhesive surface and a 2 nd adhesive surface opposite to the 1 st adhesive surface; and
a partial sealant layer releasably adhered to the 2 nd adhesive surface of the double-sided adhesive sheet.
2. The semiconductor process sheet according to claim 1, wherein the partial encapsulant layer is a chip electrode embedding adhesive layer.
3. The semiconductor process sheet according to claim 2, wherein the ratio of the thickness of the adhesive layer for embedding the chip electrode to the height of the chip electrode to be embedded is 0.1 to 10.
4. The semiconductor process sheet according to any one of claims 1 to 3, wherein the partial encapsulant layer has a thickness of 1 to 300 μm.
5. The semiconductor process sheet according to any one of claims 1 to 4, wherein the adhesive force-reducing adhesive layer is a heat-expandable adhesive layer or a radiation-curable adhesive layer.
6. The semiconductor process sheet according to any one of claims 1 to 5, wherein the adhesive force-decreasing adhesive layer is closer to the 1 st adhesive surface side than the substrate in the laminated structure,
the adhesive layer is closer to the 2 nd adhesive surface side than the base material in the laminated structure.
7. The semiconductor process sheet according to any one of claims 1 to 6, wherein a ratio of a peel adhesion force exhibited to a stainless steel plane in a peel test under conditions of 23 ℃, a peel angle of 180 ° and a stretching speed of 300 mm/min at the 1 st adhesive surface of the double-sided adhesive sheet to a peel adhesion force between the 2 nd adhesive surface of the double-sided adhesive sheet and the partial sealant layer in a peel test under conditions of 23 ℃, a peel angle of 180 ° and a stretching speed of 300 mm/min is 0.003 to 3.
8. A semiconductor package manufacturing method, which is a method for manufacturing a semiconductor package using the semiconductor process sheet described in any one of claims 1 to 7, the manufacturing method comprising:
a chip mounting step of mounting a plurality of semiconductor chips on the partial encapsulant layer of the semiconductor process sheet having the 1 st adhesive surface side bonded to a support;
a sealing step of supplying a sealing agent onto the semiconductor process sheet so as to embed the plurality of semiconductor chips, and curing the sealing agent and the partial sealing agent to form a sealing material portion;
a separation step of separating the sealing material portion from the 2 nd adhesive surface;
a wiring forming step of forming a wiring structure portion including a wiring for each of the semiconductor chips on the sealing material portion; and
and a singulation step of dividing the sealing material portion and the wiring structure portion into individual semiconductor chips to obtain semiconductor packages.
9. A semiconductor package manufacturing method, which is a method for manufacturing a semiconductor package using the semiconductor process sheet described in any one of claims 1 to 7, the manufacturing method comprising:
a chip mounting step of mounting a plurality of semiconductor chips on the partial encapsulant layer of the semiconductor process sheet having the 1 st adhesive surface side bonded to a support;
a curing step of curing the partial sealant layer;
a sealing step of supplying a sealing agent onto the semiconductor process sheet so as to embed the plurality of semiconductor chips, and curing the sealing agent on the cured partial sealing agent layer to form a sealing material portion;
a separation step of separating the sealing material portion from the 2 nd adhesive surface;
a wiring forming step of forming a wiring structure portion including a wiring for each of the semiconductor chips on the sealing material portion; and
and a singulation step of dividing the sealing material portion and the wiring structure portion into individual semiconductor chips to obtain semiconductor packages.
10. The semiconductor package manufacturing method according to claim 8 or 9, wherein the semiconductor chip has: a chip body, and at least one chip electrode extending from the chip body,
in the chip mounting step, each semiconductor chip is mounted on the partial encapsulant layer so that the chip electrode enters the partial encapsulant layer.
11. The semiconductor package manufacturing method according to claim 10, wherein in the chip mounting step, each semiconductor chip is mounted on the partial encapsulant layer so that the chip electrode enters the partial encapsulant layer and reaches the 2 nd adhesive surface.
12. The method of manufacturing a semiconductor package according to claim 11, wherein in the wiring forming step, a wiring structure portion including a wiring electrically connected to the chip electrode exposed on the surface of the sealing material portion is formed.
13. The semiconductor package manufacturing method according to claim 8 or 9, wherein the semiconductor chip has: a chip body, and at least one chip electrode extending from the chip body,
in the chip mounting step, each semiconductor chip is mounted on the partial encapsulant layer so that the side of the chip main body opposite to the chip electrodes is bonded to the partial encapsulant layer.
14. The semiconductor package manufacturing method according to claim 13, further comprising a step of grinding the sealing material portion to expose the chip electrodes of the semiconductor chips after the separation step,
in the wiring forming step, a wiring structure portion including a wiring electrically connected to the chip electrode exposed on the surface of the sealing material portion is formed.
15. The method of manufacturing a semiconductor package according to any one of claims 8 to 14, wherein the separation process includes an adhesive force reducing measure for the adhesive force reducing adhesive layer in the semiconductor process sheet.
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CN114958226A (en) * 2021-02-25 2022-08-30 日东电工株式会社 Sheet for sealing optical semiconductor element

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