CN111341741A - Power device packaging structure and packaging method for improving heat dissipation capability - Google Patents

Power device packaging structure and packaging method for improving heat dissipation capability Download PDF

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Publication number
CN111341741A
CN111341741A CN202010188857.6A CN202010188857A CN111341741A CN 111341741 A CN111341741 A CN 111341741A CN 202010188857 A CN202010188857 A CN 202010188857A CN 111341741 A CN111341741 A CN 111341741A
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China
Prior art keywords
heat dissipation
chip
power device
packaging
heat
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Pending
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CN202010188857.6A
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Chinese (zh)
Inventor
罗志鹏
许恒宇
万彩萍
金智
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Institute of Microelectronics of CAS
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Institute of Microelectronics of CAS
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Priority to CN202010188857.6A priority Critical patent/CN111341741A/en
Publication of CN111341741A publication Critical patent/CN111341741A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon

Abstract

The invention discloses a power device packaging structure and a packaging method for improving heat dissipation capacity, belongs to the technical field of semiconductor power device packaging, and solves the problems that in the prior art, the heat accumulation is caused by insufficient heat dissipation capacity of the packaging structure, and the fatigue is generated due to the change of local stress of a chip caused by non-uniform temperature circulation and heat distribution, so that the service life and the reliability are reduced. The power device packaging structure comprises a chip, and a heat dissipation unit is arranged above the chip. The packaging method of the power device packaging structure comprises the following steps: preparing a chip and a substrate; connecting the chip and the substrate together by solder; leading out a lead on the surface of the chip, and coating insulating heat-conducting silicone grease; horizontally placing the heat dissipation unit above the chip; and covering the sample by using a metal shell to finish packaging or adopting plastic packaging. The power device packaging structure for improving the heat dissipation capability provided by the invention has stable performance and obviously improved reliability.

Description

Power device packaging structure and packaging method for improving heat dissipation capability
Technical Field
The invention relates to the technical field of semiconductor power device packaging, in particular to a power device packaging structure and a power device packaging method for improving heat dissipation capacity.
Background
Silicon carbide (SiC) power semiconductors are a core component in the medium-high voltage power electronics field. The packaging of power modules/discrete devices currently mainly extends to the packaging structure of silicon materials, but because SiC materials are more suitable for high-temperature and high-pressure environments, improvements to the packaging structure of silicon carbide devices are continuously carried out, but limitations in terms of heat dissipation still remain. The silicon carbide material has higher thermal conductivity (about 3 times of Si) due to the material characteristics, and under the same condition, the chip area is only about 1/10 of the silicon material, which means that the silicon carbide power chip has higher current density in unit area, so that the efficiency and the performance of a semiconductor device are improved, but the silicon carbide power chip generates more heat in unit area of the chip, and the heat is easier to concentrate; due to the limited chip area, excessive heat is accumulated inside the chip (especially on the side opposite to the packaging substrate), the electrical performance of the semiconductor device is drifted due to the temperature accumulation, the reliability and the service life of the device in long-term use are reduced, even instantaneous high-temperature accumulation can cause the device to be locally overheated and fail, for example, the drift of electrical parameters at high temperature can cause the device to generate uncontrollable heat accumulation; the threshold voltage reduction caused by high temperature can cause the device to be turned on by mistake; the hot electrons can reduce the service life of the weak structure of the chip under long-term high-temperature work; temperature cycling and uneven heat distribution can cause local stress of the chip to change and fatigue is generated, and further the service life and reliability are reduced. Thus, in higher power semiconductor applications, the need for heat dissipation is further increased.
Disclosure of Invention
In view of the above analysis, the present invention aims to provide a power device package structure and a packaging method for improving heat dissipation capability, which can solve at least one of the following technical problems: (1) the heat accumulation is caused by insufficient heat dissipation capacity of the existing packaging structure, and the mistaken opening of a device can be caused by the reduction of threshold voltage caused by high temperature; (2) the hot electrons can reduce the service life of the weak structure of the chip under long-term high-temperature work; (3) the temperature cycle and the uneven heat distribution can cause the local stress of the chip to change and generate fatigue, thereby reducing the service life and the reliability.
The purpose of the invention is mainly realized by the following technical scheme:
the invention provides a power device packaging structure capable of improving heat dissipation capacity.
Further, a substrate is arranged below the chip.
Further, the heat dissipation unit is in a thin plate shape, the length L1 of the thin plate is greater than the length L2 of the chip, and the width W1 of the thin plate is greater than the width W2 of the chip; the length L1 of the web is less than the length L3 of the base plate and the width W1 of the web is less than the width W3 of the base plate.
Furthermore, L1 is more than or equal to 1.5L2 and less than or equal to 3L2, and W1 is more than or equal to 1.5W2 and less than or equal to 3W 2.
Furthermore, the upper surface of the heat dissipation unit is provided with a protrusion.
Furthermore, the shape of the bulges is cuboid, and the bulges are arranged at equal intervals.
Furthermore, the shape of the bulges is cylindrical, and the bulges are arranged at equal intervals.
Furthermore, the distance is 2-4 mm.
Furthermore, the heat dissipation unit is made of a material with low thermal resistance and high thermal conductivity.
On the other hand, the invention provides a packaging method of a power device packaging structure for improving heat dissipation capacity, which comprises the following steps:
the method comprises the following steps: preparing a chip and a substrate;
step two: connecting the chip and the substrate together by solder;
step three: leading out a lead on the surface of the chip, and coating insulating heat-conducting silicone grease;
step four: horizontally placing the heat dissipation unit above the chip;
step five: and covering the sample by using a metal shell to finish packaging or adopting plastic packaging.
Compared with the prior art, the invention can realize at least one of the following beneficial effects:
(1) according to the power device (the power device comprises the discrete device and the module) packaging structure for improving the heat dissipation capability, the heat dissipation unit with low thermal resistance and high heat conductivity is arranged above the chip, so that the heat of the chip is timely transferred to the whole packaging structure to achieve a better heat dissipation effect.
(2) The heat dissipation unit is made of a material with low thermal resistance and high thermal conductivity and can be well matched with the chip.
(3) When the heat dissipation unit is in a thin plate shape, the size of the heat dissipation unit is larger than that of the chip, so that the surface area of the heat dissipation unit is larger, and the heat dissipation effect is better.
(4) The surface area is increased by preparing the protrusions on the surface of the heat dissipation unit, so that the heat dissipation effect of the heat dissipation unit can be improved, for example, the protrusions are arranged into cuboids or cylinders, the protrusions are distributed in an array mode, the appropriate distance between the protrusions is controlled, the surface area is increased, and the heat dissipation effect is remarkably improved.
(5) The heat is transferred to the medium (such as resin and silica gel) inside the packaging cavity or the packaging shell to achieve better heat dissipation effect; the heat dissipation unit can effectively and timely guide out the heat on the upper surface of the chip, avoids the influence of mechanical stress and performance caused by unbalanced internal structure due to high heat dissipation capacity of a heat dissipation substrate below the chip, and is beneficial to ensuring stable performance, reliability improvement and service life extension of a power device, for example, the deformation of the chip is 1% -10% of the deformation of the traditional chip; electrical drift (less than 5%), significantly less than conventional electrical drift (greater than 10%); the high-low temperature cycle experiment duration is 1.5 times longer than that of the traditional experiment; the service life is prolonged by 1-4 times.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and drawings.
Drawings
The drawings are only for purposes of illustrating particular embodiments and are not to be construed as limiting the invention, wherein like reference numerals are used to designate like parts throughout.
FIG. 1 is a schematic diagram of a power device package structure with improved heat dissipation capability according to the present invention;
FIG. 2a is a schematic diagram of a temperature distribution of a conventional power device package structure;
FIG. 2b is a schematic diagram of the temperature distribution of the power device package structure with improved heat dissipation capability according to the present invention;
FIG. 3a is a schematic structural diagram of one embodiment of a power device package structure with improved heat dissipation capability according to the present invention;
FIG. 3b is a schematic structural diagram of another embodiment of a power device package structure with improved heat dissipation capability according to the present invention;
fig. 4 is a schematic structural diagram illustrating a placement manner of a heat dissipation unit of the power device package structure for improving heat dissipation capability according to the present invention;
fig. 5 is a schematic structural diagram of a heat dissipation unit of the power device package structure for improving heat dissipation capability according to the present invention;
fig. 6 is a schematic structural diagram of a heat dissipation unit of the power device package structure for improving heat dissipation capability according to the present invention.
Reference numerals:
1-chip; 2-solder; 3-a substrate; 4-a housing; 5-a cavity; 6-heat dissipation unit.
Detailed Description
The preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings, which form a part hereof, and which together with the embodiments of the invention serve to explain the principles of the invention.
At present, silicon carbide materials are commonly used for power semiconductor devices, and the existing packaging mode is to dissipate heat below a chip through a substrate, which causes the following problems:
1. the heat dissipation capacity of the upper surface of the chip is poor, so that the heat on the upper surface and the heat on the lower surface are not uniform, the heat on the upper surface can be accumulated, the deformation of the chip can be caused in practical application, and the instability and the reliability of the electrical property of the chip can be reduced due to the deformation;
2. the cavity (the cavity can be internally provided with a medium) near the chip and the packaging shell near the chip can generate concentrated distribution of temperature, so that the temperature gradient around the chip is reduced, heat dissipation is not facilitated, and the device can be failed due to thermal breakdown and the like due to overhigh temperature.
The invention provides a power device packaging structure for improving heat dissipation capacity, which adopts a metal packaging structure as a schematic diagram and is shown in figure 1, the power device packaging structure comprises a shell 4 and a cavity 5 enclosed by the shell 4, a substrate 3, a solder 2 and a chip 1 are sequentially arranged in the cavity 5 from bottom to top, and a heat dissipation unit 6 is arranged above the chip 1.
Compared with the prior art, the heat dissipation structure has the advantages that the heat dissipation unit is arranged above the chip, so that the heat of the chip is timely transferred to the whole body of the packaging structure, for example, the heat is transferred to the packaging shell to achieve a better heat dissipation effect; the heat dissipation unit can effectively and timely derive the heat of the upper surface of the chip, avoids the influence of mechanical stress and performance caused by unbalance of an internal structure due to high heat dissipation capacity of a substrate below the chip, and is beneficial to ensuring the performance stability and reliability of the power device.
Specifically, the material of the chip 1 is silicon carbide.
In particular, the heat dissipation unit 6 is a low thermal resistance, high thermal conductivity material matched to silicon carbide, such as AlSiC or copper, AlSiC is preferred because AlSiC is an alloy material with high thermal conductivity (170- & ltSP & gt 200W/mK) and tunable thermal expansion coefficient (6.5-9.5 × 10)-6and/K) can be well matched with the chip.
Specifically, the heat dissipation unit 6 is a thin plate, the length L1 of the thin plate is greater than the length L2 of the chip 1, and the width W1 of the thin plate is greater than the width W2 of the chip 1; the length L1 of the thin plate is smaller than the length L3 of the base plate 3, and the width W1 of the thin plate is smaller than the width W3 of the base plate 3.
Considering that L1 and W1 are too large, the connection of the leads is affected; l1 and W1 are too small, and the heat dissipation effect is poor, so that L1 is controlled to be more than or equal to 1.5L2 and less than or equal to 3L2, and W1 is controlled to be more than or equal to 1.5W2 and less than or equal to 3W 2.
Or, the heat dissipation unit 6 is a hollow cuboid, the housing of the cuboid is made of alloy material, and heat conduction content is filled in the cuboid and is resin.
Alternatively, the heat dissipation unit 6 is another functional material or structure, for example, which can convert thermal energy or thermal radiation into radiation of a specific wavelength, and can release the energy in the form of radiation through the package. In particular, the specific wavelength is selected to be offset from the absorption wavelength of the surrounding material and to be transparent to the surrounding material to reduce absorption of radiation.
In order to increase the surface area of the heat radiating unit 6, considering that a larger surface area facilitates the transfer of heat, the surface area may be increased by preparing a protrusion on the upper surface of the heat radiating unit 6.
Specifically, the shape of the protrusion is a cuboid or a cylinder.
Specifically, as shown in fig. 5, the protrusions are rectangular solids (forming a sheet array), and the protrusions are arranged at equal intervals, so that the control interval is 1-4mm in consideration of overlarge interval, less increase of the surface area, poor heat dissipation effect, small interval, insignificant increase of the heat dissipation effect and waste of materials.
Or, as shown in fig. 6, the shape of the protrusions is a cylinder (forming a columnar array), the protrusions are arranged at equal intervals, and considering that the interval is too large, the surface area is increased less, the heat dissipation effect is poor, the interval is small, the heat dissipation effect is not increased obviously, and materials are wasted, so the control interval is 1-4 mm.
It should be noted that the formation of the projections may be performed by machining, casting, or chemical etching.
In order to improve the heat dissipation capability of the heat dissipation unit 6, the heat dissipation unit 6 may have a mesh structure.
Specifically, substrate 3 is used for heat dissipation, and if substrate 3 has a lower temperature resistance than chip 1, substrate 3 will be damaged before chip 1, so substrate 3 has high temperature resistance and high thermal conductivity, for example, substrate 3 is generally a copper substrate, and substrate 3 is in the shape of a thin sheet.
Specifically, the substrate 3 is generally connected to an external heat dissipation structure, and the material of the external heat dissipation structure is metal (such as copper, aluminum, etc.) or composite material (such as aluminum silicon carbide, etc.).
Specifically, the heat dissipation unit 6 is attached to the upper surface of the chip 1 through insulating and heat-conducting silicone grease.
As shown in fig. 4, the heat dissipation unit 6 may be fixedly disposed above the chip 1 through a bracket led out from the housing after the chip 1 is packaged with other structures, considering that some structures (e.g., electrical connection) may exist on the upper surface of the chip 1.
Considering that the heat dissipation unit 6 cannot dissipate heat of the chip if the height from the upper surface of the housing 4 is too large, and the heat cannot be timely transferred due to heat accumulation near the chip if the height from the heat dissipation unit 6 is too small, the height from the upper surface of the housing 4 is 1-3 mm.
Or the power device packaging structure adopts plastic package, the shell 4 is not needed, but a film presser is directly adopted to shape and package the heat-conducting insulating material (such as heat-conducting resin or silica gel) above the substrate 3 to cover the solder 2 and the chip 1 (i.e. compared with the metal package, the heat-conducting insulating material without the shell 4 and the cavity 5 being shaped is adopted).
It should be noted that the cavity 5 is made of a heat-conducting and insulating material (e.g., a heat-conducting resin or a silicone), so as to achieve the necessary electrical insulation, and at the same time, heat is transferred to the substrate through the heat-conducting and insulating material; considering that the existence of the margin holes or air holes when the heat-conducting insulating material is not filled fully may cause uneven heat dissipation of the device and failure of the device, the heat-conducting insulating material is fully filled without leaving gaps.
In addition, the packaging method of the power device packaging structure for improving the heat dissipation capacity comprises the following steps:
the method comprises the following steps: preparing a chip 1 and a substrate 3;
step two: the chip 1 and the substrate 3 are connected together by solder 2;
step three: leading out a lead on the surface of the chip 1, and coating insulating heat-conducting silicone grease;
step four: horizontally placing the heat dissipation unit 6 above the chip 1;
step five: and covering the sample by using a metal shell 4 to finish packaging or adopting plastic packaging.
Specifically, in the fifth step, the plastic package is formed by molding and packaging a heat-conducting insulating material (such as heat-conducting resin or silica gel) on the substrate 3 by using a film pressing device, and covers the solder 2 and the chip 1.
Specifically, in the fifth step, the heat-conducting insulating material is fully filled, and no gap is left.
Example one
As shown in fig. 3a, the power module package structure for improving heat dissipation capability provided in this embodiment is a metal package, the heat dissipation unit 6 is made of AlSiC, the heat dissipation unit 6 is in a thin plate shape, the size of the heat dissipation unit 6 is larger than that of the chip and smaller than that of the substrate, and the heat dissipation unit 6 is fixedly connected to the chip 1 through a heat conductive silicone grease.
Fig. 2b shows a schematic diagram of the heat dissipation effect of the heat dissipation unit 6 of the present embodiment on the chip 1, and fig. 2a shows a schematic diagram of the heat dissipation effect of the conventional chip.
As can be seen from fig. 2a, the conventional chip has poor heat dissipation capability on the upper surface, which causes uneven heat generation on the upper and lower surfaces, and heat accumulation on the upper surface, which causes chip deformation in practical applications, and the deformation causes instability of electrical performance and reduction of reliability of the chip. It can be seen that the heat of the conventional chip cannot be transmitted through the cavity medium in time, and serious heat accumulation exists.
As can be seen from FIG. 2b, the temperature of the chip of this embodiment can in time be diffused, the upper and lower surface heat is even, the upper surface can not appear thermal accumulation, can not cause the deformation of chip in practical application, and have bigger area of contact with the cavity medium, can effectively reduce the heat and gather around the chip, can more effectively dispel the heat.
Through use, the chip of the power module packaging structure for improving the heat dissipation capability of the embodiment has small deformation (the deformation amount of the chip of the embodiment is 5% -10% of that of the traditional chip), and the reliability of the power module packaging structure for improving the heat dissipation capability of the embodiment is remarkably improved, for example, the electrical drift of the power module packaging structure is less than 5%, and the traditional electrical drift is more than 10%; the high-low temperature cycle experiment duration of the embodiment is 1.5 times longer than that of the traditional experiment duration, and the service life of the power module packaging structure for improving the heat dissipation capability of the embodiment is prolonged by 1-3 times.
Example two
The power module packaging structure that improves heat-sinking capability that this embodiment provided is shown in fig. 3b, and power module packaging structure is metal package, and the material of heat dissipation unit 6 is AlSiC, and the bottom plate of heat dissipation unit 6 is the cuboid, and the upper surface of bottom plate is equipped with the arch, and bellied shape is the cuboid, and the distance between the adjacent arch is 3mm, and heat dissipation unit 6 passes through silica gel and 1 fixed connection of chip.
In this embodiment, the surface area of the heat dissipation unit 6 is large, and the heat dissipation unit can be better in contact with a medium in the cavity to dissipate heat to the medium, and the cavity medium can dissipate heat to the housing and the substrate and perform a heat dissipation process.
Through use, the chip of the power module packaging structure for improving the heat dissipation capability of the embodiment has small deformation (the deformation amount of the chip of the embodiment is 1% -5% of that of the traditional chip), and the reliability of the power module packaging structure for improving the heat dissipation capability of the embodiment is remarkably improved, for example, the electrical drift of the power module packaging structure is less than 5%, and the traditional electrical drift is more than 10%; the high-low temperature cycle experiment duration of the embodiment is 1.5 times longer than that of the traditional experiment duration, and the service life of the power module packaging structure for improving the heat dissipation capability of the embodiment is prolonged by 2-4 times.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention.

Claims (10)

1. A power device packaging structure capable of improving heat dissipation capacity is characterized by comprising a chip (1), wherein a heat dissipation unit (6) is arranged above the chip (1).
2. The power device package structure with improved heat dissipation capability of claim 1, wherein a substrate (3) is disposed below the chip (1).
3. The power device package structure with improved heat dissipation capability of claim 2, wherein the heat dissipation unit (6) is thin plate-shaped, the length L1 of the thin plate is greater than the length L2 of the chip (1), and the width W1 of the thin plate is greater than the width W2 of the chip (1); the length L1 of the thin plate is less than the length L3 of the base plate (3), and the width W1 of the thin plate is less than the width W3 of the base plate (3).
4. The power device package structure with improved heat dissipation capability of claim 3, wherein L1 is 1.5L2 or more and 3L2 or more, and W1 is 1.5W2 or more and 3W2 or less.
5. The power device package structure with improved heat dissipation capability of claim 1, wherein the upper surface of the heat dissipation unit (6) is provided with a protrusion.
6. The power device package structure with the improved heat dissipation capability of claim 5, wherein the protrusions are rectangular and are arranged at equal intervals.
7. The package structure of claim 5, wherein the protrusions are cylindrical, and the protrusions are disposed at equal intervals.
8. The package structure of claim 6 or 7, wherein the pitch is 2-4 mm.
9. The power device package structure with improved heat dissipation capability of claims 1-7, wherein the heat dissipation unit (6) is a material with low thermal resistance and high thermal conductivity.
10. The packaging method of the power device packaging structure with the improved heat dissipation capability of claims 1-9, characterized by comprising the following steps:
the method comprises the following steps: preparing a chip (1) and a substrate (3);
step two: connecting the chip (1) and the substrate (3) together by solder (2);
step three: leading out a lead on the surface of the chip (1), and coating insulating heat-conducting silicone grease;
step four: horizontally placing the heat dissipation unit (6) above the chip (1);
step five: and covering the sample by using a metal shell to finish packaging or adopting plastic packaging.
CN202010188857.6A 2020-03-17 2020-03-17 Power device packaging structure and packaging method for improving heat dissipation capability Pending CN111341741A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112420634A (en) * 2020-10-26 2021-02-26 南昌航空大学 High-efficiency chip heat dissipation structure
CN113620234A (en) * 2021-05-28 2021-11-09 上海曦智科技有限公司 Chip packaging structure, control method and optical computing equipment
CN114823550A (en) * 2022-06-27 2022-07-29 北京升宇科技有限公司 Chip packaging structure and packaging method suitable for batch production

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CN106298698A (en) * 2016-08-31 2017-01-04 广东美的制冷设备有限公司 A kind of SPM and manufacture method thereof
CN109346442A (en) * 2018-10-10 2019-02-15 唐燕 It is a kind of be easy to radiate chip-packaging structure and its packaging method
CN109727957A (en) * 2017-10-30 2019-05-07 莱尔德电子材料(深圳)有限公司 Heat management and electromagnetic interference mitigate component and its application method, the device including the component

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Publication number Priority date Publication date Assignee Title
US5396403A (en) * 1993-07-06 1995-03-07 Hewlett-Packard Company Heat sink assembly with thermally-conductive plate for a plurality of integrated circuits on a substrate
CN103959462A (en) * 2011-12-08 2014-07-30 甲骨文国际公司 Design of a heat dissipation structure for an integrated circuit (ic) chip
CN103456699A (en) * 2013-09-29 2013-12-18 中国兵器工业集团第二一四研究所苏州研发中心 Integrated circuit packaging structure and packaging method thereof
CN106298698A (en) * 2016-08-31 2017-01-04 广东美的制冷设备有限公司 A kind of SPM and manufacture method thereof
CN109727957A (en) * 2017-10-30 2019-05-07 莱尔德电子材料(深圳)有限公司 Heat management and electromagnetic interference mitigate component and its application method, the device including the component
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112420634A (en) * 2020-10-26 2021-02-26 南昌航空大学 High-efficiency chip heat dissipation structure
CN113620234A (en) * 2021-05-28 2021-11-09 上海曦智科技有限公司 Chip packaging structure, control method and optical computing equipment
CN113620234B (en) * 2021-05-28 2024-01-12 上海曦智科技有限公司 Chip packaging structure, control method and optical computing device
CN114823550A (en) * 2022-06-27 2022-07-29 北京升宇科技有限公司 Chip packaging structure and packaging method suitable for batch production
CN114823550B (en) * 2022-06-27 2022-11-11 北京升宇科技有限公司 Chip packaging structure and packaging method suitable for batch production

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