CN111316420B - 用于显示器应用的层堆叠 - Google Patents

用于显示器应用的层堆叠 Download PDF

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Publication number
CN111316420B
CN111316420B CN201880072510.6A CN201880072510A CN111316420B CN 111316420 B CN111316420 B CN 111316420B CN 201880072510 A CN201880072510 A CN 201880072510A CN 111316420 B CN111316420 B CN 111316420B
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dielectric layer
layer
dielectric
metal electrode
disposed
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CN111316420A (zh
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芮祥新
崔寿永
栗田真一
翟羽佳
赵来
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Applied Materials Inc
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Applied Materials Inc
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Abstract

本公开内容的实施方式一般地涉及包含高介电常数电介质层的层堆叠，所述层堆叠形成于第一电介质层与金属电极上方。高介电常数电介质层具有20或更高的介电常数值且可形成为电子装置中的电容器、栅极绝缘层或任意合适的绝缘层的一部分，电子装置例如显示器装置。层堆叠包含设置于第一电介质层与金属层上的第二电介质层，和设置于第二电介质层上的高介电常数电介质层。第二电介质层提供均质表面，高介电常数电介质层形成于均质表面上。均质表面使高介电常数电介质材料得以均匀地沉积于其上，这样产生均匀的厚度分布。

Description

用于显示器应用的层堆叠
背景
技术领域
本公开内容的实施方式一般地涉及一种用于显示器装置的包含电介质层的层堆叠，所述电介质层具有高介电常数(dielectric constant,K)值。尤其是，本公开内容的实施方式涉及沉积于具有金属材料与电介质材料的表面上方的包含电介质层的层堆叠，电介质层具有高介电常数(dielectric constant,K)值。
背景技术
显示器装置已被广泛使用于各种电子应用，诸如电视、屏幕、手机、MP3播放器、电子书阅读器、个人数字助理(PDAs)和类似应用。电容器，例如金属-绝缘体-金属(MIM)电容器，于一些装置中，常使用并形成电容器以在操作显示器装置时电容器储存电荷。电容器储存电荷以维持驱动薄膜晶体管(TFT)的栅极电压，以定义出每帧中每像素的亮度。TFT电路中的储存电容器通常为MIM结构，MIM结构包含设置于二金属电极之间的电介质层。需要所形成的电容器具有适于显示器装置的高电容。电容可能通过改变电介质材料和/或电介质层的尺寸来调整。例如，当电介质层以具有高介电常数值的材料加以取代，电容同样将会增加。二氧化锆(Zirconium dioxide,ZrO2)具有范围为约20至约50的介电常数值，且适合作为电容器中的电介质层。然而，沉积于同时具有金属部分与电介质部分的表面上的二氧化锆层，金属部分例如金属互连器，电介质部分诸如氮化硅(silicon nitride,SiN)，由于高介电常数的电介质层于金属部分与电介质部分上的沉积速率不同，导致二氧化锆层具有不均匀的厚度分布。具有不均匀厚度分布的高介电常数电介质层可于后续的高介电常数电介质层的图案化工艺期间引起过蚀刻和/或蚀刻不足。
因此，需要一种在高介电常数层形成于具有不同材料的表面上方的应用中，能够形成具有均匀厚度分布的高介电常数层的解决方案。
发明内容
本公开内容的实施方式一般地涉及一种包含电介质层的层堆叠，电介质层具有高介电常数值，电介质层位于具有金属材料与电介质材料的表面上方。在一实施方式中，一种结构包含第一电介质层、设置于第一电介质层上的金属电极及设置于第一电介质层与金属电极上的层堆叠。层堆叠包含设置于第一电介质层与金属电极上的第二电介质层，及设置于第二电介质层上的高介电常数电介质层。
在另一实施方式中，一种将高介电常数电介质层形成于电介质表面及金属表面上方的方法包含：沉积第一电介质层于第二电介质层与金属电极上；沉积高介电常数电介质层于第一电介质层上；及使高介电常数电介质层退火(annealing)。
在另一实施方式中，一种***包含传送腔室、耦接于传送腔室的等离子体辅助原子层沉积(plasma enhanced atomic layer deposition)腔室、耦接于传送腔室的热处理腔室、以及用以进行如下数个步骤的控制器：在等离子体辅助原子层沉积腔室中沉积第一电介质层于第二电介质层与金属电极上；在等离子体辅助原子层沉积腔室中沉积高介电常数电介质层于第一电介质层上；及在热处理腔室中使高介电常数电介质层退火。
附图说明
以上简要概述的本公开内容的上述详述特征可以被详细理解的方式、以及对本公开内容的更特定描述，可通过参照实现方式来获得，一些实施方式绘示于附图中。然而，应注意的是，附图仅为本公开内容的典型实施方式，因而不应被视为对本公开内容的保护范围的局限，因为本公开内容可以允许其他等同有效的实施方式。
图1是根据本公开内容的一实施方式的可用于沉积电介质层的处理腔室的横截面图。
图2是根据本公开内容的一实施方式的可用于处理电介质层的热处理腔室的横截面图。
图3是包含在此所述的处理腔室的多腔室基板处理***的示意图。
图4是根据本公开内容的一实施方式的利用层堆叠的TFT装置结构的横截面图。
为了便于理解，在可能的情况下使用相同的附图标号来标示图中共通的相同组件。考虑到，在一实施方式中的元件和特征在没有进一步地描述下可以有利地并入其他实施方式。
具体实施方式
本公开内容的实施方式一般地涉及包含高介电常数电介质层的层堆叠，高介电常数电介质层形成于第一电介质层与金属电极上方。高介电常数电介质层具有20或更高的介电常数值，且可形成为电容器、栅极绝缘层(gate insulating layer)或电子装置中任何合适的绝缘层的一部分，电子装置例如是显示器装置。层堆叠包含设置于第一电介质层与金属层上的第二电介质层、以及设置于第二电介质层上的高介电常数电介质层。第二电介质层提供均质表面，高介电常数电介质层形成于所述均质表面上方。所述均质表面使高介电常数电介质材料得以均匀地沉积于其上方，形成均匀的厚度分布。可于整合处理平台中沉积层堆叠，整合处理平台包含至少一个用于沉积一或多层的沉积腔室与至少一个退火腔室以使沉积的一或多层退火。
如此处使用的词“上方”、“其上方”、“下方”、“之间”、“上”与“其上”代表一层相对于其他层的相对位置。因此，举例来说，设置于另一层的上方或下方的一层可能直接接触其他层或可能具有一或多中介层。再者，设置于数层之间的一层可能直接接触二层或可能具有一或多中介层。相反地，在第二层“上”的第一层为直接接触第二层。此外，一层相对于其他层的相对位置是假设操作是相对于基板进行而提供，而不需要考虑基板的绝对方位。
图1是可用于实现在此讨论的实施方式的原子层沉积(atomic layerdeposition,ALD)腔室100的界面示意图。原子层沉积腔室100可为等离子体辅助原子层沉积腔室(PE-ALD)。在一实施方式中，显示器装置中的电介质层与明显不同于电介质层的高介电常数电介质层都形成于腔室100中。一般来说，腔室100包含由腔室主体103和盖组件104界定的外壳。基板支撑组件106和处理配件150设置于外壳内。盖组件104设置于腔室主体103上，且基板支撑组件106至少部分设置于腔室主体103内。腔室主体103包含形成于其侧壁中的狭缝阀开孔108以提供至处理腔室100内部的通道。在一些实施方式中，腔室主体103包含与真空***(例如，真空泵)流体连通的一或多个缝隙。缝隙为腔室100内的气体提供出口。盖组件104包含一或多个差动泵和净化组件120。差动泵和净化组件120连同波纹管(bellow)122被安装至盖组件104。波纹管122使差动泵和净化组件120得以相对于盖组件104垂直移动，同时仍维持密封不使气体外泄。当处理配件150升高至处理位置，处理配件150上的第一密封件186和第二密封件188接触到差动泵和净化组件120。差动泵和净化组件120与真空***(未示出)连接，且维持于低压。
如图1所示，盖组件104包含射频(RF)阴极110，可于腔室100内和/或处理配件150内产生活性物种等离子体。RF阴极110可由电加热元件(未示出)来加热，且通过冷却流体循环来冷却。可使用任何可使气体活化为活性物种并维持活性物种等离子体的电源。例如，可使用基于RF或微波(MW)的放电技术。活化也可通过基于热的技术、气体击穿(gasbreakdown)技术、高密度光源(例如，UV能量)或暴露于X射线源来产生。
基板支撑组件106可至少部分设置于腔室主体103内。基板支撑组件106包含基板支撑构件或基座130以支撑在腔室主体103内处理的基板102。基座130通过轴124耦接至基板升降机构(未示出)，轴124延伸通过一或多个形成于腔室主体103的底表面中的开孔126。基板升降机构由波纹管128柔性密封至腔室主体103，避免自轴124周围的真空外泄。基板升降机构使基座130在腔室100内垂直移动于所示的较低的机械入口位置以及处理位置、处理配件传送位置、与基板传送位置之间。在一些实施方式中，基板升降机构于少于这里所述的位置之间移动。
如图1所示，基座130包含一或多个通过基座130的孔134以容纳一或多升举销136。安装每个升举销136使得升举销136可自由滑动于孔134内。基板支撑组件106为可移动的，如此一来当基板支撑组件106位于较低的位置时，升举销136的上表面可定位于基座130的基板支撑表面138之上。反之，当基板支撑组件106位于升高的位置时，升举销136的上表面定位于基座130的基板支撑表面138之下或基本定位于基座130基板支撑表面138的平面。当接触腔室主体103时，升举销136推抵基板102的较低表面，使基板升举离开基座130。反之，基座130可使基板102升高离开升举销136。
在一些实施方式中，基座130包含处理配件绝缘钮137，处理配件绝缘钮137可包含一或多个密封件139。处理配件绝缘钮137可用以在基座130上承载处理配件150。当基座使处理配件150升举至处理位置时，处理配件绝缘钮137中的一或多个密封件139为压缩的。
图2是可用以加热多个基板102的热处理腔室200的横截面图，例如在退火工艺中。热处理腔室200包含由腔室主体201界定的外壳，腔室主体201具有底部203与狭缝阀开孔202。狭缝阀开孔202形成为通过腔室主体201的侧壁以允许终端受动器204(以虚线示出)进入与离开热处理腔室200且从基板支撑组件205递送或收回基板102(也以虚线示出)。基板支撑组件205耦接至轴211，轴211设置通过腔室主体201的底部203。轴211于Z方向相对于狭缝阀开孔202升高与降低基板支撑组件205。基板支撑组件205包含多个加热板结构210。加热板结构210通过一或多个支撑棒212相互耦接，一或多个支撑棒212使加热板结构210相对于相邻的加热板结构210维持于固定位置。支撑棒212沿着加热板结构210的边缘设置于各种不同的位置。支撑棒212沿着加热板结构210的边缘排列使多个支撑指208如以下更详细描述般通过。包含所有加热板结构210与支撑棒212的基板支撑组件205作为整体结构移动于热处理腔室200内。
支撑指208耦接至致动器207。致动器207使支撑指208移动于相对腔室主体201的纵轴的至少侧向的方向(例如，于和Z方向夹角非零的横向方向，例如于X与Y方向中的至少一方向)，以控制支撑指208相对于腔室主体201的延伸距离。每一个加热板结构210包含形成于其中的槽214，用以在基板支撑组件205垂直移动时允许数个支撑指208通过。每一个支撑指208从腔室主体201向内延伸的距离相当于每一个槽214的深度D，以在加热板结构210移动经过这里时使支撑指208的远端(即最深处)得以通过。
图3是适用于制造在此公开的层堆叠中的一或多层的整合式多腔室基板处理***300的俯视图。层堆叠可并入任何合适的显示器装置中，显示器装置诸如有机发光二极管(organic light emitting diodes,OLEDS)、薄膜晶体管或薄膜封装(thin-filmencapsulation,TFE)。***300包含多个处理腔室100、200、340与围绕着中央的传送腔室315定位的一或多个装料闸腔室305、307。提供处理腔室100、200、340以完成多个不同的处理步骤以达成对扁平介质的预定处理，例如大面积基板102(以虚线示出)。在一实施方式中，处理腔室100用以形成电介质层和电介质层上的高介电常数电介质层，且处理腔室200用以使高介电常数电介质层退火。在另一实施方式中，电介质层和高介电常数电介质层形成于处理腔室340中，处理腔室340为等离子体辅助化学气相沉积(plasma enhancedchemical vapor deposition,PECVD)腔室，例如购自位于加利福尼亚州圣塔克拉拉(SantaClara,California)的应用材料公司(Applied Materials,Inc.)的55KS等离子体辅助化学气相沉积腔室。装料闸腔室305、307经构造以使四边形基板从多腔室基板处理***300外部的周边环境传送至传送腔室315内部的真空环境。
具有终端受动器330的传送机器人325定位于传送腔室315内。终端受动器330经构造以独立于传送机器人325被支撑与移动，以传送基板102。终端受动器330包含适于支撑基板102的腕部335和多个指部342。传送机器人325根据需求包含设置于传送机器人325上的一或多光学影像传感器365、370。
并入多腔室基板处理***300的处理腔室340可为任何合适的腔室，诸如高密度等离子体化学气相沉积(HDP-CVD)、有机金属化学气相沉积(MOCVD)、等离子体辅助化学气相沉积、原子层化学气相沉积(ALD)、等离子体辅助原子层化学气相沉积(PE-ALD)、热化学气相沉积(thermal CVD)、热退火(thermal annealing)、物理气相沉积(PVD)、表面处理、电子束处理(electron beam(e-beam)treatment)、等离子体处理(plasma treatment)、蚀刻腔室(etching chambers)、离子注入腔室(ion implantation chambers)、表面清洁腔室(surface cleaning chamber)、计量腔室(metrology chambers)、旋转涂布腔室(spin-coating chamber)、聚合物旋涂腔室(polymer spinning deposition chamber)、遮蔽框架储存腔室(shadow frame storage chamber)或任何所需求的合适的腔室。在一描绘于多腔室基板处理***300的示例中，***300包含腔室100、腔室200与其他所需求的合适的腔室340。通过这种布置，电介质层通过等离子体辅助原子层化学气相沉积工艺的形成、高介电常数电介质层通过等离子体辅助原子层化学气相沉积工艺的形成及高介电常数电介质层的退火被整合于单一***中进行而不需要破坏真空，以便维持基板的清洁度，使基板不会有来自环境的不需要的污染与残留物。
控制器310可耦接至多腔室基板处理***300的各种不同的部件以控制其操作。控制器310包含中央处理器(CPU)312、内存314与支持电路316。控制器310可直接控制多腔室基板处理***300，或者通过连接至特定处理腔室和/或支持***组件的计算机(或控制器)来控制多腔室基板处理***300。控制器310可为可用于控制各种不同的腔室与子处理器的工业环境中的任意形式的通用计算机处理器中的一种。控制器310的内存314或计算机可读取媒体(computer readable medium)可为容易取得的内存，诸如随机存取内存(randomaccess memory,RAM)、只读存储器(read only memory,ROM)、磁盘(floppy disk)、硬盘(hard disk)、光学储存媒体(optical storage media)(例如光盘或数字激光视盘)、闪存盘(flash drive)或任意其他形式的远程或本机的数字储存中的一或多种。支持电路316耦接至中央处理器312以用常规方式支持处理器。这些电路包含超高速缓存、电源供应、频率电路(clock circuits)、输入/输出电路、与子***等等。在此所述的方法可以软件程序储存于内存314中，可执行或调用这个软件程序以用在此描述的方式控制多腔室基板处理***300的操作。软件程序也可由第二中央处理器(未示出)来储存和/或执行，第二中央处理器位于中央处理器312控制的硬件的远端。
图4是根据一实施方式的利用层堆叠411的TFT装置结构400的横截面图。如图4所示，TFT装置结构400形成于基板102上。TFT装置结构400用于显示器装置，诸如有机发光二极管装置。TFT装置结构400包含形成于光学透明基板102上的源极区409a、通道区408与漏极区409b，光学透明基板102具有或不具有设置于其上的任选的绝缘层404。源极区409a、通道区408与漏极区409b一般形成自初始沉积非晶硅(amorphous silicon,a-Si)层，初始沉积非晶硅层典型地于之后经热处理或激光处理以形成多晶硅(polysilicon)层。源极区409a、漏极区409b与通道区408可通过使初始沉积非晶硅层图案化并离子掺杂而形成，接着热处理或激光处理以形成多晶硅层。栅极绝缘层405接着沉积于源极区409a、漏极区409b和通道区408上，且栅极414沉积于栅极绝缘层405上。栅极绝缘层405可以由电介质材料制造，诸如氮化硅或二氧化硅(silicon dioxide,SiO2)。栅极414可以由金属制造，诸如钼(molybdenum,Mo)。栅极414可为包含二或更多金属层的层堆叠。在一实施方式中，栅极414包含设置于二钛(titanium,Ti)层之间的铝(aluminum,Al)层。金属电极416也沉积于栅极绝缘层405上。金属电极416可由与栅极414相同的材料制造。在一实施方式中，金属层沉积于栅极绝缘层405上，且使金属层经图案化以形成栅极414与金属电极416。
层堆叠411包含电介质层418、高介电常数电介质层420与任选的氮化硅层421。层堆叠411形成于栅极绝缘层405、栅极414与金属电极416上。电介质层418沉积于栅极绝缘层405、栅极414与金属电极416上且与栅极绝缘层405、栅极414与金属电极416接触，高介电常数电介质层420沉积于电介质层418上且与电介质层418接触，而任选的氮化硅层421沉积于高介电常数电介质层420上且与高介电常数电介质层420接触。相较于栅极绝缘层405、栅极414与金属电极416的表面，电介质层418具有均质表面。电介质层418的均质表面提供使高介电常数电介质层420均匀沉积的理想表面，以产生均匀的厚度分布。电介质层418由与高介电常数电介质层420的材料不同的材料制造。电介质层418可为任何合适的电介质层，例如氧化物，举例来说，二氧化硅、氧化铝(aluminum oxide,Al2O3)、二氧化钛(titaniumdioxide,TiO2)或氧化钇(yttrium(III)oxide,Y2O3)。在一示例中，电介质层418与栅极绝缘层405为相同电介质材料。在另一示例中，电介质层418为不同于栅极绝缘层405的电介质材料。电介质层418具有范围为约2埃(Angstroms)至约100埃的厚度。
在一实施方式中，电介质层418为二氧化钛且具有范围为约2埃至约50埃的厚度。已发现当电介质层418为二氧化钛且具有范围为约2埃至约50埃的厚度时，沉积于其上的高介电常数电介质层420具有立方(cubic)或正方晶相(tetragonal phase)晶体结构(crystalline structure)，提供比传统沉积于金属与电介质表面上方的电介质层更高的介电常数值。当沉积于二氧化钛电介质层418上时，高介电常数电介质层420具有范围为约30至约50的介电常数值。此外，在相同工艺条件下，沉积于二氧化钛电介质层418上的高介电常数电介质层420的沉积速率比高介电常数电介质层于除二氧化钛电介质层以外的材料上的沉积速率高约5％至约20％。二氧化钛电介质层418还改善了高介电常数电介质层420与栅极绝缘层405、栅极414和金属电极416的表面之间的附着力。
在另一实施方式中，电介质层418为具有范围为约2埃至约100埃的厚度的非晶氧化铝(Al2O3)。高介电常数电介质层420可为具有范围为约20至约50的介电常数值的二氧化锆(ZrO2)层或二氧化铪(hafnium dioxide,HfO2)层，且高介电常数电介质层420具有范围为约250埃至约900埃的厚度。
电介质层418可在PE-ALD腔室中沉积于栅极绝缘层405、栅极414和金属电极416上，PE-ALD腔室例如图1所示的腔室100，且高介电常数电介质层420可在相同的PE-ALD腔室中沉积于电介质层418上。沉积电介质层418的工艺条件可类似于沉积高介电常数电介质层420的工艺条件。例如，在沉积电介质层418与沉积高介电常数电介质层420期间，基板的温度维持于约150℃和约300℃之间。在沉积电介质层418与沉积高介电常数电介质层420期间，处理腔室的压力维持于约0.1托(Torr)和1托之间。在一实施方式中，含钛前驱物(titanium containing precursor)与含氧前驱物(oxygen containing precursor)交替注入处理腔室以形成电介质层418，含钛前驱物诸如四(乙基甲基胺基)钛(tetrakis(ethylmethylamino)titanium)，含氧前驱物诸如氧气。在另一实施方式中，含铝前驱物(aluminum containing precursor)与含氧前驱物交替注入处理腔室以形成电介质层418，含铝前驱物诸如三甲基铝(trimethylaluminum)，含氧前驱物诸如氧气。高介电常数电介质层420可通过使含锆前驱物(zirconium containing precursor)与含氧前驱物交替注入处理腔室来沉积，含锆前驱物诸如四(乙基甲基氨基)锆(tetrakis(ethylmethylamino)zirconium)，含氧前驱物诸如氧气。
在另一实施方式中，电介质层418与高介电常数电介质层420可沉积于PECVD腔室中，例如购自位于加利福尼亚州圣塔克拉拉(Santa Clara,California)的应用材料公司(Applied Materials,Inc.)的55KSPECVD腔室。
高介电常数电介质层420经退火以增加高介电常数电介质层420的介电常数值。在一实施方式中，高介电常数电介质层420于沉积高介电常数电介质层420的处理腔室中退火。在另一实施方式中，高介电常数电介质层420于热处理腔室中退火，例如图2所示的热处理腔室200。高介电常数电介质层420可于惰性环境或活性环境中以高于350℃的温度退火，例如从约350℃至约650℃。退火温度与高介电常数电介质层420的厚度有关。较薄的层可导致较高的退火温度。在一实施方式中，高介电常数电介质层420于惰性气体存在下退火，例如氮气(N2)、氩(Ar)或其组合。在另一实施方式中，高介电常数电介质层420于氧化气体存在下退火，例如氧气(O2)、臭氧(O3)或其组合。在又一实施方式中，高介电常数电介质层420于惰性气体与活性气体中的至少一种存在下退火。退火工艺可在高介电常数电介质层420沉积后立即进行，或在一或多层依序形成于高介电常数电介质层420上之后进行。在一实施方式中，退火工艺进行于任选的氮化硅层421沉积于高介电常数电介质层420上之后。
第二金属电极422设置于层堆叠411上，且第二金属电极422可由与金属电极416相同的材料制造，或可由与金属电极416不同的材料制造。金属电极416、层堆叠411与第二金属电极422可形成MIM电容器。在MIM电容器形成后，层间电介质质424形成于第二金属电极422与层堆叠411上。层间电介质质424可为诸如二氧化硅或氮化硅的任何合适的电介质层。源极金属电极层410a与漏极金属电极层410b形成为通过层间电介质质424、层堆叠411与栅极绝缘层405，且源极金属电极层410a与漏极金属电极层410b分别电连接至源极区409a与漏极区409b。
通过沉积电介质层于金属表面与电介质表面上并沉积高介电常数电介质层于其上，高介电常数电介质层的厚度分布的均匀性提升，可增加介电常数值且可达成高介电常数电介质层更佳的附着力。例如，如果电介质层为二氧化钛，可获得额外的益处，例如更高的介电常数值、更高的高介电常数电介质层沉积速率与改善的附着力。
虽然前述针对本公开内容的实施方式，但在不背离本发明的基本范围的情况下可设计其他和进一步的实施方式，且本发明的保护范围由随附的权利要求书来确定。

Claims (20)

1.一种包括高介电常数电介质层的层堆叠结构，包含：
第一电介质层；
第一金属电极，设置于所述第一电介质层上；
层堆叠，设置于所述第一电介质层与所述第一金属电极上，所述层堆叠包含：
第二电介质层，设置于所述第一电介质层与所述第一金属电极上且与所述第一电介质层和所述第一金属电极接触；
高介电常数电介质层，设置于所述第二电介质层上且与所述第二电介质层接触，所述高介电常数电介质层区别于所述第二电介质层，所述高介电常数电介质层包含二氧化锆或二氧化铪，所述高介电常数电介质层与所述第二电介质层于所述第一金属电极上方的位置处接触；及
氮化硅层，设置于所述高介电常数电介质层上且与所述高介电常数电介质层接触；
第二金属电极，保形地设置于所述氮化硅层上且与所述氮化硅层接触；及
第三电介质层，保形地设置于所述第二金属电极上。
2.根据权利要求1所述的层堆叠结构，其中所述第二电介质层包含二氧化硅、氧化铝、二氧化钛或氧化钇(III)。
3.根据权利要求2所述的层堆叠结构，其中所述第二电介质层具有范围为2埃至100埃的厚度。
4.根据权利要求1所述的层堆叠结构，其中所述高介电常数电介质层具有范围为250埃至900埃的厚度。
5.根据权利要求1所述的层堆叠结构，其中所述第一电介质层包含氮化硅或二氧化硅。
6.根据权利要求5所述的层堆叠结构，其中所述第一金属电极包含铝层或钼层。
7.根据权利要求6所述的层堆叠结构，其中所述铝层设置于二个钛层之间。
8.根据权利要求1所述的层堆叠结构，其中所述第一电介质层包含与所述第二电介质层相同的材料。
9.根据权利要求1所述的层堆叠结构，其中所述高介电常数电介质层具有立方或正方晶相晶体结构。
10.根据权利要求1所述的层堆叠结构，其中所述氮化硅层与所述高介电常数电介质层于所述第一金属电极上方的位置处接触。
11.一种将高介电常数电介质层形成于电介质表面和金属表面上方的方法，包含：
沉积第一电介质层于第二电介质层与金属电极上，所述第一电介质层与所述第二电介质层和所述金属电极接触；
沉积高介电常数电介质层于所述第一电介质层上，所述高介电常数电介质层区别于所述第二电介质层，所述高介电常数电介质层包含二氧化锆或二氧化铪，并且所述高介电常数电介质层与所述第一电介质层于所述金属电极上方的位置处接触；及
使所述高介电常数电介质层退火。
12.根据权利要求11所述的方法，其中所述第一电介质层与所述高介电常数电介质层各自通过等离子体辅助原子层沉积工艺或等离子体辅助化学气相沉积工艺来沉积。
13.一种包括高介电常数电介质层的层堆叠结构，包含：
第一电介质层；
第一金属电极，设置于所述第一电介质层上；
层堆叠，设置于所述第一电介质层与所述第一金属电极上，所述层堆叠包含：
第二电介质层，设置于所述第一电介质层和所述第一金属电极上，并且所述第二电介质层与所述第一电介质层和所述第一金属电极接触，所述第二电介质层包含与所述第一电介质层不同的材料；
高介电常数电介质层，设置于所述第二电介质层上且与所述第二电介质层接触，所述高介电常数电介质层区别于所述第二电介质层，所述高介电常数电介质层包含二氧化锆或二氧化铪，所述高介电常数电介质层与所述第二电介质层于所述第一金属电极上方的位置处接触；及
氮化硅层，设置于所述高介电常数电介质层上且与所述高介电常数电介质层接触；
第二金属电极，保形地设置于所述氮化硅层上且与所述氮化硅层接触；及
第三电介质层，保形地设置于所述第二金属电极上。
14.根据权利要求13所述的层堆叠结构，其中所述第二电介质层包含氧化铝、二氧化钛或氧化钇(III)。
15.根据权利要求14所述的层堆叠结构，其中所述第二电介质层具有范围为2埃至100埃的厚度。
16.根据权利要求13所述的层堆叠结构，其中所述高介电常数电介质层具有范围为250埃至900埃的厚度。
17.根据权利要求13所述的层堆叠结构，其中所述第一电介质层包含氮化硅或二氧化硅。
18.根据权利要求17所述的层堆叠结构，其中所述第一金属电极包含铝层或钼层。
19.根据权利要求18所述的层堆叠结构，其中所述铝层设置于二个钛层之间。
20.根据权利要求13所述的层堆叠结构，其中所述高介电常数电介质层具有立方或正方晶相晶体结构。
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