CN111211737B - High harmonic rejection ratio mixer circuit - Google Patents
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/14—Balanced arrangements
- H03D7/1425—Balanced arrangements with transistors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/14—Balanced arrangements
- H03D7/1425—Balanced arrangements with transistors
- H03D7/1441—Balanced arrangements with transistors using field-effect transistors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/12—Transference of modulation from one carrier to another, e.g. frequency-changing by means of semiconductor devices having more than two electrodes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/14—Balanced arrangements
- H03D7/1425—Balanced arrangements with transistors
- H03D7/1458—Double balanced arrangements, i.e. where both input signals are differential
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/14—Balanced arrangements
- H03D7/1425—Balanced arrangements with transistors
- H03D7/1475—Subharmonic mixer arrangements
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/14—Balanced arrangements
- H03D7/1425—Balanced arrangements with transistors
- H03D7/1483—Balanced arrangements with transistors comprising components for selecting a particular frequency component of the output
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/16—Multiple-frequency-changing
- H03D7/165—Multiple-frequency-changing at least two frequency changers being located in different paths, e.g. in two paths with carriers in quadrature
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
- H04B1/0475—Circuits with means for limiting noise, interference or distortion
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D2200/00—Indexing scheme relating to details of demodulation or transference of modulation from one carrier to another covered by H03D
- H03D2200/0041—Functional aspects of demodulators
- H03D2200/0082—Quadrature arrangements
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Abstract
The invention provides a high harmonic rejection ratio mixer circuit, comprising: the multi-phase generation module receives a first input signal and generates eight paths of square wave signals with a phase difference of 45 degrees; the quadrature phase generation module receives a second input signal and generates a second group of square wave signals with four paths of 90-degree phase difference; the harmonic suppression module is connected to the output end of the quadrature phase generation module and is used for filtering high-frequency harmonic components in the second group of square wave signals; and the frequency mixing module is connected with the output ends of the multiphase generating module and the harmonic suppression module and is used for mixing the output signals of the multiphase generating module and the harmonic suppression module. The harmonic suppression module is added into the high harmonic suppression ratio mixing circuit on the basis of multiphase mixing, and the high harmonic component of the signal is filtered out at the input end, so that the harmonic suppression ratio of the output signal is improved.
Description
Technical Field
The invention relates to the technical field of wireless communication, in particular to a high-harmonic rejection ratio mixing circuit.
Background
In recent years, with the development of portable devices and the increase of consumer scenes, there is an increasing demand for various wireless products, and mixers have been very important in wireless transceivers. At the transmitting end, the mixer plays a role of up-converting the intermediate frequency signal to a radio frequency band, so that the antenna is smaller in size and the equipment is more portable; at a receiving end, the mixer needs to down-convert the useful signal from the radio frequency band to the intermediate frequency band, and through digital-to-analog conversion operation, the signal is more beneficial to analyzing and processing the received signal by using the existing strong digital signal processing capability, and the design difficulty of an analog circuit is reduced by the lower intermediate frequency; in clock networks, with the richness of wireless application scenarios, transceivers such as WIFI, bluetooth, GPS and the like meeting various protocols need to be integrated on the same chip, which requires more complex local oscillator frequencies, and the mixer plays a very important role here, on the other hand, in order to avoid mutual interference inside the chip in high-power application scenarios, the use of the mixer to generate up/down mixing of non-integer multiple has long become a common clock generation scheme in industry. Therefore, it is important to design a high-performance mixer, whether in the transmitting, receiving or frequency synthesizing module.
Image rejection has long been an important measure of mixer performance, but the degradation of signal quality by higher harmonics is often ignored, in transceivers, the lower the intermediate frequency, the closer the higher harmonic interference is to the required spectral line, and the same problem is found in frequency synthesis modules, while as local oscillating signals for up/down mixing, the degradation will further deteriorate the performance of the transmitter and receiver, so the rejection capability of higher harmonics is a very troublesome problem that must be solved in designing high performance mixers.
Therefore, a mixer capable of solving the higher harmonic component in the output signal has been proposed, which is one of the problems to be solved by those skilled in the art.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a high harmonic rejection ratio mixer circuit, which is used for solving the problem that the high harmonic component in the output signal of the mixer in the prior art affects the signal quality.
To achieve the above and other related objects, the present invention provides a high harmonic rejection ratio mixing circuit comprising at least:
The multi-phase generation module receives a first input signal and generates eight paths of square wave signals with a phase difference of 45 degrees;
the quadrature phase generation module receives a second input signal and generates a second group of square wave signals with four paths of 90-degree phase difference;
The harmonic suppression module is connected to the output end of the quadrature phase generation module and is used for filtering high-frequency harmonic components in the second group of square wave signals;
and the frequency mixing module is connected with the output ends of the multiphase generating module and the harmonic suppression module and is used for mixing the output signals of the multiphase generating module and the harmonic suppression module.
Optionally, the first set of square wave signals are co-frequency signals or frequency-divided signals of the first input signal.
Optionally, the multi-phase generating module includes a first limiting amplifying unit and a first frequency dividing unit; the first limiting amplifying unit receives the first input signal and amplifies the first input signal into a full swing signal; the first frequency dividing unit is connected to the output end of the first limiting amplifying unit and divides the frequency of the output signal of the first limiting amplifying unit.
More optionally, the first input signal is a differential signal.
Optionally, the second set of square wave signals are co-frequency signals or frequency divided signals of the second input signal.
Optionally, the quadrature phase generation module includes a second limiting amplifying unit and a second frequency dividing unit; the second limiting amplifying unit receives the second input signal and amplifies the second input signal into a full swing signal; the second frequency dividing unit is connected to the output end of the second limiting amplifying unit and divides the frequency of the output signal of the second limiting amplifying unit.
More optionally, the second input signal is a differential signal.
Optionally, the harmonic rejection module comprises a low pass filter unit.
Optionally, the mixing module comprises a gilbert mixing unit.
More optionally, the gilbert mixer cell includes three sets of tail current ratiosIs a sub-unit of (c).
As described above, the high harmonic rejection ratio mixer circuit of the present invention has the following advantageous effects:
The harmonic suppression module is added into the high harmonic suppression ratio mixing circuit on the basis of multiphase mixing, and the high harmonic component of the signal is filtered out at the input end, so that the harmonic suppression ratio of the output signal is improved.
Drawings
Fig. 1 shows a schematic diagram of a high harmonic rejection ratio mixer circuit according to the present invention.
Fig. 2 is a schematic structural diagram of the multi-phase generating module according to the present invention.
Fig. 3 is a schematic diagram showing the structure of the quadrature phase generation module of the present invention.
Fig. 4 is a schematic structural diagram of a harmonic suppression module according to the present invention.
Fig. 5 shows a schematic diagram of the gilbert mixer cell of the present invention.
Description of element reference numerals
1. High harmonic rejection ratio mixer circuit
11. Multi-phase generation module
111. First limiting amplifying unit
112. First frequency dividing unit
12. Quadrature phase generation module
121. Second limiting amplifying unit
122. Second frequency dividing unit
13. Harmonic suppression module
14. Mixing module
141. Gilbert mixer unit
1411. First subunit
1412. Second subunit
1413. Third subunit
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention.
Please refer to fig. 1-5. It should be noted that, the illustrations provided in the present embodiment merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complex.
In practical circuit applications, no matter what kind of signal is an ideal single-tone signal, if there is a higher harmonic, the output signal quality of the mixer will be degraded, taking an up-mixer in the transmitter as an example, if there is a higher harmonic in the local oscillator signal, then:
Wherein, α 1 is the amplification factor of the local oscillation signal fundamental wave after passing through the nonlinear circuit, α 3 is the amplification factor of the local oscillation third harmonic after passing through the nonlinear circuit, a 1 is the local oscillation fundamental wave amplitude, a 3 is the local oscillation third harmonic amplitude, ω 1 is the local oscillation frequency, ω 2 is the baseband signal frequency, in the above formula, the first term is the expected result, and the second term is the fourth intermodulation result of the local oscillation and the baseband signal, which can deteriorate the output result. In the above formula, only the higher harmonic of the local oscillator signal is considered, if the higher harmonic in the baseband signal is considered in the calculation, it is not difficult to obtain that the final result will include the (3ω 2-ω1) term, in general, the baseband signal frequency is lower, the (3ω 2-ω1) term will be very close to ω 1, the on-chip LC network cannot filter it, and the output signal will be greatly deteriorated. The situation is also severe in the local oscillation generating circuit, and the generated local oscillation signal can be completely distorted, and the distortion effect is more obvious by adding the function of the back-end buffer.
As shown in fig. 1, the present invention provides a high harmonic rejection ratio mixer circuit 1, the high harmonic rejection ratio mixer circuit 1 comprising: a multiphase generation module 11, a quadrature phase generation module 12, a harmonic suppression module 13 and a mixing module 14.
As shown in fig. 1, the multi-phase generating module 11 receives a first input signal and generates eight square wave signals of a first group having a phase difference of 45 °.
Specifically, the multiphase generating module 11 extracts the signal frequency of the first input signal and generates eight square wave signals with the same frequency or frequency division and 45 degrees phase difference. In this embodiment, the phases of the first set of square wave signals are 0 °, 45 °,90 °, 135 °, 180 °, 225 °, 270 °, 315 °, respectively.
Specifically, as shown in fig. 2, in the present embodiment, the multi-phase generating module 11 includes a first limiting amplifying unit 111 and a first frequency dividing unit 112. The first limiting and amplifying unit 111 receives the first input signal and amplifies the first input signal into a full swing signal. The first frequency dividing unit 112 is connected to the output end of the first limiting amplifying unit 111, and divides the frequency of the output signal of the first limiting amplifying unit 111. As an example, the first input signal is a differential signal and has a frequency f1, the first frequency dividing unit 112 is a divide-by-four unit, and the two signals are divided by four to obtain eight signals.
It should be noted that the first input signal may be a signal, and eight signals are obtained by dividing the frequency by eight.
As shown in fig. 1, the quadrature phase generation block 12 receives a second input signal and generates a second set of square wave signals having four paths of 90 ° phase difference.
Specifically, the quadrature phase generation module 12 extracts the signal frequency of the second input signal and generates a four-way square wave signal that is co-frequency or frequency divided and phase-shifted by 90 °. In this embodiment, the phases of the second set of square wave signals are 0 °, 90 °, 180 °, 270 °, respectively.
Specifically, as shown in fig. 3, in the present embodiment, the quadrature phase generation module 12 includes a second limiting and amplifying unit 121 and a second frequency dividing unit 122. The second limiting and amplifying unit 121 receives the second input signal and amplifies the second input signal into a full swing signal. The second frequency dividing unit 122 is connected to the output end of the second limiting amplifying unit 121, and divides the frequency of the output signal of the second limiting amplifying unit 121. As an example, the second input signal is a differential signal and has a frequency f2, the second frequency dividing unit 122 is a frequency divider, and the two signals are divided by two to obtain four signals.
It should be noted that the second input signal may be a signal, and four paths of signals are obtained through four frequency division.
As shown in fig. 1, the harmonic suppression module 13 is connected to the output end of the quadrature phase generation module 12, and is configured to filter out high-frequency harmonic components in the second set of square wave signals.
Specifically, the harmonic suppression module 13 filters high-frequency harmonics in four paths of square wave signals with 90 degrees phase difference output by the quadrature phase generation module 12, and outputs four paths of common-frequency or frequency-division signals with 90 degrees phase difference only including fundamental frequency, so as to suppress high-frequency harmonic components in the output signals of the quadrature phase generation module 12; the harmonic suppression module 13 is a key module for suppressing the 4 th-order intermodulation signal of the radio frequency mixer.
Specifically, as shown in fig. 4, in the present embodiment, the harmonic suppression module 13 includes a low-pass filtering unit 131, and the low-pass filtering unit 131 includes four low-pass filters that respectively perform low-pass filtering on the four signals output from the quadrature-phase generating module 12.
As shown in fig. 1, the mixing module 14 is connected to the outputs of the multiphase generating module 11 and the harmonic suppressing module 13, and mixes the output signals of the multiphase generating module 11 and the harmonic suppressing module 13.
In particular, the mixing module 14 is used to implement up-conversion or down-conversion. As shown in fig. 5, in the present embodiment, the mixing module 14 includes a gilbert mixing unit 141, and the gilbert mixing unit 141 includes three tail current ratiosIs denoted as a first subunit 1411, a second subunit 1412, a third subunit 1413, respectively; the tail current ratio of the first subunit 1411, the second subunit 1412, and the third subunit 1413 is/>Specifically, each subunit includes first, second, third, fourth, fifth, sixth, seventh, eighth, ninth, tenth, eleventh, and twelfth transistors, and first and second current sources; the third transistor N3 and the fourth transistor N4 form a differential pair, a gate is used as a first local oscillation differential signal input end, a drain electrode of the third transistor N3 is connected with a first end of an inductance L and a capacitance C which are connected in parallel, a drain electrode of the fourth transistor N4 is connected with a second end of the inductance L and the capacitance C which are connected in parallel, and source ends of the third transistor N3 and the fourth transistor N4 are connected with a drain electrode of the first transistor N1; the connection relationship between the fifth transistor N5, the sixth transistor N6 and the second transistor N2 is the same as the connection relationship between the third transistor N3, the fourth transistor N4 and the first transistor N1, and is not described in detail herein; the first transistor N1 and the second transistor N2 form a differential pair transistor, a grid electrode is used as a first radio frequency differential signal input end, sources of the first transistor N1 and the second transistor N2 are connected with one end of the first current source I1, and the other end of the first current source I1 is grounded; the connection relationships of the seventh transistor N7, the eighth transistor N8, the ninth transistor N9, the tenth transistor N10, the eleventh transistor N11, the twelfth transistor N12, and the second current source I2 are the same, and are not described in detail herein; the gates of the ninth transistor N9, the tenth transistor N10, the eleventh transistor N11, and the twelfth transistor N12 are respectively used as second local oscillation differential signal input ends, the gates of the seventh transistor N7 and the eighth transistor N8 are respectively used as second radio frequency differential signal input ends, and the currents flowing through the first current source I1 and the second current source I2 are the same. Wherein the first local oscillation differential signal input end of the first subunit 1411 receives signals with phases of 135 ° and 315 ° in the first group of square wave signals; the second local oscillation differential signal input end receives signals with phases of 45 degrees and 225 degrees in the first group of square wave signals; the first radio frequency differential signal input end receives first differential signals RF_IP and RF_IN, the second radio frequency differential signal input end receives second differential signals RF_QP and RF_QN, the first differential signals and the second differential signals are orthogonal signals, the first differential signals and the second differential signals are four paths of signals with 90-degree phase difference IN the second group of square wave signals respectively, and the connection relation between the specific phase and the input end can be set according to actual needs. The first local oscillation differential signal input end of the second subunit 1412 receives signals with phases of 180 ° and 0 ° in the first set of square wave signals; the second local oscillation differential signal input end receives signals with phases of 90 degrees and 270 degrees in the first group of square wave signals; the first RF differential signal input receives the first differential signals RF_IP and RF_IN, and the second RF differential signal input receives the second differential signals RF_QP and RF_QN. The first local oscillation differential signal input end of the third subunit 1413 receives signals with phases of 225 ° and 45 ° in the first set of square wave signals; the second local oscillation differential signal input end receives signals with the phases of 135 degrees and 315 degrees in the first group of square wave signals; the first RF differential signal input receives the first differential signals RF_IP and RF_IN, and the second RF differential signal input receives the second differential signals RF_QP and RF_QN.
It should be noted that the structure and the device type of the gilbert mixer 141 are merely examples, and any mixer module capable of implementing the mixing function is suitable for the present invention in practical application.
The working principle of the high-harmonic rejection ratio mixer circuit is as follows:
The first input signal is input to the multiphase generating module 11, and is amplified by a limiting amplifier to form a full swing signal, and then is passed through a four-frequency divider to generate eight square wave signals with phases of 0 °, 45 °, 90 °, 135 °, 180 °, 225 °, 270 °, 315 °, and as a set of inputs of the mixing module 14. The second input signal is input into the quadrature phase generation module 12, and then is subjected to limiting amplifier to generate a full swing signal, and then is subjected to two frequency dividers to generate four paths of square wave signals with phases of 0 degree, 90 degree, 180 degree and 270 degree respectively; the four-way square wave signal output by the quadrature phase generation module 12 is filtered out by a low-pass filter in the harmonic suppression module 13, and only the fundamental harmonic is reserved as another set of input of the mixing module 14. In the mixing module 14, the two sets of signals complete up-mixing or down-mixing, and the harmonic suppression module 13 filters out high-frequency components in the signals, so that the structure can also have higher harmonic suppression ratio while realizing the traditional mixing function.
The core of the invention is to provide a high-harmonic rejection ratio mixer circuit which can reject the image frequency and higher harmonic.
In summary, the present invention provides a high harmonic rejection ratio mixer circuit, comprising: the multi-phase generation module receives a first input signal and generates eight paths of square wave signals with a phase difference of 45 degrees; the quadrature phase generation module receives a second input signal and generates a second group of square wave signals with four paths of 90-degree phase difference; the harmonic suppression module is connected to the output end of the quadrature phase generation module and is used for filtering high-frequency harmonic components in the second group of square wave signals; and the frequency mixing module is connected with the output ends of the multiphase generating module and the harmonic suppression module and is used for mixing the output signals of the multiphase generating module and the harmonic suppression module. The harmonic suppression module is added into the high harmonic suppression ratio mixing circuit on the basis of multiphase mixing, and the high harmonic component of the signal is filtered out at the input end, so that the harmonic suppression ratio of the output signal is improved. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.
Claims (7)
1. A high harmonic rejection ratio mixer circuit, the high harmonic rejection ratio mixer circuit comprising at least:
The multi-phase generation module receives a first input signal and generates eight paths of square wave signals with a phase difference of 45 degrees;
the quadrature phase generation module receives a second input signal and generates a second group of square wave signals with four paths of 90-degree phase difference;
the harmonic suppression module is connected to the output end of the quadrature phase generation module and is used for filtering high-frequency harmonic components in the second group of square wave signals; the harmonic suppression module comprises a low-pass filter unit, wherein the low-pass filter unit comprises four low-pass filters, and the four low-pass filters are used for respectively carrying out low-pass filtering on the four signals output by the quadrature phase generation module;
The frequency mixing module is connected with the output ends of the multiphase generating module and the harmonic suppression module and used for mixing output signals of the multiphase generating module and the harmonic suppression module;
The mixing module comprises a Gilbert mixing unit, and the Gilbert mixing unit comprises three groups of tail current ratios Is a sub-unit of (c).
2. The high harmonic rejection ratio mixing circuit of claim 1 wherein: the first set of square wave signals are co-frequency signals or frequency-divided signals of the first input signal.
3. The high harmonic rejection ratio mixing circuit of claim 1 wherein: the multi-phase generating module comprises a first limiting amplifying unit and a first frequency dividing unit; the first limiting amplifying unit receives the first input signal and amplifies the first input signal into a full swing signal; the first frequency dividing unit is connected to the output end of the first limiting amplifying unit and divides the frequency of the output signal of the first limiting amplifying unit.
4. A high harmonic rejection ratio mixer circuit according to any one of claims 1 to 3, wherein: the first input signal is a differential signal.
5. The high harmonic rejection ratio mixing circuit of claim 1 wherein: the second set of square wave signals are common frequency signals or frequency division signals of the second input signal.
6. The high harmonic rejection ratio mixing circuit of claim 1 wherein: the quadrature phase generation module comprises a second limiting amplifying unit and a second frequency dividing unit; the second limiting amplifying unit receives the second input signal and amplifies the second input signal into a full swing signal; the second frequency dividing unit is connected to the output end of the second limiting amplifying unit and divides the frequency of the output signal of the second limiting amplifying unit.
7. The high harmonic rejection ratio mixing circuit as in any one of claims 1, 5 or 6 wherein: the second input signal is a differential signal.
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| CN202010139700.4A CN111211737B (en) | 2020-03-03 | 2020-03-03 | High harmonic rejection ratio mixer circuit |
| US17/037,692 US11563407B2 (en) | 2020-03-03 | 2020-09-30 | Mixing circuit with high harmonic suppression ratio |
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| US11804804B2 (en) * | 2020-09-14 | 2023-10-31 | Analog Devices, Inc. | Programmable harmonic rejection mixer (HRM)/subharmonic mixer (SHM) topology |
| CN117375639A (en) * | 2022-06-30 | 2024-01-09 | 华为技术有限公司 | Radio frequency circuit and communication device |
| CN115425929A (en) * | 2022-09-05 | 2022-12-02 | 南京理工大学 | Current multiplexing phase-shifting mixer with high harmonic suppression ratio |
| CN116683873B (en) * | 2023-05-26 | 2024-02-02 | 电子科技大学 | Harmonic suppression up-converter circuit, chip and pulse generator |
| CN117526585B (en) * | 2024-01-03 | 2024-03-29 | 成都市易冲半导体有限公司 | Phase demodulation circuit, wireless power transmitting end and wireless charging system |
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| Publication number | Publication date |
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| US11563407B2 (en) | 2023-01-24 |
| US20210281218A1 (en) | 2021-09-09 |
| CN111211737A (en) | 2020-05-29 |
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