CN111162128A - 一种薄膜晶体管及其制备方法 - Google Patents

一种薄膜晶体管及其制备方法 Download PDF

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CN111162128A
CN111162128A CN201911392794.XA CN201911392794A CN111162128A CN 111162128 A CN111162128 A CN 111162128A CN 201911392794 A CN201911392794 A CN 201911392794A CN 111162128 A CN111162128 A CN 111162128A
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layer
groove
insulating layer
gate insulating
thin film
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张雪
林子平
李刘中
安金鑫
肖守均
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Chongqing Kangjia Photoelectric Technology Research Institute Co Ltd
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Chongqing Kangjia Photoelectric Technology Research Institute Co Ltd
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Abstract

本发明提供的一种薄膜晶体管及其制备方法，所述薄膜晶体管包括基板，以及依次层叠设置在基板上的缓冲层和栅极绝缘层，其中，缓冲层与栅极绝缘层接触的表面设置有第一凹槽，第一凹槽内设置有栅极层；栅极绝缘层背离缓冲层的表面设置有第二凹槽，第二凹槽内设置有半导体层，半导体层包括源极区，漏极区和沟道区。本发明的薄膜晶体管由于在基板的表面设置有缓冲层，栅极层可以设置在缓冲层的第一凹槽内，并且在栅极绝缘层上设置有第二凹槽，半导体层设置第二凹槽内，充分利用了缓冲层和栅极绝缘层的内部空间，薄膜晶体管的结构紧凑，表面可以做得更加平整，后续布线更加方便。

Description

一种薄膜晶体管及其制备方法
技术领域
本发明涉及LED显示技术领域，尤其涉及一种薄膜晶体管及其制备方法。
背景技术
现有技术的薄膜晶体管的结构主要分为底栅结构和顶栅结构，以上两种薄膜晶体管结构都存在栅极，并且栅极直接设置在平面上的，因此在栅极上方沉积的各层会形成台阶，一方面，台阶的存在会对后续工续会带来很大影响(比如后续光阻涂布不便，膜层在台阶过渡区域的厚度不易控制，电极接触孔不易打开，后续的金属布线同样不便)，另一方面，台阶的存在还会对薄膜晶体管的电性产生影响，比如台阶的位置很容易有电荷聚集导致漏电，这些影响在薄膜晶体管小型化的过程中会大大的加剧。
因此，现有技术还有待于改进。
发明内容
鉴于上述现有技术的不足，本发明的目的在于提供一种薄膜晶体管及其制备方法，旨在解决现有薄膜晶体管栅极直接设置在基板上，栅极位置会形成台阶，导致后续布线不便的技术问题。
本发明的技术方案如下：
一种薄膜晶体管，其中，包括基板，以及依次层叠设置在所述基板上的缓冲层和栅极绝缘层；
所述缓冲层与所述栅极绝缘层接触的表面设置有第一凹槽，所述第一凹槽内设置有栅极层；
所述栅极绝缘层背离所述缓冲层的表面设置有第二凹槽，所述第二凹槽内设置有半导体层，所述半导体层包括源极区，漏极区，以及设置在所述源极区和所述漏极区之间的沟道区。
所述的薄膜晶体管，其中，所述栅极绝缘层和所述半导体层上覆盖有保护层。
所述的薄膜晶体管，其中，还包括第一接触电极和第二接触电极，所述漏极区上方的所述保护层上设置有第一通孔，所述漏极区上方的保护层上设置有第二通孔，所述第一接触电极穿过所述第一通孔与所述源极区相连，所述第二接触电极穿过所述第二通孔与所述漏极区相连。
一种薄膜晶体管的制备方法，其中，包括步骤：
提供一基板，在所述基板上生长缓冲层，并在所述缓冲层的表面制作第一凹槽；
在所述第一凹槽中沉积栅极层，并对所述缓冲层的表面进行平坦化，使所述缓冲层的表面与所述栅极层的表面齐平；
在所述缓冲层和所述栅极层的表面沉积栅极绝缘层，并在所述栅极绝缘层的表面制作第二凹槽；
在所述第二凹槽中沉积半导体层，并对所述栅极绝缘层的表面进行平坦化，使所述栅极绝缘层的表面与所述半导体层的表面齐平；
向所述半导体层的两端注入离子，形成源极区和漏极区。
所述的薄膜晶体管的制备方法，其中，所述步骤向所述半导体层的两端注入离子，形成源极区和漏极区之后还包括：在所述栅极绝缘层和所述半导体层上沉积保护层。
所述的薄膜晶体管的制备方法，其中，所述步骤在所述栅极绝缘层和所述半导体层的表面沉积保护层之后还包括：
对所述源极区上方的所述保护层钻第一通孔，以及对所述漏极区上方的所述保护层钻第二通孔；
提供第一接触电极和第二接触电极，将所述第一接触电极穿过所述第一通孔与所述源极区相连，以及将所述第二接触电极穿过所述第二通孔与所述漏极区相连。
所述的薄膜晶体管的制备方法，其中，在所述缓冲层的表面制作第一凹槽以及在所述栅极绝缘层的表面制作第二凹槽的方法为湿法刻蚀或激光刻蚀。
所述的薄膜晶体管的制备方法，其中，对所述缓冲层的表面进行平坦化以及对所述栅极绝缘层的表面进行平坦化的方法为化学机械研磨。
所述的薄膜晶体管的制备方法，其中，所述半导体层为多晶硅层，所述离子为硼离子或磷离子。
所述的薄膜晶体管的制备方法，其中，所述缓冲层的材料为氧化硅、氮化硅、氧化铝、氮化铝、聚酰亚胺、聚酯或丙烯的一种。
有益效果：本发明提供的一种薄膜晶体管及其制备方法，所述薄膜晶体管包括基板，以及依次层叠设置在基板上的缓冲层和栅极绝缘层，其中，缓冲层与栅极绝缘层接触的表面设置有第一凹槽，第一凹槽内设置有栅极层；栅极绝缘层背离缓冲层的表面设置有第二凹槽，第二凹槽内设置有半导体层，半导体层包括源极区，漏极区和沟道区。本发明的薄膜晶体管由于在基板的表面设置有缓冲层，栅极层可以设置在缓冲层的第一凹槽内，且在栅极绝缘层上设置有第二凹槽，半导体层设置第二凹槽内，充分利用了缓冲层和栅极绝缘层的内部空间，薄膜晶体管的结构紧凑，表面可以做得更加平整，后续布线更加方便。
附图说明
图1为本发明一种薄膜晶体管的剖面结构图；
图2为本发明一种薄膜晶体管的制备方法的流程框图。
具体实施方式
本发明提供了一种薄膜晶体管及其制备方法，为使本发明的目的、技术方案及效果更加清楚、明确，以下对本发明进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。
参见图1，本发明提供了一种薄膜晶体管，包括基板10，以及依次层叠设置在所述基板10上的缓冲层20和栅极绝缘层30；
所述缓冲层与所述栅极绝缘层接触的表面设置有第一凹槽，所述第一凹槽内设置有栅极层40；
所述栅极绝缘层背离所述缓冲层的表面设置有第二凹槽，所述第二凹槽内设置有半导体层50，所述半导体层包括源极区60，漏极区70，以及设置在所述源极区和所述漏极区之间的沟道区80。
其中，漏极区和源极区的半导体材料为掺杂半导体材料，漏极区和源极区的半导体材料进行掺杂能够有效的降低源极区、漏极区与沟道区之间电阻，从而提高薄膜晶体管的电性。
在一种具体的实施方式中，所述栅极绝缘层和所述半导体层上覆盖有保护层90。保护层的作用在于对栅极绝缘层的表面进行封装，隔绝外部空气，延长晶体管的使用寿命。
在一种具体的实施方式中，所述薄膜晶体管还包括第一接触电极100和第二接触电极110，所述漏极区上方的所述保护层上设置有第一通孔，所述漏极区上方的保护层上设置有第二通孔，所述第一接触电极穿过所述第一通孔与所述源极区相连，所述第二接触电极穿过所述第二通孔与所述漏极区相连。
薄膜晶体管是一种绝缘栅场效应晶体管，具体工作时，当栅极施以正电压,栅极电压在栅极绝缘层中产生电场，电力线由栅电极指向半导体表面，并在表面处产生感应电荷，随着栅极电压增加，半导体表面将由耗尽层转变为电子积累层，形成反型层，当达到强反型时，源极和漏极间加上电压就会有载流子通过沟道，当源漏电压很小时，导电沟道近似为一恒定电阻，漏电流随源漏电压增加而线性增大，当源漏电压很大时，会对栅极电压产生影响，使得栅绝缘层中电场由源端到漏端逐渐减弱，半导体表面反型层中电子由源端到漏端逐渐减小，沟道电阻随着源漏电压增大而增加，漏电流增加变得缓慢，对应线性区向饱和区过渡，当源漏电压增到一定程度，漏端反型层厚度减为零，电压增加，器件进入饱和区。
此外，参见图2，本发明还提供了一种薄膜晶体管的制备方法，包括步骤：
S100、提供一基板，在所述基板上生长缓冲层，并在所述缓冲层的表面制作第一凹槽；具体的，所述基板可以为刚性基板(玻璃)或柔性基板(PET)，所述缓冲层的厚度需要达到一定阈值，从而保证具有足够容纳栅极层的空间，并且设置所述缓冲层还可以使的基板平坦化，有效地防止杂质或水分从基板渗透；
S200、在所述第一凹槽中沉积栅极层，并对所述缓冲层的表面进行平坦化，使所述缓冲层的表面与所述栅极层的表面齐平；具体的，栅极层的材料可以为金属(比如铜、铝、钨、金和银等)，导电半导体材料(比如掺杂的多晶硅)；
S300、在所述缓冲层和所述栅极层的表面沉积栅极绝缘层，并在所述栅极绝缘层的表面制作第二凹槽；其中，栅极绝缘层包括无机材料(比如氧化物材料(SiO2)和氮化物材料(SiNx))，栅极绝缘层同样要达到一定厚度以保证具有能够容纳半导体层的空间；
S400、在所述第二凹槽中沉积半导体层，并对所述栅极绝缘层的表面进行平坦化，使所述栅极绝缘层的表面与所述半导体层的表面齐平；其中，半导体层的材料包括非晶硅、低温多晶硅、氧化物(比如In-Ga系氧化物、In-Zn系氧化物和In-M-Zn系氧化物，其中M可以是Al、Ga、Y、La等)和化合物半导体(比如SiGe和GaAs)；
S500、向所述半导体层的两端注入离子，形成源极区和漏极区。
具体来说，如果第一接触电极(源电极)和第二接触电极(漏电极)直接和半导体层接触，则接触位置会产生很大的接触电阻，本发明技术方案源极区和漏极区的半导体层是进行了离子掺杂的，这样做的好处是无需在半导体层的左右两端的上方设置欧姆接触层(欧姆接触层一般采用紫外光照射的金属氧化物制成)便可起到减小接触电阻的作用，由于不存在欧姆接触层，器件表面可以设置的更加平整，本发明的薄膜晶体管通电工作时，当栅极加上电压，半导体层会形成反型层，源极与漏极通过半导体中的反型层联通，替代现有通过欧姆接触层连接半导体层的方案，能够实现台阶的最小化。
在一种具体实施方式中，所述步骤S500之后还包括：
S600、在所述栅极绝缘层和所述半导体层上沉积保护层。保护层也可以采用绝缘材料制成，具体的，比如氧化物材料和氮氧化物材料，保护层的作用在于对栅极绝缘层的表面进行封装，隔绝外部空气，延长晶体管的使用寿命。
在一种具体实施方式中，所述步骤S600之后还包括：
S700、对所述源极区上方的所述保护层钻第一通孔，以及对所述漏极区上方的所述保护层钻第二通孔；
S800、提供第一接触电极和第二接触电极，将所述第一接触电极穿过所述第一通孔与所述源极区相连，以及将所述第二接触电极穿过所述第二通孔与所述漏极区相连。
在一种具体实施方式中，在所述缓冲层的表面制作第一凹槽以及所述在所述栅极绝缘层的表面制作第二凹槽的方法为湿法刻蚀或激光刻蚀。具体的，湿法蚀刻是指通过光罩(mask)将图形复制到缓冲层和栅极绝缘层上，然后通过化学试剂进行显影/刻蚀形成第一凹槽和第二凹槽，激光刻蚀则是通过激光在缓冲层和栅极绝缘层的表面烧蚀出第一凹槽和第二凹槽的形状，具体可以根据实际需要进行选择。
在一种具体实施方式中，对所述缓冲层的表面进行平坦化以及对所述栅极绝缘层的表面进行平坦化的方法为化学机械研磨法。化学机械研磨又称为化学机械抛光，其原理是化学腐蚀作用和机械去除作用相结合的加工技术，在本发明技术方案中，化学机械研磨的作用是除去缓冲层表面沉积的多余栅极材料并使得缓冲层的表面与栅极层的表面齐平，以及除去栅极绝缘层的表面多余的半导体材料并使得栅极绝缘层的表面和半导体层的表面齐平。
在一种具体实施方式中，所述半导体层为多晶硅层，所述离子为硼离子或磷离子。掺杂硼离子或磷离子是通过控制注入时的电学条件(电流、电压)精确控制注入的浓度和结深，便于实现对掺杂离子分布的控制，缠在的作用在于提高第一接触半导体层的源极区和漏极区的电化学活性，降低接触电阻。
在一种具体实施方式中，所述缓冲层的材料为氧化硅、氮化硅、氧化铝、氮化铝、聚酰亚胺、聚酯或丙烯的一种。具体来说，缓冲层的材料可以采用无机材料也可以采用有机材料，缓冲层的作用是形成栅极的第一凹槽空间和防止杂质或水分从基板渗透。
实施例1：
本发明一种具体的薄膜晶体管制备方法：
提供一刚性基板，在刚性基板上生长一层氮化硅缓冲层，通过曝光/蚀刻方式在氮化硅缓冲层上形成第一凹槽，在第一凹槽中沉积铜栅极层，并通过化学机械研磨的方法使铜栅极层的表面与氮化硅缓冲层的表面齐平，在氮化硅缓冲层上沉积二氧化硅栅极绝缘层，使得二氧化硅栅极绝缘层覆盖铜栅电极和氮化硅缓冲层，之后通过曝光/蚀刻方式在二氧化硅栅极绝缘层上形成第二凹槽，在第二凹槽中沉积多晶硅半导体层，通过化学机械研磨的方法使二氧化硅栅极绝缘层的表面与多晶硅半导体层的表面齐平，最后向多晶硅半导体层的两端注入硼离子，形成源极区和漏极区。
实施例2：
本发明另一种具体的薄膜晶体管制备方法：
提供一柔性基板，在柔性基板上生长一层二氧化硅缓冲层，通过激光刻蚀的方式在二氧化硅缓冲层上形成第一凹槽，在第一凹槽中沉积金栅极层，通过化学机械研磨的方法使金栅极层的表面与二氧化硅缓冲层的表面齐平，在氮化硅缓冲层上沉积氮化硅栅极绝缘层，使得二氧化硅栅极绝缘层覆盖铜栅电极和氮化硅缓冲层，之后通过激光刻蚀的方式在氮化硅栅极绝缘层上形成第二凹槽，在第二凹槽中沉积多晶硅半导体层，通过化学机械研磨的方法使氮化硅栅极绝缘层的表面与多晶硅半导体层的表面齐平，最后向多晶硅半导体层的两端注入磷离子，形成源极区和漏极区。
综上所述，本发明提供的一种薄膜晶体管及其制备方法，所述薄膜晶体管包括基板，以及依次层叠设置在基板上的缓冲层和栅极绝缘层，其中，缓冲层用于与栅极绝缘层接触的表面设置有第一凹槽，第一凹槽内设置有栅极层；栅极绝缘层背离缓冲层的表面设置有第二凹槽，第二凹槽内设置有半导体层，半导体层包括源极区，漏极区和沟道区。本发明的薄膜晶体管由于在基板的表面设置有缓冲层，栅极层可以设置在缓冲层的第一凹槽内，且在栅极绝缘层上设置有第二凹槽，半导体层设置第二凹槽内，充分利用了缓冲层和栅极绝缘层的内部空间，薄膜晶体管的结构紧凑，表面可以做得更加平整，后续布线更加方便。
应当理解的是，本发明的应用不限于上述的举例，对本领域普通技术人员来说，可以根据上述说明加以改进或变换，所有这些改进和变换都应属于本发明所附权利要求的保护范围。

Claims (10)

1.一种薄膜晶体管，其特征在于，包括基板，以及依次层叠设置在所述基板上的缓冲层和栅极绝缘层；
所述缓冲层与所述栅极绝缘层接触的表面设置有第一凹槽，所述第一凹槽内设置有栅极层；
所述栅极绝缘层背离所述缓冲层的表面设置有第二凹槽，所述第二凹槽内设置有半导体层，所述半导体层包括源极区，漏极区，以及设置在所述源极区和所述漏极区之间的沟道区。
2.根据权利要求1所述的薄膜晶体管，其特征在于，所述栅极绝缘层和所述半导体层上覆盖有保护层。
3.根据权利要求2所述的薄膜晶体管，其特征在于，还包括第一接触电极和第二接触电极，所述漏极区上方的所述保护层上设置有第一通孔，所述漏极区上方的保护层上设置有第二通孔，所述第一接触电极穿过所述第一通孔与所述源极区相连，所述第二接触电极穿过所述第二通孔与所述漏极区相连。
4.一种薄膜晶体管的制备方法，其特征在于，包括步骤：
提供一基板，在所述基板上生长缓冲层，并在所述缓冲层的表面制作第一凹槽；
在所述第一凹槽中沉积栅极层，并对所述缓冲层的表面进行平坦化，使所述缓冲层的表面与所述栅极层的表面齐平；
在所述缓冲层和所述栅极层的表面沉积栅极绝缘层，并在所述栅极绝缘层的表面制作第二凹槽；
在所述第二凹槽中沉积半导体层，并对所述栅极绝缘层的表面进行平坦化，使所述栅极绝缘层的表面与所述半导体层的表面齐平；
向所述半导体层的两端注入离子，形成源极区和漏极区。
5.根据权利要求4所述的薄膜晶体管的制备方法，其特征在于，所述步骤向所述半导体层的两端注入离子，形成源极区和漏极区之后还包括：在所述栅极绝缘层和所述半导体层上沉积保护层。
6.根据权利要求5所述的薄膜晶体管的制备方法，其特征在于，所述步骤在所述栅极绝缘层和所述半导体层的表面沉积保护层之后还包括：
对所述源极区上方的所述保护层钻第一通孔，以及对所述漏极区上方的所述保护层钻第二通孔；
提供第一接触电极和第二接触电极，将所述第一接触电极穿过所述第一通孔与所述源极区相连，以及将所述第二接触电极穿过所述第二通孔与所述漏极区相连。
7.根据权利要求4所述的薄膜晶体管的制备方法，其特征在于，在所述缓冲层的表面制作第一凹槽以及在所述栅极绝缘层的表面制作第二凹槽的方法为湿法刻蚀或激光刻蚀。
8.根据权利要求4所述的薄膜晶体管的制备方法，其特征在于，对所述缓冲层的表面进行平坦化以及对所述栅极绝缘层的表面进行平坦化的方法为化学机械研磨。
9.根据权利要求4所述的薄膜晶体管的制备方法，其特征在于，所述半导体层为多晶硅层，所述离子为硼离子或磷离子。
10.根据权利要求4所述的薄膜晶体管的制备方法，其特征在于，所述缓冲层的材料为氧化硅、氮化硅、氧化铝、氮化铝、聚酰亚胺、聚酯或丙烯的一种。
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Application publication date: 20200515