CN111052375A - 用于电容性隔离器件的结构和方法 - Google Patents
用于电容性隔离器件的结构和方法 Download PDFInfo
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- CN111052375A CN111052375A CN201880055331.1A CN201880055331A CN111052375A CN 111052375 A CN111052375 A CN 111052375A CN 201880055331 A CN201880055331 A CN 201880055331A CN 111052375 A CN111052375 A CN 111052375A
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- conductors
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Abstract
所描述的示例包括封装器件(100),封装器件(100)包括彼此间隔开间隙(110)的第一物体(101)和第二物体(102)。每个物体具有第一表面(101a、102a)和相对的第二表面(101c、102c)。第一表面(101a、102a)包括第一端子(101b、102b)。结构(120)包括嵌入在电介质壳体(130)中的至少两个导体(121),电介质壳体巩固至少两个导体(121)的构造和组织。至少两个导体(121)具有未被电介质壳体(130)嵌入的端部部分。至少两个导体(121)中的至少一个的端部部分电连接到第一物体(101)的第一端子(101b),并且至少两个导体(121)中的至少一个的相对的端部部分电连接到第二物体(102)的相应的第一端子(102b)。至少两个导体(121)电连接第一物体(101)和第二物体(102)。
Description
技术领域
本发明总体涉及半导体器件和工艺,并且更具体地涉及半导体器件的结构和制造方法。
背景技术
将半导体管芯的器件端子连接到基板的两种常用方法为引线键合和倒装芯片焊料附接。在引线键合中,细长的金属引线在一个引线端上具有球形键合,而在相对的引线端具有针脚式键合。在引线键合技术中,使用直径为约18μm至33μm的圆形铜线、金线或铝线。
尽管键合引线金属能够通过与其他金属合金化来***,但是在使用中,键合引线在其自重的作用下会下垂,特别是在跨越长的管芯到基板或管芯到管芯的距离的键合引线中。下垂的键合引线又会改变环轮廓,尤其是弯曲和扭结。
此外,在后续处理中,诸如在将管芯封装到塑料包装中而进行的传递模塑操作中,键合引线环有时会在机械压力下侧向偏移。引线偏移改变电气特性,甚至导致相邻键合引线之间短路。模塑操作还能够更改键合引线环轮廓和管芯到引线的距离。因此,期望改进。
发明内容
在描述的示例中,封装器件包括彼此间隔开间隙的第一物体和第二物体,每个物体具有第一表面和相对的第二表面,第一物体和第二物体的第一表面包括第一端子。一种结构包括至少两个导体,所述至少两个导体嵌入在电介质壳体中,电介质壳体巩固至少两个导体的构造和组织,所述至少两个导体的端部部分未被电介质壳体嵌入。至少两个导体中的至少一个的端部部分焊接到第一物体的第一端子,并且至少两个导体中的至少一个的相对的端部部分焊接到第二物体的相应的第一端子,至少两个导体电连接第一物体和第二物体。在另一个所描述的示例中,封装器件是数字隔离器,其中第一半导体管芯用作调制器,第二半导体管芯用作接收器,并且具有嵌入式导体的隔离电容器用作调谐的传输线。
附图说明
图1是示例布置的横截面,该示例布置包括具有嵌入在电介质中的预形成导体的结构。
图2是另一示例布置的横截面,该示例布置具有第一集成电路管芯、单独的第一电容器和第二集成电路管芯,其中合并的第二电容器通过嵌入在电介质壳体中的预形成导体互连。
图3是高速隔离器的横截面,该高速隔离器采用嵌入在电介质壳体中的预形成导体的布置来耦合被间隙隔开的隔离的集成电路管芯。
图4是又一布置的横截面,该布置具有包括嵌入在电介质壳体中的预形成导体的结构,其中第一半导体管芯和第二半导体管芯通过倒装芯片技术焊接到导体,并且该结构嵌入在层压结构中。
图5是详细示出焊料附接的横截面,焊料附接用于将嵌入在电介质壳体中的预形成导体附接到带有铜柱的管芯端子。
图6是用于形成包含嵌入在电介质壳体中的预形成导体的结构的示例工艺流程的流程图。
图7是用于通过包含嵌入在电介质壳体中的组织的多个预形成导体的结构连接第一集成电路管芯和第二集成电路管芯的另一示例工艺流程的流程图。
图8是组装在导线框上并采用传输线结构的高速数字隔离器的透视图,该传输线结构具有将调制器管芯和接收器管芯互连的组织的多个预形成导体。
图9A是作为频率(以GHz为单位)的函数的***损耗S11(以dB为单位)的建模数据的曲线图。
图9B是作为频率(以GHz为单位)的函数的***损耗S21(以dB为单位)的建模数据的曲线图。
图10是作为频率(以GHz为单位)的函数的***损耗(以dB为单位)的实验数据的曲线图。
具体实施方式
在附图中,除非另外指出,否则相应的数字和符号通常指代相应的部件。附图不一定按比例绘制。
图1是示例布置100的截面,该布置100包括彼此间隔开间隙110的第一物体101和第二物体102。每个物体具有第一表面和相对的第二表面。在图1中,物体101的第一表面被标记为101a,并且相对的第二表面被标记为101c;第二物体102的第一表面是102a,并且第二物体的第二表面是102c。在示例中,物体可以是半导体管芯。在替代示例中,物体101和102可以是由层压塑料制成的实心六面体形状的载体。物体可对电、磁或光学影响敏感。
如图1进一步所示,物体101和物体102的第一表面包括第一端子:第一表面101a包括第一端子101b,并且第一表面102a包括端子102b。端子101b、102b可包括在端子上的可焊冶金。作为示例,第一端子101b和102b可以包括具有锡或镍/钯表面或者镍/钯/金表面的铜垫。化学镀镍浸金(ENIG)和化学镀镍化学钯浸金(ENEPIG)镀层能够形成可焊冶金。(图5和下文中的所附文本将更详细地描述,在替代示例中,可焊冶金可以包括被焊料覆盖的铜柱。铜柱可以是形成在端子上并被焊料覆盖的竖直柱。)
物体101和102的第一表面分别包括第二端子101d和102d。第二端子101d、102d可以包括用于引线球形键合的冶金。作为示例,第二端子101d、102d可以包括铝垫或具有铝表面的铜垫。第二端子可以包括与引线键合兼容的附加涂层(未示出)。
器件100包括结构120,该结构是由嵌入在由不导电材料(例如电介质材料)制成的壳体130中的电导体121组成的预制零部件。导体121是导电材料,诸如像铜、铜合金的金属,或可替代地为碳纳米管。导体121可以形成为引线或导电条。如图1所示,每个导体121在截面图中可以呈现为U形。在图1中,导体包括中间节段121c、第一延伸节段121a和第二延伸节段121b。尽管在该示例中中间节段121c是细长的并且是笔直的,但是第一延伸节段121a和第二延伸节段121b各自与中间节段形成角度。作为示例,第一延伸节段121a和第二延伸节段121b可以与中间节段121c形成直角。在图1中,延伸节段121a、121b与中间节段形成相同的角度,并在相同方向上远离中间节段121c延伸,使得在该示例中,第一延伸节段121a和第二延伸节段121b相对于彼此平行地布置。在替代示例中,第一延伸节段121a和第二延伸节段121b能够以不同的角度与中间节段121c相交,并且能够在不同的方向上从中间节段121c延伸。延伸节段121a、121b还包括未被壳体130嵌入的端部部分(在图1中不可见,但是在101b处接触物体101且在102b处接触物体102)。在示例中,延伸节段121a、121b的端部部分可以包括可焊冶金。(下面将结合图5的描述进一步描述延伸节段端部部分与物体101和102的第一端子的焊料附接)。导体121的延伸节段121a、121b的端部部分从壳体130的电介质材料暴露,以使得能够进行电气和机械连接。延伸节段121a、121b的端部部分与壳体130的表面共面。
在示例布置中,结构120的壳体130由电绝缘的电介质聚合物制成,该电介质聚合物是弹性的,但能够在嵌入过程中固结或“冻结”导体(参见下文进一步的细节)。因此,诸如121的每个分立导体的构造以及结构120内的导体的组织被永久地固定并且不会被诸如用于形成器件包装的传递模塑之类的连续工艺改变。导体能够以相等的间隔布置并且在相同方向上对准以形成平行导体。在替代示例中,导体能够以各种距离间隔开,并且能够在不彼此平行的情况下被组织和固定在适当的位置。
在图1中,器件100还包括基板150,基板150包括金属垫151,第一物体101的第二表面101c能够诸如通过粘合剂层141附接在金属垫151上。此外,基板150提供金属垫152,第二物体102的第二表面102c能够诸如通过粘合剂层142附接在金属垫152上。基板150还提供用于将器件100的端子连接到外部实体所需的导线163。垫151和152可以是基板150的部分,基板150可以是具有导线163的导线框。
如图1所示,物体101和102还包括适于引线球形键合的第二端子101d和102d。例如,第二端子101d和102d包括用于引线键合的冶金。对于物体101,第二端子被标记为101d并且位于第一表面101a上。对于物体102,第二端子被标记为102d并且位于第一表面102a上。对于铜线键合和金线键合,第二端子的合适金属化包括铝。通过引线键合工艺形成的引线环160将第二端子101d、102d与基板150的导线163连接,以连接至外部实体。
为了形成诸如图1所示的引线键合,引线键合工艺开始于将半导体芯片定位在加热的基座上,以将温度升高到150℃至300℃之间。使用自动引线键合器,将键合引线穿过毛细管,并且在引线的前端,使用火焰或火花技术形成无空气球。球的直径通常为约1.2到1.6引线直径。毛细管移向管芯键合垫,并且球被压向垫的金属化层。取决于球和垫的金属,压缩力和超声能量的结合产生金属相互扩散或金属间化合物,并形成牢固的冶金键合。接下来,毛细管垂直向上移动以在球形键合处的键合引线中容纳机械弱的热影响区。随着毛细管的移动,引线从球和垫延伸。
此后,计算机化的引线键合器使毛细管在空气中移动,以将引线引导到限定形状的预定环中,该限定形状包括弯曲、笔直的伸展和扭结,以跨越到基板键合垫的距离。毛细管下降,急剧弯曲,并以掠射角度接近基板键合垫以接触该垫。借助毛细管的压印(大约是引线直径的1.5到3倍),形成冶金针脚式键合,然后将键合引线断开以释放毛细管。
从对材料和工艺参数的简短描述中可以得出,特别长的键合引线环可相对于引线轮廓和构造、环高度、引线环变形、引线偏移以及相对于引线键合与电介质材料变化之间的耦合敏感,因为这些变量影响高频应用所需的电气性能。
具有嵌入式连接器121的结构120通过使用连接器121的端部部分使多个物体互连。图1示出了第一物体101与第二物体102的互连,第一物体101与第二物体102彼此间隔开间隙110(并且图2和下文中的所附文本讨论另外的互连)。在图1中,导体121的延伸节段121a的端部部分焊接到第一物体101的第一端子101b,并且导体121的延伸节段121b的相对的端部部分焊接到第二物体102的相应的第一端子102b。在焊料附接之后,结构120内部的导体121跨间隙110连接第一物体101和第二物体102。即使对于在毫米和厘米范围内延伸的间隙110,嵌入在结构120中的连接器121也建立第一物体101和第二物体102的稳固电连接。在示例中,第一物体101和第二物体102是包括电路的半导体管芯。在替代示例中,第一物体101和第二物体102可以是无源电路器件。
为了说明另一示例布置,图2是用于高速隔离器的封装器件200的横截面。如本文所述,低频信号可以例如小于30MHz。高频信号例如可以大于30MHz并且高达300MHz。虽然对于直流(DC)信号,电介质材料的物体能够将电路与其他电气***隔离,但对于高频信号,电路的隔离应阻止电路之间的低频信号,但允许通过使用电磁或光学链路进行高频模拟或数字信号传输。考虑隔离电路的效率时,等式(1)的一般能量考虑成立:
E输入=E反射+E发射+E吸收 (1)
耦合隔离电路的能量损耗可以通过互补能量比表示为***损耗,如等式(2)和等式(3)所示:
***损耗S11=E反射/E输入 (2)
***损耗S21=E发射/E输入 (3)
为了跨隔离势垒传输信息,电容耦合使用变化的电场。电容耦合中电容器板之间的材料是形成隔离势垒的电介质绝缘体。电容耦合的电容由尺寸、板之间的距离和材料特性来表征。由于电容性隔离势垒的尺寸、能量传递和对磁场的抵抗力,电容性隔离势垒显示出高效率。然而,由于噪声和信号共享相同的传输路径,因此信号频率必须远高于噪声频率,使得电容耦合中的电容对信号具有相对低的阻抗,而对噪声具有对应的相对高的阻抗。这些信号频率是相对高的频率。
图2是用于形成高速隔离器200的封装器件的布置的截面图。在图2中,第一半导体集成电路管芯201与单独的第一电容器203间隔开间隙240,并且第一电容器203与第二半导体集成电路管芯202间隔开间隙210。在图2的示例中,间隙210大于间隙240。在替代布置中,第一电容器203能够与第一管芯201集成在一起,使得间隙240不存在。与第二管芯202集成的是具有端子202b的第二电容器204;第一电容器203也具有端子203b。在示例中,端子202b和第一电容器203的端子203b包括可焊冶金。在另外的布置中,第二电容器204可以不与第二管芯集成,而是与第二管芯通过间隙分开。第一管芯201的保护涂层具有第一表面201a,并且第二管芯202的保护涂层具有第一表面202a。第一管芯201的相对的第二表面201c和第二管芯202的相对的第二表面202c组装在基板250上。在一个示例中,基板250是具有用于安装部件的组装垫的金属导线框。在替代布置中,基板250可以是导电粘合聚合物层。导线框250还提供用于外部连接的导线263。半导体管芯201和202通常是硅,但是可以是任何其他半导体材料,诸如氮化镓和砷化镓。外延层能够形成半导体材料。
在图2中,第一管芯201和第二管芯202的第一表面包括第一端子。第一表面201a包括第一端子201b,并且第一表面202a包括第一端子202b(其能够与电容器端子204b组合)。在示例中,第一端子201b和第一端子202b可以包括可焊冶金。作为示例,第一端子201b和202b可以包括具有锡或镍/金、镍/钯或镍/钯/金表面的铜垫。(图5和下文中的所附文本更详细地描述了可焊冶金还可包括被焊料覆盖的铜柱。铜柱可以包括从管芯201、202的表面延伸并被焊料覆盖的竖直柱。)在图2的电容隔离器中,第一管芯201和202的第一表面分别包括第二端子201d和202d。第二端子可以包括适合于引线球形键合的冶金。作为示例,第二端子201d、202d可以包括铝垫或具有铝表面的铜垫。
如图2所示,电容性隔离器200包括具有电导体(分别为221、271)的结构(220、270),电导体(分别为221、271)嵌入电介质壳体(分别为230、280)中以连接部件。在此示例中,示出两个结构。在替代布置中,可以使用许多结构。壳体230和280的宽度可以相等,或者可以不同,如图2所示。每个导体271、221具有未被壳体嵌入的端部部分。每个导体的构造和导体的组织都固定(“冻结”)在所选结构的电介质壳体中,使得这些结构充当调谐的传输线,从而减少或最小化任何***损耗。对于给定的传输信号频率ω,可以通过根据等式(4)的关系相关的导体的电阻R、电感L、电导G和杂散电容C来确定每个导体的阻抗Z,从而确定信号完整性和传输线:
Z=[(R+iωL)/(G+iωC)]1/2 (4)
等式(4)意味着,通过选择导体的几何形状、角度和接近度,可以通过将导体嵌入电介质壳体中并因此最终确定结构来获得可接受的杂散电容值C并将其关于导体尺寸和分布冻结。该结构可以被制造为用于与隔离器200的其余部件组装的预制部件。在组装这些部件之后,可以将传递模塑与热塑性树脂模塑化合物一起使用以形成封装器件200。在另一替代方法中,可以使用室温模塑化合物或可以使用其他树脂或环氧树脂来形成封装的隔离器器件200。
图3是使用电容性隔离器连接调制器和接收器的另一种布置的截面图。在图3中,具有其第一端子301b的第一管芯(调制器)301和具有其第一端子302b的第二管芯(接收器)302由间隙310隔开。端子301b和302b可以具有或可以不具有可焊冶金。第一电容器被标记为303,并且第二电容器被标记为304。两个电容器都具有端子(分别为303b和304b)。在示例中,端子可以包括可焊冶金。图3指示在嵌入在结构320的电介质壳体330中的导体321与第一管芯301、第二管芯302和支撑管芯的基板350之间的杂散电容器390。
如上所述,导体的构造和导体在诸如320的结构的电介质壳体内部的定位将杂散电容保持在稳定且可接受的范围内。用固定导体制造结构的工艺包括形成导体321的步骤。如图3所示,导体的横截面可以是U形的,其包括中间节段321c以及与中间节段成一定角度连接的第一延伸节段(321a)和第二延伸节段(321b),导体具有端部部分。可以通过以下方式来组织导体:通过以预定距离按对齐或平行构造布置导体,以及通过将导体嵌入电介质化合物中来巩固组织的导体,同时使导体的端部部分不被嵌入。在示例中,端部部分包括可焊冶金。导体的延伸节段与中间节段的角度在图1、图2、图3、图4、图5和图8中被描绘为与导体的中间节段成直角,但锐角和钝角是可接受的。在其他示例中,对于结构中的不同导体,角度可以是不同的角度。在另外的示例中,所选导体的第一延伸节段和第二延伸节段相对于中间节段的角度可以彼此不同。
图4是使用焊料凸块和倒装芯片技术的器件400的另一示例布置的截面图。第一半导体管芯401和第二半导体管芯402彼此间隔开间隙410。每个管芯具有第一表面(分别为401a、402a)和相对的第二表面(分别为401c、402c);管芯401的第一表面包括可焊冶金的第一端子401b,管芯402的第一表面包括相应的第一端子402b。每个第一端子包括诸如锡合金的焊料423的凸块或球。焊料可以是无铅焊料。
器件400包括结构420,该结构420包纳导体421。导体421嵌入在电介质壳体430中,电介质壳体430用于巩固导体421的构造和组织。在图4中,导体421具有端部部分422,端部部分422具有未被壳体430嵌入的表面422a并且因此从壳体430暴露。在示例中,表面422a具有可焊冶金。可焊冶金可以包括锡的表面层或包含镍层、钯层和金层的层的堆叠。除了可焊冶金之外,端部部分422可具有与导体421的构造不同的构造;作为示例,端部部分422可具有大于导体421的直径,如图4所示。
为了将端部部分422连接到器件401、402,将焊球423放置在端部端子422上。然后对焊球423进行回流工艺。每个导体421的端部部分422焊接到第一管芯401的第一端子401b,并且每个导体421的相对的端部部分焊接到第二管芯402的相应的第一端子402b。以这种方式,第一管芯401和第二管芯402倒装芯片附接到导体421,并且导体421的部分延伸跨过管芯之间的间隙410,并且导电地连接第一管芯和第二管芯。倒装附接的管芯401、402在表面401a、402a上具有有源电路(未示出),并且在图4的取向上被示出为“倒装”或面朝下。
类似于上文所描述的考虑,导体的构造和导体在电介质壳体430内的定位将杂散电容保持在稳定且可接受的范围内。用固定导体制造结构的过程包括将引线形成为导体421的步骤。在示例中,导体可具有U形截面,其包括中间节段421c以及与中间节段成一定角度连接的第一延伸节段(421a)和第二延伸节段(421b);角度可以是法角、锐角或钝角。在以预定距离按期望的构造组织导体421之后,通过将导体嵌入电介质化合物中以形成结构来巩固所组织的导体。结构420可以是柔性的,并且可以看起来类似于塑料带。
在图4的示例中,结构420包括***由层压层制成的基板490中的导体421的布线。图4示出结构420,其中其布线结构嵌入在基板490中,并且管芯401和402倒装附接到结构420上。管芯401、402的第二表面(分别为401c、402c)背向结构420,并且可用于进一步处理,诸如附接散热器。也可以使用模塑化合物诸如环氧树脂模塑化合物来封装组件400以形成封装器件。
图5是示出结合在图6和图7的流程图中描绘的示例性工艺流程描述的制造顺序的某些步骤的截面图。参照图6,在工艺流程的步骤601期间,将导电引线或导电条形成为导体(参见图5中的521)。导体521可以是整体上具有均匀直径的金属引线或金属条,或者导体521可以由不同直径的金属部分组成,如图5所示。中间节段521c可具有比第一延伸节段521a和第二延伸节段521b小的直径。第一延伸节段和第二延伸节段可包括可焊冶金。延伸节段中的至少一个可以与中间节段形成法角;替代地,可以选择锐角或钝角以最适合给定的几何形状,并减小或最小化导体的杂散电容和寄生电容。
在图6的工艺流程的步骤602中,导体521(图5)按照相互的间隔距离和平行性组织,使得导体的杂散电容和寄生电容最小化。下文描述的图8是示例布置800的三维视图,该示例布置800包括在结构820中的组织的多个导体821。再次参照图6,在下一工艺步骤603中,通过将导体包封在电介质塑料化合物(图5中的530)中来巩固这些组织的导体。因为结构520可以是柔性的并且相对薄,所以它可以看起来类似于带。优选的塑料化合物材料是聚酰亚胺化合物。如所表达的,导体被冻结在电介质化合物520中。然而,要小心以使导体521的端部部分(图5中的521d)不被包封以用于与其他部件进行连接。
参照图7中的流程图的示例方法,在工艺流程的步骤701中,提供具有至少一个端子的第一半导体管芯(例如,图5中的501)和第二半导体管芯(图5中的502)。端子可包括如上所述的可焊冶金。如图5的示例布置所示,第一管芯501的表面501a具有端子结构,使得管芯金属化层501b被金属柱501c覆盖,而金属柱501c又被焊料盖501d覆盖。作为示例,金属化层501b和柱501c可以由铜制成。以类似的方式,第二管芯502的表面502a具有带有如下结构的端子,即:使得管芯金属化层502b被金属柱502c覆盖,而金属柱502c又被焊料盖502d覆盖的结构。焊料盖501d和502d将在组装工艺过程中在焊料回流温度下回流以连接到结构520的导体521的可焊接端部部分。如图5所示,柱501c、502c可以是竖直键合的柱或柱子,其远离表面501a、502a延伸并且具有焊料盖501d、502d。
再次参考图7,在工艺流程的步骤702期间,将第一管芯(图5中的501)和第二管芯(图5中的502)定位在基板的垫551上,使得第一管芯和第二管芯被间隙510间隔开。在示例布置中,该定位是通过使用粘合剂层541与垫进行稳定附接来实现的。在替代布置中,该定位是通过使用焊料层541进行稳定附接来实现的。
在图7的工艺流程的步骤703期间并且如图5所示,提供结构520,结构520包括嵌入在电介质壳体530中的组织的多个导体521。上文参考图6描述了制造这种结构的工艺。如所指出的,导体的端部部分521d从壳体暴露。端部部分521d可以包括可焊冶金。
在图7的工艺流程的步骤704期间并且如图5所示,导体的端部部分521d焊接到第一管芯501的端子501c,并且导体的相对的端部部分521d焊接到第二管芯502的相应端子502c。如图5所示,在完成焊接工艺之后,结构520的一部分延伸跨过将管芯501和管芯502隔开的间隙510,并且管芯501和管芯502导电连接。在图8的布置中具有将导体巩固在电介质壳体中的结构的示例被示为820。结构820具有延伸跨过两个组装的半导体管芯之间的宽间隙的一部分,并且结构820中的导体将管芯导电连接。
图8以投影图示出了用于封装器件800的示例布置,该封装器件800包括用于电容性隔离技术的嵌入式布线结构。器件800可以被封装在模塑化合物诸如热塑性塑料、树脂或其他电介质材料中。导线框850的导线端暴露并未被封装,从而形成用于与器件800电接触并将器件800安装到电路板上的导线863。可以作为调制器的第一半导体管芯801和可以作为接收器的第二半导体管芯802具有用于焊料附接的第一端子(801b、801b)和用于引线球形键合的第二端子(801d、802d)(参见上文结合图1、图2和图3的描述)。管芯801、802分别组装在金属导线框850的矩形垫851和852上,并通过间隙810彼此隔开。在各种示例中,导线框850可以由薄的基底金属片蚀刻或冲压而成,所述基底金属为诸如铜、铜合金、铁-镍合金、铝、KovarTM等,其通常的厚度为120μm至250μm。除了第一垫和第二垫之外,图8的导线框850提供多个导线863,以使各种电导体紧密靠近管芯。导线框850的导线和管芯的第二端子通过细键合引线860连接。
图8所示的结构820包括导体821,导体821被配置和组织为调谐的传输线并且嵌入在电介质壳体830中以巩固构造。如上所述,导体的端部部分不被壳体嵌入。导体的端部部分可以包括可焊冶金。导体的预定冻结形状(参见上文中的其他横截面)以及导体的平行排列避免了通常与常规引线键合中的球形键合和针脚式键合有关的高电场集中,以及任何与键合和封装工艺有关的随机的引线扭结和下垂。结果,电气寄生效应被最小化,并且杂散电阻、电感和电容得到了控制。在横截面中,导体821可以具有U形或倒U形。
如图8所示,导体821的端部部分焊接到第一管芯801的第一端子801b,并且导体的相对的端部部分焊接到第二管芯802的相应的第一端子802b。结构820的导体821的至少一部分延伸跨过间隙810,并且物理且电连接第一管芯801和第二管芯802。
对于高速隔离器,通过图9A、图9B和图10中显示的建模数据证明了使用具有预定导体的预制结构优于常规引线键合的优点。图9A显示了以dB表示的***损耗S11(反射能量与输入能量之比)与频率的函数关系。曲线901示出了在约4GHz宽度的窄预定频带中损耗下降到低值。相反,在相同的窄预定频带中,发射能量达到高值。在图9B中曲线902描绘了该对应关系,其中以dB表示的***损耗S21(发射能量与输入能量之比)被绘制为以GHz为单位的频率的函数。
对于电容性隔离技术中的器件,在图10中显示了发射器管芯和接收器管芯之间的***损耗的总体变化与频率的函数关系。数据比较了使用常规引线键合将发射器管芯跨接到相距较远的接收器管芯的器件(曲线1001)与使用带有作为布线结构的嵌入式连接器的预制结构以跨间隙将发射器管芯连接到相距较远的接收器管芯的器件(曲线1002)的***损耗随频率的变化。图10中的数据清楚地显示了带有嵌入式连接器的预制结构的优越性,该嵌入式连接器作为布线结构用于跨间隔或间隙连接发射器管芯和接收器管芯。
作为示例替代方案,在半导体技术中,除了使用焊料作为连接剂的器件之外,该布置还适用于使用导电粘合剂的器件。
作为另一示例,除了基于硅的半导体器件之外,该布置还适用于使用砷化镓、氮化镓、硅锗和工业中使用的任何其他半导体材料的器件。
作为另一个示例,除了使用导线框的器件之外,该布置还适用于使用层压基板和任何其他基板或支撑结构的器件。
在权利要求的范围内,可以对所描述的布置进行修改,并且其他附加布置也是可能的。
Claims (20)
1.一种器件,其包括:
彼此间隔开间隙的第一物体和第二物体,每个物体具有第一表面和相对的第二表面,所述第一物体和所述第二物体的所述第一表面包括第一端子;
结构,其包括嵌入在电介质壳体中的至少两个导体,所述电介质壳体巩固所述至少两个导体的构造和组织,所述至少两个导体具有未被所述电介质壳体嵌入的端部部分;以及
电连接到所述第一物体的第一端子的所述至少两个导体中的至少一个的端部部分,以及电连接到所述第二物体的相应的第一端子的所述至少两个导体中的所述至少一个的相对的端部部分,所述至少两个导体电连接所述第一物体和所述第二物体。
2.根据权利要求1所述的器件,其中,所述至少两个导体包括中间节段以及在所述中间节段的相对端部处的第一延伸节段和第二延伸节段,所述第一延伸节段和所述第二延伸节段与所述中间节段成一定角度。
3.根据权利要求2所述的器件,其中,所述第一延伸节段和所述第二延伸节段与所述中间节段形成直角。
4.根据权利要求1所述的器件,其中,所述电介质壳体包括弹性聚合物。
5.根据权利要求1所述的器件,其中,所述第一物体的所述第一端子和所述第二物体的所述第一端子包括竖直地键合至所述第一物体和所述第二物体的金属柱,所述金属柱由焊料层覆盖。
6.根据权利要求1所述的器件,其中,所述第一物体的所述第一端子和所述第二物体的所述第一端子包括焊料凸块。
7.根据权利要求1所述的器件,其中,所述第一物体和所述第二物体还包括具有用于引线球形键合的冶金的第二端子。
8.根据权利要求1所述的器件,还包括选自以下之一的基板:金属垫,所述第一物体和所述第二物体的所述第二表面附接在金属垫上;以及层压层,带有所述至少两个导体的所述结构嵌入在所述层压层中。
9.一种隔离器,其包括:
通过间隙隔开的第一调制器半导体管芯和第二接收器半导体管芯,所述第一半导体管芯和所述第二半导体管芯各自具有第一表面和相对的平行第二表面,所述第一表面包括部件并包括第一端子;
结构,其包括嵌入在电介质壳体中的至少两个导体,所述电介质壳体巩固作为调谐传输线的所述至少两个导体的构造和组织,并且所述至少两个导体具有未被所述电介质壳体嵌入的端部部分;以及
电连接到所述第一管芯的第一端子的所述至少两个导体中的至少一个的一个端部部分,以及电连接到所述第二管芯的相应的第一端子的所述至少两个导体中的至少一个的相对的端部部分,所述至少两个导体电连接所述第一管芯和所述第二管芯。
10.根据权利要求9所述的隔离器,其中,所述第一半导体管芯和所述第二半导体管芯还包括具有用于引线球形键合的冶金的第二端子。
11.根据权利要求9所述的隔离器,还包括具有垫和导线的金属导线框,所述垫的尺寸设置成用于附接所述第一半导体管芯和所述第二半导体管芯的所述第二表面。
12.根据权利要求11所述的隔离器,还包括将所述第二端子连接到所述导线框的相应导线的键合引线。
13.根据权利要求12所述的隔离器,还包括绝缘化合物的包装,所述包装封装所述半导体管芯、所述结构、所述键合引线以及所述导线框和所述金属导线的至少部分,从而使所述金属导线的剩余部分未被封装。
14.根据权利要求9所述的隔离器,还包括与所述第一半导体管芯和所述第二半导体管芯间隔开间隙的分立的隔离电容器,所述隔离电容器具有端子。
15.一种制造器件的方法,所述方法包括:
将第一物体和第二物体彼此间隔开间隙,所述第一物体和所述第二物体各自具有第一表面和相对的第二表面,所述第一表面包括第一端子;
提供结构,所述结构包括嵌入在电介质壳体中的至少两个导体,所述电介质壳体巩固所述至少两个导体的构造和组织,所述至少两个导体具有从所述电介质壳体暴露的所述至少两个导体的端部部分;以及
将所述至少两个导体中的至少一个的端部部分电连接到所述第一物体的第一端子,并且将所述至少两个导体中的所述至少一个的所述相对的端部部分电连接到所述第二物体的相应的第一端子,从而电连接所述第一物体和所述第二物体。
16.根据权利要求15所述的方法,其中,提供结构包括:
形成导体,所述导体包括中间节段以及在所述中间节段的相对端部处的第一延伸节段和第二延伸节段,所述第一延伸节段和所述第二延伸节段与所述中间节段成一定角度连接,所述导体各自具有端部部分;
以预定距离按平行构造组织所述导体;以及
通过将所述导体嵌入在电介质化合物中来形成巩固所组织的导体的结构,所述嵌入使所述导体的所述端部部分未被嵌入。
17.根据权利要求15所述的方法,其中,所述第一物体和所述第二物体是第一半导体管芯和第二半导体管芯,所述第一半导体管芯和所述第二半导体管芯包括具有可焊冶金的第一端子的部件。
18.根据权利要求17所述的方法,其中,所述第一半导体管芯是隔离器的调制器并且包括具有可焊冶金的端子的电容器,并且所述第二半导体管芯是所述隔离器的接收器并且包括具有可焊冶金的端子的电容器。
19.根据权利要求17所述的方法,其中,所述半导体管芯还包括第二端子,所述第二端子具有用于引线球形键合的冶金。
20.根据权利要求15所述的方法,其中,所述第一端子选自竖直键合到管芯端子的金属柱和焊料凸块。
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PCT/US2018/041540 WO2019014288A1 (en) | 2017-07-11 | 2018-07-11 | STRUCTURES AND METHODS FOR CAPACITIVE INSULATION DEVICES |
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US10916622B2 (en) * | 2017-09-28 | 2021-02-09 | Stmicroelectronics S.R.L. | High-voltage capacitor, system including the capacitor and method for manufacturing the capacitor |
US11605583B2 (en) | 2019-01-02 | 2023-03-14 | Keysight Technologies, Inc. | High-performance integrated circuit packaging platform compatible with surface mount assembly |
US11257771B2 (en) | 2019-01-02 | 2022-02-22 | Keysight Technologies, Inc. | High-performance integrated circuit packaging platform compatible with surface mount assembly |
US11121076B2 (en) | 2019-06-27 | 2021-09-14 | Texas Instruments Incorporated | Semiconductor die with conversion coating |
US11711894B1 (en) | 2022-02-03 | 2023-07-25 | Analog Devices International Unlimited Company | Capacitively coupled resonators for high frequency galvanic isolators |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20130168854A1 (en) * | 2011-12-28 | 2013-07-04 | Broadcom Corporation | Semiconductor Package with a Bridge Interposer |
CN103426873A (zh) * | 2012-05-25 | 2013-12-04 | 英飞凌科技股份有限公司 | 多芯片封装及其制造方法 |
CN105745752A (zh) * | 2013-10-30 | 2016-07-06 | 高通股份有限公司 | 基板中的嵌入式桥接结构 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5917242A (en) * | 1996-05-20 | 1999-06-29 | Micron Technology, Inc. | Combination of semiconductor interconnect |
US6670222B1 (en) * | 1997-06-14 | 2003-12-30 | Jds Uniphase Corporation | Texturing of a die pad surface for enhancing bonding strength in the surface attachment |
JP3759415B2 (ja) * | 2001-02-23 | 2006-03-22 | 株式会社ルネサステクノロジ | 半導体装置 |
US7791900B2 (en) * | 2006-08-28 | 2010-09-07 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Galvanic isolator |
US8674486B2 (en) * | 2011-12-14 | 2014-03-18 | Samsung Electro-Mechanics | Isolation barrier device and methods of use |
US9735112B2 (en) * | 2014-01-10 | 2017-08-15 | Fairchild Semiconductor Corporation | Isolation between semiconductor components |
-
2017
- 2017-07-11 US US15/646,976 patent/US20190019776A1/en not_active Abandoned
-
2018
- 2018-07-11 WO PCT/US2018/041540 patent/WO2019014288A1/en active Application Filing
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Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20130168854A1 (en) * | 2011-12-28 | 2013-07-04 | Broadcom Corporation | Semiconductor Package with a Bridge Interposer |
CN103426873A (zh) * | 2012-05-25 | 2013-12-04 | 英飞凌科技股份有限公司 | 多芯片封装及其制造方法 |
CN105745752A (zh) * | 2013-10-30 | 2016-07-06 | 高通股份有限公司 | 基板中的嵌入式桥接结构 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN116230702A (zh) * | 2023-05-08 | 2023-06-06 | 广东气派科技有限公司 | 一种GaN芯片的封装结构 |
CN116230702B (zh) * | 2023-05-08 | 2024-04-26 | 广东气派科技有限公司 | 一种GaN芯片的封装结构 |
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