CN111045358A - Data acquisition method, device, equipment and medium - Google Patents

Data acquisition method, device, equipment and medium Download PDF

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Publication number
CN111045358A
CN111045358A CN201911175042.8A CN201911175042A CN111045358A CN 111045358 A CN111045358 A CN 111045358A CN 201911175042 A CN201911175042 A CN 201911175042A CN 111045358 A CN111045358 A CN 111045358A
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clock signal
adc
mcu
data acquisition
target data
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陈琳
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Hangzhou Hollysys Automation Co Ltd
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Hangzhou Hollysys Automation Co Ltd
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors

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  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Information Transfer Systems (AREA)

Abstract

The application discloses a data acquisition method, which is applied to an MCU of a system side, and comprises the following steps: when target data need to be acquired from an ADC (analog to digital converter) on the site side, transmitting a first clock signal of the MCU to the capacitive couple, and transmitting a data acquisition instruction to the ADC through the capacitive couple by taking the first clock signal as a reference; and acquiring a second clock signal returned by the capacitive couple, and reading target data fed back by the ADC by taking the second clock signal as a reference. Therefore, the delay time of the target data fed back by the ADC can be offset by using the delay time of the second clock signal, obviously, the MCU does not need to limit the clock period of the clock signal of the MCU through the data acquisition mode, and the MCU can realize high-speed stable acquisition of the target data in the ADC. Correspondingly, the data acquisition device, the equipment and the medium have the beneficial effects.

Description

Data acquisition method, device, equipment and medium
Technical Field
The present invention relates to the field of data acquisition technologies, and in particular, to a data acquisition method, apparatus, device, and medium.
Background
In the industrial control industry, it is generally required to collect data signals of a controlled system from a field side and then upload the data signals collected from the field side to a terminal of the system side. Referring to fig. 1, fig. 1 is a schematic diagram illustrating data interaction between a field side and a system side in the prior art. In this process, in order To ensure the safety of the system side and the field side in the data acquisition process, a capacitance couple is usually required To be arranged between a main control chip MCU (Micro Controller Unit) of the system side and an acquisition chip ADC (Analog To Digital Converter) of the field side To isolate the external environment. However, there is a delay time in the data transmission channel in the capacitive pair during the data transmission process, so that the data received by the MCU is mistaken, and the data received by the MCU is misaligned. In the prior art, in order to avoid this situation, the clock period on the system side is generally set to be greater than 4 times of the transmission delay time of the capacitive couple channel. Obviously, the data acquisition mode cannot be applied to a high-speed data acquisition scene, and cannot meet the requirement of high-speed stable data acquisition.
Therefore, how to acquire data stably at high speed is a technical problem to be solved urgently by those skilled in the art.
Disclosure of Invention
In view of the above, the present invention provides a data acquisition method, apparatus, device and medium for acquiring data stably at a high speed. The specific scheme is as follows:
a data acquisition method is applied to an MCU of a system side and comprises the following steps:
when target data need to be acquired from an ADC (analog to digital converter) on a field side, transmitting a first clock signal of the MCU to a capacitive couple, and transmitting a data acquisition instruction to the ADC through the capacitive couple by taking the first clock signal as a reference;
and acquiring a second clock signal returned by the capacitive couple, and reading the target data fed back by the ADC by taking the second clock signal as a reference.
Preferably, the process of sending a data acquisition instruction to the ADC through the capacitive couple by using the first clock signal as a reference includes:
and sending the data acquisition instruction to the ADC through the capacitive couple by taking the rising edge or the falling edge of the first clock signal as a reference.
Preferably, the reading of the target data fed back by the ADC with reference to the second clock signal includes:
and reading the target data fed back by the ADC by taking the rising edge or the falling edge of the second clock signal as a reference.
Preferably, the reading of the target data fed back by the ADC with reference to the second clock signal includes:
setting the chip selection signal of the MCU by taking the end time of the second clock signal as a reference so as to finish reading the target data fed back by the ADC at the end time of the second clock signal.
Preferably, after the process of acquiring the second clock signal returned by the capacitive couple, the method further includes:
judging whether the acquisition time of the second clock signal is greater than preset time;
and if so, judging that the capacitor pair fails.
Preferably, after the process of reading the target data fed back by the ADC, the method further includes:
and storing the target data.
Correspondingly, the invention also discloses a data acquisition device, which is applied to the MCU of the system side and comprises:
the instruction sending module is used for sending a first clock signal of the MCU to a capacitive couple when target data needs to be collected from an ADC on a field side, and sending a data collection instruction to the ADC through the capacitive couple by taking the first clock signal as a reference;
and the data reading module is used for acquiring a second clock signal returned by the capacitive couple and reading the target data fed back by the ADC by taking the second clock signal as a reference.
Correspondingly, the invention also discloses a data acquisition device, which comprises:
a memory for storing a computer program;
a processor for implementing the steps of a data acquisition method as disclosed in the foregoing when executing said computer program.
Accordingly, the present invention also discloses a computer readable storage medium having stored thereon a computer program which, when being executed by a processor, realizes the steps of a data acquisition method as disclosed in the foregoing.
Therefore, in the invention, when the MCU at the system side needs to acquire target data from the ADC at the field side, the first clock signal of the MCU is sent to the capacitive couple, and a data acquisition instruction is sent to the ADC at the field side through the capacitive couple by taking the first clock signal of the MCU as a reference; and then, the MCU acquires a second clock signal returned by the capacitive couple, and reads the target data fed back by the ADC by taking the second clock signal returned by the capacitive couple as a reference. In the process, the MCU reads the target data fed back by the ADC by taking the second clock signal returned by the capacitive couple as a reference, and the second clock signal is the clock signal fed back by the capacitive couple, so that the second clock signal has delay time in a capacitive couple transmission channel, the delay time in the target data fed back by the ADC can be offset by utilizing the delay time in the second clock signal, and the data dislocation phenomenon generated when the target data in the ADC is transmitted to the MCU can be avoided. Obviously, by the data acquisition mode, the MCU does not need to limit the clock period of the clock signal of the MCU, so that the MCU can stably acquire the target data in the ADC at a high speed. Correspondingly, the data acquisition device, the equipment and the medium provided by the invention also have the beneficial effects.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
FIG. 1 is a schematic diagram of a prior art system side acquiring data from a field side;
fig. 2 is a flowchart of a data acquisition method according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a system side acquiring data from a field side according to an embodiment of the present invention;
FIG. 4 is a timing diagram of the MCU when acquiring target data;
FIG. 5 is a block diagram of a data acquisition device according to an embodiment of the present invention;
fig. 6 is a structural diagram of a data acquisition device according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 2, fig. 2 is a flowchart of a data acquisition method according to an embodiment of the present invention, where the data acquisition method includes:
step S11: when target data need to be acquired from an ADC (analog to digital converter) on the site side, transmitting a first clock signal of the MCU to the capacitive couple, and transmitting a data acquisition instruction to the ADC through the capacitive couple by taking the first clock signal as a reference;
step S12: and acquiring a second clock signal returned by the capacitive couple, and reading target data fed back by the ADC by taking the second clock signal as a reference.
In this embodiment, a data acquisition method is provided, by which a MCU on a system side can realize high-speed and stable acquisition of data in an ADC on a field side, and the data acquisition method is explained by taking the MCU on the system side as an execution subject.
Specifically, when the MCU on the system side needs to acquire target data from the ADC on the field side, first, a first clock signal of the MCU itself is sent to the capacitive couple of the isolation device between the system side and the field side, and a data acquisition command is sent to the ADC on the field side through the capacitive couple with the first clock signal of the MCU itself as a reference.
Conceivably, when the MCU on the system side transmits its own first clock signal to the duality, the duality must return a second clock signal corresponding to the first clock signal; when the ADC on the site side receives the first clock signal sent by the MCU, target data required by the MCU can be fed back to the MCU through the capacitive pair. And in the process that the ADC feeds the target data back to the MCU, the MCU reads the target data fed back by the ADC by taking the second clock signal returned by the capacitive couple as a reference.
It can be understood that, in the process of returning the second clock signal to the MCU, because the second clock signal is returned through the capacitive couple, there is a delay time of the data transmission channel in the capacitive couple in the second clock signal. In the process that the ADC on the site side feeds back the target data to the MCU, the target data also passes through the data transmission channel in the capacitive couple, so that the MCU receives the target data fed back by the ADC on the basis of the second clock signal returned by the capacitive couple in the process of receiving the target data from the ADC, the delay time of the target data fed back by the ADC can be offset by the MCU by using the delay time in the second clock signal, and obviously, the data dislocation phenomenon generated when the target data in the ADC is transmitted to the MCU can be avoided by the data acquisition mode.
Obviously, when the phenomenon of data dislocation when target data in the ADC is transmitted to the MCU is avoided, the MCU does not need to limit the clock period of a clock signal of the MCU, and under the condition, the MCU can realize high-speed stable acquisition of the target data in the ADC.
Compared with the prior art, in the embodiment, since the MCU adds an action step of sending the first clock signal to the capacitive couple when acquiring the target data from the ADC, in the actual operation process, the capacitive couple between the field side and the system side needs to be replaced by a capacitive couple with a plurality of data transmission channels, that is, one of the plurality of data transmission channels of the capacitive couple needs to be used to separately receive the first clock signal sent by the MCU, and the data transmission channel of the capacitive couple needs to return the second clock signal corresponding to the first clock signal to the MCU. Referring to fig. 3, fig. 3 is a schematic diagram of a system side collecting data from a field side according to an embodiment of the present invention.
In addition, in the prior art, because the clock cycle of the system side needs to be set to be greater than 4 times of the transmission delay time of the capacitive couple channel, the phenomenon of misalignment of the MCU occurring in the process of receiving the data from the site side is avoided, but in actual life, due to the production process, the delay time of the data transmission channels between different manufacturers, different batches, or even different chip individuals in the same batch may have a large difference. In this process, even if the clock period of the MCU clock signal is set to an optimal value, a certain error rate occurs due to individual differences between the pairs, which makes it more difficult to coordinate and program the clock period of the system side. Obviously, if the data acquisition method provided by the embodiment is adopted, not only the occurrence of the above situation can be avoided, but also the acquisition efficiency of the staff in acquiring the target data from the field side can be further improved.
Therefore, in this embodiment, when the MCU on the system side needs to acquire target data from the ADC on the site side, the first clock signal of the MCU is sent to the capacitive couple, and a data acquisition instruction is sent to the ADC on the site side through the capacitive couple with the first clock signal of the MCU as a reference; and then, the MCU acquires a second clock signal returned by the capacitive couple, and reads the target data fed back by the ADC by taking the second clock signal returned by the capacitive couple as a reference. In the process, the MCU reads the target data fed back by the ADC by taking the second clock signal returned by the capacitive couple as a reference, and the second clock signal is the clock signal fed back by the capacitive couple, so that the second clock signal has delay time in a capacitive couple transmission channel, the delay time in the target data fed back by the ADC can be offset by utilizing the delay time in the second clock signal, and the data dislocation phenomenon generated when the target data in the ADC is transmitted to the MCU can be avoided. Obviously, by the data acquisition mode, the MCU does not need to limit the clock period of the clock signal of the MCU, so that the MCU can stably acquire the target data in the ADC at a high speed.
Based on the above embodiments, this embodiment further describes and optimizes the technical solution, specifically, the steps are as follows: the process of sending a data acquisition instruction to the ADC through the capacitive couple with reference to the first clock signal comprises:
and sending a data acquisition instruction to the ADC through the capacitive couple by taking the rising edge or the falling edge of the first clock signal as a reference.
It can be understood that, in practical application, the first clock signal of the MCU itself is a clock signal composed of a plurality of trigger edges, and the rising edge or the falling edge of the first clock signal can accurately identify the time point at which the MCU sends the data acquisition instruction to the ADC, so that, in the practical operation process, the MCU can send the data acquisition instruction to the ADC through the capacitive pair with the rising edge or the falling edge of the first clock signal as a reference.
Obviously, by the arrangement mode, the sending time point of the MCU when sending the data acquisition instruction to the ADC can be accurately identified, and the accuracy and the reliability of the MCU when obtaining the target data from the ADC can be further improved.
Correspondingly, the steps are as follows: the process of reading the target data fed back by the ADC with reference to the second clock signal includes:
and reading the target data fed back by the ADC by taking the rising edge or the falling edge of the second clock signal as a reference.
In order to adapt to the above steps, in this embodiment, when the MCU uses the rising edge or the falling edge of the first clock signal as a reference and sends a data acquisition instruction to the ADC through the capacitive couple, the MCU may also read the target data fed back by the ADC using the rising edge or the falling edge of the second clock signal as a reference.
Obviously, through the arrangement mode, the time for reading the target data by the MCU is more accurate, and the delay time existing in the second clock signal and the delay time existing in the target data fed back by the ADC are offset more accurately by the MCU, so that the data dislocation phenomenon of the MCU in the process of acquiring the target data is avoided.
Based on the above embodiments, this embodiment further describes and optimizes the technical solution, specifically, the steps are as follows: the process of reading the target data fed back by the ADC with reference to the second clock signal includes:
setting the chip selection signal of the MCU by taking the end time of the second clock signal as a reference so as to finish reading the target data fed back by the ADC at the end time of the second clock signal.
In the actual operation process, the MCU may set the chip select signal of the MCU based on the end time of the second clock signal, so as to finish reading the target data fed back by the ADC at the end time of the second clock, thereby further avoiding the data misalignment phenomenon in the process of reading the target data fed back by the ADC.
Referring to fig. 4, fig. 4 is a timing chart of the MCU during target data collection. When the chip selection signal CS of the MCU is at a low level, the MCU starts to send a data acquisition instruction to the ADC at the site side and starts to receive target data fed back by the ADC at the site side, and when the second clock signal is finished, the chip selection signal CS of the MCU jumps to a high level, and at the moment, the MCU finishes reading the target data fed back by the ADC.
Obviously, by the technical scheme provided by the embodiment, a data dislocation phenomenon occurring in the process of reading the target data fed back by the ADC by the MCU can be relatively avoided, thereby ensuring the overall reliability of the MCU in the process of acquiring the target data.
Based on the above embodiments, this embodiment further describes and optimizes the technical solution, specifically, the steps are as follows: after the process of acquiring the second clock signal returned by the capacitive couple, the method further comprises the following steps:
judging whether the acquisition time of the second clock signal is greater than the preset time or not;
if yes, judging that the capacitive couple fails.
In practical application, when the MCU sends the first clock signal to the puppet, if the puppet is in a normal operation state, the puppet returns the second clock signal corresponding to the first clock signal to the MCU at a preset time.
When the fault of the puppet is judged according to the acquisition time of the second clock signal, a worker can directly go to the site to repair or replace the puppet, so that the safety of the puppet in the using process can be ensured, and the overall execution efficiency of the system side and the site side in the data interaction process can be further ensured.
Based on the above embodiments, this embodiment further describes and optimizes the technical solution, specifically, the steps are as follows: after the process of reading the target data fed back by the ADC, the method further includes:
and storing the target data.
In this embodiment, after the MCU reads the target data fed back by the ADC, the MCU further stores the target data in the MCU. When the MCU stores the target data collected from the on-site ADC to the MCU, the phenomenon that the target data are lost in the subsequent use process can be avoided, and the target data can be conveniently called and analyzed by a worker in the analysis process, so that the user experience of the worker in the analysis process of the target data can be relatively improved.
Referring to fig. 5, fig. 5 is a structural diagram of a data acquisition device according to an embodiment of the present invention, the data acquisition device is applied to an MCU on a system side, and includes:
the instruction sending module 21 is configured to send a first clock signal of the MCU to the capacitive couple when target data needs to be collected from the ADC on the site side, and send a data collection instruction to the ADC through the capacitive couple with the first clock signal as a reference;
and the data reading module 22 is configured to acquire the second clock signal returned by the capacitive couple, and read the target data fed back by the ADC with the second clock signal as a reference.
Preferably, the instruction sending module 21 includes:
and sending the data acquisition instruction to the ADC through the capacitive couple by taking the rising edge or the falling edge of the first clock signal as a reference.
Preferably, the data reading module 22 includes:
and reading the target data fed back by the ADC by taking the rising edge or the falling edge of the second clock signal as a reference.
Preferably, the data reading module 22 includes:
setting the chip selection signal of the MCU by taking the end time of the second clock signal as a reference so as to finish reading the target data fed back by the ADC at the end time of the second clock signal.
Preferably, the data acquisition device further includes:
the time judgment module is used for judging whether the acquisition time of the second clock signal is greater than the preset time or not after the process of acquiring the second clock signal returned by the capacitive couple;
and the fault judging module is used for judging that the capacitance coupling has faults when the judging result of the time judging module is positive.
Preferably, the data acquisition device further includes:
and the data storage module is used for storing the target data after the process of reading the target data fed back by the ADC.
The data acquisition device provided by the embodiment of the invention has the beneficial effects of the data acquisition method.
Referring to fig. 6, fig. 6 is a structural diagram of a data acquisition device according to an embodiment of the present invention, where the data acquisition device includes:
a memory 31 for storing a computer program;
a processor 32 for implementing the steps of a data acquisition method as disclosed in the foregoing when executing the computer program.
The data acquisition equipment provided by the embodiment of the invention has the beneficial effects of the data acquisition method disclosed by the embodiment of the invention.
Accordingly, an embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the data acquisition method as disclosed in the foregoing are implemented.
The computer-readable storage medium provided by the embodiment of the invention also has the beneficial effects of the data acquisition method disclosed in the foregoing.
The embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same or similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The data acquisition method, the data acquisition device, the data acquisition equipment and the data acquisition medium provided by the invention are described in detail, specific examples are applied in the text to explain the principle and the implementation mode of the invention, and the description of the examples is only used for helping to understand the method and the core idea of the invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.

Claims (9)

1. A data acquisition method is characterized in that an MCU applied to a system side comprises the following steps:
when target data need to be acquired from an ADC (analog to digital converter) on a field side, transmitting a first clock signal of the MCU to a capacitive couple, and transmitting a data acquisition instruction to the ADC through the capacitive couple by taking the first clock signal as a reference;
and acquiring a second clock signal returned by the capacitive couple, and reading the target data fed back by the ADC by taking the second clock signal as a reference.
2. The method of claim 1, wherein the sending a data acquisition command to the ADC via the capacitive couple based on the first clock signal comprises:
and sending the data acquisition instruction to the ADC through the capacitive couple by taking the rising edge or the falling edge of the first clock signal as a reference.
3. The data acquisition method according to claim 2, wherein the reading the target data fed back by the ADC with reference to the second clock signal comprises:
and reading the target data fed back by the ADC by taking the rising edge or the falling edge of the second clock signal as a reference.
4. The data acquisition method according to claim 1, wherein the reading the target data fed back by the ADC with reference to the second clock signal comprises:
setting the chip selection signal of the MCU by taking the end time of the second clock signal as a reference so as to finish reading the target data fed back by the ADC at the end time of the second clock signal.
5. The data acquisition method according to claim 1, wherein the process of acquiring the second clock signal returned by the capacitive couple is followed by further comprising:
judging whether the acquisition time of the second clock signal is greater than preset time;
and if so, judging that the capacitor pair fails.
6. The data acquisition method according to any one of claims 1 to 5, wherein the process of reading the target data fed back by the ADC is followed by further comprising:
and storing the target data.
7. A data acquisition device, which is applied to an MCU of a system side, includes:
the instruction sending module is used for sending a first clock signal of the MCU to a capacitive couple when target data needs to be collected from an ADC on a field side, and sending a data collection instruction to the ADC through the capacitive couple by taking the first clock signal as a reference;
and the data reading module is used for acquiring a second clock signal returned by the capacitive couple and reading the target data fed back by the ADC by taking the second clock signal as a reference.
8. A data acquisition device, comprising:
a memory for storing a computer program;
a processor for implementing the steps of a data acquisition method as claimed in any one of claims 1 to 6 when executing said computer program.
9. A computer-readable storage medium, characterized in that a computer program is stored on the computer-readable storage medium, which computer program, when being executed by a processor, carries out the steps of a data acquisition method as claimed in any one of the claims 1 to 6.
CN201911175042.8A 2019-11-26 2019-11-26 Data acquisition method, device, equipment and medium Pending CN111045358A (en)

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