CN110957397A - Preparation method of heterojunction battery - Google Patents
Preparation method of heterojunction battery Download PDFInfo
- Publication number
- CN110957397A CN110957397A CN201911199599.5A CN201911199599A CN110957397A CN 110957397 A CN110957397 A CN 110957397A CN 201911199599 A CN201911199599 A CN 201911199599A CN 110957397 A CN110957397 A CN 110957397A
- Authority
- CN
- China
- Prior art keywords
- amorphous silicon
- cell
- film layer
- thickness
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000002360 preparation method Methods 0.000 title abstract description 10
- 238000000034 method Methods 0.000 claims abstract description 32
- 238000002347 injection Methods 0.000 claims abstract description 29
- 239000007924 injection Substances 0.000 claims abstract description 29
- 238000004519 manufacturing process Methods 0.000 claims abstract description 18
- 229910052751 metal Inorganic materials 0.000 claims abstract description 14
- 239000002184 metal Substances 0.000 claims abstract description 14
- 238000012360 testing method Methods 0.000 claims abstract description 10
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 74
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 24
- 238000000151 deposition Methods 0.000 claims description 13
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 claims description 12
- 238000007650 screen-printing Methods 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 10
- 239000003513 alkali Substances 0.000 claims description 8
- 239000011248 coating agent Substances 0.000 claims description 8
- 238000000576 coating method Methods 0.000 claims description 8
- 238000005260 corrosion Methods 0.000 claims description 5
- 230000007797 corrosion Effects 0.000 claims description 5
- 239000000243 solution Substances 0.000 claims description 4
- 238000006243 chemical reaction Methods 0.000 abstract description 3
- 239000010408 film Substances 0.000 description 30
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 16
- 229910052709 silver Inorganic materials 0.000 description 15
- 239000004332 silver Substances 0.000 description 15
- 239000010409 thin film Substances 0.000 description 9
- 239000000463 material Substances 0.000 description 6
- 238000005229 chemical vapour deposition Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 238000004050 hot filament vapor deposition Methods 0.000 description 4
- 238000001755 magnetron sputter deposition Methods 0.000 description 4
- 238000001465 metallisation Methods 0.000 description 4
- 238000007639 printing Methods 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 3
- 230000005669 field effect Effects 0.000 description 3
- 238000002161 passivation Methods 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 238000005245 sintering Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 101001073212 Arabidopsis thaliana Peroxidase 33 Proteins 0.000 description 1
- 101001123325 Homo sapiens Peroxisome proliferator-activated receptor gamma coactivator 1-beta Proteins 0.000 description 1
- 102100028961 Peroxisome proliferator-activated receptor gamma coactivator 1-beta Human genes 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 239000012670 alkaline solution Substances 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 239000004568 cement Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
- H01L31/208—Particular post-treatment of the devices, e.g. annealing, short-circuit elimination
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
- H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
- H01L31/0747—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
- H01L31/202—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic Table
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Life Sciences & Earth Sciences (AREA)
- Sustainable Energy (AREA)
- Photovoltaic Devices (AREA)
Abstract
The invention discloses a preparation method of a heterojunction battery. And (3) carrying out subsequent curing after the metal electrode is printed, carrying out current injection treatment on the front side and the back side of the cell in the subsequent curing process or after the curing is finished, limiting the injection current to be 1-20A in the current injection process, controlling the process temperature to be 50-250 ℃, and finally testing and sorting the cell after the current injection. The advantages are that: the method is characterized in that only one current processing device is added, extra device input cost or the cost of only one electric processing device is not needed to be increased, perfect compatibility can be formed by the current HJT production line, meanwhile, special current size and temperature are adopted in the current injection process, the conversion efficiency of the HJT battery is greatly improved, and therefore the electrical property of the HJT battery is greatly improved.
Description
Technical Field
The invention relates to a preparation method of a heterojunction battery, and belongs to the technical field of solar battery manufacturing.
Background
With the development of solar cell technology, the mass production efficiency of the existing ultra-high efficiency heterojunction cell reaches 23.27%, and through a third-party test, the mass production front power of 60 double-sided assemblies produced by the company reaches 332.6W, because of the characteristic of double-sided power generation, under the scenes of grassland, cement ground, snow land, reflective cloth and the like, the back of the assembly can generate 10% -30% of extra generated energy, the power temperature coefficient is as low as-0.27%/° C, and compared with a common polycrystalline assembly, the heterojunction assembly of the company can recover 34% of generated energy loss at the working temperature of 75 ℃.
For the cost reduction path of the heterojunction technology, the low-temperature silver paste is one block with a larger cost ratio, the consumption of the silver paste is about five times of that of the traditional battery, and the low-temperature silver paste uses more paste and has higher silver content; in order to effectively reduce the cost, the cost of the low-temperature silver paste can be reduced by 50-70% by combining the technologies of multiple main gates, laminated tiles and the like; secondly, ITO target, texturing additive, CVD and other special equipment will also have a large amplitude reduction space, and the HJT battery has the above technical advantages, and gradually develops into a high-efficiency mass production technology following PERC, how to break through the prior art to further improve the mass production efficiency of the HJT battery, and how to accelerate the large-area industrialization process is the current challenge of the HJT battery.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a heterojunction battery preparation method which can improve the conversion efficiency of the HJT battery, thereby greatly improving the electrical performance of the HJT battery.
In order to solve the technical problems, the preparation method of the heterojunction cell comprises the steps of texturing the double-sided surface of a monocrystalline silicon substrate, depositing an intrinsic amorphous silicon layer on the front side and the back side of the textured monocrystalline silicon wafer, depositing doped amorphous silicon on the front side and the back side of the intrinsic amorphous silicon layer, depositing a transparent conductive film, performing screen printing on a metal electrode to form a cell, performing subsequent curing after printing the metal electrode, performing injection current treatment on the front side and the back side of the cell in the subsequent curing process or after the curing is finished, limiting the injection current by 1-20A in the current injection process, controlling the process temperature by 50-250 ℃, and finally testing and sorting the cell subjected to current injection.
The monocrystalline silicon is N-type, the thickness of the monocrystalline silicon is 50-200 mu m, and the resistivity is 1-9 omega cm.
The monocrystalline silicon substrate is subjected to double-sided surface texturing through an alkali corrosion mode, the size of a suede surface is controlled to be 1-9 mu m, and an alkali solution is selected from KOH or NaOH.
The thickness of the intrinsic amorphous silicon film layer is 5-20 nm.
The doped amorphous silicon adopted by the front surface of the intrinsic amorphous silicon layer is a P-type amorphous silicon film layer or an N-type amorphous silicon film layer, the doped amorphous silicon adopted by the back surface of the intrinsic amorphous silicon layer is an N-type amorphous silicon film layer or a P-type amorphous silicon film layer, the thickness of the P-type amorphous silicon film layer is 5-20nm, and the thickness of the N-type amorphous silicon film layer is 5-30 nm.
The thickness of the coating film of the transparent conductive film is 60-120 nm.
The invention has the advantages that:
the method is characterized in that after metallization, a special process method is adopted for electrical injection treatment, so that electrical injection is realized in the curing process or after curing, only one current treatment device is added, extra device investment cost does not need to be increased or only one electrical treatment device cost is needed to be invested, perfect compatibility can be formed with the existing HJT production line, meanwhile, a special current size and temperature are adopted in the current injection process, the conversion efficiency of the HJT battery is greatly improved, the existing technical bottleneck is broken through, the electrical performance of the HJT battery is greatly improved, a feasible preparation process flow is provided for the development of the follow-up HJT battery, and the process flow has the characteristics of higher performance parameters and high comprehensive cost performance compared with the existing production flow of the HJT battery.
Detailed description of the invention
The heterojunction cell fabrication method of the present invention will be described in further detail with reference to specific embodiments.
The first embodiment is as follows:
the preparation method of the heterojunction battery of the embodiment comprises the following steps:
A. carrying out double-sided surface texturing on a monocrystalline silicon substrate in an alkali corrosion mode, controlling the size of a suede to be 1 mu m, forming a pyramid structure with a certain size, preferably selecting KOH as an alkali solution, wherein the substrate is monocrystalline silicon, the monocrystalline silicon wafer is of an N type, the thickness of the monocrystalline silicon is preferably 50, and the resistivity of the monocrystalline silicon is 1 omega cm;
B. depositing an intrinsic amorphous silicon layer on the front surface and the back surface of a textured silicon wafer by adopting catalytic chemical vapor deposition, wherein the thickness of the intrinsic amorphous silicon film layer on the front surface and the back surface is 5nm, and forming a passivation layer with a certain thickness and a field effect;
C. the method comprises the following steps of doping amorphous silicon on the front surface and the back surface of an intrinsic amorphous silicon layer by adopting catalytic chemical vapor deposition, wherein the doped amorphous silicon on the front surface of the intrinsic amorphous silicon layer is a P-type amorphous silicon film layer, the doped amorphous silicon on the back surface of the intrinsic amorphous silicon layer is an N-type amorphous silicon film layer, the thickness of the P-type amorphous silicon film layer is 5nm, the thickness of the N-type amorphous silicon film layer is 5nm, and the type of the amorphous silicon doped on the front surface and the back surface is of a special-shaped symmetrical structure;
D. depositing a transparent conductive thin film (TCO) on the front surface and the back surface of the doped amorphous silicon by adopting a magnetron sputtering or reactive plasma mode, wherein the deposited film layer is ITO, IWO, AZO and the like, the materials of the front surface and the back surface of the transparent conductive thin film can be freely combined, or two surfaces of the front surface and the back surface of the transparent conductive thin film can be made of the same coating material, the coating thickness is 60nm, and a conductive light-transmitting layer with a certain thickness is formed;
E. performing screen printing on a metal electrode to form a battery piece, wherein the metal electrode is a silver electrode, the realization mode is screen printing, the silver electrode comprises auxiliary grid lines, the number of the auxiliary grid lines is 80, the width of the grid lines is 20 mu m, and the front side and the back side are printed with silver paste to perform metallization treatment so as to play a role in collecting minority carrier forming current;
F. and (3) carrying out subsequent curing (sintering) after printing the metal electrode, carrying out current injection treatment on the front surface and the back surface of the cell in the subsequent curing process or after curing is finished, limiting the injection current 1A in the current injection process, controlling the process temperature to be 50 ℃, and finally testing and sorting the cell after current injection, wherein the average efficiency of mass production of the cell is 24.1% through the electrical property test of the cell. .
Example two:
the preparation method of the heterojunction battery of the embodiment comprises the following steps:
A. carrying out double-sided surface texturing on a monocrystalline silicon substrate in an alkaline corrosion mode, controlling the size of a suede to be 9 mu m, forming a pyramid structure with a certain size, preferably selecting NaOH as an alkaline solution, wherein the substrate is monocrystalline silicon, the monocrystalline silicon wafer is of an N type, the thickness of the monocrystalline silicon is preferably 200 mu m, and the resistivity is 1-9 omega cm;
B. depositing intrinsic amorphous silicon layers on the front and back surfaces of the textured silicon wafer by adopting plasma chemical vapor deposition or catalytic chemical vapor deposition, wherein the thickness of the intrinsic amorphous silicon film layers on the front and back surfaces is 5-20nm, and forming a passivation layer and a field effect with certain thickness;
C. doping amorphous silicon on the front surface and the back surface of the intrinsic amorphous silicon layer by adopting plasma chemical vapor deposition or catalytic chemical vapor deposition, wherein the doped amorphous silicon on the front surface of the intrinsic amorphous silicon layer is an N-type amorphous silicon film layer, the doped amorphous silicon on the back surface of the intrinsic amorphous silicon layer is a P-type amorphous silicon film layer, the thickness of the P-type amorphous silicon film layer is 20nm, the thickness of the N-type amorphous silicon film layer is 30nm, and the type of the amorphous silicon doped on the front surface and the back surface is in a heterotype symmetrical structure;
D. depositing a transparent conductive thin film (TCO) on the front surface and the back surface of the doped amorphous silicon by adopting a magnetron sputtering or reactive plasma mode, wherein the deposited film layer is ITO, IWO, AZO and the like, the materials of the front surface and the back surface of the transparent conductive thin film can be freely combined, or two surfaces of the front surface and the back surface of the transparent conductive thin film can be made of the same coating material, the coating thickness is 120nm, and a conductive euphotic layer with certain thickness is formed;
E. performing screen printing on a metal electrode to form a battery piece, wherein the metal electrode is a silver electrode, the implementation mode of the screen printing is screen printing, the silver electrode comprises a main grid and an auxiliary grid line, the main grid line and the fine grid line are vertically distributed, the number of the main grid lines is 20, the width of the grid lines is 1.2mm, the number of the auxiliary grid lines is 200, the width of the grid lines is 60 mu m, and silver paste is printed on the front side and the back side for metallization treatment so as to play a role in collecting minority carrier formation current;
F. and (3) carrying out subsequent curing (sintering) after printing the metal electrode, carrying out current injection treatment on the front surface and the back surface of the cell in the subsequent curing process or after curing is finished, limiting the injection current to be 20A in the current injection process, controlling the process temperature to be 250 ℃, and finally testing and sorting the cell after current injection, wherein the average efficiency of mass production of the cell is 24.3% through an electrical property test of the cell.
Example three:
the preparation method of the heterojunction battery of the embodiment comprises the following steps:
A. carrying out double-sided surface texturing on a monocrystalline silicon substrate in an alkali corrosion mode, controlling the size of a suede to be 5 microns, forming a pyramid structure with a certain size, removing impurity ions and cleaning the surface, wherein the alkali solution is preferably NaOH, the substrate is monocrystalline silicon, the monocrystalline silicon wafer is N-type, the thickness of the monocrystalline silicon is 180 microns, and the resistivity is 5 omega cm;
B. depositing an intrinsic amorphous silicon layer on the front surface and the back surface of a textured silicon wafer by adopting plasma chemical vapor deposition, wherein the thickness of the intrinsic amorphous silicon film layer on the front surface and the back surface is 10nm, and forming a passivation layer with a certain thickness and a field effect;
C. adopting plasma chemical vapor deposition to dope amorphous silicon on the front surface and the back surface of the intrinsic amorphous silicon layer, wherein the doped amorphous silicon on the front surface of the intrinsic amorphous silicon layer is an N-type amorphous silicon film layer, the doped amorphous silicon on the back surface of the intrinsic amorphous silicon layer is a P-type amorphous silicon film layer, the thickness of the P-type amorphous silicon film layer is 15nm, and the thickness of the N-type amorphous silicon film layer is 20 nm;
D. depositing a transparent conductive thin film (TCO) on the front surface and the back surface of the doped amorphous silicon by adopting a magnetron sputtering or reactive plasma mode, wherein the deposited film layer is ITO, IWO, AZO and the like, the materials of the front surface and the back surface of the transparent conductive thin film can be freely combined, or two surfaces of the front surface and the back surface of the transparent conductive thin film can be made of the same coating material, the coating thickness is 80nm, and a conductive light-transmitting layer with a certain thickness is formed;
E. performing screen printing on a metal electrode to form a battery piece, wherein the metal electrode is a silver electrode, the implementation mode of the screen printing is screen printing, the silver electrode comprises a main grid and an auxiliary grid line, the main grid line and the fine grid line are vertically distributed, the width of the main grid line is 1mm, the number of the main grids is 5, the number of the auxiliary grid lines is 100, the width of the grid lines is 40 mu m, and silver paste is printed on the front side and the back side for metallization treatment to play a role in collecting minority carrier formation current;
F. and (3) carrying out subsequent curing (sintering) after printing the metal electrode, carrying out current injection treatment on the front surface and the back surface of the cell in the subsequent curing process or after curing is finished, limiting the injection current to be 10A in the current injection process, controlling the process temperature to be 200 ℃, and finally testing and sorting the cell after current injection, wherein the average efficiency of mass production of the cell is 24.5% through the electrical property test of the cell.
Comparative example:
A. carrying out texturing treatment on an N-type monocrystalline silicon wafer with the thickness of 180 mu m to form a pyramid textured surface, removing impurity ions and cleaning the surface;
B. preparing a double-intrinsic amorphous silicon layer and a doped amorphous silicon layer on the front surface and the back surface by plasma chemical vapor deposition, wherein the thickness of the intrinsic amorphous silicon on the front surface and the back surface is 10nm, the thickness of the P-type amorphous silicon on the front surface and the back surface is 15nm, and the thickness of the N-type amorphous silicon on the back surface is 20 nm;
C. and depositing an ITO film by magnetron sputtering, wherein the thickness of the ITO film on the front surface and the back surface is 80 nm.
D. Forming front and back silver metal electrodes by screen printing, wherein the width of a main grid is 1mm, the number of the main grids is 5, the width of a front and back silver auxiliary grid line is 40 mu m, and the number of the lines is 100;
E. and (4) carrying out conventional curing treatment, wherein the curing temperature is 200 ℃.
F. The electrical performance of the cell was tested, and the average efficiency of mass production of the cell was 23.3%.
As can be seen from comparison of the three examples and the comparative example, under the same process parameters, the efficiency of the example with the addition of the electric injection treatment procedure is improved by about 1.2% compared with the comparative example, and the effect is quite obvious.
Claims (6)
1. A method for preparing a heterojunction battery is characterized in that: firstly, carrying out double-sided surface texturing on a monocrystalline silicon substrate, depositing an intrinsic amorphous silicon layer on the front and back surfaces of a textured monocrystalline silicon wafer, depositing a doped amorphous silicon on the front and back surfaces of the intrinsic amorphous silicon layer, depositing a transparent conductive film, and carrying out screen printing on a metal electrode to form a cell, wherein the cell is characterized in that: and (3) carrying out subsequent curing after the metal electrode is printed, carrying out current injection treatment on the front side and the back side of the cell in the subsequent curing process or after the curing is finished, limiting the injection current to be 1-20A in the current injection process, controlling the process temperature to be 50-250 ℃, and finally testing and sorting the cell after the current injection.
2. A method of making a heterojunction cell as in claim 1, wherein: the monocrystalline silicon is N-type, the thickness of the monocrystalline silicon is 50-200 mu m, and the resistivity is 1-9 omega cm.
3. A method of manufacturing a heterojunction cell according to claim 1 or 2, wherein: the monocrystalline silicon substrate is subjected to double-sided surface texturing through an alkali corrosion mode, the size of a suede surface is controlled to be 1-9 mu m, and an alkali solution is selected from KOH or NaOH.
4. A method of making a heterojunction cell as in claim 3, wherein: the thickness of the intrinsic amorphous silicon film layer is 5-20 nm.
5. A method of fabricating a heterojunction cell as claimed in claim 1, 2 or 4 wherein: the doped amorphous silicon adopted by the front surface of the intrinsic amorphous silicon layer is a P-type amorphous silicon film layer or an N-type amorphous silicon film layer, the doped amorphous silicon adopted by the back surface of the intrinsic amorphous silicon layer is an N-type amorphous silicon film layer or a P-type amorphous silicon film layer, the thickness of the P-type amorphous silicon film layer is 5-20nm, and the thickness of the N-type amorphous silicon film layer is 5-30 nm.
6. A method of making a heterojunction cell as in claim 5, wherein: the thickness of the coating film of the transparent conductive film is 60-120 nm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911199599.5A CN110957397A (en) | 2019-11-29 | 2019-11-29 | Preparation method of heterojunction battery |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911199599.5A CN110957397A (en) | 2019-11-29 | 2019-11-29 | Preparation method of heterojunction battery |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110957397A true CN110957397A (en) | 2020-04-03 |
Family
ID=69978996
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911199599.5A Pending CN110957397A (en) | 2019-11-29 | 2019-11-29 | Preparation method of heterojunction battery |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110957397A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112993086A (en) * | 2021-02-09 | 2021-06-18 | 东方日升（常州）新能源有限公司 | Electrical injection method and preparation method of N-type crystalline silicon battery |
-
2019
- 2019-11-29 CN CN201911199599.5A patent/CN110957397A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112993086A (en) * | 2021-02-09 | 2021-06-18 | 东方日升（常州）新能源有限公司 | Electrical injection method and preparation method of N-type crystalline silicon battery |
| CN112993086B (en) * | 2021-02-09 | 2022-07-26 | 东方日升（常州）新能源有限公司 | Electrical injection method and preparation method of N-type crystalline silicon battery |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US9023681B2 (en) | Method of fabricating heterojunction battery | |
| CN110993700A (en) | Heterojunction solar cell and preparation process thereof | |
| CN111653644A (en) | Silicon-based heterojunction solar cell and preparation method thereof | |
| CN113707734B (en) | Crystalline silicon/perovskite laminated solar cell with hole selective passivation structure | |
| CN111710759B (en) | TCO film surface treatment method for SHJ solar cell | |
| CN109638094A (en) | Efficient heterojunction battery intrinsic amorphous silicon passivation layer structure and preparation method thereof | |
| CN111564517A (en) | Fully-passivated contact heterojunction battery and manufacturing method thereof | |
| CN110416328A (en) | A kind of HJT battery and preparation method thereof | |
| CN113782631A (en) | Heterojunction solar cell with buffer protective film and preparation method thereof | |
| CN112701181A (en) | Preparation method of low-resistivity heterojunction solar cell | |
| CN110957397A (en) | Preparation method of heterojunction battery | |
| CN112466989A (en) | Preparation process of heterojunction solar cell | |
| CN115985992A (en) | N-type monocrystalline silicon HBC solar cell structure and preparation method thereof | |
| CN110400858A (en) | A kind of preparation method of HJT battery Double-layered transparent conductive oxide film | |
| CN112701194B (en) | Preparation method of heterojunction solar cell | |
| CN115172602A (en) | Doped metal oxide composite layer structure | |
| CN103311366B (en) | The preparation method of silicon/crystalline silicon heterogenous joint solar cell | |
| CN203850312U (en) | Heterojunction solar cell with selective emitter | |
| CN111180593A (en) | Silicon-based double-sided organic/inorganic heterojunction solar cell and preparation method thereof | |
| CN112366232B (en) | Heterojunction solar cell and preparation method and application thereof | |
| CN216773263U (en) | TCO laminated heterojunction solar structure | |
| CN218849510U (en) | N-type monocrystalline silicon HBC solar cell structure | |
| CN203774376U (en) | Silicon-based organic solar cell | |
| CN114883452B (en) | Manufacturing method for selectively preparing TCO film heterojunction solar cell | |
| CN214898476U (en) | Solar cell and cell module using piezoelectric effect |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |