CN110942978A - 半导体装置的制造方法 - Google Patents

半导体装置的制造方法 Download PDF

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CN110942978A
CN110942978A CN201910893160.6A CN201910893160A CN110942978A CN 110942978 A CN110942978 A CN 110942978A CN 201910893160 A CN201910893160 A CN 201910893160A CN 110942978 A CN110942978 A CN 110942978A
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film
polymer film
semiconductor device
polymer
manufacturing
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CN110942978B (zh
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野泽秀二
山口达也
佐藤渚
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Abstract

本发明提供一种半导体装置的制造方法。在半导体装置内形成所期望的形状和大小的空隙。半导体装置的制造方法包括第1层叠工序、调整工序、第2层叠工序、以及加热工序。在第1层叠工序中，在设于基板上且含有第1材料的多个构造物的周围层叠聚合物膜，该聚合物膜是通过多种单体的聚合而生成的具有脲键的聚合物的膜。在调整工序中，调整聚合物膜的形状。在第2层叠工序中，以覆盖聚合物膜的方式在聚合物膜之上层叠临时密封膜。在加热工序中，通过加热聚合物膜，聚合物解聚成多种单体，解聚而成的多种单体经由临时密封膜脱离。

Description

半导体装置的制造方法
技术领域
本公开的各种方面和实施方式涉及一种半导体装置的制造方法。
背景技术
以往，在多层化而成的半导体装置中，作为缩小层间绝缘膜的相对介电常数的方法，公知利用在由该层间绝缘膜埋入基板上的凹部之际作为埋入不良形成的空隙(参照例如下述专利文献1)。
现有技术文献
专利文献
专利文献1：日本特开2012-54307号公报
发明内容
发明要解决的问题
不过，作为埋入不良形成的空隙的形状和大小依赖于凹部的宽度、深度等。例如，在凹部的宽度较窄的情况下，在凹部的下部形成有较大的空隙，但在凹部的宽度较宽的情况下，有时在凹部的下部几乎未形成空隙。另外，在凹部形成的空隙的形状和大小有时由于基板上的凹部的位置、半导体制造装置内的凹部的位置而波动。因此，难以针对任意的形状的凹部形成所期望的形状和大小的空隙。
用于解决问题的方案
本公开的一方面是一种半导体装置的制造方法，包括第1层叠工序、调整工序、第2层叠工序、以及加热工序。在第1层叠工序中，在设于基板上且含有第1材料的多个构造物的周围层叠聚合物膜，该聚合物膜是通过多种单体的聚合而生成的具有脲键的聚合物的膜。在调整工序中，调整聚合物膜的形状。在第2层叠工序中，以覆盖聚合物膜的方式在聚合物膜之上层叠临时密封膜。在加热工序中，通过加热聚合物膜，聚合物解聚成多种单体，解聚而成的多种单体经由临时密封膜脱离。
发明的效果
根据本公开的各种方面和实施方式，能够在半导体装置内形成所期望的形状和大小的空隙。
附图说明
图1是表示本公开的第1实施方式的半导体装置的制造方法的一个例子的流程图。
图2是表示被处理体的一个例子的剖视图。
图3是表示蚀刻后的被处理体的一个例子的剖视图。
图4是表示层叠有基底膜的被处理体的一个例子的剖视图。
图5是表示埋入有配线材料的被处理体的一个例子的剖视图。
图6是表示绝缘膜被去除了之后的被处理体的一个例子的剖视图。
图7是表示用于在被处理体上层叠聚合物膜的成膜装置的一个例子的概略剖视图。
图8是表示层叠有聚合物膜的被处理体的一个例子的剖视图。
图9是表示聚合物膜的形状被调整了之后的被处理体的一个例子的剖视图。
图10是表示层叠有氧化膜的被处理体的一个例子的剖视图。
图11是表示退火装置的一个例子的概略剖视图。
图12是表示聚合物膜被去除了之后的被处理体的一个例子的剖视图。
图13是表示层叠有保护膜的被处理体的一个例子的剖视图。
图14是表示层叠有层间绝缘膜的被处理体的一个例子的剖视图。
图15是表示比较例中的被处理体的一个例子的剖视图。
图16是表示本公开的第2实施方式的半导体装置的制造方法的一个例子的流程图。
图17是表示层叠有聚合物膜的被处理体的一个例子的剖视图。
图18是表示聚合物膜的形状被调整了之后的被处理体的一个例子的剖视图。
图19是表示层叠有氧化膜的被处理体的一个例子的剖视图。
图20是表示聚合物膜被去除了之后的被处理体的一个例子的剖视图。
图21是表示层叠有基底膜的被处理体的一个例子的剖视图。
图22是表示埋入有配线材料的被处理体的一个例子的剖视图。
图23是表示层叠有层间绝缘膜的被处理体的一个例子的剖视图。
图24是表示层叠有聚合物膜的被处理体的一个例子的剖视图。
图25是表示形成有抗蚀剂膜的被处理体的一个例子的剖视图。
图26是表示聚合物膜的形状被调整了之后的被处理体的一个例子的剖视图。
图27是表示抗蚀剂膜被去除了之后的被处理体的一个例子的剖视图。
图28是表示层叠有氧化膜的被处理体的一个例子的剖视图。
图29是表示聚合物膜被去除了之后的被处理体的一个例子的剖视图。
具体实施方式
以下，参照附图，详细地说明本申请所公开的半导体装置的制造方法的实施方式。此外，本公开的技术并不被以下所示的实施方式限定。另外，附图是示意性的，需要留意的是，存在各要素的尺寸的关系、各要素的比率等与现实不同的情况。而且，也存在如下情况：在附图的相互间也包括彼此的尺寸的关系、比率不同的部分。
(第1实施方式)
[半导体装置的制造方法]
图1是表示本公开的第1实施方式的半导体装置的制造方法的一个例子的流程图。另外，图2～图6、图8～图10、以及图12～图14是表示各工序中的被处理体W的状态的一个例子的剖视图。
首先，准备例如图2所示的被处理体W(S100)。例如，如图2所示，被处理体W具有在基底基板10上以绝缘膜11、硬掩模膜12、防反射膜13、以及抗蚀剂膜14的顺序层叠绝缘膜11、硬掩模膜12、防反射膜13、以及抗蚀剂膜14而成的构造。在本实施方式中，基底基板10由例如添加氮的碳化硅(SiCN)形成，绝缘膜11由例如氧化硅(SiO2)形成，硬掩模膜12由例如氮化钛(TiN)形成。基底基板10是基板的一个例子。抗蚀剂膜14成形为与要埋入配线材料的区域相对应的预定的图案。
接着，图2所示的被处理体W被输入蚀刻装置内，使用例如等离子体而按照抗蚀剂膜14的形状蚀刻防反射膜13、硬掩模膜12、以及绝缘膜11(S101)。由此，例如，如图3所示，在防反射膜13、硬掩模膜12、以及绝缘膜11中，未被抗蚀剂膜14覆盖的部分被蚀刻，形成凹部15。然后，利用灰化去除抗蚀剂膜14。
接着，蚀刻了之后的被处理体W被输入成膜装置内，例如，如图4所示，在被处理体W的表面层叠包括阻挡膜和种膜的基底膜16(S102)。基底膜16通过例如溅射等层叠于被处理体W上。阻挡膜由例如钛(Ti)、氮化钛(TiN)等形成，种膜由例如铜(Cu)等形成。
接着，层叠有基底膜16的被处理体W被输入埋入装置内，配线材料17被埋入被处理体W的凹部15(S103)。配线材料17是具有导电性的第1材料的一个例子。在本实施方式中，配线材料17是例如Cu。配线材料17通过例如镀覆而埋入凹部15。然后，埋入有配线材料17的被处理体W的上表面利用CMP(化学机械研磨，Chemical Mechanical Polishing)进行研磨。埋入有配线材料17且表面被研磨了之后的被处理体W的截面如例如图5那样。
接着，被处理体W被输入蚀刻装置内，利用蚀刻去除绝缘膜11(S104)。被处理体W的绝缘膜11通过使用了例如氢氟酸(HF)的湿蚀刻去除。去除了绝缘膜11之后的被处理体W的截面成为例如图6那样。由此，含有配线材料17的多个构造物形成于基底基板10上。由基底膜16包围着的配线材料17是构造物的一个例子。
接着，去除了绝缘膜11之后的被处理体W被输入成膜装置4内，在被处理体W上层叠聚合物膜18(S105)。步骤S105是第1层叠工序的一个例子。图7是表示用于在被处理体W上层叠聚合物膜18的成膜装置4的一个例子的概略剖视图。在本实施方式中，成膜装置4是例如CVD(化学气相沉积，Chemical Vapor Deposition)装置。
成膜装置4具有容器40和排气装置41。排气装置41对容器40内的气体进行排气。容器40内被排气装置41设为预定的真空气氛。
在容器40借助供给管43a连接有以液体的方式收容作为原料单体的异氰酸酯的原料供给源42a。另外，在容器40借助供给管43b连接有以液体的方式收容作为原料单体的胺的原料供给源42b。异氰酸酯是第1单体的一个例子，胺是第2单体的一个例子。
从原料供给源42a供给来的异氰酸酯的液体被介于供给管43a的气化器44a气化。然后，异氰酸酯的蒸气经由供给管43a向作为气体喷出部的喷头45导入。另外，从原料供给源42b供给来的胺的液体被介于供给管43b的气化器44b气化。然后，胺的蒸气被向喷头45导入。
喷头45设置于例如容器40的上部，在下表面形成有许多喷出孔。喷头45将经由供给管43a和供给管43b导入了的异氰酸酯的蒸气和胺的蒸气从各个喷出孔呈喷淋状向容器40内喷出。
在容器40内设置有具有未图示的温度调节机构的载置台46。在载置台46载置有被处理体W。载置台46被温度调节机构控制成，被处理体W的温度成为预定温度。在被处理体W上成膜聚合物膜18的情况下，对被处理体W的温度进行控制，以使载置台46成为适于从原料供给源42a和原料供给源42b分别供给来的原料单体的蒸镀聚合的温度。适于蒸镀聚合的温度能够根据原料单体的种类确定，例如，能够设为40℃～150℃。
通过使用这样的成膜装置4而在被处理体W的表面上产生两种原料单体的蒸镀聚合反应，例如，如图8所示，能够在被处理体W的表面层叠聚合物膜18。在两种原料单体是异氰酸酯和胺的情况下，在被处理体W的表面层叠聚脲的聚合物膜18。
接着，层叠有聚合物膜18的被处理体W被输入蚀刻装置内，调整聚合物膜18的形状(S106)。在步骤S106中，以聚合物膜18的层叠到例如配线材料17的侧方的部分残留的方式通过使用了等离子体的各向异性蚀刻等蚀刻聚合物膜18。步骤S106是调整工序的一个例子。由此，被处理体W成为例如图9那样。通过调整蚀刻的条件，能够对聚合物膜18的残留于配线材料17的侧方的部分的厚度进行控制。
接着，聚合物膜18的形状被调整后的被处理体W被输入成膜装置内，例如，如图10所示，在被处理体W上层叠氧化膜19(S107)。步骤S107是第2层叠工序的一个例子。氧化膜19通过例如ALD(原子层沉积，Atomic Layer Deposition)在被处理体W上层叠。在本实施方式中，氧化膜19是由SiO2形成的低温氧化膜(LTO：Low Temperature Oxide)，是比以高温形成的热氧化膜稀疏的膜。氧化膜19是临时密封膜的一个例子。
接着，层叠有氧化膜19的被处理体W被输入退火装置5内，并被退火(S108)。步骤S108是加热工序的一个例子。图11是表示退火装置5的一个例子的概略剖视图。退火装置5具有容器51和排气管52。非活性气体经由供给管53向容器51内供给。在本实施方式中，非活性气体是例如氮(N2)气。容器51内的气体被从排气管52排气。在本实施方式中，容器51内是常压气氛，但作为其他形态，容器51内也可以是真空气氛。
在容器51内设置有供被处理体W载置的载置台54。在载置台54的与供被处理体W载置的面相对的位置设置有灯罩55。在灯罩55内配置有红外线灯56。
在被处理体W载置到载置台54上的状态下，向容器51内供给非活性气体。然后，使红外线灯56点亮，从而被处理体W被加热。若在被处理体W形成的聚合物膜18成为产生解聚反应的温度，则聚合物膜18解聚成两种原料单体。在本实施方式中，聚合物膜18是聚脲，因此，通过被处理体W被加热成300℃以上、例如350℃，聚合物膜18解聚成作为原料单体的异氰酸酯和胺。并且，由解聚产生的异氰酸酯和胺穿过作为稀疏的膜的氧化膜19，从而从氧化膜19与基底膜16之间脱离。由此，例如，如图12所示，在配线材料17的侧方且是基底膜16与氧化膜19之间形成空隙18’。
接着，退火后的被处理体W被输入成膜装置内，例如，如图13所示，在被处理体W上层叠保护膜20(S109)。步骤S109是第3层叠工序的一个例子。保护膜20是例如氮化硅(SiN)膜等钝化膜。
接着，例如，如图14所示，在层叠有保护膜20的被处理体W上层叠层间绝缘膜21(S110)。步骤S110是埋入工序的一个例子。层间绝缘膜21由例如SiO2形成。层间绝缘膜21是由具有绝缘性的第2材料形成的构件的一个例子。例如图14所示的被处理体W的一部分构成半导体装置的一部分。
如从图14可清楚那样，在本实施方式的被处理体W中，在配线材料17的侧方形成有与聚合物膜18的形状相对应的空隙18’。由此，能够使配线材料17的周围的构件的介电常数降低成所期望的值。由此，能够降低由配线材料17形成的配线的寄生电容。
在此，通过在例如图6所示的去除了绝缘膜11之后的被处理体W上有意地以阶梯覆盖率(日文：ステップカバレッジ)变差的条件层叠层间绝缘膜21，例如，如图15所示，也能够在配线材料17的侧方形成空隙22。图15是表示比较例中的被处理体W’的一个例子的剖视图。
不过，由以阶梯覆盖率变差的条件层叠的层间绝缘膜21形成的空隙22的形状和大小依赖于要形成空隙22的凹部的宽度、深度。例如，在凹部的宽度较窄且凹部较深的情况下，在凹部形成较大的空隙22，但在凹部的宽度较宽且凹部较浅的情况下，有时在凹部的下部形成较小的空隙22，或未形成空隙22。
另外，例如，如图15所示，形成于凹部的空隙22的形状和大小有时根据被处理体W’上的凹部的位置、对层间绝缘膜21进行成膜的成膜装置内的凹部的位置而波动。另外，即使被处理体W’上的凹部的位置、成膜装置内的凹部的位置相同，形成于凹部的空隙22的形状和大小也有时在被处理体W’之间波动。因此，难以针对任意形状的凹部稳定地形成所期望的形状和大小的空隙22。
相对于此，在本实施方式中，调整聚合物膜18的形状，以便成为与所期望的空隙18’的形状相对应的形状(参照图9)。并且，在层叠了氧化膜19之后，聚合物膜18被去除(参照图12)。由此，通过调整聚合物膜18的形状，不依赖于凹部的宽度、深度而能够在凹部形成任意的形状的空隙18’。因此，根据本实施方式的半导体装置的制造方法，能够在被处理体W的凹部形成已考虑了电特性和机械强度的任意的形状的空隙18’。
以上，对第1实施方式的半导体装置的制造方法进行了说明。本实施方式中的制造方法包括第1层叠工序(S105)、调整工序(S106)、第2层叠工序(S107)、以及加热工序(S108)。在第1层叠工序中，在设于基板10上且含有第1材料的多个构造物16、17的周围层叠聚合物膜18，该聚合物膜18是通过多种单体(异氰酸酯和胺)的聚合而生成的具有脲键的聚合物的膜。在调整工序中，调整聚合物膜的形状。在第2层叠工序中，以覆盖聚合物膜的方式在聚合物膜之上层叠临时密封膜19。在加热工序中，通过加热聚合物膜，聚合物解聚成多种单体，解聚而成的多种单体经由临时密封膜脱离。由此，能够在构造物的周边形成任意的形状的空隙。
另外，在上述的实施方式的调整工序中，利用蚀刻调整聚合物膜的形状，以便在各构造物16、17的侧方配置聚合物膜。由此，能够容易地调整聚合物膜的形状。
另外，在上述的实施方式的制造方法中还包括在加热工序之后进行的第3层叠工序(S109)和埋入工序(S110)。在第3层叠工序中，以覆盖临时密封膜的方式在临时密封膜之上层叠保护膜20。在埋入工序中，由第2材料形成的构件21被埋入保护膜上且是相邻的构造物之间。由此，能够制造在多个构造物之间配置有由第2材料形成的构件的半导体装置。
另外，在上述的实施方式中，第1材料是具有导电性的材料，第2材料是具有绝缘性的材料。由此，能够在含有作为半导体装置的配线发挥功能的导电性的材料的构造物的侧方形成任意的形状的空隙。由此，能够在构造物的侧方形成已考虑了电特性和机械强度的任意的形状的空隙。
另外，在上述的实施方式的第1层叠工序中，向收容有基板的容器40内供给含有第1单体(异氰酸酯)的气体和含有第2单体(胺)的气体。然后，通过第1单体与第2单体之间的蒸镀聚合生成的聚合物膜(聚脲)层叠于多个构造物的周围。由此，能够使聚合物膜容易地层叠于多个构造物的周围。
另外，在上述的实施方式中，第1层叠工序以比加热工序的温度低的温度进行。由此，能够在多个构造物的周围形成聚合物膜，在加热工序中使聚合物膜解聚，从而能够从多个构造物的周围去除聚合物膜。
(第2实施方式)
在第1实施方式中，在形成了含有配线材料17的多个构造物之后，在各构造物的侧方形成空隙18’，层间绝缘膜21埋入到各构造物之间。相对于此，在本实施方式中，在如下方面与第1实施方式不同：在形成了由具有绝缘性的构件构成的多个构造物之后，在各构造物的侧方形成空隙，配线材料17埋入各构造物之间。
[半导体装置的制造方法]
图16是表示本公开的第2实施方式的半导体装置的制造方法的一个例子的流程图。另外，图17～图23是表示本实施方式的制造方法所包含的各工序中的被处理体W的状态的一个例子的剖视图。此外，在以下的说明中，也参照图2和图3。另外，在以下的说明中，对于与第1实施方式同样的内容，省略重复的说明。
首先，准备例如图2所示的被处理体W(S200)。然后，图2所示的被处理体W被输入蚀刻装置内，例如，如图3所示，按照抗蚀剂膜14的形状蚀刻防反射膜13、硬掩模膜12、以及绝缘膜11(S201)。然后，利用灰化去除抗蚀剂膜14。由此，包括绝缘膜11、硬掩模膜12、以及防反射膜13的多个构造物形成于基底基板10上。在本实施方式中，绝缘膜11是具有绝缘性的第1材料的一个例子。
接着，按照抗蚀剂膜14的形状进行了蚀刻的被处理体W被输入例如图7所示的成膜装置4的容器40内，在被处理体W上层叠聚合物膜18(S202)。由此，例如，如图17所示，在包括绝缘膜11、硬掩模膜12、以及防反射膜13的多个构造物上层叠聚合物膜18。
接着，层叠有聚合物膜18的被处理体W被输入蚀刻装置内，聚合物膜18的形状被调整(S203)。例如，如图18所示，以聚合物膜18的层叠到包括绝缘膜11、硬掩模膜12、以及防反射膜13的各构造物的侧方的部分残留的方式利用各向异性蚀刻对聚合物膜18进行蚀刻。通过调整蚀刻的条件，能够对聚合物膜18的残留于包括绝缘膜11、硬掩模膜12、以及防反射膜13的各构造物的侧方的部分的厚度进行控制。
接着，聚合物膜18的形状被调整后的被处理体W被输入成膜装置内，例如，如图19所示，在被处理体W上层叠氧化膜19(S204)。
接着，层叠有氧化膜19的被处理体W被输入例如图11所示的退火装置5内并被退火(S205)。由此，聚合物膜18解聚成原料单体，原料单体经由氧化膜19脱离。由此，例如，如图20所示，在包括绝缘膜11、硬掩模膜12、以及防反射膜13的构造物的侧方形成与聚合物膜18的形状相对应的空隙18’。
接着，退火后的被处理体W被输入成膜装置内。例如，如图21所示，在被处理体W上层叠包括阻挡膜和种膜的基底膜16(S206)。
接着，层叠有基底膜16的被处理体W被输入埋入装置内，配线材料17被埋入被处理体W的凹部15(S207)。在本实施方式中，配线材料17是具有导电性的第2材料的一个例子。并且，埋入有配线材料17的被处理体W的上表面利用CMP进行研磨。埋入有配线材料17且表面被研磨了之后的被处理体W的截面成为例如图22那样。
接着，埋入有配线材料17的被处理体W被输入成膜装置内，例如，如图23所示，在被处理体W上层叠层间绝缘膜21(S208)。例如图23所示的被处理体W的一部分构成半导体装置的一部分。
以上，对第2实施方式的半导体装置的制造方法进行了说明。在本实施方式的制造方法中，也通过调整聚合物膜18的形状，能够在配线材料17的侧方形成任意的形状的空隙18’。因此，根据本实施方式的制造方法，能够在配线材料17的侧方形成已考虑了电特性和机械强度的任意的形状的空隙18’。
另外，在本实施方式中，先形成在配线材料17的周围配置的构造物，配线材料17埋入所形成的构造物之间。由此，能够省略去除绝缘膜11的工序(图1的步骤S104)。由此，能够更迅速地制造半导体装置。
(第3实施方式)
在上述的各实施方式中，在配线材料17的侧方形成与聚合物膜18的形状相应的空隙18’。相对于此，在本实施方式中，在具有源极、漏极、以及栅极的构造体中，在栅极的上方形成有与聚合物膜18的形状相应的空隙18’。以下，一边参照图24～图29一边对本实施方式的半导体装置的制造方法的一个例子进行说明。
首先，在被处理体W中，在形成有源极区域10s和漏极区域10d的基底基板10上层叠栅极硅膜23，该栅极硅膜23掺杂有预定的材料，在栅极硅膜23上层叠绝缘膜11。栅极硅膜23是由具有半导电性的材料形成的构造物的一个例子。并且，利用各向异性蚀刻，绝缘膜11和栅极硅膜23被成形成预定的形状。然后，被处理体W被输入例如图7所示的成膜装置4的容器40内。然后，例如，如图24所示，在被处理体W上层叠聚合物膜18。
接着，在层叠有聚合物膜18的被处理体W中，例如，如图25所示，在聚合物膜18上层叠抗蚀剂膜14，以聚合物膜18的位于栅极硅膜23的上方的部分残留的方式调整抗蚀剂膜14的形状。然后，利用各向异性蚀刻，以抗蚀剂膜14为掩模而对聚合物膜18进行蚀刻，例如，如图26所示，从而聚合物膜18的形状被调整。然后，例如，如图27所示，聚合物膜18上的抗蚀剂膜14被去除。
接着，聚合物膜18的形状被调整后的被处理体W被输入成膜装置内，例如，如图28所示，在被处理体W上层叠氧化膜19。
接着，层叠有氧化膜19的被处理体W被输入例如图11所示的退火装置5内并被退火。由此，聚合物膜18解聚成原料单体，原料单体经由氧化膜19脱离。由此，例如，如图29所示，在绝缘膜11的上方形成与聚合物膜18的形状相对应的空隙18’。
以上，对第3实施方式的半导体装置的制造方法进行了说明。根据本实施方式的制造方法，通过调整聚合物膜18的形状，能够在栅极硅膜23的上方形成任意的形状的空隙18’。
[其他]
此外，本申请所公开的技术并不限定于上述的实施方式，在其主旨的范围内可进行各种变形。
例如，在上述的各实施方式中，聚合物膜18是通过使用了两种原料单体的蒸气的蒸镀聚合层叠而成的，但所公开的技术并不限于此。例如，也可以是，聚合物膜18通过液体的聚合物涂敷于被处理体W上而层叠于被处理体W上。
另外，在上述的各实施方式中，使用聚脲作为构成聚合物膜18的聚合物的一个例子，也可以使用除了聚脲以外的聚合物。作为除了聚脲以外的聚合物，可列举出具有尿烷键的聚氨酯等。例如，能够通过使具有醇基的单体和具有异氰酸酯基的单体共聚，来合成聚氨酯。另外，聚氨酯被加热成预定的温度，从而聚氨酯被解聚成具有醇基的单体和具有异氰酸酯基的单体。
另外，在上述的各实施方式中，作为对聚合物膜18进行密封的临时密封膜，以作为由SiO2形成的低温氧化膜的氧化膜19为例进行了说明，作为临时密封膜，除了硅的低温氧化膜之外，也能够使用硅的低温氮化膜。低温氮化膜是利用例如等离子体CVD等以低温(例如100℃左右)进行成膜且比以高温(几百℃)进行成膜的氮化硅膜稀疏的膜。作为低温氮化膜，优选具有接近低温氧化膜的化学计量比的值且机械强度与低温氧化膜的机械强度相等或机械强度是低温氧化膜的机械强度以上的氮化硅膜。另外，临时密封膜只要是解聚而成的单体能够通过的膜，就也可以是添加碳的氧化硅膜(SiOC)、聚酰亚胺膜那样的多孔质膜。
此外，应该认为此次所公开的实施方式在全部的方面都是例示，并非限制性。实际上，上述的实施方式能以多样的形态具体化。另外，上述的实施方式不脱离所附的权利要求书及其主旨，也可以以各种形态被省略、置换、变更。

Claims (8)

1.一种半导体装置的制造方法，其包括如下工序：
第1层叠工序，在该第1层叠工序中，在设于基板上且含有第1材料的多个构造物的周围层叠聚合物膜，该聚合物膜是通过多种单体的聚合而生成的具有脲键的聚合物的膜；
调整工序，在该调整工序中，调整所述聚合物膜的形状；
第2层叠工序，在该第2层叠工序中，以覆盖所述聚合物膜的方式在所述聚合物膜之上层叠临时密封膜；以及
加热工序，在该加热工序中，通过加热所述聚合物膜，使所述聚合物解聚成所述多种单体，使解聚而成的所述多种单体经由所述临时密封膜脱离。
2.根据权利要求1所述的半导体装置的制造方法，其中，
在所述调整工序中，利用蚀刻调整所述聚合物膜的形状，以便在各所述构造物的侧方配置所述聚合物膜。
3.根据权利要求1或2所述的半导体装置的制造方法，其中，
该半导体装置的制造方法在所述加热工序之后还包括如下工序：
第3层叠工序，在该第3层叠工序中，以覆盖所述临时密封膜的方式在所述临时密封膜之上层叠保护膜；以及
埋入工序，在该埋入工序中，在所述保护膜上且是相邻的所述构造物之间埋入由第2材料形成的构件。
4.根据权利要求3所述的半导体装置的制造方法，其中，
所述第1材料是具有导电性或半导电性的材料，
所述第2材料是具有绝缘性的材料。
5.根据权利要求3所述的半导体装置的制造方法，其中，
所述第1材料是具有绝缘性的材料，
所述第2材料是具有导电性或半导电性的材料。
6.根据权利要求1～5中任一项所述的半导体装置的制造方法，其中，
在所述第1层叠工序中，向收容有所述基板的容器内供给含有第1单体的气体和含有第2单体的气体，通过所述第1单体与所述第2单体之间的蒸镀聚合而生成的所述聚合物膜层叠于所述多个构造物的周围。
7.根据权利要求1～6中任一项所述的半导体装置的制造方法，其中，
所述第1层叠工序以比所述加热工序的温度低的温度进行。
8.根据权利要求1～7中任一项所述的半导体装置的制造方法，其中，
所述临时密封膜是氧化膜或氮化膜。
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