CN110854222B - Double-sided preparation method of drift detector and drift detector - Google Patents
Double-sided preparation method of drift detector and drift detector Download PDFInfo
- Publication number
- CN110854222B CN110854222B CN201911154720.2A CN201911154720A CN110854222B CN 110854222 B CN110854222 B CN 110854222B CN 201911154720 A CN201911154720 A CN 201911154720A CN 110854222 B CN110854222 B CN 110854222B
- Authority
- CN
- China
- Prior art keywords
- region
- isolation layer
- drift
- layer
- photoresist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000002360 preparation method Methods 0.000 title claims abstract description 14
- 238000002955 isolation Methods 0.000 claims abstract description 106
- 239000004065 semiconductor Substances 0.000 claims abstract description 84
- 239000000758 substrate Substances 0.000 claims abstract description 77
- 238000000034 method Methods 0.000 claims abstract description 73
- 230000008569 process Effects 0.000 claims abstract description 55
- 238000005260 corrosion Methods 0.000 claims abstract description 51
- 238000001039 wet etching Methods 0.000 claims abstract description 15
- 238000000137 annealing Methods 0.000 claims abstract description 14
- 229910052751 metal Inorganic materials 0.000 claims abstract description 11
- 239000002184 metal Substances 0.000 claims abstract description 11
- 230000000149 penetrating effect Effects 0.000 claims abstract description 5
- 238000011049 filling Methods 0.000 claims abstract description 3
- 229920002120 photoresistant polymer Polymers 0.000 claims description 68
- 238000001312 dry etching Methods 0.000 claims description 19
- 238000005468 ion implantation Methods 0.000 claims description 18
- 150000002500 ions Chemical class 0.000 claims description 15
- 238000000059 patterning Methods 0.000 claims description 15
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 11
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 10
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 10
- 239000011248 coating agent Substances 0.000 claims description 10
- 238000000576 coating method Methods 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 claims description 10
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 10
- 239000010936 titanium Substances 0.000 claims description 10
- 229910052719 titanium Inorganic materials 0.000 claims description 10
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 9
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 9
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 9
- 229910052796 boron Inorganic materials 0.000 claims description 9
- 229910052698 phosphorus Inorganic materials 0.000 claims description 9
- 239000011574 phosphorus Substances 0.000 claims description 9
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 9
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 7
- 238000005229 chemical vapour deposition Methods 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 230000007797 corrosion Effects 0.000 claims description 2
- 238000001259 photo etching Methods 0.000 abstract description 10
- 238000005516 engineering process Methods 0.000 abstract description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 20
- 229910052710 silicon Inorganic materials 0.000 description 20
- 239000010703 silicon Substances 0.000 description 20
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 6
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 5
- 238000005530 etching Methods 0.000 description 5
- 238000000206 photolithography Methods 0.000 description 5
- 238000004528 spin coating Methods 0.000 description 5
- 239000000463 material Substances 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- XPDWGBQVDMORPB-UHFFFAOYSA-N Fluoroform Chemical compound FC(F)F XPDWGBQVDMORPB-UHFFFAOYSA-N 0.000 description 2
- 238000000231 atomic layer deposition Methods 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 230000001788 irregular Effects 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 238000009987 spinning Methods 0.000 description 2
- TXEYQDLBPFQVAA-UHFFFAOYSA-N tetrafluoromethane Chemical compound FC(F)(F)F TXEYQDLBPFQVAA-UHFFFAOYSA-N 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000002059 diagnostic imaging Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 230000005658 nuclear physics Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
- H01L31/035272—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions characterised by at least one potential jump barrier or surface barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
- H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
- H01L31/115—Devices sensitive to very short wavelength, e.g. X-rays, gamma-rays or corpuscular radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Light Receiving Elements (AREA)
Abstract
The invention provides a double-sided preparation method of a drift detector, which comprises the steps of forming a first isolation layer on one side of a semiconductor substrate, sequentially forming a second isolation layer and an anti-corrosion layer on the other side of the semiconductor substrate, selectively removing the first isolation layer to form an anode region and a drift ring region, and selectively removing the second isolation layer and the anti-corrosion layer to form a collecting region; respectively carrying out ion doping on the anode region, the drift ring region and the collecting region and annealing the semiconductor substrate; forming dielectric layers on the surfaces of the anode region, the drift ring region and the collecting region; and forming a contact hole penetrating through the dielectric layer on the dielectric layer, and filling the contact hole to form a metal lead. According to the invention, the anti-corrosion layer is deposited on the second isolation layer, so that the damage to the second isolation layer, the anode region and the drift ring region is reduced when the first isolation layer is removed by adopting a wet etching process, and the realization of a double-sided process by adopting a single-sided photoetching technology is facilitated. The invention also provides a drift detector obtained by applying the double-sided preparation method.
Description
Technical Field
The invention belongs to the field of semiconductor detectors, and particularly relates to a double-sided preparation method of a drift detector and the drift detector.
Background
The silicon drift detector is characterized in that a large-area uniform PN abrupt junction is prepared on a ray incidence surface of a high-purity N-type silicon chip, a point-shaped N-type anode is prepared in the center of the other surface opposite to the ray incidence surface, and a plurality of concentric P-type drift electrodes are arranged around the N-type anode. When the silicon drift detector works, reverse voltage is applied to PN junctions on two sides of the silicon drift detector, and therefore a potential well is generated in the silicon drift detector. After a potential difference is added on the P-type drift electrode, a transverse electric field can be generated in the silicon drift detector, and the transverse electric field bends the potential well, so that electrons generated by the radiation of the incident surface are forced to drift towards the N-type anode under the action of the electric field and reach the vicinity of the N-type anode to generate signals. The lateral PN junction structure of the silicon drift detector enables the capacitance of the silicon drift detector to be small, and meanwhile, the leakage current of the silicon drift detector is small, so that electronic signals can be output quickly with low noise. In view of the above advantages of the silicon drift detector, the silicon drift detector is widely applied to the fields of medical imaging, X-ray energy spectrum, national security, celestial physics, high-energy nuclear physics and the like.
The existing silicon drift detector adopts a double-sided process, the manufacturing process and the flow are more complicated than those of a common semiconductor device, and the manufacturing difficulty is higher particularly for a conventional semiconductor factory only having a single-sided photoetching process. When the first isolation layer on the surface of the semiconductor substrate is etched by adopting a dry etching process, certain damage is easily generated on an anode region and a drift ring region to be formed, and further the working voltage, the dark current and the reliability of the drift detector are influenced.
Disclosure of Invention
In view of the above problems, an object of the present invention is to provide a double-sided preparation method of a drift detector and a drift detector, which can reduce damage to an anode region and a drift ring region.
In order to achieve the purpose, the invention adopts the following technical scheme: a double-sided preparation method of a drift detector comprises the following steps:
providing a semiconductor substrate, forming a first isolation layer on the front surface of the semiconductor substrate, sequentially forming a second isolation layer and an anti-corrosion layer on the back surface of the semiconductor substrate, selectively removing the first isolation layer to form an anode region and a drift ring region, and selectively removing the second isolation layer and the anti-corrosion layer to form a collecting region; or sequentially forming a second isolating layer and an anti-corrosion layer on the front side of the semiconductor substrate, forming a first isolating layer on the back side of the semiconductor substrate, and selectively removing the first isolating layer by adopting a wet etching process to form the anode region and the drift ring region; selectively removing the second isolation layer and the anti-corrosion layer by adopting a dry etching process to form the collecting region; respectively carrying out ion doping on the anode region, the drift ring region and the collecting region, wherein the ion doping types of the drift ring region and the collecting region are opposite to the ion doping type of the anode region; annealing the semiconductor substrate; forming dielectric layers on the surfaces of the anode region, the drift ring region and the collecting region; and forming a contact hole penetrating through the dielectric layer along the thickness direction of the semiconductor substrate on the dielectric layer, and filling the contact hole to form a metal lead.
Preferably, the step of selectively removing the first isolation layer to form the anode region and the drift ring region includes: coating photoresist on the surface of the first isolation layer; patterning the photoresist to define an anode region and a drift ring region; removing the first isolating layer on the surfaces of the anode region and the drift ring region by adopting a wet etching process; and removing the photoresist on the surface of the first isolation layer.
Preferably, the step of selectively removing the second isolation layer and the etch-resistant layer to form the collection region comprises: coating photoresist on the surface of the anti-corrosion layer; patterning the photoresist to define a collection region; removing the second isolation layer and the anti-corrosion layer on the surface of the collecting region by adopting a dry etching process; and removing the photoresist on the surface of the corrosion-resistant layer.
Preferably, the anode region is ion-doped, including: and coating photoresist on the surfaces of the anode region, the drift ring region and the first isolation layer, patterning the photoresist to define the anode region, performing phosphorus ion implantation on the anode region by taking the photoresist on the surfaces of the drift ring region and the first isolation layer as a mask to form N-type doping, or performing boron ion implantation to form P-type doping, and removing the photoresist on the surfaces of the drift ring region and the first isolation layer.
Preferably, the drift ring region is ion-doped, including: and coating photoresist on the surfaces of the anode region, the drift ring region and the first isolation layer, patterning the photoresist to define the drift ring region, performing boron ion implantation on the drift ring region by taking the photoresist on the surfaces of the anode region and the first isolation layer as a mask to form P-type doping, or performing phosphorus ion implantation to form N-type doping, and removing the photoresist on the surfaces of the anode region and the first isolation layer.
Preferably, the ion doping of the collection region comprises: coating photoresist on the collecting region and the surface of the anti-corrosion layer, patterning the photoresist to define the collecting region, performing boron ion implantation on the collecting region by taking the photoresist on the surface of the anti-corrosion layer as a mask to form P-type doping, or performing phosphorus ion implantation to form N-type doping, and removing the photoresist on the surface of the anti-corrosion layer.
Preferably, the annealing process is performed on the semiconductor substrate, and includes: the semiconductor substrate is subjected to an annealing treatment at 700 to 1000 ℃.
Preferably, a dielectric layer is formed on the surfaces of the anode region, the drift ring region and the collection region, and comprises: and forming dielectric layers on the surfaces of the anode region, the drift ring region and the collecting region by adopting a chemical vapor deposition process, wherein the thickness of the dielectric layer is 50-200 nanometers.
Preferably, the semiconductor substrate comprises an intrinsic semiconductor substrate or a lightly doped semiconductor substrate, the first isolation layer and the second isolation layer comprise silicon oxide, the anti-corrosion layer comprises silicon nitride, the dielectric layer comprises silicon oxide or silicon nitride, and the metal wire comprises any one of titanium, titanium nitride, aluminum or aluminum nitride, or any one of a stack of titanium/titanium nitride, titanium/titanium nitride/aluminum nitride.
The present invention also provides a drift detector comprising: the drift detector is prepared by any one of the double-sided preparation methods of the drift detector.
Compared with the prior art, the invention has the following beneficial effects: in the prior art, a dry etching process is generally adopted to etch the first isolation layer on the surface of the semiconductor substrate to form the anode region and the drift ring region, but the dry etching process has certain damage to the formation of the anode region and the drift ring region. According to the invention, the anti-corrosion layer is deposited on the second isolation layer on the surface of the semiconductor substrate, so that the first isolation layer on the surface of the semiconductor substrate can be removed by adopting a wet etching process to form the anode region and the drift ring region, namely, the wet etching process is adopted to replace a dry etching process aiming at the formation of the anode region and the drift ring region, the damage of the dry etching process to the anode region and the drift ring region is reduced, and the performance of the silicon drift detector is improved. Meanwhile, different etching processes are adopted on the front side and the back side of the semiconductor substrate, so that a double-sided processing process under the condition of a single-sided photoetching process can be realized, and the dependence of the double-sided process of the silicon drift detector on processing equipment is simplified.
Drawings
Fig. 1 is a flowchart of a double-sided manufacturing method of a drift detector according to an embodiment of the present invention;
fig. 2 to fig. 12 are device structures corresponding to steps in a double-sided manufacturing method of a drift detector according to an embodiment of the present invention;
FIG. 13 is a schematic diagram of a front structure of a drift detector provided by an embodiment of the invention;
fig. 14 is a schematic structural diagram of a back surface of a drift detector according to an embodiment of the present invention.
Wherein: 1. the semiconductor device comprises a semiconductor substrate, 2 a first isolation layer, 3 a second isolation layer, 4 an anti-corrosion layer, 5 an anode region, 6 a drift ring region, 7 a collecting region, 8 a dielectric layer, 9 contact holes and 10 metal leads.
Detailed Description
The following describes an embodiment according to the present invention with reference to the drawings.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, however, the present invention may be practiced in other ways than those specifically described herein, and thus the present invention is not limited to the specific embodiments disclosed below.
When the first isolation layer on the surface of the semiconductor substrate is etched by adopting a dry etching process, certain damage is easily generated on an anode region and a drift ring region to be formed, and further the working voltage, the dark current and the reliability of the drift detector are influenced.
The invention provides a double-sided preparation method of a drift detector, which is characterized in that an anti-corrosion layer is deposited on the surface of a second isolation layer on the surface of a semiconductor substrate, so that a first isolation layer on the surface of the semiconductor substrate can be removed by adopting a wet etching process to form an anode region and a drift ring region, namely, the wet etching process is adopted to replace a dry etching process aiming at the formation of the anode region and the drift ring region, the damage of the dry etching process to the anode region and the drift ring region is reduced, the performance of the silicon drift detector is improved, and higher working voltage and lower dark current are achieved. Meanwhile, a double-sided processing technology under the condition of a single-sided photoetching technology can be realized, and the dependence of the double-sided technology of the silicon drift detector on processing equipment is simplified.
For better understanding of the technical solutions and effects of the present invention, the following detailed description will be made of specific embodiments with reference to fig. 1 to 14.
A schematic diagram of a layer structure according to an embodiment of the invention is shown in the drawings, which are not drawn to scale, wherein certain details are exaggerated and possibly omitted for clarity. The various regions, shapes of layers, and relative sizes and positional relationships between layers shown in the drawings are merely exemplary, and in practice, there may be deviations due to manufacturing tolerances or technical limitations, and those skilled in the art may additionally design regions/layers having different shapes, sizes, relative positions, as actually required.
Referring to fig. 1, a double-sided manufacturing method of a drift detector provided in an embodiment of the present invention includes the following steps:
S101A: providing a semiconductor substrate 1, forming a first isolation layer 2 on the front surface of the semiconductor substrate 1, and selectively removing the first isolation layer 2 to form an anode region 5 and a drift ring region 6; and sequentially forming a second isolation layer 3 and an anti-corrosion layer 4 on the back surface of the semiconductor substrate 1, and selectively removing the second isolation layer 3 and the anti-corrosion layer 4 to form a collecting region 7.
First, as shown in fig. 2, a semiconductor substrate 1 is provided. The semiconductor substrate 1 may comprise any suitable semiconductor substrate material, and may specifically be, but not limited to, silicon, germanium, silicon germanium, SOI (semiconductor on insulator), silicon carbide, gallium arsenide, or any group iii-v compound semiconductor, and the like. In the present embodiment, the semiconductor substrate 1 is preferably an intrinsic silicon substrate or an N-type lightly doped silicon substrate.
As shown in fig. 3, a first isolation layer 2 is deposited on the front surface of a semiconductor substrate 1, a second isolation layer 3 is deposited on the back surface of the semiconductor substrate 1, the first isolation layer 2 and the second isolation layer 3 are insulating dielectric layers, the material of the insulating dielectric layers may be various insulating dielectric layer materials such as silicon oxide, aluminum oxide, silicon nitride, etc., the deposition method may include various methods such as dry oxygen oxidation, wet oxygen oxidation, Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), Atomic Layer Deposition (ALD), etc., wherein the first isolation layer 2 and the second isolation layer 3 are preferably silicon oxide layers. Specifically, the semiconductor substrate 1 is cleaned conventionally, and then hydrofluoric acid (HF) + isopropyl alcohol (IPA) + (water) H is used2Removing natural oxide layers on the front and back surfaces of the semiconductor substrate 1 by O solution, and forming silicon oxide isolation layers on the front and back surfaces of the semiconductor substrate 1 by wet-oxygen oxidation, namely forming a first isolation layer 2 and a second isolation layer 3, wherein the thicknesses of the first isolation layer 2 and the second isolation layer 3 are 400nm to600nm。
As shown in fig. 4, an anti-corrosion layer 4 is formed on the surface of the second isolation layer 3, wherein the anti-corrosion layer 4 is preferably a silicon nitride layer. Specifically, a silicon nitride anti-corrosion layer is formed on the surface of the second isolation layer 3 on the back surface of the semiconductor substrate 1 by LPCVD (Low-pressure chemical vapor deposition), wherein the thickness of the silicon nitride anti-corrosion layer is 10nm to 50 nm.
As shown in fig. 5, the first isolation layer 2 is selectively removed to form an anode region 5 and a drift ring region 6. Specifically, a photoresist is coated on the surface of the first isolation layer 2 on the front surface of the semiconductor substrate 1 in a spinning mode, and the photoresist is patterned by utilizing a photoetching process to define the anode region 5 and the drift ring region 6, namely, the photoresist corresponding to the anode region 5 and the drift ring region 6 is removed; removing the first isolation layer 2 on the surfaces of the anode region 5 and the drift ring region 6 by adopting a wet etching process, namely immersing the semiconductor substrate 1 into a hydrofluoric acid solution, and removing the first isolation layer 2 corresponding to the anode region 5 and the drift ring region 6 by taking the residual photoresist on the surface of the first isolation layer 2 as a mask to expose the front surface of the semiconductor substrate 1 corresponding to the anode region 5 and the drift ring region 6; the photoresist on the surface of the first isolation layer 2 outside the anode region 5 and the drift ring region 6 is then removed.
As shown in fig. 6, selectively removing the second isolation layer 3 and the anti-corrosion layer 4 to form a collection region 7, specifically, spin-coating photoresist on the surface of the anti-corrosion layer 4 on the back surface of the semiconductor substrate 1, and patterning the photoresist by using a photolithography process to define the collection region 7, i.e. removing the photoresist corresponding to the collection region 7; etching the second isolation layer 3 and the anti-corrosion layer 4 on the surface of the collection region 7 by adopting a dry etching process to expose the back surface of the semiconductor substrate 1 corresponding to the collection region 7, specifically, etching the second isolation layer 3 and the anti-corrosion layer 4 by adopting a plasma dry etching method, wherein carbon tetrafluoride (CF) is adopted as an etching gas4) And trifluoromethane (CHF)3) (ii) a And then removing the residual photoresist on the surface of the anti-corrosion layer 4.
The method for realizing selective removal may be a photolithography method, and of course, other methods may also be adopted as long as the method for realizing such a structure is included in the scope of protection of the present application.
Through the steps, forming a first isolation layer 2 on the front surface of the semiconductor substrate 1, and selectively removing the first isolation layer 2 to form an anode region 5 and a drift ring region 6; and sequentially forming a second isolation layer 3 and an anti-corrosion layer 4 on the back surface of the semiconductor substrate 1, and selectively removing the second isolation layer 3 and the anti-corrosion layer 4 to form a collecting region 7, namely forming an anode region 5 and a drift ring region 6 on the front surface of the semiconductor and forming the collecting region 7 on the back surface of the semiconductor. Specifically, the anode region 5 and the drift ring region 6 may also be formed on the back surface of the semiconductor substrate 1, and the collection region 7 may also be formed on the front surface of the semiconductor substrate 1, as shown in step S101B, which is not limited herein.
S101B: sequentially forming a second isolation layer 3 and an anti-corrosion layer 4 on the front surface of the semiconductor substrate 1, and selectively removing the second isolation layer 3 and the anti-corrosion layer 4 to form a collecting region 7; a first isolation layer 2 is formed on the back side of the semiconductor substrate 1, and the first isolation layer 2 is selectively removed to form an anode region 5 and a drift ring region 6.
The difference between this step and S101A is: an anode region 5 and a drift ring region 6 are formed on the back surface of the semiconductor substrate 1, and a collection region 7 is formed on the front surface of the semiconductor substrate 1. Specifically, a second isolation layer 3 and an anti-corrosion layer 4 are sequentially formed on the front surface of a semiconductor substrate 1, a first isolation layer 2 is formed on the back surface of the semiconductor substrate 1, photoresist is coated on the surface of the first isolation layer 2 in a spinning mode, the photoresist is patterned by utilizing a photoetching process to define an anode region 5 and a drift ring region 6, and the first isolation layer 2 on the surfaces of the anode region 5 and the drift ring region 6 is removed by adopting a wet etching process to form the anode region 5 and the drift ring region 6; spin-coating photoresist on the surface of the anti-corrosion layer 4 on the front surface of the semiconductor substrate 1, patterning the photoresist by utilizing a photoetching process to define a collecting region 7, namely removing the photoresist corresponding to the collecting region 7, and etching the second isolation layer 3 and the anti-corrosion layer 4 on the surface of the collecting region 7 by adopting a dry etching process to form the collecting region 7; the rest of the processes, parameters and steps are the same as S101A. The method for realizing selective removal may be a photolithography method, and of course, other methods may also be adopted as long as the method for realizing such a structure is included in the scope of protection of the present application.
By adopting the technical scheme of S101A or S101B, as the anti-corrosion layer 4 is deposited on the surface of the second isolation layer 3, when the first isolation layer 2 on the surfaces of the anode region 5 and the drift ring region 6 is removed by adopting a wet etching process, the anti-corrosion layer 4 plays a role in protecting the second isolation layer 3, and the damage of the wet etching process to the second isolation layer 3 is reduced; meanwhile, the wet etching process is adopted to replace the traditional dry etching process to etch the first isolation layer 2 to form the anode region 5 and the drift ring region 6, so that the damage of the dry etching process to the anode region 5 and the drift ring region 6 is reduced, and the performance of the silicon drift detector is improved.
S102: and respectively carrying out ion doping on the anode region 5, the drift ring region 6 and the collecting region 7, wherein the ion doping type of the drift ring region 6 and the collecting region 7 is opposite to that of the anode region 5.
Note that, as shown in fig. 7, the anode region 5 is ion-doped: and spin-coating photoresist on the surfaces of the anode region 5, the drift ring region 6 and the first isolation layer 2, and patterning the photoresist by using a photoetching process to define the anode region 5, namely removing the photoresist on the surface of the anode region 5. And (3) performing phosphorus ion implantation on the anode region 5 by taking the photoresist on the surfaces of the drift ring region 6 and the first isolation layer 2 as a mask to form N-type doping, or performing boron ion implantation to form P-type doping, preferably performing N-type doping on the anode region 5, and then removing the photoresist on the surfaces of the drift ring region 6 and the first isolation layer 2.
As shown in fig. 8, the drift ring region 6 is ion-doped: and spin-coating photoresist on the surfaces of the anode region 5, the drift ring region 6 and the first isolation layer 2, and patterning the photoresist by using a photoetching process to define the drift ring region 6, namely removing the photoresist on the surface of the drift ring region 6. And (3) taking the photoresist on the surfaces of the anode region 5 and the first isolation layer 2 as a mask, carrying out boron ion implantation on the drift ring region 6 to form P-type doping, or carrying out phosphorus ion implantation to form N-type doping, and then removing the photoresist on the surfaces of the anode region 5 and the first isolation layer 2. In particular, the drift ring region 6 is doped differently than the anode region 5.
As shown in fig. 9, the collection region 7 is ion-doped: and spin-coating photoresist on the surfaces of the collecting region 7 and the anti-corrosion layer 4, and patterning the photoresist by using a photoetching process to define the collecting region 7, namely removing the photoresist on the surface of the collecting region 7. And (3) taking the photoresist on the surface of the anti-corrosion layer 4 as a mask, carrying out boron ion implantation on the collecting region 7 to form P-type doping, or carrying out phosphorus ion implantation to form N-type doping, and removing the photoresist on the surface of the anti-corrosion layer 4. In particular, the doping type of the collection region 7 is the same as the doping type of the drift ring region 6.
The doping of the anode region 5, the drift ring region 6 and the collection region 7 is not limited to a particular order. A photolithographic process may be used to pattern the photoresist to define the anode region 5, the drift ring region 6 and the collection region 7, although other methods may be used as long as the method for achieving such a structure is included in the scope of the present application.
S103: the semiconductor substrate 1 is subjected to annealing treatment.
It should be noted that, the semiconductor substrate 1 is subjected to an annealing treatment at 700 ℃ to 1000 ℃, preferably, an N-type junction is formed in the anode region 5, a P-type junction is formed in the drift ring region 6 and the collection region 7, the doping ions in the anode region 5, the drift ring region 6 and the collection region 7 are activated by the annealing treatment, and the depth of the P-type junction or the N-type junction is controlled, specifically, a high temperature thermal annealing process is adopted, annealing is performed for 30 minutes at 850 ℃ in a nitrogen atmosphere, and the annealing temperature and the annealing time are optimized to obtain a proper junction depth.
S104: a dielectric layer 8 is formed on the surfaces of the anode region 5, the drift ring region 6 and the collection region 7.
As shown in fig. 10, a dielectric layer 8 is formed on the surfaces of the anode region 5, the drift ring region 6 and the collection region 7, and the dielectric layer 8 may be a silicon oxide, aluminum oxide, or silicon nitride material, preferably silicon oxide. Specifically, a Plasma Enhanced Chemical Vapor Deposition (PECVD) mode is adopted, silicon oxide is deposited on the surfaces of the anode region 5, the drift ring region 6 and the collecting region 7 after ion doping to serve as a dielectric layer 8, and the thickness of the dielectric layer 8 is 50nm to 200 nm.
S105: a contact hole 9 penetrating the dielectric layer 8 in the thickness direction of the semiconductor substrate 1 is formed on the dielectric layer 8, and the contact hole 9 is filled to form a metal lead 10.
As shown in fig. 11, a contact hole 9 penetrating through the dielectric layer 8 in the thickness direction of the semiconductor substrate 1 is formed on the dielectric layer 8, specifically, a photoresist is spin-coated on the dielectric layer 8, the photoresist is patterned by using a photolithography process to define the contact hole 9, and the dielectric layer 8 in the contact hole 9 is etched by using a dry etching process to form the contact hole 9. As shown in fig. 12, the contact hole 9 is filled with any one of titanium, titanium nitride, aluminum or aluminum nitride, or filled with any one of a stack of titanium/titanium nitride, titanium/titanium nitride/aluminum nitride, preferably with a stack of titanium/titanium nitride/aluminum nitride, and patterned and etched by a photolithography process to form a metal lead 10, where the metal lead 10 mainly realizes interconnection of a P-type junction or an N-type junction formed by ion doping in the anode region 5, the drift ring region 6 and the collection region 7 with an external detection device.
Referring to fig. 13-14, the present invention also provides a drift detector comprising: the drift detector formed by any one of the above preparation methods, comprising: a semiconductor substrate 1; a P-type doped junction formed in the semiconductor substrate 1; an N-type doped junction formed in the semiconductor substrate 1; the metal electrode layer is positioned on the P-type doped junction and the N-type semiconductor junction; the first isolation layer 2 and the second isolation layer 3 are located on the front surface or the back surface of the semiconductor substrate 1 and used for isolating the P-type doped junction from the N-type doped junction.
The metal electrode layer comprises an anode region 5, a drift ring region 6 and a collecting region 7, wherein the anode region 5 and the drift ring region 6 are located on one surface of the semiconductor substrate 1 and are distributed from the center to the periphery in sequence, and the collecting region 7 is located on the other surface of the semiconductor substrate 1.
The drift ring region 6 and the collection region 7 correspond to doping types opposite to the doping type corresponding to the anode region 5.
The drift ring regions 6 are of separated annular structures, the rings are circular, square, polygonal or irregular in shape, so that separated drift rings are formed, the anode regions 5 are located in the centers of the drift rings of the innermost rings, and the collecting regions 7 are circular, square, polygonal or irregular in shape.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. A double-sided preparation method of a drift detector is characterized by comprising the following steps:
providing a semiconductor substrate, forming a first isolation layer on the front surface of the semiconductor substrate, sequentially forming a second isolation layer and an anti-corrosion layer on the back surface of the semiconductor substrate, selectively removing the first isolation layer by adopting a wet etching process to form an anode region and a drift ring region, and selectively removing the second isolation layer and the anti-corrosion layer by adopting a dry etching process to form a collecting region;
or sequentially forming the second isolation layer and the anti-corrosion layer on the front surface of the semiconductor substrate, forming the first isolation layer on the back surface of the semiconductor substrate, and selectively removing the first isolation layer by adopting a wet etching process to form the anode region and the drift ring region; selectively removing the second isolation layer and the anti-corrosion layer by adopting a dry etching process to form the collecting region;
respectively carrying out ion doping on the anode region, the drift ring region and the collecting region, wherein the ion doping types of the drift ring region and the collecting region are opposite to the ion doping type of the anode region;
annealing the semiconductor substrate; forming dielectric layers on the surfaces of the anode region, the drift ring region and the collecting region;
and forming a contact hole penetrating through the dielectric layer along the thickness direction of the semiconductor substrate on the dielectric layer, and filling the contact hole to form a metal lead.
2. The method of double-sided fabrication of a drift detector according to claim 1, wherein the step of selectively removing the first isolation layer to form an anode region and a drift ring region comprises:
coating photoresist on the surface of the first isolation layer; patterning the photoresist to define the anode region and a drift ring region;
removing the first isolating layer on the surfaces of the anode region and the drift ring region by adopting a wet etching process; and removing the photoresist on the surface of the first isolation layer.
3. The method of double-sided fabrication of a drift detector of claim 1, wherein the step of selectively removing the second isolation layer and the etch-resistant layer to form a collection region comprises:
coating photoresist on the surface of the anti-corrosion layer; patterning the photoresist to define the collection region;
removing the second isolation layer and the anti-corrosion layer on the surface of the collecting region by adopting a dry etching process;
and removing the photoresist on the surface of the corrosion-resistant layer.
4. The double-sided fabrication method of a drift detector according to claim 1, wherein ion doping the anode region comprises: coating photoresist on the surfaces of the anode region, the drift ring region and the first isolation layer, patterning the photoresist to define the anode region, performing phosphorus ion implantation on the anode region by taking the photoresist on the surfaces of the drift ring region and the first isolation layer as a mask to form N-type doping, or performing boron ion implantation to form P-type doping, and removing the photoresist on the surfaces of the drift ring region and the first isolation layer.
5. The double-sided preparation method of the drift detector according to claim 1, wherein the ion doping of the drift ring region comprises: coating photoresist on the surfaces of the anode region, the drift ring region and the first isolation layer, patterning the photoresist to define the drift ring region, performing boron ion implantation on the drift ring region by taking the photoresist on the surfaces of the anode region and the first isolation layer as a mask to form P-type doping, or performing phosphorus ion implantation to form N-type doping, and removing the photoresist on the surfaces of the anode region and the first isolation layer.
6. The method of claim 1, wherein the ion doping the collection region comprises: coating photoresist on the surfaces of the collecting region and the anti-corrosion layer, patterning the photoresist to define the collecting region, and performing boron ion implantation on the collecting region by taking the photoresist on the surface of the anti-corrosion layer as a mask to form P-type doping, or performing phosphorus ion implantation to form N-type doping, and removing the photoresist on the surface of the anti-corrosion layer.
7. The method of double-sided fabrication of a drift detector according to claim 1, wherein annealing the semiconductor substrate comprises: and carrying out annealing treatment on the semiconductor substrate at 700-1000 ℃.
8. The double-sided preparation method of the drift detector according to claim 1, wherein forming dielectric layers on the surfaces of the anode region, the drift ring region and the collection region comprises: and forming dielectric layers on the surfaces of the anode region, the drift ring region and the collecting region by adopting a chemical vapor deposition process, wherein the thickness of the dielectric layers is 50-200 nanometers.
9. The method of claim 1, wherein the semiconductor substrate comprises an intrinsic semiconductor substrate or a lightly doped semiconductor substrate, the first and second isolation layers comprise silicon oxide, the anti-corrosion layer comprises silicon nitride, the dielectric layer comprises silicon oxide or silicon nitride, and the metal wire comprises any one of titanium, titanium nitride, aluminum, or aluminum nitride, or any one of a stack of titanium/titanium nitride, titanium/titanium nitride/aluminum nitride.
10. A drift detector prepared by the double-sided preparation method of the drift detector according to any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911154720.2A CN110854222B (en) | 2019-11-22 | 2019-11-22 | Double-sided preparation method of drift detector and drift detector |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911154720.2A CN110854222B (en) | 2019-11-22 | 2019-11-22 | Double-sided preparation method of drift detector and drift detector |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110854222A CN110854222A (en) | 2020-02-28 |
| CN110854222B true CN110854222B (en) | 2021-04-06 |
Family
ID=69603570
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911154720.2A Active CN110854222B (en) | 2019-11-22 | 2019-11-22 | Double-sided preparation method of drift detector and drift detector |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110854222B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111739972B (en) * | 2020-07-01 | 2023-11-10 | 中国科学院上海技术物理研究所 | Double-sided annular Ge-based long-wave infrared and terahertz detector and preparation method |
| CN114784122B (en) * | 2022-03-07 | 2024-04-16 | 中国科学院微电子研究所 | Three-dimensional groove electrode detector with double-sided floating rings and preparation method thereof |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10213812B4 (en) * | 2002-03-27 | 2007-03-29 | MAX-PLANCK-Gesellschaft zur Förderung der Wissenschaften e.V. | Cable transfer for a semiconductor detector |
| US7060523B2 (en) * | 2003-05-12 | 2006-06-13 | The Regents Of The University Of California | Lithium-drifted silicon detector with segmented contacts |
| US7884432B2 (en) * | 2005-03-22 | 2011-02-08 | Ametek, Inc. | Apparatus and methods for shielding integrated circuitry |
| CN100594622C (en) * | 2008-05-06 | 2010-03-17 | 北京大学 | Ultrathin silicon based particle detector and preparing method thereof |
| CN102446733B (en) * | 2011-12-08 | 2014-03-12 | 上海先进半导体制造股份有限公司 | Power device with high-voltage radio-frequency lateral diffusion structure and production method of power device |
| CN107342338A (en) * | 2017-08-22 | 2017-11-10 | 北京世纪金光半导体有限公司 | A kind of ultraviolet the snowslide drifting detector and detection method of more drift ring structures |
| CN108281506B (en) * | 2017-12-29 | 2019-09-20 | 中国科学院微电子研究所 | Silicon drifting detector (SDD) |
| CN109671797B (en) * | 2018-12-21 | 2020-08-04 | 中国科学院微电子研究所 | Drift detector and manufacturing method thereof |
| CN110265511B (en) * | 2019-05-22 | 2021-01-26 | 李正 | Processing technology of large-area double-sided silicon drift detector |
-
2019
- 2019-11-22 CN CN201911154720.2A patent/CN110854222B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN110854222A (en) | 2020-02-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20200212230A1 (en) | Leakage pathway layer for solar cell | |
| US5053083A (en) | Bilevel contact solar cells | |
| US7670638B2 (en) | Protection layer for fabricating a solar cell | |
| US20100071765A1 (en) | Method for fabricating a solar cell using a direct-pattern pin-hole-free masking layer | |
| CN110168742A (en) | Method for manufacturing the photovoltaic cell with the passivation contact of back side polysilicon | |
| CN110854222B (en) | Double-sided preparation method of drift detector and drift detector | |
| CN110854223B (en) | Preparation method of drift detector and drift detector | |
| JP2024509329A (en) | Selective contact area embedded solar cell and its backside contact structure | |
| US20140130854A1 (en) | Photoelectric device and the manufacturing method thereof | |
| CN110176501A (en) | A kind of preparation method of MPS structure process silicon carbide diode | |
| CN111384154A (en) | Radiation-resistant bipolar device | |
| CN104576832B (en) | Blocking impurity band detector manufacturing method based on SOI | |
| WO2017002747A1 (en) | Photoelectric conversion element | |
| US20230253521A1 (en) | Solar cell manufacture | |
| CN113451216B (en) | Complete silicon-based anti-radiation high-voltage CMOS (complementary Metal oxide semiconductor) device integrated structure and manufacturing method thereof | |
| US20230253520A1 (en) | Solar cell manufacture | |
| JP2707555B2 (en) | Semiconductor radiation detector | |
| CN117637851A (en) | Single particle radiation resistant SiC UMOSFET device structure and manufacturing thereof | |
| CN115312617A (en) | Ga 2 O 3 -2D metal type van der Waals heterojunction broadband polarization photoelectric detector and preparation method thereof | |
| CN116741632A (en) | Silicon carbide super junction schottky diode adopting channel injection and manufacturing method | |
| CN115411112A (en) | MOS anti-irradiation device with drain terminal composite SBD structure and preparation method | |
| CN115084304A (en) | Semiconductor structure and forming method thereof | |
| CN116243365A (en) | High-voltage-resistant low-leakage diamond nuclear detector and preparation method thereof | |
| JPH02198176A (en) | Radiation detector | |
| JPH03154378A (en) | Manufacture of radiation-resistant semiconductor device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |