CN110837434A - Method and device for repairing data - Google Patents
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- 230000008439 repair process Effects 0.000 claims abstract description 11
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- 238000013524 data verification Methods 0.000 claims description 5
- 238000007667 floating Methods 0.000 description 18
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- 230000008569 process Effects 0.000 description 6
- 230000005856 abnormality Effects 0.000 description 5
- 238000011084 recovery Methods 0.000 description 5
- 238000004590 computer program Methods 0.000 description 4
- 230000005669 field effect Effects 0.000 description 3
- 238000002347 injection Methods 0.000 description 3
- 239000007924 injection Substances 0.000 description 3
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- 239000002784 hot electron Substances 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
- G06F11/102—Error in check bits
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Abstract
The application provides a method and a device for repairing data, wherein the method comprises the following steps: acquiring at least two pieces of data stored in a flash memory; and performing logical operation on the at least two data to obtain the repaired data. This application can repair two data that appear the different degree anomaly to the too much bit reversal problem that leads to of flash memory erasing, obtains the data after the restoration, and then carries out flash memory restoration based on the data after the restoration, reaches the purpose of extension flash memory live time.
Description
Technical Field
The present application relates to the field of storage device technologies, and in particular, to a method and an apparatus for repairing data.
Background
The non-volatile FlASH is used as a carrier for storing or buffering data in the embedded field more and more widely due to the characteristics of large capacity, high storage and access speed and the like.
In the prior art, when the FLASH has a "bit reversal" problem in an early stage (for example, within a preset number of write operations after the "bit reversal" problem occurs for the first time), the data may be restored by using a FLASH data dual backup redundancy scheme, that is, when one of the data is abnormal, the data may be restored by using the other backup data. However, if the two pieces of data are abnormal to different degrees, the data recovery cannot be completed.
Disclosure of Invention
In view of this, the present application provides a method and an apparatus for repairing data, which can perform data recovery when two data have portions with different degrees of abnormality.
Specifically, the method is realized through the following technical scheme:
according to a first aspect of the present application, a method of repairing data is provided, comprising:
acquiring at least two pieces of data stored in a flash memory;
and performing logical operation on the at least two data to obtain the repaired data.
In one embodiment, the at least two copies of data include first data and second data;
the performing a logical operation on the at least two pieces of data to obtain repaired data includes:
and performing OR logic operation on the first data and the second data to obtain repaired data.
In an embodiment, the performing the logical operation on the at least two pieces of data includes:
and carrying out logical operation on the at least two data according to bits.
In one embodiment, the data includes backup data;
the method further comprises the following steps:
and if the check bit of the backup data is detected to be in an abnormal state, executing the operation of acquiring at least two data stored in the flash memory and carrying out logical operation on the at least two data.
In an embodiment, the method further comprises:
and generating prompt information for prompting that the check bit of the backup data is in an abnormal state.
In an embodiment, the method further comprises:
and verifying the repaired data.
In an embodiment, the method further comprises:
and if the repaired data is not verified, re-executing the operation of acquiring the at least two copies of data stored in the flash memory and performing the logic operation on the at least two copies of data.
In an embodiment, the method further comprises:
and rewriting the repaired data into the flash memory.
In one embodiment, the flash memory includes NOR flash memory and NAND flash memory.
According to a second aspect of the present application, there is provided an apparatus for repairing data, comprising:
the data acquisition module is used for acquiring at least two pieces of data stored in the flash memory;
and the data restoration module is used for carrying out logic operation on the at least two data to obtain restored data.
In one embodiment, the at least two copies of data include first data and second data;
the data restoration module is further configured to perform an or logical operation on the first data and the second data to obtain restored data.
In an embodiment, the data recovery module is further configured to perform a logical operation on the at least two data bits by bit.
In one embodiment, the data includes backup data;
the device is also used for executing the operations of acquiring at least two data stored in the flash memory and carrying out logic operation on the at least two data when the check bit of the backup data is detected to be in an abnormal state.
In one embodiment, the apparatus further comprises:
and the information generation module is used for generating prompt information for prompting that the check bit of the backup data is in an abnormal state.
In one embodiment, the apparatus further comprises:
and the data verification module is used for verifying the repaired data.
In an embodiment, when the data verification module fails to verify the repaired data, the data obtaining module is further configured to re-execute the operation of obtaining at least two pieces of data stored in the flash memory, and the data repairing module is further configured to re-execute the operation of performing the logical operation on the at least two pieces of data.
In one embodiment, the apparatus further comprises:
and the data writing module is used for rewriting the repaired data into the flash memory.
In one embodiment, the flash memory includes NOR flash memory and NAND flash memory.
According to a third aspect of the present application, there is provided an electronic device comprising:
a processor;
a memory configured to store processor-executable instructions;
wherein the processor is configured to perform any of the above methods of repairing data.
According to a fourth aspect of the present application, a computer-readable storage medium is proposed, on which a computer program is stored, which program, when being processed by a processor, carries out any of the above-mentioned methods of repairing data.
According to the method and the device for repairing data, at least two pieces of data stored in the flash memory are obtained, logical operation is conducted on the at least two pieces of data, the repaired data are obtained, the two pieces of data with different degrees of abnormity can be repaired aiming at the problem of bit reversal caused by excessive flash memory erasing, the repaired data are obtained, then flash memory repair is conducted based on the repaired data, and the purpose of prolonging the service time of the flash memory is achieved.
Drawings
Fig. 1A is a schematic structural diagram of a FlASH basic memory cell according to an exemplary embodiment of the present application;
FIG. 1B is a schematic diagram illustrating the write and read operations of a NOR FlaSH according to an exemplary embodiment of the present application;
FIG. 1C is a schematic diagram of an erase operation of a NOR FlaSH process according to an exemplary embodiment of the present application;
FIG. 2 is a flow chart illustrating a method of repairing data in accordance with an exemplary embodiment of the present application;
FIG. 3 is a flow chart illustrating a method of repairing data in accordance with yet another exemplary embodiment of the present application;
FIG. 4 is a flow chart illustrating a method of repairing data in accordance with yet another exemplary embodiment of the present application;
FIG. 5 is a block diagram illustrating an apparatus for repairing data according to an exemplary embodiment of the present application;
FIG. 6 is a block diagram illustrating an apparatus for repairing data according to yet another exemplary embodiment of the present application;
fig. 7 is a block diagram illustrating an electronic device according to an exemplary embodiment of the present application.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this application and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.
It is to be understood that although the terms first, second, third, etc. may be used herein to describe various information, such information should not be limited to these terms. These terms are only used to distinguish one type of information from another. For example, first information may also be referred to as second information, and similarly, second information may also be referred to as first information, without departing from the scope of the present application. The word "if" as used herein may be interpreted as "at … …" or "when … …" or "in response to a determination", depending on the context.
Fig. 1A is a schematic structural diagram of a FlASH basic memory cell according to an exemplary embodiment of the present application; FlASH stores data using a Floating Gate 004 field effect transistor (Floating Gate FET) as a basic memory cell, and as shown in fig. 1A, the Floating Gate 004 field effect transistor has 4 terminal electrodes, namely a Source (Source)001, a Drain (Drain)002, a Control Gate (Control Gate)003, and a Floating Gate (Floating Gate) 004. Wherein, the first 3 terminal electrodes have the same function as the common MOSFET, and the difference is only in the floating gate 004, FlASH is to use whether the floating gate 004 stores charge to characterize the digital '0' and '1':
when charge is injected into the floating gate, a conductive channel exists between the drain 002 and the source 001, reading '0' from the drain 002; when there is no charge in the floating gate 004, there is no conductive channel between the drain 002 and the source 001, reading a '1' from the drain 002.
FIG. 1B is a schematic diagram illustrating the write and read operations of a NOR FlaSH according to an exemplary embodiment of the present application; fig. 1C is a schematic diagram illustrating an erase operation of NOR FlASH according to an exemplary embodiment of the present application.
As shown in fig. 1B, the writing operation of NOR FlASH is a process of injecting charges into the floating gate 004, and NOR FlASH injects charges into the floating gate 004 by means of hot electron injection (the method has low charge injection efficiency, so the writing rate of NORFLASH is low). Before the NOR FLASH is subjected to the write operation, the original data needs to be erased (i.e. the charges in the floating gate 004 are removed), that is, after the FLASH is subjected to the erase operation, all the data read from the drain 002 are '1'.
When NOR FlaSH is used for reading, the voltage V applied to the control gate 003CGThe charge quantity in the floating gate 004 is small, namely the original data in the FLASH is not changed in the reading operation, namely when the floating gate 004 has charges, a conductive channel exists between the drain electrode 002 and the source electrode 001, and the '0' is read from the drain electrode 002; when there is no charge in the floating gate 004, there is no conductive channel between the drain 002 and the source 001, reading a '1' from the drain 002.
As shown in FIG. 1C, the erase operation of NOR FlaSH is the process of removing charge from the floating gate 004. In the related art, NOR FLASH and NAND FLASH typically carry away the charge in the floating gate 004 through F-N tunneling.
Based on the above NOR FLASH read-write and erase principle, the following conclusions can be drawn:
1) since the FLASH must be erased before writing, for a bit that is originally '0', the charge (0- >1) needs to be taken from the gate first; for a bit that was originally '1', there is effectively no charge in the gate and therefore no charge operation. That is, the erase operation has one more charge transfer operation from 0- >1 than from 1- >0, so the damage to FLASH is larger;
2) NOR FLASH adopts a hot electron injection mode (1- >0) during writing, and adopts an F-N tunneling effect (0- >1) during erasing, and the permission frequency of writing (1- >0) of the chip design is slightly larger than the permission frequency of erasing (0- >1) after being confirmed by FLASH manufacturers. It can be further inferred that the erase operation (0- >1) is more error prone;
3) and combining the conclusions of the two points 1) and 2) above, the following conclusions can be made:
in those floating gate field effect transistors in which NOR FLASH exhibits "bit inversion", the inversion is basically (0- >1), i.e. the inversion that should be '1' is converted to '0'.
In the embodiment, original data are finally restored through the operation of 'or operation' (i operation) on double backup data on the FLASH, and after batch verification, the data restoration effect is in line with expectation, and the reversed data can be effectively restored at the early stage when the reading and writing times of the FLASH are out of limit.
FIG. 2 is a flow chart illustrating a method of repairing data in accordance with an exemplary embodiment of the present application; as shown in fig. 2, the method comprises steps S101-S102:
in step S101: at least two copies of data stored in the flash memory are obtained.
In step S102: and performing logical operation on the at least two data to obtain the repaired data.
In one embodiment, the logical operation may comprise a logical or operation, the operators of which include: "OR", "|", and "|", etc., indicate "false only if both are false".
In an embodiment, the at least two pieces of data may include first data and second data;
on this basis, the performing a logical operation on the at least two pieces of data in step S102 to obtain repaired data may include:
and carrying out logical OR operation on the first data and the second data to obtain repaired data.
In an embodiment, the above-mentioned manner of performing the logical operation on the at least two data may include performing the logical operation on the at least two data by bit.
It should be noted that each piece of data in the flash memory is stored by bit, and when two pieces of data obtained from the flash memory are repaired, the numerical value on the corresponding bit of each piece of data may be subjected to or operation. For example, if the following two data sets a and B are obtained:
A：{a1，a2，a3，a4}；
B：{b1，b2，b3，b4}；
then, the logical or operation may be performed on the values corresponding to the two data sets, i.e. the logical or operation may be performed on a1 and B1, a2 and B2, a3 and B3, and a4 and B4, respectively, so as to obtain the following repaired data a | B:
A|B：{a1|b1，a2|b2，a3|b3，a4|b4}。
in another embodiment, if the abnormal positions of the two acquired data sets overlap (for example, the two data sets have an abnormality to the same extent), for example, an abnormality occurs in both a1 in the data a and B1 in the data B, and both the data a and B are (0- >1), the inversion error is caused, that is, the inversion that should be '1' is converted into '0', the operation of "acquiring at least two data sets stored in the flash memory" and "performing a logical operation on the at least two data sets to obtain repaired data" may be repeatedly performed to solve the problem. Since the charge of the flash memory is unstable immediately after an abnormality occurs, the purpose of acquiring data whose abnormal positions do not overlap can be achieved by repeatedly acquiring data.
In an embodiment, the flash memory may include a NOR flash memory, a NAND flash memory, and the like, which is not limited in this embodiment.
As can be seen from the above description, in this embodiment, at least two pieces of data stored in the flash memory are obtained, and the at least two pieces of data are subjected to logic operation to obtain repaired data, so that the two pieces of data with different degrees of abnormality can be repaired to obtain repaired data in view of the problem of bit inversion caused by excessive flash memory erasure, and then flash memory repair is performed based on the repaired data, so as to achieve the purpose of prolonging the service life of the flash memory.
FIG. 3 is a flow chart illustrating a method of repairing data in accordance with yet another exemplary embodiment of the present application; in this embodiment, the data may include backup data stored in the flash memory.
As shown in fig. 3, the method includes steps S301 to S303:
in step S301: and if the check bit of the backup data is detected to be in an abnormal state, acquiring at least two data stored in the flash memory.
In an embodiment, the backup data stored in the flash memory all have check bits, and when it is detected that the check bits of the backup data are in an abnormal state, at least two pieces of stored backup data may be obtained from a preset area of the flash memory, and then the subsequent step S303 may be performed.
In step S303: performing logical operation on the at least two backup data to obtain repaired backup data;
for the explanation and explanation of step S203, reference may be made to the embodiment shown in fig. 2, which is not described herein again.
In an embodiment, when it is detected that the check bit of the backup data is in an abnormal state, a prompt message for prompting that the check bit of the backup data is in the abnormal state may be further generated, so as to present the prompt message to a user.
It should be noted that the form of the prompt information may be set by a developer according to actual service needs, for example, the form is set to be an interface prompt form, a buzzer alarm form, or a mail prompt form, and the present embodiment does not limit this.
As can be seen from the above description, in this embodiment, when it is detected that the check bit of the backup data is in an abnormal state, the prompt information for prompting that the check bit of the backup data is in the abnormal state is generated, and at least two pieces of backup data stored in the flash memory are acquired, so that data recovery can be performed according to the detection result of the check bit of the backup data, the flexibility of data recovery is improved, and the user requirements are met.
FIG. 4 is a flow chart illustrating a method of repairing data in accordance with yet another exemplary embodiment of the present application; as shown in fig. 4, the method may include the following steps S401-S404:
in step S401, at least two copies of data stored in the flash memory are acquired.
In step S402, a logical operation is performed on the at least two pieces of data to obtain repaired data.
For the explanation and description of steps S401 to S402, reference may be made to the above embodiments, which are not described herein again.
In step S403, the repaired data is verified.
In an embodiment, after performing a logical operation on the at least two pieces of data to obtain repaired data, the repaired data may be verified.
For example, the check bit of the repaired data may be detected again to determine whether the check bit is in an abnormal state, and if the check bit is restored to a normal state, it may be determined that the data repair is successful; otherwise, determining that the data repair fails.
It should be noted that, in addition to the check bit-based mode, the above-mentioned method for checking the repaired data may also be implemented by a developer according to actual business needs, and the method is not limited in this embodiment, for example, a "data sum" -based check mode or a "hash value of data digest" -based check mode may also be selected by the developer.
In an embodiment, the reason for the failure of data repair may be that the abnormal positions of the two copies of data overlap, and thus, as described in the embodiment shown in fig. 2, the failure may be solved by repeatedly performing the operations of "obtaining at least two copies of data stored in the flash memory" and "performing a logical operation on the at least two copies of data to obtain repaired data".
In step S404, the repaired data is rewritten into the flash memory.
In an embodiment, when the repaired data is obtained and the repaired data passes verification, the repaired data may be rewritten into the flash memory, that is, the repaired data is rewritten into the previous storage location.
As can be seen from the above description, in this embodiment, the data after repair is verified, so that the data can be successfully repaired, and then the repaired data can be rewritten into the flash memory, so that when the subsequent flash memory data is abnormal, the flash memory data can be repaired based on the repaired data.
Corresponding to the method embodiment, the application also provides a corresponding device embodiment.
FIG. 5 is a block diagram illustrating an apparatus for repairing data according to an exemplary embodiment of the present application; as shown in fig. 5, the apparatus includes: a data acquisition module 110 and a data repair module 120, wherein:
a data obtaining module 110, configured to obtain at least two pieces of data stored in the flash memory;
and a data repairing module 120, configured to perform a logical operation on the at least two pieces of data to obtain repaired data.
As can be seen from the above description, in this embodiment, at least two pieces of data stored in the flash memory are obtained, and the at least two pieces of data are subjected to logic operation to obtain repaired data, so that subsequent flash memory repair based on the repaired data can be realized.
In an embodiment, the at least two pieces of data may include first data and second data;
on this basis, the data repairing module 230 may be further configured to perform an or logic operation on the first data and the second data to obtain repaired data.
In an embodiment, the data repair module 230 may be further configured to perform a bitwise logical operation on the at least two data.
In an embodiment, the data may include backup data;
on this basis, the above apparatus may be further configured to, when it is detected that the check bit of the backup data is in an abnormal state, perform the operation of acquiring at least two pieces of data stored in the flash memory and performing a logical operation on the at least two pieces of data.
FIG. 6 is a block diagram illustrating an apparatus for repairing data according to yet another exemplary embodiment of the present application; the data obtaining module 210 and the data repairing module 230 have the same functions as the data obtaining module 110 and the data repairing module 120 in the embodiment shown in fig. 5, and are not described herein again.
As shown in fig. 6, the apparatus may further include:
the information generating module 220 is configured to generate a prompt information for prompting that the check bit of the backup data is in an abnormal state.
In an embodiment, the apparatus may further include:
and a data verification module 240, configured to verify the repaired data.
In an embodiment, when the data verification module 240 fails to verify the repaired data, the data obtaining module 210 is further configured to re-execute the operation of obtaining at least two copies of data stored in the flash memory, and the data repairing module 230 is further configured to re-execute the operation of performing the logical operation on the at least two copies of data. In an embodiment, the apparatus may further include:
and a data writing module 250, configured to rewrite the repaired data into the flash memory.
In an embodiment, the flash memory may include NOR flash memory and NAND flash memory.
The embodiment of the device for repairing data can be applied to the embedded equipment. The device embodiments may be implemented by software, or by hardware, or by a combination of hardware and software. The software implementation is taken as an example, and is formed by reading corresponding computer program instructions in the nonvolatile memory into the memory for operation through the processor of the device where the software implementation is located as a logical means. From a hardware aspect, as shown in fig. 7, it is a hardware structure diagram of a device where the apparatus for repairing data of the present invention is located, except for the processor, the network interface, the memory and the nonvolatile memory shown in fig. 7, the device where the apparatus is located in the embodiment may also generally include other hardware, such as a forwarding chip responsible for processing a packet, and the like; the device may also be a distributed device in terms of hardware structure, and may include multiple interface cards to facilitate expansion of message processing at the hardware level.
Embodiments of the present invention further provide a computer-readable storage medium, on which a computer program is stored, where the computer program is processed by a processor to implement the embodiments shown in fig. 1A to 4.
For the device embodiments, since they substantially correspond to the method embodiments, reference may be made to the partial description of the method embodiments for relevant points. The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the scheme of the application. One of ordinary skill in the art can understand and implement it without inventive effort.
Other embodiments of the present application will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the invention following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the invention pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the application being indicated by the following claims.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the scope of protection of the present application.
Claims (18)
1. A method of repairing data, comprising:
acquiring at least two pieces of data stored in a flash memory;
and performing logical operation on the at least two data to obtain the repaired data.
2. The method of claim 1, wherein the at least two pieces of data comprise first data and second data;
the performing a logical operation on the at least two pieces of data to obtain repaired data includes:
and performing OR logic operation on the first data and the second data to obtain repaired data.
3. The method of claim 1, wherein said performing a logical operation on said at least two copies of data comprises:
and carrying out logical operation on the at least two data according to bits.
4. The method of claim 1, wherein the data comprises backup data;
the method further comprises the following steps:
and if the check bit of the backup data is detected to be in an abnormal state, executing the operation of acquiring at least two data stored in the flash memory and carrying out logical operation on the at least two data.
5. The method of claim 4, further comprising:
and generating prompt information for prompting that the check bit of the backup data is in an abnormal state.
6. The method of claim 1, further comprising:
and verifying the repaired data.
7. The method of claim 6, further comprising:
and if the repaired data is not verified, re-executing the operation of acquiring the at least two copies of data stored in the flash memory and performing the logic operation on the at least two copies of data.
8. The method of claim 1, further comprising:
and rewriting the repaired data into the flash memory.
9. The method of claim 1, wherein the flash memory comprises NOR flash memory and NAND flash memory.
10. An apparatus for repairing data, comprising:
the data acquisition module is used for acquiring at least two pieces of data stored in the flash memory;
and the data restoration module is used for carrying out logic operation on the at least two data to obtain restored data.
11. The apparatus of claim 10, wherein the at least two pieces of data comprise first data and second data;
the data restoration module is further configured to perform an or logical operation on the first data and the second data to obtain restored data.
12. The apparatus of claim 10, wherein the data repair module is further configured to perform a bitwise logical operation on the at least two pieces of data.
13. The apparatus of claim 10, wherein the data comprises backup data;
the device is also used for executing the operations of acquiring at least two data stored in the flash memory and carrying out logic operation on the at least two data when the check bit of the backup data is detected to be in an abnormal state.
14. The apparatus of claim 13, further comprising:
and the information generation module is used for generating prompt information for prompting that the check bit of the backup data is in an abnormal state.
15. The apparatus of claim 13, further comprising:
and the data verification module is used for verifying the repaired data.
16. The apparatus of claim 15, wherein the data obtaining module is further configured to re-execute the operation of obtaining at least two copies of data stored in the flash memory when the data verifying module fails to verify the repaired data, and the data repairing module is further configured to re-execute the operation of performing the logical operation on the at least two copies of data.
17. The apparatus of claim 10, further comprising:
and the data writing module is used for rewriting the repaired data into the flash memory.
18. The apparatus of claim 10, wherein the flash memory comprises NOR flash memory and NAND flash memory.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810930412.3A CN110837434A (en) | 2018-08-15 | 2018-08-15 | Method and device for repairing data |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810930412.3A CN110837434A (en) | 2018-08-15 | 2018-08-15 | Method and device for repairing data |
Publications (1)
| Publication Number | Publication Date |
|---|---|
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