CN110718607A - Manufacturing method of N-type solar cell - Google Patents

Manufacturing method of N-type solar cell Download PDF

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CN110718607A
CN110718607A CN201810769869.0A CN201810769869A CN110718607A CN 110718607 A CN110718607 A CN 110718607A CN 201810769869 A CN201810769869 A CN 201810769869A CN 110718607 A CN110718607 A CN 110718607A
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oxide layer
oxide
silicon substrate
layer
forming
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陈炯
何川
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Kingstone Semiconductor Co Ltd
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Kingstone Semiconductor Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/546Polycrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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Abstract

The invention discloses a manufacturing method of an N-type solar cell, which comprises the following steps: carrying out double-sided texturing on the N-type silicon substrate; polishing the back of the N-type silicon substrate; forming a first oxide layer on the back of the N-type silicon substrate; forming an N-type polycrystalline silicon layer on the first oxide layer; forming a second oxide layer on the front surface of the N-type silicon substrate, wherein the band gap of the energy band of the second oxide layer is more than 3eV, and the work function of the second oxide layer is more than 5 eV; forming a third oxide layer on the second oxide layer, wherein the third oxide layer has a resistivity less than 5e10‑4Ohm cm; a grid-shaped front electrode is formed on the front surface of an N-type silicon substrate, and a back electrode is formed on the back surface of the N-type silicon substrate. According to the invention, a high-band-gap high-work-function material is adopted on the front surface of the TOPCon battery to form hole selective contact, so that minority carrier recombination at the contact position of a front metal electrode and a semiconductor of the TOPCon battery is reduced or avoided.

Description

Manufacturing method of N-type solar cell
Technical Field
The present invention relates to a method for manufacturing a solar cell, and more particularly, to a method for manufacturing an N-type solar cell.
Background
N-type solar cells are receiving increasing attention because of their high conversion efficiency, ultra-low light attenuation, and dual-sided power generation characteristics. At present, the N-type double-sided battery is produced in large scale. But limited by backside passivation and minority recombination at metal-semiconductor contacts, n-type bifacial cell conversionThe efficiency will reach a bottleneck at 22%. The development of TOPCon (tunnel oxide passivation contact) technology provides space for further efficiency enhancement for N-type solar cells. The TOPCon technology is adopted on the back surface of the N-type solar cell, and the back surface carrier selective electrode is formed by using the back surface N-type polycrystalline silicon, so that minority carrier recombination at the contact part of a back surface metal semiconductor is avoided, and the dark saturation current J of the solar cell is reduced0Conversion efficiency of 23% or more can be achieved. But the front surface still forms an emitter by adopting boron diffusion, and a front electrode is formed by printing and sintering. The reduction in solar cell efficiency due to minority carrier recombination at the front-side metal-semiconductor contact is still present. To further improve the conversion efficiency of the n-type solar cell, the problem to be solved is to reduce minority carrier recombination at the front-side metal semiconductor contact. The TOPCon technology is adopted on the front surface, and the P-type polycrystalline silicon is used for forming the carrier selective electrode, so that minority carrier recombination at the contact position of the metal semiconductor on the front surface can be avoided. However, because polysilicon absorbs light seriously, the front-side polysilicon layer can reduce the short-circuit current of the solar cell while improving the on-voltage of the solar cell, and does not help greatly to improve the conversion efficiency. If the material with the carrier selectivity function and the lower light absorption coefficient is adopted on the front surface of the N-type cell, minority carrier recombination at the contact part of the metal semiconductor on the front surface can be avoided, the light absorption of the solar cell is not influenced, and the efficiency of the N-type solar cell is further improved.
Disclosure of Invention
The invention aims to solve the technical problem that in the prior art, a carrier selective electrode is formed on the back surface of a TOPCon battery by adopting a tunneling oxide layer and N-type polycrystalline silicon, but the front surface of the TOPCon battery is still the traditional boron diffusion to form an emitter, and then a metal electrode is formed by printing silver paste. The minority carrier recombination at the contact position of the front metal semiconductor causes the open-circuit voltage of the cell to be reduced, and the conversion efficiency is limited, thereby providing a manufacturing method of the N-type solar cell.
The invention solves the technical problems through the following technical scheme:
the manufacturing method of the N-type solar cell is characterized by comprising the following steps:
s1: carrying out double-sided texturing on the N-type silicon substrate;
s2: polishing the back surface of the N-type silicon substrate;
s3: forming a first oxide layer on the back of the N-type silicon substrate;
s4: forming an N-type polycrystalline silicon layer on the first oxide layer;
s5: forming a second oxide layer on the front surface of the N-type silicon substrate, wherein the band gap of the energy band of the second oxide layer is more than 3eV, and the work function of the second oxide layer is more than 5 eV;
s6: forming a third oxide layer on the second oxide layer, wherein the third oxide layer has a resistivity less than 5e10-4Ohm cm;
s7: a grid-shaped front electrode is formed on the front surface of the N-type silicon substrate, and a back electrode is formed on the back surface of the N-type silicon substrate.
Preferably, the first oxide layer is silicon oxide and has a thickness of 0.1nm to 5 nm.
Preferably, the first oxide layer is formed by a thermal oxidation or chemical oxidation method.
Preferably, the N-type polycrystalline silicon layer is formed by LPCVD, PECVD, or ion implantation, and has a thickness of 5nm to 500 nm.
Wherein the step of forming the N-type polysilicon by ion implantation comprises: depositing intrinsic polysilicon by LPCVD; then, injecting phosphorus ions into the intrinsic polycrystalline silicon; finally, annealing and activating phosphorus ion doping to form N-type polycrystalline silicon.
Preferably, the second oxide layer is tungsten oxide, molybdenum oxide, vanadium oxide or chromium oxide and has a thickness of 1nm to 200 nm.
Preferably, the second oxide layer is formed by chemical vapor deposition, physical vapor deposition or atomic layer deposition.
Preferably, the third oxide layer is tin-doped indium oxide, fluorine-doped zinc oxide, aluminum-doped zinc oxide, etc., and has a thickness of 1nm-200 nm.
Preferably, the third oxide layer is formed by wet chemical methods, chemical vapor deposition, physical vapor deposition or atomic layer deposition.
Preferably, step S5 is preceded by the steps of: and forming a fourth oxide layer on the front surface of the N-type silicon substrate, wherein the fourth oxide layer is positioned between the front surface of the N-type silicon substrate and the second oxide layer.
Preferably, the fourth oxide layer is silicon oxide, has a thickness of 0.1nm to 5nm,
and/or the fourth oxide layer is formed by thermal oxidation or chemical oxidation.
Preferably, after step S4 and before step S7, the method further comprises: forming a back side anti-reflective layer on the N-type polycrystalline silicon layer, and/or,
after step S6 and before step S7, the method further includes: and forming a front anti-reflection layer on the third oxide layer.
On the basis of the common knowledge in the field, the above preferred conditions can be combined randomly to obtain the preferred embodiments of the invention.
The reagents and starting materials used in the present invention are commercially available.
The positive progress effects of the invention are as follows: the positive surface of the TOPCon battery adopts a material with high band gap and high work function to form hole selective contact, so that minority carrier recombination at the contact position of a positive metal electrode and a semiconductor of the TOPCon battery is reduced or avoided. And simultaneously, the negative influence of the front light absorption on the short-circuit current of the battery is reduced. The open-circuit voltage and the conversion efficiency of the solar cell are further improved.
Drawings
Fig. 1 is a schematic diagram of double-sided texturing of an N-type silicon substrate according to embodiment 1 of the present invention.
FIG. 2 is a schematic view of polishing the back surface of an N-type silicon substrate in example 1 of the present invention.
Fig. 3 is a schematic view of forming a first oxide layer on the back surface of an N-type silicon substrate in embodiment 1 of the present invention.
Fig. 4 is a schematic diagram of forming an N-type polysilicon layer on the first oxide layer in embodiment 1 of the present invention.
Fig. 5 is a schematic view of forming a second oxide layer on the front surface of the N-type silicon substrate in embodiment 1 of the present invention.
Fig. 6 is a schematic view of forming a third oxide layer on the second oxide layer in embodiment 1 of the present invention.
Fig. 7 is a schematic diagram of forming front and back electrodes in embodiment 1 of the present invention.
Fig. 8 is a schematic view of sequentially forming a fourth oxide layer and a second oxide layer on the front surface of the N-type silicon substrate in embodiment 2 of the present invention.
Fig. 9 is a schematic view of forming a third oxide layer on the second oxide layer in embodiment 2 of the present invention.
Fig. 10 is a schematic diagram of forming front and back electrodes in embodiment 2 of the present invention.
Detailed Description
The invention is further illustrated by the following examples, which are not intended to limit the scope of the invention. The experimental methods without specifying specific conditions in the following examples were selected according to the conventional methods and conditions, or according to the commercial instructions.
Example 1
Referring to fig. 1 to fig. 7, a method for manufacturing an N-type solar cell according to the present embodiment is described, where the front surface is referred to as a light receiving surface, and the method includes the following steps:
referring to fig. 1, an N-type silicon substrate 100 is provided and double-sided textured. Referring to fig. 2, the back surface of the N-type silicon substrate 100 is polished.
Referring to fig. 3, a first oxide layer 200, which is silicon oxide and has a thickness of 2nm, is formed on the back surface of the N-type silicon substrate 100 by thermal oxidation.
Referring to fig. 4, an N-type polycrystalline silicon layer 300 having a thickness of 200nm is formed on the first oxide layer 200 by LPCVD and ion implantation. The specific steps for forming the N-shaped polycrystalline silicon layer comprise:
1) depositing intrinsic polysilicon by LPCVD at 550-650 deg.C to a thickness of 200 nm.
2) Implanting phosphorus ions into the intrinsic polysilicon with an energy of 3-15KeV and a dose of 1e14-1e16/cm2
3) And annealing and activating phosphorus ion doping to form the N-type polycrystalline silicon. The annealing temperature is 800-.
Referring to fig. 5, a second oxide layer 401 of tungsten oxide having an energy band gap of 5eV and a work function of 10eV and having a thickness of 30nm is formed on the front surface of the N-type silicon substrate 100 by chemical vapor deposition.
Since the front side hole selective contact fails at high temperatures, high temperature processes such as LPCVD and annealing of the back side deposited N-type polysilicon are performed. And then, the front surface hole selective contact is manufactured, so that the effect of the front surface hole selective contact is ensured.
Referring to fig. 6, a third oxide layer 402 is formed on the second oxide layer 401 by chemical vapor deposition, the third oxide layer 402 having a resistivity of less than 5e10-4Ohm-cm, the third oxide layer is 100nm thick tin-doped indium oxide.
S7: an antireflection film is formed on the front and back surfaces of the N-type silicon substrate, and a grid-like front electrode 51 is formed on the front surface and a back electrode 52 is formed on the back surface.
Example 2
Referring to fig. 1 to 4 and fig. 8 to 10, the structure shown in fig. 4 is obtained by the process described in embodiment 1, and then referring to fig. 8, a fourth oxide layer 403 is formed on the front surface of the N-type silicon substrate, wherein the fourth oxide layer is silicon oxide and has a thickness of 2 nm. The second oxide layer 401 is then formed on the fourth oxide layer 403.
Referring next to fig. 9 and 10, a process of forming the third oxide layer 402 and the front and back electrodes is described with reference to example 1, and the resulting cell structure is shown in fig. 10.
In addition, before the manufacture of a back electrode, the method also comprises the step of forming a back antireflection layer on the N-type polycrystalline silicon layer, and before the manufacture of a front electrode, a front antireflection layer is formed on the third oxide layer.
While specific embodiments of the invention have been described above, it will be appreciated by those skilled in the art that these are by way of example only, and that the scope of the invention is defined by the appended claims. Various changes and modifications to these embodiments may be made by those skilled in the art without departing from the spirit and scope of the invention, and these changes and modifications are within the scope of the invention.

Claims (11)

1. A manufacturing method of an N-type solar cell is characterized by comprising the following steps:
s1: carrying out double-sided texturing on the N-type silicon substrate;
s2: polishing the back surface of the N-type silicon substrate;
s3: forming a first oxide layer on the back of the N-type silicon substrate;
s4: forming an N-type polycrystalline silicon layer on the first oxide layer;
s5: forming a second oxide layer on the front surface of the N-type silicon substrate, wherein the band gap of the energy band of the second oxide layer is more than 3eV, and the work function of the second oxide layer is more than 5 eV;
s6: forming a third oxide layer on the second oxide layer, wherein the third oxide layer has a resistivity less than 5e10-4Ohm cm;
s7: a grid-shaped front electrode is formed on the front surface of the N-type silicon substrate, and a back electrode is formed on the back surface of the N-type silicon substrate.
2. The method of claim 1, wherein the first oxide layer is silicon oxide and has a thickness of 0.1nm to 5 nm.
3. The method of claim 1, wherein the first oxide layer is formed by thermal oxidation or chemical oxidation.
4. The method of claim 1, wherein the N-type polysilicon layer is formed by LPCVD, PECVD or ion implantation, and has a thickness of 5nm to 500 nm.
5. The method of claim 1, wherein the second oxide layer is tungsten oxide, molybdenum oxide, vanadium oxide, or chromium oxide and has a thickness of 1nm to 200 nm.
6. The method of claim 1, wherein the second oxide layer is formed by chemical vapor deposition, physical vapor deposition, or atomic layer deposition.
7. The method of claim 1, wherein the third oxide layer is indium oxide doped with tin, zinc oxide doped with fluorine, zinc oxide doped with aluminum, etc. and has a thickness of 1nm-200 nm.
8. The method of claim 1, wherein the third oxide layer is formed by wet chemical method, chemical vapor deposition, physical vapor deposition, or atomic layer deposition.
9. The method for manufacturing an N-type solar cell according to claim 1, wherein step S5 is preceded by the steps of: and forming a fourth oxide layer on the front surface of the N-type silicon substrate, wherein the fourth oxide layer is positioned between the front surface of the N-type silicon substrate and the second oxide layer.
10. The method according to claim 9, wherein the fourth oxide layer is silicon oxide and has a thickness of 0.1nm to 5nm,
and/or the fourth oxide layer is formed by thermal oxidation or chemical oxidation.
11. The method of any one of claims 1-10, further comprising, after step S4 and before step S7: forming a back side anti-reflective layer on the N-type polycrystalline silicon layer, and/or,
after step S6 and before step S7, the method further includes: and forming a front anti-reflection layer on the third oxide layer.
CN201810769869.0A 2018-07-13 2018-07-13 Manufacturing method of N-type solar cell Pending CN110718607A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113130670A (en) * 2021-04-20 2021-07-16 浙江师范大学 Europium oxide/platinum passivated contact crystalline silicon solar cell and preparation method thereof
CN117174783A (en) * 2023-10-16 2023-12-05 江苏微导纳米科技股份有限公司 TOPCON solar cell and preparation method thereof

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100186802A1 (en) * 2009-01-27 2010-07-29 Peter Borden Hit solar cell structure
CN105932080A (en) * 2016-05-12 2016-09-07 苏州协鑫集成科技工业应用研究院有限公司 Heterojunction solar cell and preparation method therefor
CN205564789U (en) * 2016-04-26 2016-09-07 泰州中来光电科技有限公司 Passivation contact N type solar cell and subassembly and system thereof
CN106784074A (en) * 2017-01-24 2017-05-31 泰州乐叶光伏科技有限公司 N-type double-side cell structure
CN108039374A (en) * 2017-10-31 2018-05-15 泰州隆基乐叶光伏科技有限公司 The preparation method of N-shaped double-side solar cell

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100186802A1 (en) * 2009-01-27 2010-07-29 Peter Borden Hit solar cell structure
CN205564789U (en) * 2016-04-26 2016-09-07 泰州中来光电科技有限公司 Passivation contact N type solar cell and subassembly and system thereof
CN105932080A (en) * 2016-05-12 2016-09-07 苏州协鑫集成科技工业应用研究院有限公司 Heterojunction solar cell and preparation method therefor
CN106784074A (en) * 2017-01-24 2017-05-31 泰州乐叶光伏科技有限公司 N-type double-side cell structure
CN108039374A (en) * 2017-10-31 2018-05-15 泰州隆基乐叶光伏科技有限公司 The preparation method of N-shaped double-side solar cell

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113130670A (en) * 2021-04-20 2021-07-16 浙江师范大学 Europium oxide/platinum passivated contact crystalline silicon solar cell and preparation method thereof
CN117174783A (en) * 2023-10-16 2023-12-05 江苏微导纳米科技股份有限公司 TOPCON solar cell and preparation method thereof

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Application publication date: 20200121