CN110690133B - Method and device for detecting semiconductor structure - Google Patents
Method and device for detecting semiconductor structure Download PDFInfo
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- CN110690133B CN110690133B CN201910837420.8A CN201910837420A CN110690133B CN 110690133 B CN110690133 B CN 110690133B CN 201910837420 A CN201910837420 A CN 201910837420A CN 110690133 B CN110690133 B CN 110690133B
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Abstract
The application discloses a detection method and a detection device of a semiconductor structure. The detection method comprises the steps of establishing a relation comparison table between a distortion value and at least one electrical property parameter; acquiring a section image of the semiconductor structure output by a transmission electron microscope, wherein the section image comprises a section pattern of at least one hole, and a plane where the section pattern is located is vertical to the axial direction of the hole; identifying a plurality of boundary points of the hole, and obtaining a plurality of boundary coordinates corresponding to the plurality of boundary points; carrying out ellipse numerical fitting according to the boundary coordinates, and obtaining the long axis and the short axis of the ellipse; calculating the difference value of the long axis and the short axis, and taking the difference value as the distortion value of the hole; and judging whether the electrical property parameters corresponding to the holes meet a reasonable range according to the relation comparison table and the distortion values of the holes. According to the detection method, the difference value of the long axis and the short axis of each hole is used as a characterization parameter of the distortion degree of the hole, so that the distortion degree of the hole is quantified, and the purpose of quantitatively analyzing the influence of the distortion degree on the electrical property is finally achieved.
Description
Technical Field
The present invention relates to semiconductor technology, and more particularly, to a method and an apparatus for inspecting a semiconductor structure.
Background
As the miniaturization of semiconductor devices has been advanced, the critical dimension of the semiconductor devices has been reduced to the nanometer level, which means that the critical dimension will determine the performance of the semiconductor devices, and thus, it has become an essential link to accurately measure the critical dimension and grasp the variation degree of the critical dimension on the nanometer level.
In the prior art, a simple general appearance of a semiconductor device or a single and large critical dimension of the semiconductor device can be measured by a measuring tool, but for a complex and small critical dimension structure (such as 3D NAND), the measuring tool in the prior art cannot meet the requirement. For example, in a 3D NAND-critical deep hole etching process, hole distortion occurs in the depth direction, and the distortion can seriously affect the electrical performance of a product, and how to establish a characterization method to accurately measure the change of an etched hole becomes the key for the successful development of a 3D NAND.
In addition, manual observation is needed during measurement, the difference degree of a complex structure with small key size is difficult to distinguish manually, the problem of low precision exists, good and bad evaluation cannot be given qualitatively, the torsion change degree of an etched hole cannot be accurately measured for a deep hole etching process, and particularly when the torsion degree is small, valuable suggestions cannot be provided for the etching process, and the relation between the electrical performance and the hole torsion degree cannot be given.
Therefore, it is desirable to further improve the inspection method of the semiconductor structure and the inspection apparatus thereof, thereby improving the measurement accuracy, efficiency, and reliability.
Disclosure of Invention
The present invention provides an improved method and apparatus for inspecting a semiconductor structure, so as to solve the technical problem that the distortion degree cannot be analyzed quantitatively in the prior art.
According to an aspect of the present invention, there is provided a method of inspecting a semiconductor structure, including: establishing a relation comparison table between the distortion value and at least one electrical performance parameter; acquiring a section image of the semiconductor structure output by a transmission electron microscope, wherein the section image comprises a section pattern of at least one hole, and a plane of the section pattern is perpendicular to the axial direction of the hole; identifying a plurality of boundary points of the hole, and obtaining a plurality of boundary coordinates corresponding to the boundary points; carrying out ellipse numerical fitting according to the boundary coordinates, and obtaining a long axis and a short axis of the ellipse; calculating a difference between the major axis and the minor axis, the difference being taken as the distortion value of the hole; and judging whether the electrical performance parameters corresponding to the holes meet a reasonable range or not according to the relation comparison table and the distortion values of the holes.
Preferably, the step of establishing the relation lookup table includes: testing the electrical performance parameter corresponding to the distortion value of each hole as a sample; and outputting the relation between the distortion value and the electrical performance parameter in the form of a comparison map and/or a comparison table.
Preferably, the step of obtaining a plurality of boundary coordinates corresponding to the plurality of boundary points comprises: obtaining a second derivative processing result according to the gray value of each pixel in the section image; and obtaining a plurality of boundary coordinates on the boundary based on the second derivative processing result.
Preferably, the step of obtaining a second derivative processing result according to the gray-scale value of each pixel in the sectional image comprises: obtaining a function of a plurality of unit lengths and the gray value according to the gray value of each row of pixels of the section image; and performing second derivative processing on each function to obtain the second derivative of each function respectively, and identifying the boundary point of each row of pixels based on the second derivative of each function.
Preferably, before performing the second derivative processing on each function, the step of obtaining a second derivative processing result according to the gray-scale value of each pixel in the cross-sectional image further includes performing high-frequency filtering processing on each function.
Preferably, the method further comprises comprehensively judging whether the electrical performance parameters corresponding to the holes meet a reasonable range according to a plurality of distortion values in the axial direction of each hole.
According to another aspect of the present invention, there is provided an inspection apparatus for a semiconductor structure, comprising: the establishing module is used for establishing a relation comparison table between the distortion value and at least one electrical performance parameter; the acquisition module is used for acquiring a section image of the semiconductor structure output by a transmission electron microscope, and comprises a section pattern of at least one hole, wherein the plane of the section pattern is perpendicular to the axial direction of the hole; the identification module is used for identifying a plurality of boundary points of the hole and obtaining a plurality of boundary coordinates corresponding to the boundary points; the fitting module is used for performing ellipse numerical fitting according to the boundary coordinates and obtaining the long axis and the short axis of the ellipse; a calculation module for calculating a difference between the major axis and the minor axis as the distortion value of the hole; and the first judgment module is used for judging whether the electrical property parameters corresponding to the holes meet a reasonable range or not according to the relation comparison table and the distortion values of the holes.
Preferably, the establishing module comprises: the sample testing unit is used for testing the electrical performance parameters corresponding to the distortion values of the holes which are taken as samples; and the output unit is used for outputting the relation between the distortion value and the electrical property parameter in the form of a comparison map and/or a comparison table.
Preferably, the second judging module is further included, and is configured to comprehensively judge whether the electrical performance parameter corresponding to each hole satisfies a reasonable range according to a plurality of distortion values in the axial direction of each hole.
Preferably, the identification module comprises: the processing unit is used for obtaining a second derivative processing result according to the gray value of each pixel in the section image; and a coordinate conversion unit that obtains a plurality of boundary point coordinates on the boundary based on the second derivative processing result.
Preferably, the processing unit includes: the function generation subunit is used for obtaining a plurality of functions of unit length and the gray value according to the gray value of each row of pixels of the section image; and the function calculating subunit is used for performing second derivative processing on each function, respectively obtaining the second derivative of each function, and identifying the boundary point of each row of pixels based on the second derivative of each function.
Preferably, the processing unit further comprises: and the frequency filtering subunit is used for performing high-frequency filtering processing on each function.
Preferably, the detection device is an automatic detection device.
According to the detection method and the detection device of the semiconductor structure, the detail characteristics of the semiconductor structure can be obtained by acquiring the section image of the semiconductor structure output by the transmission electron microscope, and the pixel size is generally from a few nanometers to dozens of nanometers and even below the nanometer level; identifying boundary coordinates of the cross-sectional image of each hole through the cross-sectional image, performing ellipse fitting, further determining a long axis and a short axis of each hole, and taking the difference value of the long axis and the short axis of each hole as a distortion value of the hole, thereby quantifying the distortion degree of the hole; whether the electrical performance parameters corresponding to the holes meet a reasonable range or not is judged by establishing a relation comparison table between the distortion value and at least one electrical performance parameter and according to the relation comparison table and the distortion value of the holes, so that the purpose of quantitatively analyzing the influence of the distortion degree on the electrical performance is achieved.
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The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings.
Fig. 1 shows a schematic step diagram of a method for inspecting a semiconductor structure according to an embodiment of the present invention.
Fig. 2 shows a schematic diagram of the step S01 in fig. 1.
Fig. 3 shows a schematic diagram of the step S03 in fig. 1.
Fig. 4 shows a schematic diagram of the step of S031 in fig. 3.
Fig. 5a shows a schematic view of a cut-out section image at different heights in the same horizontal direction.
Fig. 5b shows a schematic cross-sectional view of a semiconductor structure according to an embodiment of the present invention.
Fig. 6 shows a schematic diagram of the local gray matrix in fig. 5 b.
Fig. 7 shows a functional image diagram of fig. 6.
Fig. 8 shows a schematic diagram of the functional image after high-frequency filtering of fig. 7.
Fig. 9 shows a schematic diagram of the function of fig. 8 after second derivative processing.
FIG. 10 shows a schematic of a boundary image of an embodiment of the invention.
Fig. 11 shows a schematic diagram of the boundary coordinates in fig. 10.
Figure 12 shows a schematic diagram of an ellipse fit.
Fig. 13a to 13e show a number of different ellipse fitting schematics.
FIG. 14 shows a scatter plot of distortion values versus electrical performance parameters for an embodiment of the present invention.
Fig. 15 is a schematic structural diagram of a detection apparatus for a semiconductor structure according to an embodiment of the present invention.
Fig. 16 shows a schematic diagram of the building block of fig. 15.
Fig. 17 shows a schematic structural diagram of the identification module in fig. 15.
Fig. 18 shows a schematic view of the structure of the processing unit in fig. 17.
Detailed Description
The invention will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by like reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale. In addition, certain well known components may not be shown. For simplicity, the semiconductor structure obtained after several steps can be described in one figure.
It will be understood that when a layer or region is referred to as being "on" or "over" another layer or region in describing the structure of the device, it can be directly on the other layer or region or intervening layers or regions may also be present. And, if the device is turned over, that layer, region, or regions would be "under" or "beneath" another layer, region, or regions.
If for the purpose of describing the situation directly on another layer, another area, the expression "directly on … …" or "on … … and adjacent thereto" will be used herein.
In the following description, numerous specific details of the invention, such as structure, materials, dimensions, processing techniques and techniques of the device are described to provide a more thorough understanding of the invention. However, as will be understood by those skilled in the art, the present invention may be practiced without these specific details.
The present invention may be embodied in various forms, some examples of which are described below.
Fig. 1 is a schematic step diagram illustrating a method for inspecting a semiconductor structure according to an embodiment of the present invention.
In step S01, a correlation map between the distortion value and at least one electrical property parameter is established. The control table is the basis for later quantitative analysis of the effect of the degree of distortion of the wells on the electrical performance. As shown in fig. 2, the lookup table may be established by the following steps S011 to S012.
In step S011, the electrical property parameters of the holes corresponding to the distortion value of each of the holes as the samples are tested, wherein the process of testing the distortion value of each of the holes as the samples can be explained by steps S02 to S05, which will not be detailed herein.
In step S012, the relationship between the distortion value and the electrical property parameter is output in the form of a map and/or a look-up table, so that the worker can clearly understand the relationship between the distortion value and the electrical property parameter.
In step S02, a cross-sectional image of the semiconductor structure output by a Transmission Electron Microscope (TEM) is acquired.
In this step, for example, sectional images taken at different heights along the same horizontal direction of the semiconductor structure 100, as shown in fig. 5a, for example, along the AA line and the BB line, respectively, cross-sectional patterns at different depths of the same hole 101 can be obtained. Wherein only one hole 101 is shown in figure 5a for clarity of presentation. However, embodiments of the present invention are not obvious and other arrangements of the number of holes in a semiconductor may be made as desired by those skilled in the art. The semiconductor structure is, for example, a 3D memory and may include a plurality of holes 101, which may be channel holes or other deep hole structures.
In this step, the sectional image obtained is a gray scale image obtained directly or indirectly and includes a sectional view of at least one hole, the plane of the sectional view being perpendicular to the axial direction of the hole, as shown in fig. 5 b. In practice, the wafer may be placed under a transmission electron microscope and a cross-sectional image of the hole may be output. Since the area of the wafer is larger than the area of the field of view of the transmission electron microscope, the cross-sectional image of the hole output by the transmission electron microscope is an image of a predetermined region in the wafer.
In step S03, a plurality of boundary points of the hole are identified, and a plurality of boundary coordinates corresponding to the plurality of boundary points are obtained. As the critical dimensions of semiconductor devices have been reduced to the nanometer scale, one step that is important for measuring device critical dimensions is to obtain precise pattern boundaries to provide accurate parameters for subsequent critical dimension measurements. As shown in fig. 3, the boundary of the graph can be recognized through the following steps S031 through S032.
In step S031, the second derivative processing result is obtained according to the gray-level value of each pixel in the profile image. The second derivative processing of the section image can highlight the abrupt change of the image gray level, and does not emphasize the area with slowly changing gray level, so that the boundary positioning capability is stronger. As shown in fig. 4, the second derivative processing result may be obtained by the following steps S031a through S031 c.
In step S031a, a plurality of unit lengths and gray-scale values are obtained according to the gray-scale value of each row of pixels of the cross-sectional image. For clarity, the present embodiment only cuts a part of the cross-sectional image, the cut part is shown in fig. 5b, and the step of extracting the boundary of the graphics in the white dashed frame part will be described in detail in the following description.
As shown in fig. 6, the image of the white virtual frame portion is composed of m × n pixels, each pixel has a corresponding gray value, each line of gray values is scanned to obtain a plurality of functions of unit length and gray value, for example, a line of pixels in the virtual frame in fig. 6 is scanned to obtain a function as shown in fig. 7, wherein the unit of abscissa x is nm, and the ordinate y represents the gray value of the unit length corresponding to the line of pixels.
In some preferred embodiments, the gray value of each pixel may be expanded, for example, by the same factor, thereby expanding the difference between the corresponding gray values. However, the embodiment of the present invention is not limited to this, and those skilled in the art may perform different processing on the gray value corresponding to each pixel as needed, for example, perform inverse processing on the gray value, or expand the gray values of different regions by different multiples, so as to expand the difference between the corresponding gray values while preserving the graph characteristic curve, which is beneficial to improving the sensitivity.
In step S031b, high frequency filtering is performed for each function. In this step, the function in fig. 7 is, for example, high-frequency filtered to obtain the function shown in fig. 8. After high frequency filtering, noise in the image can be filtered out.
In step S031c, a second derivative process is performed on each of the functions to obtain a second derivative of each function, and boundary points of each row of pixels are identified based on the second derivative of each function. In this step, for example, the function in fig. 8 is first subjected to second derivative processing to obtain a second derivative as shown in fig. 9. And then acquiring preset parameters, and judging whether a plurality of derivative values of each second derivative are larger than the preset parameters or not, wherein pixels corresponding to the derivative values larger than the preset parameters are boundary points.
In this embodiment, the preset values can be adjusted accordingly as needed, and the number of the obtained boundary points is related to the setting of the preset values.
In step S032, a plurality of boundary point coordinates on the boundary are obtained based on the second derivative processing result. In this step, it is necessary to calculate boundary point coordinates for each line of pixels, and a plurality of boundary point coordinates constitute a boundary curve of the figure. A boundary image is then obtained from each second derivative as shown in fig. 10.
In this step, a plurality of derivative values in each derivative, each corresponding to a row of pixels, need to be converted into gray, respectively. Because the boundary 10 is composed of boundary points and has a large difference value with the gray values of the pixels on the two sides of the boundary, a clear and accurate graph boundary can be obtained according to the boundary image. In this step, it is also necessary to output the boundary point coordinates in the form of a coordinate system, as shown in fig. 11, in which the horizontal and vertical coordinates are all in nm.
In step S04, an ellipse is numerically fitted based on the plurality of boundary coordinates, and the major axis and the minor axis of the ellipse are obtained, as shown in fig. 12, in which the fitted ellipse 21 corresponds to the irregular figure 22 composed of the boundary coordinates, DmaxRepresentLength of major axis, DminIndicating the length of the minor axis.
In step S05, a difference between the major axis and the minor axis is calculated. In this step, the difference is taken as the distortion value of the hole. Fig. 13a to 13e show a plurality of different ellipse fitting schematics, and similarly, the twist value for each hole in the semiconductor structure is calculated.
After calculating the distortion value of the wells as the samples, executing steps S011 through S012, the electrical property parameter of the well corresponding to the distortion value of each well as the sample is tested, and the relationship between the distortion value and the electrical property parameter is output in the form of a comparison chart and/or a comparison table. In some embodiments, the electrical performance parameter comprises a coupling voltage, and the relationship between the distortion value and the electrical performance parameter is output in the form of a scatter plot, as shown in fig. 14.
In step S06, it is determined whether the electrical property parameter corresponding to the well satisfies a reasonable range according to the relationship chart and the distortion value of the well. When a plurality of holes exist in the semiconductor structure, each hole can be numbered, the distortion value of each hole is automatically measured in batch, then the distortion value of each hole is output in a form of a table, for example, and whether the electrical performance parameter of each hole meets a reasonable range or not is sequentially judged according to a comparison table.
When the judgment result is that the reasonable range is not met, the etching process needs to be improved, and in the specific etching process, the process parameters of etching can be adjusted, which include: one or more of reaction pressure, reaction time, reaction temperature, reaction speed, radio frequency power, gas or liquid flow and the like, thereby increasing the probability that the distortion value of the hole meets a reasonable range and further optimizing the electrical performance.
In step S07, the correspondence of the different depths of the holes to the distortion values is obtained. Since the sectional images are taken at different heights in the same horizontal direction of the semiconductor structure in step S02, sectional patterns of different depths of the same hole 101 are obtained. Each cross-sectional image is processed through the steps S03 to S05, so that the nicking degrees of the same hole at different depths can be obtained, and the horizontal direction and the vertical direction of the hole are further analyzed in an all-dimensional manner by combining a comparison table, so that a quantitative standard is provided for improving the etching process.
Fig. 15 shows a schematic structural diagram of a detection apparatus for a semiconductor structure according to an embodiment of the present invention, fig. 16 shows a schematic structural diagram of a building block in fig. 15, fig. 17 shows a schematic structural diagram of an identification block in fig. 15, and fig. 18 shows a schematic structural diagram of a processing unit in fig. 17.
As shown in fig. 15 to 18, the testing apparatus for a semiconductor structure according to an embodiment of the present invention includes: the system comprises a building module 110, an obtaining module 120, a recognition module 130, a fitting module 140, a calculation module 150, a first judgment module 160, and a second judgment module 170.
The establishing module 110 is configured to establish a relationship between the distortion value and at least one electrical performance parameter. The obtaining module 120 is configured to obtain a cross-sectional image of the semiconductor structure output by the transmission electron microscope, where the cross-sectional image includes a cross-sectional view of at least one hole, and a plane of the cross-sectional view is perpendicular to an axial direction of the hole. The identification module 130 is configured to identify a plurality of boundary points of the hole, and obtain a plurality of boundary coordinates corresponding to the plurality of boundary points. The fitting module 140 is configured to perform a numerical fitting of the ellipse according to the boundary coordinates, and obtain a major axis and a minor axis of the ellipse. The calculation module 150 is configured to calculate a difference between the major axis and the minor axis, and use the difference as a hole distortion value. The first determining module 160 is used for determining whether the electrical property parameter corresponding to the hole satisfies a reasonable range according to the relationship comparison table and the distortion value of the hole. The second determining module 170 is configured to comprehensively determine whether the electrical performance parameter corresponding to each hole satisfies a reasonable range according to the plurality of distortion values in the axial direction of each hole.
The setup module 110 includes a sample testing unit 111 and an output unit 112. The sample testing unit 111 is used for testing the electrical performance parameters of the holes corresponding to the distortion values of the holes serving as samples. The output unit 112 is used for outputting the relationship between the distortion value and the electrical performance parameter in the form of a comparison map and/or a comparison table.
The recognition module 130 includes a processing unit 131 and a coordinate transformation unit 132. The processing unit 131 is configured to obtain a second derivative processing result according to the gray-level value of each pixel in the cross-sectional image. The coordinate conversion unit 132 obtains a plurality of boundary point coordinates on the boundary based on the second derivative processing result.
The processing unit 131 includes: a function generation subunit 1311, a frequency filtering subunit 1312, and a function calculation subunit 1313. The function generating subunit 1311 is configured to obtain a plurality of functions of unit length and gray scale value according to the gray scale value of each row of pixels of the cross-sectional image. The frequency filtering subunit 1312 is configured to perform a high-frequency filtering process on each function. The function calculation subunit 1313 is configured to perform second-order derivative processing on each function, obtain a second-order derivative of each function, and identify a boundary point of each row of pixels based on the second-order derivative of each function.
The semiconductor structure is automatically checked by the testing device of the semiconductor structure of the embodiment of the invention, so that the detection method is realized, and the details are not repeated.
According to the detection method and the detection device of the semiconductor structure, the detail characteristics of the semiconductor structure can be obtained by acquiring the section image of the semiconductor structure output by the transmission electron microscope, and the pixel size is generally from a few nanometers to dozens of nanometers and even below the nanometer level; identifying boundary coordinates of the cross-sectional image of each hole through the cross-sectional image, performing ellipse fitting, further determining a long axis and a short axis of each hole, and taking the difference value of the long axis and the short axis of each hole as a distortion value of the hole, thereby quantifying the distortion degree of the hole; whether the electrical performance parameters corresponding to the holes meet a reasonable range or not is judged by establishing a relation comparison table between the distortion value and at least one electrical performance parameter and according to the relation comparison table and the distortion value of the holes, so that the purpose of quantitatively analyzing the influence of the distortion degree on the electrical performance is achieved.
The detection device for the semiconductor structure automatically detects the semiconductor structure, so that the efficiency and the reliability of measurement are improved.
In the above description, the technical details of patterning, etching, and the like of each layer are not described in detail. It will be appreciated by those skilled in the art that layers, regions, etc. of the desired shape may be formed by various technical means. In addition, in order to form the same structure, those skilled in the art can also design a method which is not exactly the same as the method described above. In addition, although the embodiments are described separately above, this does not mean that the measures in the embodiments cannot be used in advantageous combination.
The embodiments of the present invention have been described above. However, these examples are for illustrative purposes only and are not intended to limit the scope of the present invention. The scope of the invention is defined by the appended claims and equivalents thereof. Various alternatives and modifications can be devised by those skilled in the art without departing from the scope of the invention, and these alternatives and modifications are intended to fall within the scope of the invention.
Claims (13)
1. A method of inspecting a semiconductor structure, comprising:
establishing a relation comparison table between the distortion value and at least one electrical performance parameter;
acquiring a section image of the semiconductor structure output by a transmission electron microscope, wherein the section image comprises a section pattern of at least one hole, and a plane of the section pattern is perpendicular to the axial direction of the hole;
Identifying a plurality of boundary points of the hole, and obtaining a plurality of boundary coordinates corresponding to the boundary points;
carrying out ellipse numerical fitting according to the boundary coordinates, and obtaining a long axis and a short axis of the ellipse;
calculating a difference between the major axis and the minor axis, the difference being taken as the distortion value of the hole; and
and judging whether the electrical performance parameters corresponding to the holes meet a reasonable range or not according to the relation comparison table and the distortion values of the holes.
2. The test method of claim 1, wherein the step of establishing the relational lookup table comprises:
testing the electrical performance parameter corresponding to the distortion value of each hole as a sample; and
and outputting the relation between the distortion value and the electrical performance parameter in the form of a comparison chart and/or a comparison table.
3. The detection method according to claim 2, wherein the step of obtaining a plurality of boundary coordinates corresponding to the plurality of boundary points comprises:
obtaining a second derivative processing result according to the gray value of each pixel in the section image; and
obtaining a plurality of boundary coordinates on the boundary based on the second derivative processing result.
4. The detection method according to claim 3, wherein the step of obtaining the second derivative processing result according to the gray-level value of each pixel in the sectional image comprises:
obtaining a function of a plurality of unit lengths and the gray value according to the gray value of each line of pixels of the section image; and
and performing second derivative processing on each function to respectively obtain the second derivative of each function, and identifying the boundary point of each row of pixels based on the second derivative of each function.
5. The detection method according to claim 4, wherein the step of obtaining the second derivative processing result according to the gray-scale value of each pixel in the cross-sectional image before performing the second derivative processing on each function further comprises performing high-frequency filtering processing on each function.
6. The method of any one of claims 1-5, further comprising determining whether the electrical performance parameter associated with each of the holes satisfies a reasonable range based on a plurality of distortion values in an axial direction of the hole.
7. An apparatus for inspecting a semiconductor structure, comprising:
the establishing module is used for establishing a relation comparison table between the distortion value and at least one electrical performance parameter;
The acquisition module is used for acquiring a section image of the semiconductor structure output by a transmission electron microscope, and comprises a section pattern of at least one hole, wherein the plane of the section pattern is perpendicular to the axial direction of the hole;
the identification module is used for identifying a plurality of boundary points of the hole and obtaining a plurality of boundary coordinates corresponding to the boundary points;
the fitting module is used for performing ellipse numerical fitting according to the boundary coordinates and obtaining the long axis and the short axis of the ellipse;
a calculation module for calculating a difference between the major axis and the minor axis as the distortion value of the hole; and
and the first judging module is used for judging whether the electrical property parameters corresponding to the holes meet a reasonable range or not according to the relation comparison table and the distortion values of the holes.
8. The detection apparatus according to claim 7, wherein the establishing module comprises:
the sample testing unit is used for testing the electrical performance parameters corresponding to the distortion values of the holes which are taken as samples; and
and the output unit is used for outputting the relation between the distortion value and the electrical performance parameter in the form of a comparison map and/or a comparison table.
9. The detecting device for detecting the rotation of the motor rotor according to the claim 8, further comprising a second judging module for judging whether the electrical performance parameters corresponding to the holes meet reasonable ranges according to a plurality of distortion values in the axial direction of each hole.
10. The detection device according to claim 9, wherein the identification module comprises:
the processing unit is used for obtaining a second derivative processing result according to the gray value of each pixel in the section image; and
and the coordinate conversion unit is used for obtaining a plurality of boundary point coordinates on the boundary based on the second derivative processing result.
11. The detection device according to claim 10, wherein the processing unit comprises:
the function generation subunit is used for obtaining a plurality of functions of unit length and the gray value according to the gray value of each row of pixels of the section image; and
and the function calculating subunit is used for performing second-order derivative processing on each function, respectively obtaining the second-order derivative of each function, and identifying the boundary point of each row of pixels based on the second-order derivative of each function.
12. The detection device according to claim 11, wherein the processing unit further comprises:
And the frequency filtering subunit is used for performing high-frequency filtering processing on each function.
13. A testing device according to any of claims 7-12 wherein the testing device is an automatic testing device.
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