CN110634794A - Method for manufacturing display panel - Google Patents
Method for manufacturing display panel Download PDFInfo
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- CN110634794A CN110634794A CN201910925789.4A CN201910925789A CN110634794A CN 110634794 A CN110634794 A CN 110634794A CN 201910925789 A CN201910925789 A CN 201910925789A CN 110634794 A CN110634794 A CN 110634794A
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- layer
- flat layer
- local area
- flat
- display panel
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 22
- 238000000034 method Methods 0.000 title claims description 30
- 239000010409 thin film Substances 0.000 claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 16
- 238000001312 dry etching Methods 0.000 claims abstract description 9
- 239000000463 material Substances 0.000 claims abstract description 9
- KPUWHANPEXNPJT-UHFFFAOYSA-N disiloxane Chemical group [SiH3]O[SiH3] KPUWHANPEXNPJT-UHFFFAOYSA-N 0.000 claims abstract description 8
- 230000001678 irradiating effect Effects 0.000 claims abstract description 6
- 230000001590 oxidative effect Effects 0.000 claims abstract description 6
- 238000009832 plasma treatment Methods 0.000 claims description 8
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 5
- 238000000576 coating method Methods 0.000 claims description 5
- 229910052760 oxygen Inorganic materials 0.000 claims description 5
- 239000001301 oxygen Substances 0.000 claims description 5
- 238000004528 spin coating Methods 0.000 claims description 5
- -1 polydimethylsiloxane Polymers 0.000 claims description 4
- 229910018503 SF6 Inorganic materials 0.000 claims description 3
- 238000002161 passivation Methods 0.000 claims description 3
- SFZCNBIFKDRMGX-UHFFFAOYSA-N sulfur hexafluoride Chemical compound FS(F)(F)(F)(F)F SFZCNBIFKDRMGX-UHFFFAOYSA-N 0.000 claims description 3
- 229960000909 sulfur hexafluoride Drugs 0.000 claims description 3
- TXEYQDLBPFQVAA-UHFFFAOYSA-N tetrafluoromethane Chemical compound FC(F)(F)F TXEYQDLBPFQVAA-UHFFFAOYSA-N 0.000 claims description 3
- 239000004205 dimethyl polysiloxane Substances 0.000 claims description 2
- 230000033444 hydroxylation Effects 0.000 claims description 2
- 238000005805 hydroxylation reaction Methods 0.000 claims description 2
- 230000003647 oxidation Effects 0.000 claims description 2
- 238000007254 oxidation reaction Methods 0.000 claims description 2
- 229920000435 poly(dimethylsiloxane) Polymers 0.000 claims description 2
- 229920000642 polymer Polymers 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 6
- 238000005530 etching Methods 0.000 description 5
- 229920002120 photoresistant polymer Polymers 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 125000000524 functional group Chemical group 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000007641 inkjet printing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
The application discloses a manufacturing method of a display panel, which comprises the following steps: forming a thin film transistor layer on a substrate; forming a flat layer on one side of the thin film transistor layer, which faces away from the substrate, wherein the material of the flat layer is siloxane; placing a mask plate at a position with a certain distance from the flat layer, irradiating a local area of the flat layer with ultraviolet rays through the mask plate, and oxidizing the flat layer in the local area; and carrying out dry etching on the flat layer, removing the oxidized flat layer in the local area, and exposing the thin film transistor layer in the local area. The temperature is not higher than 200 ℃ when the flat layer is solidified, the performance of the TFT device is not rapidly reduced or even loses efficacy, and the reliability of the OLED is improved.
Description
Technical Field
The invention relates to the technical field of display, in particular to the field of organic light emitting diodes, and particularly relates to a manufacturing method of a display panel.
Background
An Organic light-emitting diode (OLED) is a thin film light-emitting device made of an Organic semiconductor material, and has a self-light-emitting characteristic. In an organic light emitting layer of an OLED device, defects such as a microcavity effect or a point discharge occur due to a step difference of a TFT (Thin film transistor) flat layer, and thus efficiency of the organic light emitting device is reduced.
The existing flat layer material needs to be cured at the temperature of more than 300 ℃, and the TFT device is easy to have sharp performance reduction and even failure at the temperature of more than 200 ℃.
Disclosure of Invention
In view of the above-described drawbacks or shortcomings in the related art, it is desirable to provide a method of manufacturing a display panel that does not easily deteriorate the performance of TFTs.
In a first aspect, a method for manufacturing a display panel according to the present invention includes the steps of:
forming a thin film transistor layer on a substrate;
forming a flat layer on one side of the thin film transistor layer, which faces away from the substrate, wherein the material of the flat layer is siloxane;
placing a mask plate at a position with a certain distance from the flat layer, irradiating a local area of the flat layer with ultraviolet rays through the mask plate, and oxidizing the flat layer in the local area;
and carrying out dry etching on the flat layer, removing the oxidized flat layer in the local area, and exposing the thin film transistor layer in the local area.
According to the technical scheme provided by the embodiment of the application, the material of the flat layer is siloxane, the temperature is not higher than 200 ℃ when the flat layer is cured, the performance of the TFT device is not rapidly reduced or even loses efficacy, the reliability of the OLED is improved, and the problem that the performance of the TFT device is rapidly reduced or even loses efficacy when the existing flat layer material is cured can be solved.
Drawings
Other features, objects and advantages of the present application will become more apparent upon reading of the following detailed description of non-limiting embodiments thereof, made with reference to the accompanying drawings in which:
FIG. 1 is a schematic structural diagram illustrating a method for forming a planarization layer in a display panel according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a mask plate provided in the method for manufacturing a display panel according to the embodiment of the present invention;
FIG. 3 is a schematic structural diagram of a method for manufacturing a display panel according to an embodiment of the present invention, in which ultraviolet rays irradiate a planarization layer through a mask plate;
FIG. 4 is a schematic structural diagram illustrating a method for forming a planarization layer in a display panel according to an embodiment of the present invention;
FIG. 5 is a schematic diagram illustrating a structure of a reflective anode layer formed in a method for manufacturing a display panel according to an embodiment of the invention;
fig. 6 is a schematic structural diagram of a pixel layer formed in the method for manufacturing a display panel according to the embodiment of the invention.
Detailed Description
The present application will be described in further detail with reference to the following drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the relevant invention and not restrictive of the invention. It should be noted that, for convenience of description, only the portions related to the present invention are shown in the drawings.
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.
Referring to fig. 1-4, a method for manufacturing a display panel according to an embodiment of the present invention includes the following steps:
forming a thin-film transistor layer 20 on the substrate 10;
forming a flat layer 30 on a side of the thin-film transistor layer 20 opposite to the substrate, wherein the material of the flat layer 30 is siloxane;
placing a mask plate 40 at a position having a certain distance from the flat layer 30, irradiating the local area 31 of the flat layer 30 with ultraviolet rays through the mask plate 40, and oxidizing the flat layer 30 located in the local area 31;
and performing dry etching on the flat layer 30, removing the oxidized flat layer 30 in the local area 31, and exposing the thin-film transistor layer 20 in the local area 31.
In embodiments of the present invention, the substrate may be a flexible substrate or a glass substrate. The material of the flat layer is siloxane, the temperature is not higher than 200 ℃ when the flat layer is cured, the performance of the TFT device is not rapidly reduced or even loses efficacy, and the reliability of the OLED is improved.
The method comprises the steps of irradiating ultraviolet rays on a local area of the flat layer, oxidizing the flat layer in the local area, increasing the etching selection ratio between the oxidized flat layer in the local area and the unoxidized flat layer outside the local area, and reducing the influence on the flat layer outside the local area when the flat layer is subjected to dry etching.
Referring to fig. 2 and 3, a mask plate is placed at a distance from the flat layer, the mask plate including a light transmitting region 41 and a light blocking region 42, and ultraviolet rays can pass through the mask plate through the light transmitting region 41, the light transmitting region 41 being opposite to a partial region of the flat layer. Ultraviolet irradiation is performed on a local area of the flat layer through the mask plate, specifically, in the local area, ultraviolet rays can penetrate through the mask plate, and in a position of the flat layer except the local area, ultraviolet rays cannot penetrate through the mask plate. The local area of the flat layer is irradiated by ultraviolet rays, the flat layer in the local area is oxidized, functional groups on the surface of the flat layer in the local area react, the flat layer in the local area is partially converted into inorganic silicon dioxide, and the local area is conveniently etched subsequently. The etching selectivity between the oxidized planarization layer located in the local area and the non-oxidized planarization layer located outside the local area is relatively large, but may be, but not limited to, the etching selectivity between the oxidized planarization layer located in the local area and the non-oxidized planarization layer located outside the local area is greater than 10. When the oxidized flat layer in the local area is subjected to dry etching, the unoxidized flat layer outside the local area is rarely or even cannot be etched, so that the flatness of the flat layer is ensured, and the effect of the flat thin film transistor layer of the flat layer is ensured.
In the prior art, after the photoresist is directly formed on the surface of the flat layer, the flat layer is etched, and because the photoresist and the flat layer have the same etching rate of nearly 90%, the photoresist is easily etched when the flat layer is etched to form a pattern, so that the part of the flat layer which does not need to be etched is damaged, and the flat layer loses the effect of the flat thin film transistor layer. After the etching is completed, the photoresist on the flat layer needs to be stripped, so that the flat layer is easily damaged. In the embodiment of the invention, the photoresist on the flat layer is not required to be stripped after the flat layer is formed, so that the flatness of the flat layer is ensured.
After obtaining the planar layer, referring to fig. 5, a reflective anode layer 50 is formed on the side of the planar layer facing away from the thin film transistor layer, where the planar layer originally oxidized the planar layer, the reflective anode layer 50 forming an electrical connection with the thin film transistor layer. Referring to fig. 6, a pixel layer 60 is formed on a side of the reflective anode layer 50 opposite to the thin-film transistor layer, and the pixel layer 60 includes a plurality of pixel units, which can directly form sub-pixels displaying red, green and blue colors through an inkjet printing process; or forming a sub-pixel displaying white by an evaporation technology, and then forming a color film on the side of the sub-pixel, which is opposite to the reflective anode layer.
Further, a planarization layer 30 is formed on the side of the thin-film transistor layer 20 opposite to the substrate 10 by a coating process or a spin coating process. The coating process and the spin coating process are suitable for substrates of different sizes, and particularly, the coating process is suitable for substrates of larger sizes, and the spin coating process is suitable for substrates of smaller sizes. The coating process or the spin coating process can ensure the film forming uniformity of the flat layer and the performance of the flat layer.
Further, the siloxane is a modified polymer of polydimethylsiloxane or polymethylsiloxane. Has better insulating property and affinity.
Further, before forming the planarization layer 30, the method further includes: the planarization layer 30 is subjected to oxygen plasma treatment or surface hydroxylation treatment. The adhesion between the flat layer and the thin film transistor layer can be improved, the phenomenon that relative motion is generated between the flat layer and the thin film transistor layer when the flat layer is processed is avoided, the processing difficulty is reduced, meanwhile, the binding force between the flat layer and the thin film transistor layer is improved, and the reliability of an OLED device is improved.
Further, before the ultraviolet irradiation is performed on the local area of the planarization layer 30, the method further includes: the planarization layer 30 is subjected to a curing process. The curing treatment can enable the flat layer to be shaped, and when ultraviolet irradiation is carried out on a local area of the flat layer, the flat layer can be prevented from being deformed, the processing difficulty of the flat layer is reduced, and the flatness of the flat layer is ensured.
Furthermore, the temperature of the curing treatment is 60-100 ℃, and the time of the curing treatment is 20-120 s. When the flat layer is cured, the temperature of the curing treatment is 60-100 ℃, so that the performance of the TFT device is prevented from being rapidly reduced or even losing efficacy due to overhigh curing temperature, and the reliability of the OLED is improved.
Referring to fig. 2 and 3, further, the mask plate 40 is removed after the irradiation of the planarization layer 30 with the ultraviolet rays is completed. The mask plate is placed at a position away from the flat layer by a certain distance, after the mask plate is removed after irradiation is completed, dry etching is performed on the flat layer, the mask plate cannot be in direct contact with the flat layer, the flat layer cannot be lost, and the flatness of the flat layer is guaranteed.
Further, dry etching is performed on the planarization layer 30, including performing carbon tetrafluoride and oxygen plasma treatment or sulfur hexafluoride plasma treatment on the planarization layer 30. The carbon tetrafluoride and oxygen plasma treatment or sulfur hexafluoride plasma treatment is adopted, so that the cost is low, the effect is good, and the flat layer cannot be polluted.
Further, the planarization layer 30 is subjected to oxidation treatment to obtain an insulating layer. And the flat layer is oxidized, so that the flat layer is converted into an insulating layer, the manufacturing procedures of the OLED are reduced, and the manufacturing cost of the OLED is reduced.
Further, the side of the flat layer 30 facing the thin-film transistor layer 20 is subjected to ultraviolet irradiation, and the surface of the flat layer facing the thin-film transistor layer is oxidized into a passivation layer. And oxidizing part of the flat layer to convert the part of the flat layer into a passivation layer, wherein the unoxidized flat layer is still used as the flat layer, so that the manufacturing procedures of the OLED are reduced, and the manufacturing cost of the OLED is reduced.
The above description is only a preferred embodiment of the application and is illustrative of the principles of the technology employed. It will be appreciated by a person skilled in the art that the scope of the invention as referred to in the present application is not limited to the embodiments with a specific combination of the above-mentioned features, but also covers other embodiments with any combination of the above-mentioned features or their equivalents without departing from the inventive concept. For example, the above features may be replaced with (but not limited to) features having similar functions disclosed in the present application.
Claims (10)
1. A method for manufacturing a display panel, comprising:
forming a thin film transistor layer on a substrate;
forming a flat layer on one side of the thin film transistor layer, which faces away from the substrate, wherein the material of the flat layer is siloxane;
placing a mask plate at a position with a certain distance from the flat layer, irradiating a local area of the flat layer with ultraviolet rays through the mask plate, and oxidizing the flat layer in the local area;
and carrying out dry etching on the flat layer, removing the oxidized flat layer in the local area, and exposing the thin film transistor layer in the local area.
2. The method of claim 1, wherein the planarization layer is formed by a coating process or a spin-coating process on a side of the thin-film-transistor layer facing away from the substrate.
3. The method for manufacturing a display panel according to claim 1, wherein the siloxane is polydimethylsiloxane or a modified polymer of polymethylsiloxane.
4. The method for manufacturing a display panel according to claim 1, further comprising, before forming the planarization layer: and carrying out oxygen plasma treatment or surface hydroxylation treatment on the flat layer.
5. The method for manufacturing a display panel according to claim 1, further comprising, before irradiating ultraviolet rays to a partial region of the planarization layer: and carrying out curing treatment on the flat layer.
6. The method for manufacturing a display panel according to claim 5, wherein the temperature of the curing treatment is 60 to 100 ℃ and the time of the curing treatment is 20 to 120 seconds.
7. The method for manufacturing a display panel according to claim 1, wherein the mask plate is removed after the irradiation of the ultraviolet rays to the planarization layer is completed.
8. The method of claim 1, wherein the dry etching the planarization layer comprises applying a carbon tetrafluoride and oxygen plasma treatment or a sulfur hexafluoride plasma treatment to the planarization layer.
9. The method for manufacturing a display panel according to claim 1, wherein the planarization layer is subjected to oxidation treatment to obtain an insulating layer.
10. The method of claim 1, wherein a surface of the flat layer facing the thin-film transistor layer is oxidized to a passivation layer by ultraviolet irradiation of a side of the flat layer facing the thin-film transistor layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910925789.4A CN110634794B (en) | 2019-09-27 | 2019-09-27 | Method for manufacturing display panel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910925789.4A CN110634794B (en) | 2019-09-27 | 2019-09-27 | Method for manufacturing display panel |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110634794A true CN110634794A (en) | 2019-12-31 |
| CN110634794B CN110634794B (en) | 2023-04-07 |
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| CN201910925789.4A Active CN110634794B (en) | 2019-09-27 | 2019-09-27 | Method for manufacturing display panel |
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| CN110634794B (en) | 2023-04-07 |
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