CN110597457A - Solid state disk, control method of solid state disk and controller - Google Patents
Solid state disk, control method of solid state disk and controller Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0604—Improving or facilitating administration, e.g. storage management
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0658—Controller construction arrangements
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
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Abstract
The embodiment of the invention provides a solid state disk, a solid state disk control method and a controller. The solid state disk provided by the embodiment of the application can automatically increase the memory of the DRAM cache unit according to the requirement by setting the DRAM cache unit with the adjustable memory size, after the memory of the DRAM cache unit is increased, more space is provided for calculating and managing data for the solid state disk, for example, the data frequently accessed by the host can be cached in the DRAM cache unit, so that the data do not need to be fetched from the NAND flash memory unit for repeatedly reading, the damage of the NAND flash memory unit caused by repeated reading is avoided, the hit rate of the data is increased, the data sent by the host can be cached in the DRAM cache unit firstly, then the data are written in the NAND flash memory unit, and in practical application, the repeated writing in of the NAND flash memory unit can be avoided.
Description
Technical Field
The application relates to the field of solid state disks, in particular to a solid state disk, a solid state disk control method and a controller.
Background
In the existing solid state disk SSD, data frequently accessed by a Host is usually stored in a NAND flash memory unit (NAND flash), and in the use process of the SSD, the data needs to be repeatedly accessed, which causes the NAND flash memory unit to grow a bad block because the Host repeatedly reads the same position.
Disclosure of Invention
In order to solve the technical problems or at least partially solve the technical problems, the application provides a solid state disk, a solid state disk control method and a controller.
In a first aspect, the present application provides a solid state disk including a controller and a memory;
the memory comprises a DRAM cache unit and a NAND flash memory unit;
the memory size of the DRAM cache unit is adjustable.
In one possible embodiment, the DRAM cache unit includes a replacement slot for inserting a DRAM chip, the replacement slot is communicatively connected to the controller, and the memory size of the DRAM cache unit is adjusted by replacing the DRAM chip in the replacement slot.
In one possible embodiment, the DRAM cache unit includes a plurality of slots for inserting DRAM chips, the plurality of slots are all in communication connection with the controller, and the increase or decrease of the memory of the DRAM cache unit is realized by increasing or decreasing the memory of the DRAM chip inserted into at least one of the plurality of slots.
In a second aspect, an embodiment of the present invention further provides a method for controlling a solid state disk, where the method is applied to the solid state disk in the first aspect, and the method includes:
the controller caches the data written by the host to the DRAM cache unit;
detecting whether the data volume of the data cached in the DRAM cache unit is smaller than a first preset data volume;
and if the data volume of the data cached in the DRAM cache unit is not less than a first preset data volume, writing the data cached in the DRAM cache unit into the NAND flash memory unit of the solid state disk by taking a second preset data volume as a writing unit, wherein the writing unit is the data volume written once.
In one possible embodiment, the method further comprises:
before writing the data cached in the DRAM cache unit into the NAND flash memory unit of the solid state disk by taking the first preset data volume as a writing unit, detecting whether the solid state disk meets a preset writing condition;
and if the solid state disk meets the preset writing condition, writing the data cached in the DRAM cache unit into the NAND flash memory unit of the solid state disk by taking the second preset data volume as a writing unit.
In a possible embodiment, detecting whether the solid state disk meets a preset writing condition includes:
acquiring the running state of the solid state disk;
judging whether the running state of the solid state disk is an idle state or not;
and if the running state of the solid state disk is an idle state, determining that the solid state disk meets a preset writing condition.
In a third aspect, an embodiment of the present invention further provides a solid state disk controller, which is applied to the solid state disk of the first aspect, where the controller includes:
the storage module is used for storing the data to be written into the NAND flash memory unit to the DRAM cache unit;
the data volume detection module is used for detecting whether the data volume of the data cached in the DRAM cache unit is smaller than a first preset data volume or not;
and the writing module is used for writing the data cached in the DRAM cache unit into the NAND flash memory unit of the solid state disk by taking a second preset data volume as a writing unit if the data volume of the data cached in the DRAM cache unit is not less than a first preset data volume.
In one possible embodiment, the controller further comprises:
and the writing condition detection module is used for detecting whether the solid state disk meets a preset writing condition or not before the data cached in the DRAM cache unit is written into the NAND flash memory unit of the solid state disk by taking the second preset data amount as a writing unit.
In a possible embodiment, the detecting module of the write condition detects whether the solid state disk meets a preset write condition, including:
acquiring the running state of the solid state disk;
judging whether the running state of the solid state disk is an idle state or not;
and if the running state of the solid state disk is an idle state, determining that the solid state disk meets a preset writing condition.
Compared with the prior art, the embodiment of the invention provides the solid state disk which comprises the controller and the memory, wherein the memory comprises the DRAM cache unit and the NAND flash memory unit, and the memory size of the DRAM cache unit is adjustable. The solid state disk provided by the embodiment of the application can automatically increase the memory of the DRAM cache unit according to the requirement by setting the DRAM cache unit with the adjustable memory size, after the memory of the DRAM cache unit is increased, more space is provided for calculating and managing data for the solid state disk, for example, the data frequently accessed by the host can be cached in the DRAM cache unit, so that the data do not need to be fetched from the NAND flash memory unit for repeatedly reading, the damage of the NAND flash memory unit caused by repeated reading is avoided, the hit rate of the data is increased, the data sent by the host can be cached in the DRAM cache unit firstly, then the data are written in the NAND flash memory unit, and in practical application, the repeated writing in of the NAND flash memory unit can be avoided.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention.
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.
Fig. 1 is a schematic diagram of a solid state disk according to an embodiment of the present invention;
fig. 2 is a schematic diagram of another solid state disk according to an embodiment of the present invention;
fig. 3 is a flowchart of a method for controlling a solid state disk according to an embodiment of the present invention;
fig. 4 is a block diagram of a controller according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
An SSD (Solid State Disk) is a computer external storage device based on persistent Memory, such as flash Memory, or non-persistent Memory, SDRAM (Synchronous Dynamic Random Access Memory). The device has the advantages of high reading and writing speed, low power consumption, no noise, vibration resistance, low heat, small volume and large working range, and is widely applied to various fields.
An existing SSD typically includes a controller and a Memory, wherein the Memory includes a DRAM (volatile Access Memory) cache unit and a NAND flash Memory unit, in which the memory of the DRAM cache memory unit is fixed and, typically, small, resulting in data that the host often stores needing to be stored in the NAND flash memory unit, this results in NAND flash memory cells storing such data being susceptible to damage from being read frequently, and because the memory of the DRAM cache unit is too small, the data is written into the NAND flash memory unit as soon as the data sent by the host is received, this also increases the number of writes to the NAND flash memory cell, resulting in NAND flash memory cells being prone to bad block growth, moreover, repeated writing causes disorder of the sequential arrangement of data written into the NAND flash memory cells, and thus a GC (Garbage Collection) needs to be started for Garbage Collection. In order to solve the above problems, in the prior art, a software manner is usually used to simulate a DRAM cache unit as a hard DISK controller, i.e., a DRAM DISK, to expand a memory for caching, but from the viewpoint of a user, the DRAM DISK is another hard DISK other than the SSD, that is, data stored in the DRAM DISK needs to be automatically controlled by the user to determine when to write back to the SSD, and cannot be directly controlled by the controller of the SSD, which may cause data loss in the DRAM DISK due to power failure.
In order to solve the above problem, an embodiment of the present invention provides a solid state disk, and fig. 1 is a schematic diagram of a solid state disk provided in an embodiment of the present invention, as shown in fig. 1, the solid state disk may include: the controller 110 and the memory 120, the memory 120 includes a DRAM cache unit 121 and a NAND flash memory unit 122, wherein the memory size of the DRAM cache unit 121 is adjustable.
In the present embodiment, the controller 110 is respectively connected to the DRAM cache unit 121, the NAND flash memory unit 122, and a host interface of a host connected to the solid state disk.
Wherein, the controller 110 controls the DRAM buffer unit 121 and the NAND flash memory unit 122, respectively.
In this embodiment, the memory size of the DRAM cache unit 121 is adjustable, that is, the memory of the DRAM cache unit 121 can be increased or decreased according to specific requirements, with the increase of the memory of the DRAM cache unit 121, there is more space for calculating and managing data for the SSD, and more data frequently accessed by Host can be temporarily stored in the DRAM cache unit, so that the hit rate of the data is high, and when the NAND flash memory unit needs to write a large amount of data, the controller 110 can control the data which is not written into the NAND flash memory unit in the future to be temporarily stored in the DRAM cache unit, unless there is a situation that the data has to be written immediately, the data temporarily stored in the DRAM cache unit can be written into the NAND flash memory unit when the solid state disk is in an idle state, so that the user can enjoy the same function as the dramdsik only by normally accessing the SSD, without installing additional software, if there is a demand for performance, increasing the memory of the DRAM cache unit 121 is equivalent to increasing the DRAM DISK, and can enjoy a similar speed advantage as the DRAM DISK.
In this embodiment, the DRAM cache unit 121 may be configured as a replaceable module, that is, a DRAM chip may be replaced, added or removed, for example, the DRAM cache unit 121 may be configured as a slot for inserting (inserting and extracting) a DRAM chip, and the number of the slots may be 1 or more, where the number of the slots includes 2.
In one example, the DRAM caching unit 121 includes a replacement slot 1211 (as shown in fig. 1) for inserting a DRAM chip, the replacement slot 1211 is communicatively connected to the controller 110, and the memory size of the DRAM caching unit 121 is adjusted by replacing the DRAM chip in the replacement slot 1211, for example: the memory of the DRAM chip originally inserted in the replacement slot 1211 is 200MB, if the DRAM chip originally inserted in the replacement slot 1211 is replaced with a DRAM chip with a memory of 1GB, the memory of the DRAM cache unit 121 is increased, and if the DRAM chip originally inserted in the replacement slot 1211 is replaced with a DRAM chip with a memory of 100MB, the memory of the DRAM cache unit 121 is decreased, so that it is known that the memory size of the DRAM cache unit 121 can be adjusted by replacing the DRAM chip inserted in the replacement slot 1211.
In an example, the DRAM cache unit 121 includes a plurality of slots for inserting and fetching DRAM chips, for example, slot 1, slot 2 … …, slot n (as shown in fig. 2), where a value of n is set according to a requirement, n slots may be randomly arranged, n slots are all in communication connection with the controller, and the increase or decrease of the memory of the DRAM chip inserted in n slots is implemented by increasing or decreasing the memory of the DRAM chip inserted in n slots. For example: when the memory of the DRAM cache unit 121 is to be reduced, it can be implemented by any one of the following ways:
mode 1: reducing the memory of the DRAM cache unit 121 is achieved by replacing the DRAM chips inserted in at least one slot with DRAM chips having a relatively small memory.
Mode 2 reducing the memory of the DRAM cache unit 121 is achieved by disconnecting at least one slot from the communication with the controller 110.
Mode 3: reducing the memory of the DRAM cache unit 121 is achieved by unplugging the DRAM chips within at least one slot. In addition to the above three ways, other ways suitable for the solid state disk provided in this embodiment may be adopted to reduce the memory of the DRAM cache unit 121.
When the memory of the DRAM cache unit 121 is to be increased, the memory can be implemented by any one of the following ways:
mode 1: reducing the memory of the DRAM cache unit 121 is achieved by replacing the DRAM chip inserted in at least one slot with a DRAM chip having a relatively large memory.
Mode 2: if there is a slot disconnected from the controller 110, the memory of the DRAM cache unit 121 is reduced by reconnecting the communication connection between the slot and the controller 110 and inserting a DRAM chip into the slot.
Mode 3: if there is a slot into which no DRAM chip is inserted, reducing the memory of the DRAM cache unit 121 is achieved by inserting a DRAM chip into a slot into which no DRAM chip is inserted.
The embodiment of the invention provides a solid state disk which comprises a controller and a memory, wherein the memory comprises a DRAM cache unit and a NAND flash memory unit, and the memory size of the DRAM cache unit is adjustable. The solid state disk provided by the embodiment of the application can automatically increase the memory of the DRAM cache unit according to the requirement by setting the DRAM cache unit with the adjustable memory size, after the memory of the DRAM cache unit is increased, more space is provided for calculating and managing data for the solid state disk, for example, the data frequently accessed by the host can be cached in the DRAM cache unit, so that the data do not need to be fetched from the NAND flash memory unit for repeatedly reading, the damage of the NAND flash memory unit caused by repeated reading is avoided, the hit rate of the data is increased, the data sent by the host can be cached in the DRAM cache unit firstly, then the data are written in the NAND flash memory unit, and in practical application, the repeated writing in of the NAND flash memory unit can be avoided.
According to the solid state disk provided by the embodiment, the DRAM storage unit is set to be a replaceable module form capable of inserting the DRAM chip, when the memory of the DRAM storage unit is adjusted, only the DRAM chip needs to be replaced, increased or reduced, and the operation is convenient.
An embodiment of the present invention further provides a method for controlling a solid state disk, which is applied to the solid state disk described above, and as shown in fig. 3, the method includes:
s301, the controller caches the data written by the host to a DRAM cache unit.
In this embodiment, the controller of the solid state disk is connected to the interface of the host, and receives data to be written into the NAND flash memory unit from the host, and in order to prevent repeated writing into the NAND flash memory unit, the controller first caches the data in the DRAM cache unit, and then detects the data in step S302 and writes the data into the NAND flash memory unit.
S302, detecting whether the data volume of the data cached in the DRAM cache unit is smaller than a first preset data volume.
In this embodiment, it is determined whether to perform S303, that is, whether to write the data buffered in the DRAM cache unit into the NAND flash memory unit, by detecting whether the data amount of the data buffered in the DRAM cache unit is smaller than a first preset data amount.
The first preset data amount is a requirement set according to requirements.
In one example, since the minimum write unit of the NAND flash memory unit is Page, the first preset data amount may be that the data amount of the data cached in the DRAM cache unit is not less than the size of the Page (Page) in the NAND flash memory unit, for example, the size of the Page is 16KB, and then it is determined that the data amount of the data cached in the DRAM cache unit is less than the first preset data amount when the data amount of the data cached in the DRAM cache unit is not less than 16KB, that is, after the data cached in the DRAM cache unit reaches 16KB, S303 is performed.
Because the data in the DRAM cache unit is written into the NAND flash memory unit when the data reaches the first predetermined data amount, the occurrence of repeated writing of the same Host LBA (Logical Block Address) can be greatly reduced, and the number of times of writing and reading of the NAND flash memory unit is also reduced, thereby reducing the occurrence probability of bad blocks and the number of times of starting the GC (garbage collection mechanism).
And S303, if the data volume of the data cached in the DRAM cache unit is not less than a first preset data volume, writing the data cached in the DRAM cache unit into the NAND flash memory unit of the solid state disk by taking a second preset data volume as a writing unit.
The write unit is a write-once data size, and is preferably a Page size in the NAND flash memory unit.
The first preset data volume is greater than or equal to the second preset data volume, and preferably, the first preset data volume is equal to the second preset data volume.
In one example, the first preset data amount is equal to the second preset data amount, and is the size of a Page in the NAND flash memory unit, for example, 16KB, and when it is determined that the data amount of the data cached in the DRAM cache unit is not less than 16KB, the data cached in the DRAM cache unit is written into the NAND flash memory unit in a write unit of 16KB, that is, the data cached in the DRAM cache unit is written into the NAND flash memory unit once every 16KB is reached.
Because sometimes the solid state disk may not be convenient to write data in other operations, in one embodiment, before writing the data in the DRAM cache unit into the NAND flash memory unit, whether the solid state disk meets a preset writing condition is detected; and if the solid state disk meets the preset writing condition, writing the data cached in the DRAM cache unit into the NAND flash memory unit of the solid state disk by taking the second preset data volume as a writing unit.
In one example, detecting whether the solid state disk meets a preset writing condition includes:
and acquiring the running state of the solid state disk.
The operation state of the solid state disk can be obtained by obtaining the operation parameters of the solid state disk and analyzing the operation parameters.
And judging whether the running state of the solid state disk is an idle state or not.
There are various operating states of the solid state disk, for example: working state, idle state, and the like, and the idle state refers to a state in which the solid state disk is not operated.
And if the running state of the solid state disk is an idle state, determining that the solid state disk meets a preset writing condition.
That is, when the solid state disk is in an idle state, data is written into the NAND flash memory unit, so that it is ensured that other operations of the solid state disk are not affected during writing.
The program corresponding to the control method is stored in a controller of the solid state disk, and the controller executes the program corresponding to the control method so as to realize the control method.
An embodiment of the present invention further provides a solid state disk controller, which is applied to the solid state disk described above and is configured to control a memory, and as shown in fig. 4, the controller 400 may include:
the memory module 401 is used for storing data to be written into the NAND flash memory unit into a DRAM cache unit;
a data amount detection module 402, configured to detect whether a data amount of data cached in the DRAM cache unit is smaller than a first preset data amount;
a writing module 403, configured to write the data cached in the DRAM cache unit into the NAND flash memory unit of the solid state disk by using a second preset data amount as a writing unit if the data amount of the data cached in the DRAM cache unit is not smaller than a first preset data amount.
The controller further includes:
and the writing condition detection module is used for detecting whether the solid state disk meets a preset writing condition or not before the data cached in the DRAM cache unit is written into the NAND flash memory unit of the solid state disk by taking the second preset data amount as a writing unit.
The write-in condition detection module detects whether the solid state disk meets a preset write-in condition, and the write-in condition detection module comprises the following steps:
acquiring the running state of the solid state disk;
judging whether the running state of the solid state disk is an idle state or not;
and if the running state of the solid state disk is an idle state, determining that the solid state disk meets a preset writing condition.
It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The foregoing are merely exemplary embodiments of the present invention, which enable those skilled in the art to understand or practice the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (9)
1. The solid state disk is characterized by comprising a controller and a memory;
the memory comprises a DRAM cache unit and a NAND flash memory unit;
the memory size of the DRAM cache unit is adjustable.
2. The solid state disk of claim 1, wherein the DRAM cache unit comprises a replacement slot for inserting a DRAM chip, the replacement slot is communicatively connected to the controller, and the memory size of the DRAM cache unit is adjusted by replacing the DRAM chip in the replacement slot.
3. The solid state disk of claim 1, wherein the DRAM cache unit comprises a plurality of slots for inserting DRAM chips, the plurality of slots are all in communication connection with the controller, and the increase or decrease of the memory of the DRAM cache unit is achieved by increasing or decreasing the memory of the DRAM chip inserted into at least one of the plurality of slots.
4. A method for controlling a solid state disk, the method being applied to the solid state disk of any one of claims 1 to 3, the method comprising:
the controller caches the data written by the host to the DRAM cache unit;
detecting whether the data volume of the data cached in the DRAM cache unit is smaller than a first preset data volume;
and if the data volume of the data cached in the DRAM cache unit is not less than a first preset data volume, writing the data cached in the DRAM cache unit into the NAND flash memory unit of the solid state disk by taking a second preset data volume as a writing unit, wherein the writing unit is the data volume written once.
5. The method of claim 4, further comprising:
before writing the data cached in the DRAM cache unit into the NAND flash memory unit of the solid state disk by taking the second preset data volume as a writing unit, detecting whether the solid state disk meets a preset writing condition;
and if the solid state disk meets the preset writing condition, writing the data cached in the DRAM cache unit into the NAND flash memory unit of the solid state disk by taking the second preset data volume as a writing unit.
6. The method of claim 5, wherein detecting whether the solid state disk meets a preset writing condition comprises:
acquiring the running state of the solid state disk;
judging whether the running state of the solid state disk is an idle state or not;
and if the running state of the solid state disk is an idle state, determining that the solid state disk meets a preset writing condition.
7. A solid state disk controller, applied to the solid state disk of any one of claims 1 to 3, the controller comprising:
the storage module is used for storing the data to be written into the NAND flash memory unit to the DRAM cache unit;
the data volume detection module is used for detecting whether the data volume of the data cached in the DRAM cache unit is smaller than a first preset data volume or not;
and the writing module is used for writing the data cached in the DRAM cache unit into the NAND flash memory unit of the solid state disk by taking a second preset data volume as a writing unit if the data volume of the data cached in the DRAM cache unit is not less than a first preset data volume.
8. The controller of claim 7, further comprising:
and the writing condition detection module is used for detecting whether the solid state disk meets a preset writing condition or not before the data cached in the DRAM cache unit is written into the NAND flash memory unit of the solid state disk by taking the second preset data amount as a writing unit.
9. The controller according to claim 8, wherein the writing condition detecting module detects whether the solid state disk meets a preset writing condition, and includes:
acquiring the running state of the solid state disk;
judging whether the running state of the solid state disk is an idle state or not;
and if the running state of the solid state disk is an idle state, determining that the solid state disk meets a preset writing condition.
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| CN113064843A (en) * | 2021-03-24 | 2021-07-02 | 深圳市时创意电子有限公司 | Manufacturing method of solid state disk and solid state disk |
| CN113126921A (en) * | 2021-04-06 | 2021-07-16 | 南昌航空大学 | Optimization method for improving write performance of 3D flash memory chip in solid-state disk |
| CN114464231A (en) * | 2022-01-14 | 2022-05-10 | 苏州浪潮智能科技有限公司 | Firmware storage method and system |
| CN117423366A (en) * | 2023-12-14 | 2024-01-19 | 武汉麓谷科技有限公司 | Power-on circuit for SSD solid state disk |
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