CN110568655A

CN110568655A - Display panel and display device

Info

Publication number: CN110568655A
Application number: CN201910859337.0A
Authority: CN
Inventors: 魏晓丽; 李东华; 周秀峰; 沈柏平
Original assignee: Xiamen Tianma Microelectronics Co Ltd
Current assignee: Xiamen Tianma Microelectronics Co Ltd
Priority date: 2019-09-11
Filing date: 2019-09-11
Publication date: 2019-12-13
Anticipated expiration: 2039-09-11
Also published as: CN110568655B

Abstract

The embodiment of the invention discloses a display panel and a display device. The display device comprises a display area and a non-display area, wherein the non-display area comprises a first non-display area and a second non-display area, the first non-display area is positioned on the first side of the display area, the first non-display area comprises a step area, and the second non-display area is positioned on the second side of the display area; the array substrate comprises a color film substrate and an array substrate which are arranged oppositely, one side of the array substrate, which is close to the color film substrate, is provided with a grounding terminal and a driving chip, the orthographic projection of the grounding terminal on the plane of the color film substrate is located in a second non-display area, the orthographic projection of the driving chip on the plane of the color film substrate is located in a step area, the array substrate comprises a grounding wire, and the grounding wire is located in the non-display area and is electrically connected with the driving chip and the grounding terminal. According to the technical scheme provided by the embodiment of the invention, static electricity generated by the display panel in the production and use processes can be led into the ground end through the grounding terminal and the grounding wire, so that the static electricity is prevented from accumulating on the display panel, and the display effect is further ensured.

Description

Display panel and display device

Technical Field

The embodiment of the invention relates to the technical field of display, in particular to a display panel and a display device.

Background

Liquid Crystal Display (LCD) devices have the advantages of light weight, thin thickness, low power consumption and no radiation, and are widely used in mobile phones, computers, vehicles and other devices.

Static electricity is not completely avoided in the production and use processes of the LCD, wherein the existence of the static electricity affects the display effect and the service life of the display panel. For example, when static electricity is accumulated on the surface of the LCD to form an electrostatic field, the liquid crystal in the LCD is easily affected by the electrostatic field to cause a phenomenon of pixel light leakage, which affects the display quality.

disclosure of Invention

The invention provides a display panel and a display device, which are used for preventing static electricity from accumulating on the display panel so as to ensure the display effect.

In a first aspect, an embodiment of the present invention provides a display panel, including:

The display device comprises a display area and a non-display area surrounding the display area, wherein the non-display area comprises a first non-display area and a second non-display area, the first non-display area is positioned on a first side of the display area, the first non-display area comprises a step area, and the second non-display area is positioned on a second side of the display area;

the array substrate comprises a color film substrate and an array substrate which are arranged oppositely, one side of the array substrate, which is close to the color film substrate, is provided with a grounding terminal and a driving chip, the orthographic projection of the grounding terminal on the plane of the color film substrate is located in a second non-display area, the orthographic projection of the driving chip on the plane of the color film substrate is located in a step area, the array substrate comprises a grounding wire, and the grounding wire is located in the non-display area and is electrically connected with the driving chip and the grounding terminal.

in a second aspect, an embodiment of the present invention further provides a display device, where the display device includes the display panel according to any embodiment of the present invention.

The display panel provided by the embodiment of the invention comprises a display area and a non-display area surrounding the display area, wherein the non-display area comprises a first non-display area and a second non-display area, the first non-display area is positioned at the first side of the display area and comprises a step area, and the second non-display area is positioned at the second side of the display area; the display panel further comprises a color film substrate and an array substrate which are arranged oppositely, a grounding terminal, a grounding wire and a driving chip are arranged on the array substrate, one end of the grounding wire is connected with the grounding terminal, the other end of the grounding wire is connected with a grounding pin of the driving chip, so that static charges can be led into a grounding end through the grounding terminal and the grounding wire, and static charges are prevented from accumulating on the LCD to form an electrostatic field to influence the quality of a display picture. In addition, the grounding terminal is positioned in the second non-display area instead of the first non-display area, so that the first non-display area does not need to reserve space for the grounding terminal, and the area of the first non-display area is favorably compressed.

Drawings

fig. 1 is a schematic top view of a display panel provided in the prior art;

FIG. 2 is a schematic diagram of a side view structure of a display panel provided in the prior art;

fig. 3 is a schematic top view of a display panel according to an embodiment of the present invention;

FIG. 4 is a schematic diagram of a side view structure of a display panel according to an embodiment of the present invention;

FIG. 5 is a schematic cross-sectional view along the AA' direction in FIG. 3 according to an embodiment of the present invention;

FIG. 6 is a schematic diagram of a top view structure of another display panel according to an embodiment of the present invention;

FIG. 7 is a schematic diagram of a side view structure of another display panel according to an embodiment of the present invention;

FIG. 8 is a schematic cross-sectional view taken along the direction BB' in FIG. 6 according to an embodiment of the present invention;

Fig. 9 is a schematic top view of a display panel according to another embodiment of the present invention;

fig. 10 is a schematic structural diagram of a display device according to an embodiment of the present invention.

Detailed Description

the present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.

Fig. 1 is a schematic top view of a display panel provided in the prior art. Fig. 2 is a schematic side view of a display panel provided in the prior art. Referring to fig. 1 and 2, the display panel includes: a display area AA 'and a non-display area DA' surrounding the display area, the non-display area DA 'including a first non-display area DA 1', the first non-display area DA1 'being located at a first side of the display area AA', the first non-display area DA1 'including a stepped area SA'. The display panel further includes a color film substrate 20 'and an array substrate 10' that are disposed opposite to each other, a ground terminal 110 'and a driving chip 130' are disposed on a side of the array substrate 10 'close to the color film substrate 20', orthogonal projections of the ground terminal 110 'and the driving chip 130' on a plane where the color film substrate 20 'is located are both located in a step area SA', the array substrate 10 'includes a ground trace 120', and the ground trace 120 'is located in a first non-display area DA 1' and is electrically connected to the driving chip 130 'and the ground terminal 110'.

with continued reference to fig. 1 and fig. 2, a side of the color filter substrate 20 'away from the array substrate 10' is provided with an electrostatic protection layer 30 ', and the electrostatic protection layer 30' is connected to the ground terminal 110 'through a silver paste 40'. When electrostatic charge exists on the surface of the display panel (the part covered by the electrostatic protection layer 30 '), the silver paste transmits the electrostatic charge to the grounding terminal 110' after the electrostatic charge reaches the electrostatic protection layer 30 ', and then the grounding trace 120' transmits the electrostatic charge on the grounding terminal 110 'to the grounding pin of the driving chip 130', so that the charge is guided into the grounding end, and thus, the electrostatic charge can be prevented from being accumulated on the surface of the display panel to generate an electrostatic field, and light leakage caused by deflection of liquid crystal under the action of the electrostatic field is avoided. In addition, when there is electrostatic charge in the step area SA ' (the portion not covered by the electrostatic protection layer 30 ') of the display panel, the ground trace 120 ' can transmit the electrostatic charge to the ground pin of the driving chip 130 ' after the electrostatic charge reaches the ground terminal 110 ', so as to guide the electrostatic charge to the ground.

However, the applicant has found that with the development of a large fillet panel (the corner of the display panel is in a circular arc shape), the area of the first non-display area DA1 'is reduced (with respect to the corner of the display panel being in a right angle), however, the space occupied by the circuits (such as the esd protection circuit), the bonding pads, the fan-out traces, and the like located in the first non-display area DA 1' is difficult to compress due to the limitation of practical processes, so that the space of the ground terminal 110 'is greatly compressed, and even there is no space for disposing the ground terminal 110'.

In view of this, an embodiment of the present invention provides a display panel, including: the display device comprises a display area and a non-display area surrounding the display area, wherein the non-display area comprises a first non-display area and a second non-display area, the first non-display area is positioned on a first side of the display area, the first non-display area comprises a step area, and the second non-display area is positioned on a second side of the display area;

the above is the core idea of the present invention, and the technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the drawings in the embodiment of the present invention. Based on the embodiments of the present invention, those skilled in the art can obtain all other embodiments without creative efforts, which belong to the protection scope of the embodiments of the present invention.

Fig. 3 is a schematic top view of a display panel according to an embodiment of the present invention. Fig. 4 is a schematic side view of a display panel according to an embodiment of the invention. Referring to fig. 3 and 4, the display panel includes a display area AA and a non-display area DA surrounding the display area AA, the non-display area DA including a first non-display area DA1 and a second non-display area DA2, the first non-display area DA1 being located at a first side of the display area AA and the first non-display area DA1 including a step area SA, the second non-display area DA2 being located at a second side of the display area AA; the color film substrate 20 and the array substrate 10 are arranged oppositely, one side of the array substrate 10 close to the color film substrate 20 is provided with a ground terminal 110 and a driver chip 130, an orthographic projection of the ground terminal 110 on a plane where the color film substrate 20 is located in the second non-display area DA2, an orthographic projection of the driver chip 130 on a plane where the color film substrate 20 is located in the step area SA, the array substrate 10 includes a ground trace 120, and the ground trace 120 is located in the non-display area DA and electrically connected to the driver chip 130 and the ground terminal 110.

Specifically, the array substrate 10 and the color filter substrate 20 are attached to each other by a glue frame (not shown in fig. 4) to form a box, and liquid crystal (not shown in fig. 4) is filled in the box to form the display panel. The display area AA refers to an area on the display panel where an image can be displayed; the non-display area DA refers to an area on the display panel where an image may not be displayed; the land area SA refers to an area of the array substrate 10 not covered by the color filter substrate 20.

specifically, in the display area AA, a plurality of gate signal lines and a plurality of data signal lines are formed on the array substrate 10, and the gate signal lines and the data signal lines intersect to define sub-pixel units. In the step area SA, the array substrate 10 is provided with a bonding pad, the driving chip 130 is disposed on the array substrate 10 through the bonding pad, the driving chip 130 can provide a data signal to the data signal line, the data signal line transmits the data signal to the pixel electrode, so that the liquid crystal deflects according to a voltage difference between the pixel electrode and the common electrode, and further, light emitted by the backlight source is adjusted by the liquid crystal and then exits from a light exit surface of the display panel, wherein the light intensity of the light exiting from the display panel is related to the deflection degree of the liquid crystal. Optionally, the driving chip 130 may include at least one ground pin, and when the driving chip 130 is disposed on the array substrate 10 through the bonding pad, the bonding pad bonded to the ground pin of the driving chip 130 is a ground pad, and the ground trace 120 may be connected to the ground pad, so as to be electrically connected to the ground pin of the driving chip 130. It should be noted that, besides the driving chip 130, the step area SA may further include an esd protection circuit, a demultiplexer component, a switch test component, a fan-out trace, and other circuits or structures known to those skilled in the art, which are not limited herein and may be set by those skilled in the art according to actual situations.

Optionally, the array substrate 10 further includes a second substrate 11 and multiple layers of array metal layers located on one side of the second substrate 11 close to the array substrate 10, the adjacent array metal layers are insulated by using an insulating layer, and the ground trace 120 is disposed on the same layer as one of the multiple layers of array metal layers. Optionally, the material of the array metal layer disposed on the same layer as the ground trace 120 in the multi-layer array metal layer is the same as the material of the ground trace 120. The advantage of setting up like this is through setting up ground wire 120 and one of them layer array metal level is the same layer and adopt the same kind of material, can guarantee that the preparation technology of ground wire 120 and the preparation technology phase-match of current display panel, guarantees that ground wire 120 preparation technology is simple, can also make display panel rete set up the relation simply, easily realizes the design requirement of slim display panel.

Alternatively, the ground terminal 110 may include at least one conductive layer. Specifically, the ground trace 120 may be connected to one conductive layer of the ground terminal 110, so as to electrically connect the ground trace 120 and the ground terminal 110, where the conductive layer connected to the ground trace 120 may be referred to as a connecting conductive layer. When the connecting conductive layer and the ground trace 120 are located at different layers, the connecting conductive layer may be connected to the ground trace 120 through a via hole; when the connecting conductive layer and the ground trace 120 are located on the same layer, the ground trace 120 may directly extend to the connecting conductive layer to be electrically connected to the connecting conductive layer.

Illustratively, fig. 5 is a schematic cross-sectional view along the AA' direction in fig. 3 according to an embodiment of the present invention. Referring to fig. 5, the array substrate 10 includes a second substrate 11, a gate metal layer 12, a gate insulating layer, an active layer 13, an interlayer dielectric layer, a source drain metal layer 14, a planarization layer, a pixel electrode layer 15, a first insulating layer, and a common electrode layer 16, which are sequentially stacked. In the display region, each sub-pixel unit comprises a pixel driving circuit, each pixel driving circuit comprises at least one thin film transistor, each thin film transistor comprises a grid electrode G, a source electrode S and a drain electrode D, the grid electrode G is located on the grid metal layer 12, and the source electrode S and the drain electrode D are located on the source drain metal layer 14. With continued reference to fig. 5, the ground terminal 110 includes a first conductive layer 111, a second conductive layer 112, and a third conductive layer 113 stacked in this order, the first conductive layer 111 and the second conductive layer 112 are electrically connected through a contact hole, and the second conductive layer 112 and the third conductive layer 113 are electrically connected through a contact hole. The first conductive layer 111 is disposed on the same layer as the gate metal layer 12, the second conductive layer 112 is disposed on the same layer as the source/drain metal layer 14, and the third conductive layer 113 is disposed on the same layer as the pixel electrode layer 15.

it should be noted that fig. 5 only exemplarily shows that the thin film transistor in the array substrate 10 is of a bottom gate structure, but the structure of the display panel in the present application is not limited thereto, and in other embodiments, the thin film transistor may also be of a top gate structure, which can be set by a person skilled in the art according to practical situations. In addition, fig. 5 only exemplarily shows that the ground terminal 110 includes three conductive layers, and the first conductive layer 111 is disposed in the same layer as the gate metal layer 12, the second conductive layer 112 is disposed in the same layer as the source/drain metal layer 14, and the third conductive layer 113 is disposed in the same layer as the pixel electrode layer 15, but the structure of the display panel in the present application is not limited thereto, and in other embodiments, the ground terminal 110 may have other structures known by those skilled in the art, and those skilled in the art may set the ground terminal according to actual situations. In addition, fig. 5 only illustrates the film layers related to the invention of the present application in the array substrate 10, but not all the film layers, for example, the array substrate 10 may further include a buffer layer, a touch electrode layer, a pixel defining layer, and other film layers known to those skilled in the art, which are not limited herein and can be set by those skilled in the art according to the actual situation.

Optionally, the ground trace 120 may be located on the gate metal layer 12, or may be located on the source and drain metal layer 14, and considering that the source and drain metal layer 14 is less likely to attract static electricity compared to the gate metal layer 12, it is preferable that the ground trace 120 is located on the source and drain metal layer 14, so that a risk that the ground trace 120 is damaged by a shock can be reduced.

Specifically, the second side of the display area AA may be disposed adjacent to or opposite the first side of the display area AA, and accordingly, the first non-display area DA1 may be disposed adjacent to or opposite the second non-display area DA2, which is not limited herein. For example, fig. 3 shows that the non-display area DA includes a first non-display area DA1 and a second non-display area DA2, and the second non-display area DA2 is disposed adjacent to the first non-display area DA 1. It should be noted that, a person skilled in the art can set the specific position of the ground terminal 110 in the second non-display area DA2 according to actual situations, and if the second non-display area DA2 is provided with a circuit or a trace, as long as the setting of the ground terminal 110 does not affect the normal operation of the circuit and the setting of the trace.

The display panel provided by the embodiment of the invention comprises a display area AA and a non-display area DA surrounding the display area AA, wherein the non-display area DA comprises a first non-display area DA1 and a second non-display area DA2, the first non-display area DA1 is positioned on a first side of the display area AA and comprises a step area SA, and the second non-display area DA2 is positioned on a second side of the display area AA; the display panel further comprises a color film substrate 20 and an array substrate 10 which are arranged oppositely, a grounding terminal 110, a grounding wire 120 and a driving chip 130 are arranged on the array substrate 10, one end of the grounding wire 120 is connected with the grounding terminal 110, the other end of the grounding wire is connected with a grounding pin of the driving chip 130, so that static charges can be led into a ground end through the grounding terminal 110 and the grounding wire 120, and static charges are prevented from accumulating on the LCD to form an electrostatic field to influence the quality of a display picture. In addition, the ground terminal 110 is located in the second non-display area DA2 instead of the first non-display area DA1, so that the first non-display area DA1 does not have to reserve a space for the ground terminal 110, which is advantageous to compress the area of the first non-display area DA 1.

Fig. 6 is a schematic top view of another display panel according to an embodiment of the present invention. Fig. 7 is a side view of another display panel according to an embodiment of the present invention. Referring to fig. 6 and 7, the display panel includes a display area AA and a non-display area DA surrounding the display area AA, the non-display area DA including a first non-display area DA1 and a second non-display area DA2, the first non-display area DA1 being located at a first side of the display area AA and the first non-display area DA1 including a step area SA, the second non-display area DA2 being located at a second side of the display area AA; the color film substrate 20 and the array substrate 10 are arranged oppositely, one side of the array substrate 10 close to the color film substrate 20 is provided with a ground terminal 110 and a driver chip 130, an orthographic projection of the ground terminal 110 on a plane where the color film substrate 20 is located in the second non-display area DA2, an orthographic projection of the driver chip 130 on a plane where the color film substrate 20 is located in the step area SA, the array substrate 10 includes a ground trace 120, and the ground trace 120 is located in the non-display area DA and electrically connected to the driver chip 130 and the ground terminal 110. Alternatively, the first non-display area DA1 and the second non-display area DA2 are oppositely disposed.

Specifically, the first side of the display area AA and the second side of the display area AA are disposed opposite to each other, and the first non-display area DA1 and the second non-display area DA2 are disposed opposite to each other. For example, fig. 6 shows that the non-display area DA further includes a third non-display area DA3 and a fourth non-display area DA4, the third non-display area DA3 is located at a third side of the display area AA, the fourth non-display area DA4 is located at a fourth side of the display area AA, the first non-display area DA1 and the second non-display area DA2 are oppositely disposed, the third non-display area DA3 and the fourth non-display area DA4 are oppositely disposed, and the third non-display area DA3 and the fourth non-display area DA4 are adjacent to the first non-display area DA 1. In general, the third non-display area DA3 and the fourth non-display area DA4 may be provided with a Gate scan driving circuit (GOA) and/or an Emission control signal driving circuit (EOA), and the third non-display area DA3 and the fourth non-display area DA4 have relatively small space for the ground terminal 110 relative to the second non-display area DA2, so the ground terminal 110 may be disposed in the second non-display area DA 2. In this way, the arrangement of the ground terminal 110 and the ground trace 120 has a small influence on the existing arrangement of other circuits and traces in the non-display area DA of the display panel, so that the display panel according to the embodiment of the present invention can be obtained without performing a large change on the basis of the existing display panel manufacturing process, thereby achieving the purpose of simplifying the display panel manufacturing process.

with continued reference to fig. 6, based on the above technical solution, the ground terminal 110 is optionally located at the central portion DAM of the second non-display area DA 2.

Specifically, the second non-display area DA2 may be divided into a middle part DAM and two corner parts DAE, wherein the two corner parts DAE are connected to a portion of the non-display area DA excluding the second non-display area DA2, and the middle part DAM is positioned between the two corner parts DAE. The area ratios of the middle DAM and the two corner DAM may be set by those skilled in the art according to actual circumstances.

It will be appreciated that the distribution of the electrostatic charge is generally such that where the curvature is large, the charge density is large, and where the curvature is small, the charge density is small. Since the edge DAE generally has a sharp right angle or a large round angle, that is, the charge density of the edge DAE is generally greater than that of the middle DAM, the ground terminal 110 is disposed on the middle DAM compared to the ground terminal 110 on the edge DAE, so that when there is static charge on the surface of the display panel, the amount of static charge instantaneously received by the ground terminal 110 is relatively small, the amount of static charge instantaneously conducted on the ground trace 120 is relatively small, the risk that the amount of static charge conducted on the ground trace 120 exceeds the upper limit of static charge that the ground trace 120 can bear can be reduced, and the ground trace 120 is not easily damaged.

in addition, in the process of manufacturing the display panel, a plurality of display panels are usually manufactured at the same time, and after the display panels are manufactured, the plurality of display panels are separated. In the cutting process, the straight line cutting adopts a cutter wheel cutting mode, the fillet cutting adopts a grinding or laser cutting mode, and compared with the straight line cutting, static charges are more easily generated in the fillet cutting process. In other words, the edge line of the display panel corresponding to the middle DAM is generally cut by a cutter wheel, and the edge line of the display panel corresponding to the corner DAE is generally cut by grinding or laser. Compared with the ground terminal 110 located at the corner DAM, the ground terminal 110 is located at the middle DAM, so that the amount of static charges entering the ground terminal 110 instantaneously is relatively small in the display panel cutting process, the amount of static charges conducted instantaneously on the ground trace 120 is relatively small, and the ground trace 120 is not easily damaged.

Fig. 8 is a schematic cross-sectional view along the direction BB' in fig. 6 according to an embodiment of the present invention. Referring to fig. 5 and 8, on the basis of the foregoing technical solution, optionally, the color filter substrate 20 includes: the array substrate comprises a first substrate base plate 21, an electrostatic protection layer 30, a hollow part 210 and a conductive connection structure 40, wherein the electrostatic protection layer 30 is positioned on one side of the first substrate base plate 21, which is far away from the array substrate 10; the orthographic projection of the hollow-out part 210 on the plane of the array substrate 10 is located in the second non-display area DA2 and covers the ground terminal 110; the conductive connection structure 40 electrically connects the electrostatic protection layer 30 and the ground terminal 110 through the hollow portion 210.

Specifically, the hollow portion 210 refers to a window formed on the color filter substrate 20, and is used to expose the ground terminal 110 on the array substrate 10 and provide a passage for the subsequent arrangement of the conductive connection structure 40, so that the conductive connection structure 40 can be electrically connected to the ground terminal 110, and thus the ground terminal 110 is electrically connected to the electrostatic protection layer 30.

specifically, the material of the electrostatic protection layer 30 may be one of ITO (Indium Tin Oxide) or ATO (Antimony Doped Tin Oxide), or may be other transparent conductive materials known to those skilled in the art, and the application is not limited thereto.

optionally, the conductive connection structure 40 includes a wire or a conductive adhesive. For example, the conductive connection structure 40 may be a conductive silver paste, or other conductive media known to those skilled in the art, and the present application is not limited thereto.

fig. 9 is a schematic top view of another display panel according to an embodiment of the present invention. Referring to fig. 3, 6 and 9, optionally, the color filter substrate 20 surrounds the hollow portion 210 in a half-surrounding or full-surrounding manner.

Specifically, the semi-surrounding herein means that the peripheries of the hollow portions 210 are all adjacent to the color filter substrate 20, as shown in fig. 3 and 6. The full wrap here means that at least one side of the hollow portion 210 is not adjacent to the color filter substrate 20, as shown in fig. 9.

In addition, in the area where the step area SA and the hollow portion 210 of the display panel are located, the color filter substrate 20 does not cover the array substrate 10; in other areas of the display panel except the step area SA and the area where the hollow portion 210 is located, the color filter substrate 20 covers the array substrate 10, and thus, at least a portion of the ground trace 120 is covered by the color filter substrate 20. It can be appreciated that the more film layers are covered above the ground trace 120, the less easily the static charge on the display panel surface can reach the ground trace 120 through the film layers above the ground trace 120, and the less easily the ground trace 120 can be damaged. Compared with the grounding trace 120 shown in fig. 1 located in the step area SA, the grounding trace 120 according to the embodiment of the present invention is at least partially covered by the color film substrate 20, so that the risk of being damaged by shock can be effectively reduced.

Based on the above technical solution, with continued reference to fig. 6 and 9, optionally, the display panel includes a plurality of ground terminals 110 and a plurality of ground traces 120, the plurality of ground terminals 110 are uniformly distributed in the second non-display area DA2 covered by the hollow portion 210, and each ground terminal 110 is electrically connected to the driving chip 130 through one ground trace 120.

It can be understood that, the more the number of the ground terminals 110 and the ground traces 120 is, the more the channels for static charges to be conducted to the ground are, the more the static charges are not easily accumulated on the display panel, that is, the static charges on the display panel can be ensured to be timely conducted out, and the static charge accumulation is prevented from affecting the normal display picture of the display panel.

based on the above technical solution, with continued reference to fig. 9, optionally, the non-display area DA further includes a third non-display area DA3 and a fourth non-display area DA4, the third non-display area DA3 is located on a third side of the display area AA, the fourth non-display area DA4 is located on a fourth side of the display area AA, the first non-display area DA1 and the second non-display area DA2 are oppositely disposed, the third non-display area DA3 and the fourth non-display area DA4 are oppositely disposed, and the third non-display area DA3 and the fourth non-display area DA4 are adjacent to the first non-display area DA 1; the ground terminal 110 includes a first ground terminal 110 and a second ground terminal 110, and the ground trace 120 includes a first ground trace 120(a) and a second ground trace 120 (b);

The first ground trace 120(a) includes a first connection line 121, a second connection line 122 and a third connection line 123, a first end of the first connection line 121 is connected to the ground terminal 110, a second end of the first connection line 121 is connected to a first end of the second connection line 122, a second end of the second connection line 122 is connected to a first end of the third connection line 123, and a second end of the third connection line 123 is connected to the driving chip 130; the first connection line 121 is positioned in the second non-display area DA2, the second connection line 122 is positioned in the third non-display area DA3, and the third connection line 123 is positioned in the first non-display area DA 1;

The second ground trace 120(b) includes a fourth connection line 124, a fifth connection line 125 and a sixth connection line 126, a first end of the fourth connection line 124 is connected to the ground terminal 110, a second end of the fourth connection line 124 is connected to a first end of the fifth connection line 125, a second end of the fifth connection line 125 is connected to a first end of the sixth connection line 126, and a second end of the sixth connection line 126 is connected to the driving chip 130; the fourth connecting line 124 is located in the second non-display area DA2, the fifth connecting line 125 is located in the fourth non-display area DA4, and the sixth connecting line 126 is located in the first non-display area DA 1.

The advantage of this configuration is that the first ground trace 120(a) and the second ground trace 120(b) can almost surround the display panel, and there is only a gap between the two ground terminals 110, so that when the electrostatic charge generated during dividing the display panel is conducted from the edge to the center of the display panel, the first ground trace 120(a) and the second ground trace 120(b) can guide most of the electrostatic charge to the ground end, and prevent the electrostatic charge from being conducted to the center of the display panel, thereby avoiding the electrostatic charge from interfering with the devices and traces in the display area AA.

On the basis of the above technical solution, with continuing reference to fig. 9, optionally, the display panel further includes: the gate driving circuit 150 is located in the non-display area DA, and the gate driving circuit 150 is located between the grounding trace 120 and the display area AA. It can be understood that the electrostatic charge generated when the display panel is divided is generally conducted from the edge to the center of the display panel, the gate driving circuit 150 is located between the grounding trace 120 and the display area AA such that the grounding trace 120 is closer to the edge of the display panel than the gate driving circuit 150, and when the electrostatic charge is conducted from the edge to the center of the display panel, the grounding trace 120 can ground the electrostatic charge to prevent the electrostatic charge from being conducted further to the center of the display panel, thereby preventing the electrostatic charge from interfering with the gate driving circuit 150.

Optionally, the display panel may further include a light emitting control signal driving circuit located in the non-display area DA, and the light emitting control signal driving circuit is located between the ground trace 120 and the display area AA. The advantage of this arrangement is that electrostatic charges can be prevented from interfering with the light emission control signal driving circuit, and the same principle as above is omitted here for brevity.

It should be noted that, in order to clearly show differences between the display panel in the embodiment of the present invention and the display panel provided in the prior art, different reference numerals are used for the components of the display panel in the embodiment and the display panel provided in the prior art with the same name.

Based on the above inventive concept, embodiments of the present invention further provide a display device, where the display device includes any one of the display panels described in the embodiments of the present invention, so that the display device has corresponding functions and beneficial effects, and details are not repeated herein. Fig. 10 is a schematic structural diagram of a display device according to an embodiment of the present invention, including any one of the display panels 1 according to the embodiment of the present invention, where the display device may be an electronic display device such as a vehicle-mounted display screen, a mobile phone, a computer, or a television, which is not limited in this application.

It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. a display panel, comprising:

The array substrate comprises a color film substrate and an array substrate which are arranged oppositely, one side of the array substrate, which is close to the color film substrate, is provided with a grounding terminal and a driving chip, the orthographic projection of the grounding terminal on the plane of the color film substrate is located in the second non-display area, the orthographic projection of the driving chip on the plane of the color film substrate is located in the step area, the array substrate comprises a grounding wire, and the grounding wire is located in the non-display area and is electrically connected with the driving chip and the grounding terminal.

2. the display panel according to claim 1, wherein the first non-display region and the second non-display region are disposed opposite to each other.

3. the display panel according to claim 2, wherein the ground terminal is located in a middle portion of the second non-display region.

4. The display panel according to claim 1, wherein the color filter substrate comprises:

A first substrate base plate;

The electrostatic protection layer is positioned on one side, away from the array substrate, of the first substrate;

The orthographic projection of the hollow part on the plane of the array substrate is positioned in the second non-display area and covers the grounding terminal;

And the conductive connection structure penetrates through the hollow part to be electrically connected with the electrostatic protection layer and the grounding terminal.

5. The display panel according to claim 4, wherein the color film substrate surrounds the hollow portion in a half-surrounding or full-surrounding manner.

6. The display panel according to claim 4, wherein the display panel includes a plurality of ground terminals and a plurality of ground traces, the plurality of ground terminals are uniformly distributed in the second non-display area covered by the hollow portion, and each ground terminal is electrically connected to the driving chip through one of the ground traces.

7. The display panel according to claim 4, wherein the conductive connection structure comprises a conductive wire or a conductive adhesive.

8. The display panel according to claim 1, wherein the non-display region further comprises a third non-display region and a fourth non-display region, the third non-display region is located on a third side of the display region, and the fourth non-display region is located on a fourth side of the display region; the first non-display area and the second non-display area are oppositely arranged, the third non-display area and the fourth non-display area are oppositely arranged, and the third non-display area and the fourth non-display area are adjacent to the first non-display area;

The ground terminal comprises a first ground terminal and a second ground terminal, and the ground wire comprises a first ground wire and a second ground wire;

The first grounding wire comprises a first connecting wire, a second connecting wire and a third connecting wire, wherein the first end of the first connecting wire is connected with the grounding terminal, the second end of the first connecting wire is connected with the first end of the second connecting wire, the second end of the second connecting wire is connected with the first end of the third connecting wire, and the second end of the third connecting wire is connected with the driving chip; the first connecting line is positioned in the second non-display area, the second connecting line is positioned in the third non-display area, and the third connecting line is positioned in the first non-display area;

The second grounding wire comprises a fourth connecting wire, a fifth connecting wire and a sixth connecting wire, wherein the first end of the fourth connecting wire is connected with the grounding terminal, the second end of the fourth connecting wire is connected with the first end of the fifth connecting wire, the second end of the fifth connecting wire is connected with the first end of the sixth connecting wire, and the second end of the sixth connecting wire is connected with the driving chip; the fourth connecting line is located in the second non-display area, the fifth connecting line is located in the fourth non-display area, and the sixth connecting line is located in the first non-display area.

9. The display panel according to claim 1, characterized in that the display panel further comprises:

and the grid driving circuit is positioned between the grounding wire and the display area.

10. the display panel of claim 1, wherein the array substrate further includes a second substrate and a plurality of array metal layers located on one side of the second substrate close to the array substrate, the adjacent array metal layers are insulated by an insulating layer, and the ground trace is disposed on the same layer as one of the array metal layers in the plurality of array metal layers.

11. A display device characterized by comprising the display panel according to any one of claims 1 to 10.