CN110556351A - Branch coupler based on through silicon via - Google Patents
Branch coupler based on through silicon via Download PDFInfo
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- CN110556351A CN110556351A CN201910868972.5A CN201910868972A CN110556351A CN 110556351 A CN110556351 A CN 110556351A CN 201910868972 A CN201910868972 A CN 201910868972A CN 110556351 A CN110556351 A CN 110556351A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5386—Geometry or layout of the interconnection structure
Abstract
The invention discloses a through silicon via-based branch coupler, which comprises a silicon substrate layer module, a top layer module and a bottom layer module, wherein the top layer module is arranged on the upper surface of the silicon substrate layer module, and the bottom layer module is arranged on the lower surface of the silicon substrate layer module; the silicon substrate module comprises a grounding interconnection column and a signal interconnection column which penetrate through a silicon substrate, wherein a grounding interconnection column dielectric layer is arranged on the peripheral side wall of the grounding interconnection column, and a signal interconnection column dielectric layer is arranged on the peripheral side wall of the signal interconnection column; by utilizing the vertical interconnection characteristic of the TSV, two opposite 1/4 wavelength transmission line structures of the branch line coupler can be realized by using a vertical TSV interconnection line, and the other two opposite 1/4 wavelength transmission lines are realized by adopting a planar microstrip line, so that the area of an element can be greatly reduced, the integral isolation of a circuit system can be effectively improved, and the good compatibility with a three-dimensional microsystem process and structure can be realized.
Description
Technical Field
the invention belongs to the field of three-dimensional integrated circuits, and particularly relates to a branch coupler based on a through silicon via.
background
Three-dimensional integrated circuits (3-D ICs) have the advantages of high packaging density, strong noise immunity, low power consumption, fast operating speed, and easy implementation of heterogeneous integration, and can overcome many of the physical, process, and electrical limitations faced by conventional planar ICs. In 3-D ICs, a large number of homogeneous or heterogeneous chips are stacked and Through Silicon Vias (TSVs) are used as vertical conductive channels between the chips. TSVs have become a critical component affecting the overall performance of 3-D ICs.
The branch line coupler mainly completes the functions of power equal division in microwave and millimeter wave circuits. The tight coupler, especially the 3 dB coupler, is mainly used in balanced mixer and amplifier. Tight couplers are difficult to implement using conventional planar quasi-TEM transmission lines, such as microstrip lines, due to line spacing limitations. The microwave 3-D IC vertically stacks the multilayer modules, and microwave signal power distribution and phase distribution between the upper layer circuit module and the lower layer circuit module are realized by introducing couplers. The plane coupler of the traditional microstrip line not only occupies a huge chip area, but also has small isolation among all branches, and is difficult to apply to microwave and millimeter wave frequency bands.
disclosure of Invention
In order to solve the technical problem, the invention provides a branch coupler based on a through silicon via, which adopts the following technical scheme:
The invention provides a through silicon via-based branch coupler, which comprises a silicon substrate layer module, a top layer module and a bottom layer module, wherein the top layer module is arranged on the upper surface of the silicon substrate layer module, and the bottom layer module is arranged on the lower surface of the silicon substrate layer module; the silicon substrate module comprises a grounding interconnection column and a signal interconnection column which penetrate through a silicon substrate, wherein a grounding interconnection column dielectric layer is arranged on the peripheral side wall of the grounding interconnection column, and a signal interconnection column dielectric layer is arranged on the peripheral side wall of the signal interconnection column; the top layer module comprises a top layer grounding module, a top layer signal connecting module and a top layer dielectric layer module, the top layer grounding module is connected with the grounding interconnection column, and the top layer signal connecting module is connected with the signal interconnection column; the bottom layer module comprises a bottom layer grounding module, a bottom layer signal connecting module and a bottom layer dielectric layer module, the bottom layer grounding module is connected with the grounding interconnection column, and the bottom layer signal connecting module is connected with the signal interconnection column.
further, the top layer grounding module comprises a top layer grounding column and a top layer grounding layer which are connected in sequence, and the top layer grounding column is connected with the grounding interconnection column; the top layer signal connection module comprises a top layer first signal interconnection column, a top layer second signal interconnection column and a top layer signal line which are connected in sequence, and the top layer first signal interconnection column is connected with the signal interconnection column; the top layer dielectric layer module comprises a top layer first dielectric layer and a top layer second dielectric layer, the top layer first dielectric layer is arranged on the lower surface of the top layer grounding layer, and the top layer second dielectric layer is arranged on the upper surface of the top layer grounding layer.
Further, the bottom layer grounding module comprises a bottom layer grounding column and a bottom layer grounding layer which are connected in sequence, and the bottom layer grounding column is connected with the grounding interconnection column; the bottom signal connection module comprises a bottom first signal interconnection column, a bottom second signal interconnection column and a bottom signal line which are connected in sequence, and the bottom first signal interconnection column is connected with the signal interconnection column; the bottom layer dielectric layer module comprises a bottom layer first dielectric layer and a bottom layer second dielectric layer, the bottom layer first dielectric layer is arranged on the upper surface of the bottom layer grounding layer, and the bottom layer second dielectric layer is arranged on the lower surface of the bottom layer grounding layer.
Further, the length of the ground interconnect post and the signal interconnect post are both 1/4 wavelengths.
further, the grounding interconnection columns and the signal interconnection columns are distributed in bilateral symmetry along the center line of the branch coupler; the top layer first signal interconnection column, the top layer second signal interconnection column and the top layer grounding column are distributed in bilateral symmetry along the central line of the branch coupler; the bottom layer first signal interconnection column, the bottom layer second signal interconnection column and the bottom layer grounding column are distributed in bilateral symmetry along the central line of the branch coupler.
Furthermore, the top-layer grounding column and the top-layer first signal interconnection column are arranged in the top-layer first dielectric layer in a penetrating manner, and the top-layer second signal interconnection column is arranged in the top-layer second dielectric layer in a penetrating manner; the bottom layer grounding column and the bottom layer first signal interconnection column are arranged on the bottom layer first dielectric layer in a penetrating mode, and the bottom layer second signal interconnection column is arranged on the bottom layer second dielectric layer in a penetrating mode.
Furthermore, the top layer second signal interconnection column is arranged on the top layer ground layer in a penetrating mode, and a top layer second dielectric layer is arranged on the peripheral side wall of the top layer second signal interconnection column; the bottom layer second signal interconnection column penetrates through the bottom layer grounding layer, and a bottom layer second dielectric layer is arranged on the peripheral side wall of the bottom layer second signal interconnection column.
Further, the center lines of the top grounding column, the grounding interconnection column and the bottom grounding column are in the same straight line; the top layer second interconnection column, the top layer first signal interconnection column, the bottom layer first signal interconnection column and the second signal interconnection column are positioned on the same straight line.
Further, the distance between the signal interconnection pillars has a length of 1/4 wavelengths.
further, the top signal line, the top ground layer, the bottom ground layer and the bottom signal line are all made of copper materials; the top layer second signal interconnection column, the top layer first signal interconnection column, the top layer ground column, the ground interconnection column, the signal interconnection column, the bottom layer ground column, the bottom layer first signal interconnection column and the bottom layer second signal interconnection column are made of one or more materials of copper, tungsten or polysilicon.
Due to the implementation of the technical scheme, compared with the prior art, the invention has the following advantages:
1. The silicon through hole technology is adopted, the compatibility with other silicon-based elements is good, and the three-dimensional integration of a microwave system is easy to realize;
2. The three-dimensional structure is adopted, and four silicon through holes are arranged in a row, so that the area of an integrated circuit is greatly reduced;
3. The signal line and the silicon substrate are isolated by the grounding layer and the grounding column, so that the transmission loss is obviously reduced, and the electromagnetic isolation characteristic among all branches is effectively improved;
4. the closed grounding column is arranged outside the vertical signal, so that the influence on the electromagnetic properties of other surrounding elements is effectively reduced, and the electromagnetic isolation design of the system is greatly simplified.
Drawings
FIG. 1a is a schematic cross-sectional view of a branch coupler according to an embodiment of the present application;
FIG. 1b is a schematic top view of a branched ring coupler according to an embodiment of the present application;
FIG. 2a is a schematic cross-sectional view of a top module of a branched ring coupler according to an embodiment of the present application;
FIG. 2b is a schematic top view of a top module of a branched ring coupler according to an embodiment of the present invention;
FIG. 3a is a schematic cross-sectional structural diagram of a branching ring coupler silicon substrate layer module according to an embodiment of the present application;
FIG. 3b is a schematic top view of a block of a silicon substrate layer of a branched ring coupler according to an embodiment of the present application;
wherein:
101-top first dielectric layer 102-top ground stud
103-top first signal interconnect stud 104-top ground plane
105-top second dielectric layer 106-top second signal interconnect pillar
107-top signal line 201-silicon substrate
202-ground interconnect pillar dielectric layer 203-ground interconnect pillar
204-signal interconnect pillar dielectric layer 205-signal interconnect pillar
301-bottom first dielectric layer 302-bottom ground post
303-bottom first signal interconnect stud 304-bottom ground plane
305-bottom layer second dielectric layer 306-bottom layer second signal interconnect pillar
307-bottom signal line.
Detailed Description
In order to make those skilled in the art better understand the technical solution of the present invention, the technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the embodiment of the present invention and the accompanying drawings. It is to be understood that the described embodiments are merely exemplary of a portion of the invention and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. In the following description, use of ordinal terms such as "first", "second", etc., to identify elements, are used merely to facilitate explanation of the invention and do not have a particular meaning or sequence relationship.
As shown in fig. 1a and 1b, the present embodiment provides a branch line coupler based on a through silicon via, which includes a top layer first dielectric layer (101), a top layer ground pillar (102), a top layer first signal interconnection pillar (103), a top layer ground layer (104), a top layer second dielectric layer (105), a top layer second signal interconnection pillar (106), a top layer signal line (107), a silicon substrate (201), a ground interconnection pillar dielectric layer (202), a ground interconnection pillar (203), a signal interconnection pillar dielectric layer (204), a signal interconnection pillar (205), a bottom layer first dielectric layer (301), a bottom layer ground pillar (302), a bottom layer first signal interconnection pillar (303), a bottom layer ground layer (304), a bottom layer second dielectric layer (305), a bottom layer second signal interconnection pillar (306), and a bottom layer signal line (307):
the branch line coupler structure based on the through silicon via sequentially comprises a top signal line (107), a top second dielectric layer (105), a top ground layer (104), a top first dielectric layer (101), a silicon substrate (201), the silicon substrate (201), a bottom first dielectric layer (301), a bottom ground layer (304), a bottom second dielectric layer (305) and a bottom signal line (307) from top to bottom;
The top signal line (107), the top second dielectric layer (105) and the top ground layer (104) form a microstrip line structure;
The top layer second dielectric layer (105) is provided with two top layer second signal interconnection columns (106) which are symmetrical left and right;
The top layer grounding layer (104) is provided with two bilaterally symmetrical through holes, and a top layer second dielectric layer (105) and a top layer second signal interconnection column (106) pass through the through holes;
The top layer first dielectric layer (101) is provided with two bilaterally symmetrical top layer grounding columns (102) and two bilaterally symmetrical top layer first signal interconnection columns (103), and the four columns are arranged in a line;
The silicon substrate (201) is provided with two bilaterally symmetrical ground interconnection columns (203) and two bilaterally symmetrical signal interconnection columns (205), and the four columns are arranged in a row;
A grounding interconnection column dielectric layer (202) is arranged between the grounding interconnection column (203) and the silicon substrate (201), and a signal interconnection column dielectric layer (204) is arranged between the signal interconnection column (205) and the silicon substrate (201);
The bottom layer first dielectric layer (301) is provided with two bottom layer grounding posts (302) which are symmetrical left and right and two bottom layer first signal interconnection posts (303) which are symmetrical left and right, and the four posts are arranged in a line;
The bottom ground layer (304) is provided with two bilaterally symmetrical through holes, and a bottom second dielectric layer (305) and a bottom second signal interconnection column (306) pass through the through holes;
The bottom layer second dielectric layer (305) is provided with two bottom layer second signal interconnection columns (306) which are symmetrical left and right;
the bottom signal line (307), the bottom second dielectric layer (305) and the bottom ground layer (304) form a microstrip line structure;
Two grounding interconnection columns (203) and two signal interconnection columns (205) in the silicon substrate (201) form a two-wire structure, and the length of the two-wire structure is 1/4 wavelengths;
The distance between the two top-layer second signal interconnect pillars (106) is 1/4 wavelengths, and the distance between the two bottom-layer second signal interconnect pillars (306) is 1/4 wavelengths;
The top signal line (107), the top second signal interconnection column (106), the top first signal interconnection column (103), the signal interconnection column (205), the bottom first signal interconnection column (303), the bottom second signal interconnection column (306) and the bottom signal line (307) are connected in sequence;
the top ground layer (104), the top ground column (102), the ground interconnection column (203), the bottom ground column (302) and the bottom ground layer (304) are connected in sequence;
the top layer second dielectric layer (105), the top layer first dielectric layer (101), the silicon substrate (201), the bottom layer first dielectric layer (301) and the bottom layer second dielectric layer (305) are sequentially connected;
the top layer grounding column (102), the grounding interconnection column (203) and the bottom layer grounding column (302) are positioned on the same straight line.
The centers of the top layer second signal interconnection column (106), the top layer first signal interconnection column (103), the signal interconnection column (205), the bottom layer first signal interconnection column (303) and the bottom layer second signal interconnection column (306) are positioned on the same straight line.
The top signal line (107), the top ground layer (104), the bottom ground layer (304) and the bottom signal line (307) are made of copper materials.
The top layer second signal interconnection column (106), the top layer first signal interconnection column (103), the top layer ground column (102), the ground interconnection column (203), the signal interconnection column (205), the bottom layer ground column (302), the bottom layer first signal interconnection column (303) and the bottom layer second signal interconnection column (306) are made of copper, tungsten or polysilicon materials.
the branch line coupler structure based on the through silicon via is symmetrical up and down and left and right.
The above embodiments are described in detail for the purpose of illustration, and it is not intended that the invention be limited thereto, but rather that the invention be construed as broadly as the invention will be apparent to those skilled in the art, and all equivalent variations and modifications which fall within the spirit and scope of the invention are therefore intended to be embraced therein.
Claims (10)
1. a through silicon via-based branch coupler is characterized by comprising a silicon substrate layer module, a top layer module and a bottom layer module, wherein the top layer module is arranged on the upper surface of the silicon substrate layer module, and the bottom layer module is arranged on the lower surface of the silicon substrate layer module; the silicon substrate module comprises a grounding interconnection column and a signal interconnection column which penetrate through a silicon substrate, wherein a grounding interconnection column dielectric layer is arranged on the peripheral side wall of the grounding interconnection column, and a signal interconnection column dielectric layer is arranged on the peripheral side wall of the signal interconnection column; the top layer module comprises a top layer grounding module, a top layer signal connecting module and a top layer dielectric layer module, the top layer grounding module is connected with the grounding interconnection column, and the top layer signal connecting module is connected with the signal interconnection column; the bottom layer module comprises a bottom layer grounding module, a bottom layer signal connecting module and a bottom layer dielectric layer module, the bottom layer grounding module is connected with the grounding interconnection column, and the bottom layer signal connecting module is connected with the signal interconnection column.
2. The branch coupler of claim 1, wherein the top ground module comprises a top ground stud, a top ground layer connected in series, the top ground stud being connected to the ground interconnect stud; the top layer signal connection module comprises a top layer first signal interconnection column, a top layer second signal interconnection column and a top layer signal line which are connected in sequence, and the top layer first signal interconnection column is connected with the signal interconnection column; the top layer dielectric layer module comprises a top layer first dielectric layer and a top layer second dielectric layer, the top layer first dielectric layer is arranged on the lower surface of the top layer grounding layer, and the top layer second dielectric layer is arranged on the upper surface of the top layer grounding layer.
3. the branch coupler of claim 2, wherein the bottom ground module includes a bottom ground post, a bottom ground layer, connected in series, the bottom ground post being connected to the ground interconnect post; the bottom signal connection module comprises a bottom first signal interconnection column, a bottom second signal interconnection column and a bottom signal line which are connected in sequence, and the bottom first signal interconnection column is connected with the signal interconnection column; the bottom layer dielectric layer module comprises a bottom layer first dielectric layer and a bottom layer second dielectric layer, the bottom layer first dielectric layer is arranged on the upper surface of the bottom layer grounding layer, and the bottom layer second dielectric layer is arranged on the lower surface of the bottom layer grounding layer.
4. The branch coupler of claim 3, wherein the ground and signal interconnect pillars are each 1/4 wavelengths in length.
5. The branch coupler of claim 4, wherein the ground and signal interconnection posts are symmetrically distributed left and right along the branch coupler centerline; the top layer first signal interconnection column, the top layer second signal interconnection column and the top layer grounding column are distributed in bilateral symmetry along the central line of the branch coupler; the bottom layer first signal interconnection column, the bottom layer second signal interconnection column and the bottom layer grounding column are distributed in bilateral symmetry along the central line of the branch coupler.
6. The branch coupler of claim 5, wherein the top ground stud and the top first signal interconnect stud are disposed through the top first dielectric layer and the top second signal interconnect stud is disposed through the top second dielectric layer; the bottom layer grounding column and the bottom layer first signal interconnection column are arranged on the bottom layer first dielectric layer in a penetrating mode, and the bottom layer second signal interconnection column is arranged on the bottom layer second dielectric layer in a penetrating mode.
7. the branch coupler of claim 6, wherein the top second signal interconnect pillar is disposed through the top ground layer, and a top second dielectric layer is disposed on a peripheral sidewall of the top second signal interconnect pillar; the bottom layer second signal interconnection column penetrates through the bottom layer grounding layer, and a bottom layer second dielectric layer is arranged on the peripheral side wall of the bottom layer second signal interconnection column.
8. The branch coupler of claim 7, wherein the centerlines of the top ground post, the ground interconnect post, and the bottom ground post are collinear; the top layer second interconnection column, the top layer first signal interconnection column, the bottom layer first signal interconnection column and the bottom layer second signal interconnection column are positioned on the same straight line.
9. the branch coupler of claim 8, wherein the distance between the signal interconnect pillars is 1/4 wavelengths in length.
10. the branch coupler of claim 9, wherein the top signal line, top ground layer, bottom ground layer, and bottom signal line are made of copper material; the top layer second signal interconnection column, the top layer first signal interconnection column, the top layer ground column, the ground interconnection column, the signal interconnection column, the bottom layer ground column, the bottom layer first signal interconnection column and the bottom layer second signal interconnection column are made of one or more materials of copper, tungsten or polysilicon.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201910868972.5A CN110556351A (en) | 2019-09-16 | 2019-09-16 | Branch coupler based on through silicon via |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201910868972.5A CN110556351A (en) | 2019-09-16 | 2019-09-16 | Branch coupler based on through silicon via |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112490610A (en) * | 2020-11-27 | 2021-03-12 | 浙江集迈科微电子有限公司 | Three-dimensional multi-channel power divider for silicon-based radio frequency transceiving micro system and preparation method thereof |
| CN113192914A (en) * | 2021-03-09 | 2021-07-30 | 西安电子科技大学昆山创新研究院 | Three-dimensional dielectric cavity TSV (through silicon Via) interconnection structure with self-impedance matching function |
| CN114123978A (en) * | 2022-01-24 | 2022-03-01 | 电子科技大学 | Terahertz low-noise miniaturized image frequency suppression transceiving front end based on heterogeneous integration |
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Application publication date: 20191210 |