CN110518933A - Full-duplex transceiver, electronic equipment and exchange method - Google Patents
Full-duplex transceiver, electronic equipment and exchange method Download PDFInfo
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- CN110518933A CN110518933A CN201811459991.4A CN201811459991A CN110518933A CN 110518933 A CN110518933 A CN 110518933A CN 201811459991 A CN201811459991 A CN 201811459991A CN 110518933 A CN110518933 A CN 110518933A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
- H04B1/40—Circuits
- H04B1/50—Circuits using different frequencies for the two directions of communication
- H04B1/52—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa
- H04B1/525—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa with means for reducing leakage of transmitter signal into the receiver
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Abstract
This application provides full-duplex transceiver, electronic equipment and exchange method, which includes: at least one transmitting circuit, at least one receiving circuit and simulation cancellation module;For any pair of transmitting circuit and receiving circuit, cancellation module is simulated, is connect with receiving circuit and transmitting circuit, for carrying out simulation elimination to the self-interference signal received in signal according to transmitting signal.The full-duplex transceiver of the application can preferably inhibit the transmitting circuit of the same equipment due to caused by full-duplex communication to the self-interference of receiving circuit, and realize the reasonable compromise between self-interference rejection and implementation complexity compared with the prior art.
Description
Technical field
This application involves wireless communication technology fields, specifically, this application involves a kind of full-duplex transceiver, electronics to set
Standby and exchange method.
Background technique
Estimate according to ITU, arrive the year two thousand twenty, whole world mobile data flow monthly will reach 62 Chinese mugwort bytes (Exa Byte,
1EB=230GB), and from the year two thousand twenty to the year two thousand thirty, global mobile data services are even more that can be increased with every year about 55% speed.
In addition, the ratio regular meeting of video traffic and machine and machine communication business in mobile data services gradually increases, and the year two thousand thirty, video
Business will be 6 times of non-video business, and machine and machine communication business will account for 12% of mobile data services or so.
The exponential growth of the rapid growth of mobile data services, especially HD video and ultra high-definition video traffic, it is right
More stringent requirements are proposed for the transmission rate of wireless communication, and in order to meet ever-increasing mobile service demand, people need
New technology is proposed on the basis of 4G or 5G further to promote the transmission rate and handling capacity of wireless communication system.Theoretically,
Full duplex technology can further increase the availability of frequency spectrum on existing system, use with traditional half-duplex system to uplink and downlink
Time domain (time division duplex, TDD) or frequency domain (frequency division duplex, FDD) quadrature divide are different, the full-duplex transceiver in full duplex system
Allow the uplink downlink of user in time domain and frequency domain simultaneous transmission, therefore, full duplex system theoretically can achieve half-duplex
Twice of system of handling capacity.However, the intensity of the self-interference signal of the full-duplex transceiver in existing full duplex system is still
It is larger, cause full-duplex transceiver not have practicability also.
Summary of the invention
The application is directed to the shortcomings that existing way, proposes a kind of full-duplex transceiver, electronic equipment and exchange method, to
Solving the problems, such as the prior art, there are the intensity of the self-interference signal of full-duplex transceiver is larger.
First aspect, embodiments herein provide a kind of full-duplex transceiver, comprising: at least one emission lines
Road, at least one receiving circuit and simulation cancellation module;
For any pair of transmitting circuit and receiving circuit, cancellation module is simulated, is connect with receiving circuit and transmitting circuit,
For carrying out simulation elimination to the self-interference signal received in signal according to transmitting signal.
In conjunction with first aspect, in the first implementation of the embodiment of the present application in the first aspect, mould is eliminated in simulation
Block includes: that submodule is eliminated in the simulation of at least one digital assistant;
It includes: that unit, corresponding control unit and addition are eliminated in digital assistant simulation that submodule is eliminated in digital assistant simulation
Device;
The adder that submodule is eliminated in each digital assistant simulation is sequentially connected in series in the analog submodule route of receiving circuit;
Unit is eliminated in digital assistant simulation, and the sub- connection of the number of input terminal and transmitting circuit, output end, which is connected to, to be connect
Take-up road is carried out with the digitally transmitted signals on the digital sub-line road of transmitting circuit based on the feedback signal for generating feedback signal
Simulation is eliminated.
In conjunction with the first implementation of first aspect, in second of implementation in the first aspect, number is auxiliary
Simulation is helped to eliminate unit, output end is connected to an input terminal of corresponding adder, and feedback end passes through corresponding control unit
Connected with the connection of the output end of adder or feedback end by the digital sub-line road in corresponding control unit and receiving circuit
Connect, for the digitally transmitted signals according to the digital sub-line road in receiving circuit and the feedback signal from corresponding adder,
Or the feedback signal on the digital sub-line road according to digitally transmitted signals and from receiving circuit, self-interference signal is simulated
It eliminates.
In conjunction with first aspect, in the third implementation in the first aspect, simulation cancellation module includes: the first order
It simulates cancellation module and cancellation module is simulated in the second level;
First order simulation cancellation module and second level simulation cancellation module are connected to the analog submodule route of receiving circuit in turn
In, for successively carrying out simulation elimination to the self-interference signal in receiving circuit.
In conjunction with the third implementation of first aspect, in the 4th kind of implementation in the first aspect, the first order
Simulation cancellation module includes that submodule is eliminated in the simulation of at least one level-one, and second level simulation cancellation module includes at least one number
Word computer aided simulation eliminates submodule;
Each level-one simulation is eliminated submodule and is sequentially connected in series in the analog submodule route of receiving circuit;
It includes: that unit, corresponding control unit and adder are eliminated in simulation that submodule is eliminated in level-one simulation;
Corresponding adder is serially connected in the analog submodule route of receiving circuit, and the output end of the adder be connected to it is next
The input terminal or first digit computer aided simulation of the adder of a level-one simulation elimination submodule eliminate the adder of submodule
Input terminal;
Unit, the analog submodule connection of input terminal and transmitting circuit are eliminated in simulation, and output end is connected to corresponding addition
One input terminal of device, feedback end are connected by the output end of corresponding control unit and adder;
And/or it includes single tapped delay and gain circuitry that submodule is eliminated in level-one simulation.
In conjunction with the third implementation of first aspect, in the 5th kind of implementation in the first aspect, the first order
Simulation cancellation module include at least one level-one simulation eliminate submodule, and the second level simulation cancellation module include at least one two
Submodule is eliminated in grade simulation;
The simulation of each second level is eliminated submodule and is sequentially connected in series in the analog submodule route of receiving circuit, and input terminal all with hair
The analog submodule connection on ray road;It includes: at least one variable delay unit, at least one that submodule is eliminated in one second level simulation
A component signal fitting unit, low-converter, amplifier, first adder and second adder;
The input terminal of each variable delay unit and the analog submodule connection of transmitting circuit, output end is connected to corresponding
One input terminal of component signal fitting unit;
The output end of each component signal fitting unit is connected to each input terminal of second adder;
The output end of second adder is connected to the first adder that submodule is eliminated in the simulation of this second level by amplifier
One input terminal;
Another input terminal of the first adder of submodule is eliminated in the simulation of this second level, is simulated with previous second level and is eliminated son
The output end connection of the adder of submodule is eliminated in the output end of the first adder of module or the simulation of the last one level-one;This
The output end that the first adder of submodule is eliminated in second level simulation is respectively connected to each component signal by low-converter and is fitted list
Another input terminal of member.
It is variable to prolong in the 6th kind of implementation in the first aspect in conjunction with the 5th kind of implementation of first aspect
Slow unit includes that multi-tap delay can reconcile adjustable gain circuit;
Multi-tap delay can reconcile adjustable gain circuit include: specified quantity the first retardation the first delay line
With the second delay line, delay selection switch and variable gain module of the second retardation;
Each first delay line is sequentially connected in series;
The output end of each first delay line is connected to the input terminal of corresponding second delay line;
Each output end of each first delay line and the second delay line is respectively connected to each of delay selection switch
Input terminal;
Delay selection switch output end be optionally connected with one input terminal, and the output end be connected to it is variable
The input terminal of gain module.
In conjunction with the 5th kind of implementation of first aspect, in the 7th kind of implementation in the first aspect, component letter
Number fitting unit include: low-converter, conjugator, iteration step length calculator, the first multiplier, integrator, the second multiplier plus
Weigh system update device, register, vector modulator;
The input terminal of low-converter and the output end of variable delay unit connect, and output end is connected to the input terminal of conjugator
With an input terminal of iteration step length calculator;
One output end of conjugator is connected to another input terminal of iteration step length calculator;
Two input terminals of the first multiplier are respectively connected to the another output of conjugator, baseband error signal end,
Output end is connected to the first input end of the second multiplier by integrator;
Another input terminal of second multiplier is connect with the output end of iteration step length calculator, and output end passes through weighting system
Number renovator is connected to an input terminal of vector modulator;
Weighting coefficient renovator is connect with register;
Another input terminal of vector modulator and the input terminal of variable delay unit connect, and output end is as component signal
The output end of fitting unit.
In conjunction with first aspect, in the 8th kind of implementation in the first aspect, the full duplex of the embodiment of the present application is received
Hair machine further include: digital cancellation module is connect with the digital sub-line road of receiving circuit and transmitting circuit, for according to transmitting signal
Digital elimination is carried out to the self-interference signal received in signal after simulation elimination.
In conjunction with the 8th kind of implementation of first aspect, in the 9th kind of implementation in the first aspect, the application
The full-duplex transceiver of embodiment further include: preequalization module;
The digital sub-line road and digital cancellation module of preequalization module and transmitting circuit connect;
Preequalization module includes the I/Q imbalance estimation unit and preequalization unit of connection, for eliminating I/Q imbalance.
In conjunction with the 9th kind of implementation of first aspect, in the tenth kind of implementation in the first aspect, the application
The full-duplex transceiver of embodiment further include: switching device;
Switching device is connect with preequalization module, is used for according to the unbalanced estimated result of I/Q dynamically, to preequalization mould
Block is activated or is closed;
And/or switching device is eliminated unit with the level-one simulation in simulation cancellation module and is connect, and is input to mould for basis
The averaged magnitude of quasi- cancellation module simulates elimination unit to level-one and is activated or closed.
In conjunction with the 8th kind of implementation of first aspect, in a kind of implementation of the tenth in the first aspect, number
Cancellation module includes: digital beam excipient unit;
Full-duplex transceiver further include: the pre- cancellation module of number;The pre- cancellation module of number is connected to the number of transmitting circuit
In sub-line road;
The pre- cancellation module of number includes the MAC layer processing unit and transmitter baseband signal processing unit of connection;At MAC layer
Reason unit includes spreading code/scrambling code distribution subelement;Transmitter baseband signal processing unit includes spread spectrum/scrambling subelement and hair
Penetrate beam shaping subelement;
One input terminal of channel estimating unit is connected to transmitter base band signal process by digital beam excipient unit
Unit.
In conjunction with first aspect, in the 12nd kind of implementation in the first aspect, the full duplex of the embodiment of the present application
Transceiver further include: predistortion module;
Predistortion module is connected with the digital sub-line road of transmitting circuit and analog submodule route;
Predistortion module includes the predistortion estimation unit and pre-distortion unit of connection.
In conjunction with any one realization in first to the 12nd kind of implementation of first aspect or first aspect
Mode, in the 13rd kind of implementation in the first aspect, for any two pairs of transmitting circuits and receiving circuit, a pair of transmitting
The simulation cancellation module of route and receiving circuit is identical as the simulation cancellation module of another pair transmitting circuit and receiving circuit or not
Together.
In conjunction with any one realization in first to the 12nd kind of implementation of first aspect or first aspect
Mode, in the 14th kind of implementation in the first aspect, simulation cancellation module is connected to the transmitting of different transmitting circuits
Between antenna port and the receiving antenna port of same receiving circuit, different hairs are originated from according to what the receiving antenna port received
The power for penetrating the self-interference signal of antenna port carries out string sequence to the self-interference signal for being originated from different transmit antenna ports and eliminates.
In conjunction with the 14th kind of implementation of first aspect, in the 15th kind of implementation in the first aspect, no
In same transmit antenna port, the transmit antenna port of first part and same receiving antenna port are arranged in same antenna array element
In;Other transmit antenna ports other than first part are arranged in other bays;
First part's transmit antenna port in same antenna array element is different from the polarization direction of receiving antenna port;
Cancellation module is simulated for first eliminating the self-interference signal for being originated from the transmit antenna port of first part, eliminates source afterwards
From the self-interference signal of other transmit antenna ports.
In conjunction with any one realization in first to the 12nd kind of implementation of first aspect or first aspect
Mode in the 16th kind of implementation in the first aspect, simulates the input that unit is eliminated in the second level simulation in cancellation module
End is connect with the transmit antenna port of multiple transmitting circuits, for receiving the self-interference signal from multiple transmit antenna ports
Superposed signal.
The second aspect, embodiments herein additionally provide a kind of electronic equipment, comprising: the embodiment of the present application is according to
The full-duplex transceiver that any one implementation of one aspect or first aspect provides.
In conjunction with the second aspect, in the first implementation in the second aspect, the electronic equipment of the embodiment of the present invention
For terminal device or base station.
In terms of third, embodiments herein additionally provides a kind of any one based on first aspect or first aspect
The exchange method for the full-duplex transceiver that kind implementation provides, comprising:
Same running time-frequency resource and different code domain resources are distributed for the upstream data and downlink data of each terminal device;Code
Domain resource can be orthogonal resource or non orthogonal resources;
The same running time-frequency resource of the uplink and downlink of distribution and uplink and downlink code domain resource are issued to terminal device;
Downlink data, and receiving terminal apparatus are sent to terminal device according to same running time-frequency resource and downlink code domain resource
The upstream data sent based on same running time-frequency resource and uplink code domain resource.
It is upstream data and downlink data point in the first implementation in the third aspect in terms of third
With running time-frequency resource and different code domain resources, comprising:
Same running time-frequency resource is distributed for upstream data and downlink data;
Same running time-frequency resource includes at least one continuous public time/frequency source block of uplink and downlink, for each continuous upper and lower
The public time/frequency source block of row covers the public time/frequency source block of uplink and downlink using single pair or multipair code word, and using similar and different
Code word code operation is carried out to upstream data and downlink data;
And/or the size of different code words pair is identical or different;
And/or the number that single pair code word is reused is identical or different.
In conjunction with the first implementation in terms of third, in second of implementation in the third aspect, to uplink
Data and downlink data carry out code operation, comprising:
Upstream data or downlink data are specially symbol, following extremely to symbol progress in code domain, time domain and/or frequency domain
One item missing operation: spread spectrum, scrambling.
In terms of third, in the third implementation in the third aspect, a kind of base of the embodiment of the present application also
In the exchange method for the full-duplex transceiver that any one of first aspect or first aspect implementation provide, further includes:
When distributing ascending resource or downlink resource for non-orthogonal multiple user, execute at least one of following:
Scheduling does not distribute using different uplink code words and multiple access signature in the non-orthogonal multiple user of same running time-frequency resource;
Scheduling using different uplink code words and distributes different multiple access in the non-orthogonal multiple user of same running time-frequency resource
Signature;
Scheduling using identical uplink code word and distributes different multiple access in the non-orthogonal multiple user of same running time-frequency resource
Signature.
4th aspect, embodiments herein additionally provide another any based on first aspect or first aspect
A kind of exchange method for the full-duplex transceiver that implementation provides, comprising:
Receive the same running time-frequency resource of uplink and downlink and uplink and downlink code domain resource that base station is distributed and issued;
The downlink data that base station issues is received according to same running time-frequency resource and downlink code domain resource, and according to same time-frequency
The upstream data that resource and uplink code domain resource are uploaded to base station.
The full-duplex transceiver of the application can preferably inhibit to be drawn by full-duplex communication compared with the prior art
The transmitting circuit of the same equipment risen and is realized between self-interference rejection and implementation complexity to the self-interference of receiving circuit
Reasonable compromise.
The additional aspect of the application and advantage will be set forth in part in the description, these will become from the following description
It obtains obviously, or recognized by the practice of the application.
Detailed description of the invention
The application is above-mentioned and/or additional aspect and advantage will become from the following description of the accompanying drawings of embodiments
Obviously and it is readily appreciated that, in which:
Fig. 1 is the principle schematic diagram of the full-duplex transceiver of the embodiment of the present application one;
Fig. 2 is that the structural principle of first example of the first embodiment of five full-duplex transceiver of the embodiment of the present application shows
It is intended to;
Fig. 3 a is a kind of structure passively inhibited and schematic illustration based on circulator of the embodiment of the present application;
Fig. 3 b is a kind of based on antenna dual polarization and the physically-isolated structure and original passively inhibited of the embodiment of the present application
Manage schematic diagram;
Fig. 4 is a kind of structure passively inhibited and original based on the superposition of multi-antenna transmission signal cancellation of the embodiment of the present application
Manage schematic diagram;
Fig. 5 is the schematic illustration for the realization structure that a kind of pure analog domain of the embodiment of the present application is eliminated;
Fig. 6 is the schematic illustration for the realization structure that a kind of digital assistant simulation of the embodiment of the present application is eliminated;
Fig. 7 is that the structural principle of second example of five full-duplex transceiver the first embodiment of the embodiment of the present application shows
It is intended to;
Fig. 8 is that the structural principle of first example of the second embodiment of five full-duplex transceiver of the embodiment of the present application shows
It is intended to;
Fig. 9 is the schematic diagram of a specific embodiment of the single path delay adjustable gain circuit of the embodiment of the present application;
Figure 10 is the structural principle of second example of the second embodiment of five full-duplex transceiver of the embodiment of the present application
Schematic diagram;
Figure 11 is the realization circuit that the numeric field computer aided simulation neural network based of the embodiment of the present application five is eliminated;
Figure 12 is the realization circuit that the embodiment of the present application five is eliminated based on the digital assistant simulation of feedforward neural network;
Figure 13 is that the structural principle of an example of the first embodiment of six full-duplex transceiver of the embodiment of the present application shows
It is intended to;
Figure 14 is the internal junction of the component signal fitting unit of an example of six first embodiment of the embodiment of the present application
Structure schematic diagram;
Figure 15 is the exemplary diagram in frequency domain progress code operation of the embodiment of the present application seven;
Figure 16 is the exemplary diagram in time domain progress code operation of the embodiment of the present application seven;
Figure 17 be the embodiment of the present application seven in frequency domain and time domain and meanwhile carry out the exemplary diagram of code operation;
Figure 18 is the exemplary diagram downlink code domain resource pool and uplink code domain of downlink code domain resource pool and uplink code domain resource pool
The exemplary diagram of resource pool;
Figure 19 is a kind of flow diagram of exchange method based on full-duplex transceiver of the embodiment of the present application seven;
Figure 20 is the flow diagram of another exchange method based on full-duplex transceiver of the embodiment of the present application seven;
Figure 21 is the exemplary diagram of different type running time-frequency resource the code operation and modulation system of the embodiment of the present application seven;
Figure 22 is that the uplink and downlink code word of the sizes such as the use of the embodiment of the present application seven covers the public time/frequency source block of uplink and downlink
Exemplary diagram;
Figure 23 is that the reuse of the embodiment of the present application seven covers the public running time-frequency resource of uplink and downlink with a pair of of uplink and downlink code word
The exemplary diagram of block;
Figure 24 is the showing using the multipair uplink and downlink code word covering public time/frequency source block of uplink and downlink of the embodiment of the present application seven
Example diagram;
Figure 25 is the multipair uplink and downlink code word covering public time/frequency source block of uplink and downlink of reuse of the embodiment of the present application seven
Exemplary diagram;
Figure 26 is a kind of exemplary diagram of uplink and downlink code word covering public time/frequency source block of uplink and downlink of the embodiment of the present application seven;
Figure 27 is the example of another uplink and downlink code word covering public time/frequency source block of uplink and downlink of the embodiment of the present application seven
Figure;
Figure 28 is the example of another uplink and downlink code word covering public time/frequency source block of uplink and downlink of the embodiment of the present application seven
Figure;
Figure 29 is the structural schematic diagram of an example of the multiple antennas full-duplex transceiver of the embodiment of the present application eight;
Figure 30 is the instance graph of the receiving end simulation cancellation module string sequence delet method of the embodiment of the present application eight;
Figure 31 is a kind of structural schematic diagram of interactive device based on full-duplex transceiver of the embodiment of the present application nine;
Figure 32 is the structural schematic diagram of another interactive device based on full-duplex transceiver of the embodiment of the present application nine.
Specific embodiment
Embodiments herein is described below in detail, the example of embodiment is shown in the accompanying drawings, wherein identical from beginning to end
Or similar label indicates same or similar element or element with the same or similar functions.It is retouched below with reference to attached drawing
The embodiment stated is exemplary, and is only used for explaining the application, and cannot be construed to the limitation to the application.
Those skilled in the art of the present technique are appreciated that unless expressly stated, singular " one " used herein, " one
It is a ", " " and "the" may also comprise plural form.It is to be further understood that " the packet of wording used in the description of the present application
Include " refer to existing characteristics, integer, step, operation, element and/or component, but it is not excluded that in the presence of or addition it is one or more
Other features, integer, step, operation, element, component and/or their group.It should be understood that when we claim element to be " connected "
Or when " coupled " to another element, it can be directly connected or coupled to other elements, or there may also be intermediary elements.This
Outside, " connection " or " coupling " used herein may include being wirelessly connected or wirelessly coupling.Wording "and/or" packet used herein
Include one or more associated wholes for listing item or any cell and all combination.
Those skilled in the art of the present technique are appreciated that unless otherwise defined, all terms used herein (including technology art
Language and scientific term), there is meaning identical with the general understanding of those of ordinary skill in the application fields.Should also
Understand, those terms such as defined in the general dictionary, it should be understood that have in the context of the prior art
The consistent meaning of meaning, and unless idealization or meaning too formal otherwise will not be used by specific definitions as here
To explain.
Those skilled in the art of the present technique are appreciated that " terminal " used herein above, " terminal device " both include wireless communication
The equipment of number receiver, only has the equipment of the wireless signal receiver of non-emissive ability, and including receiving and emitting hardware
Equipment, have on bidirectional communication link, can carry out two-way communication reception and emit hardware equipment.This equipment
It may include: honeycomb or other communication equipments, shown with single line display or multi-line display or without multi-line
The honeycomb of device or other communication equipments;PCS (Personal Communications Service, PCS Personal Communications System), can
With combine voice, data processing, fax and/or communication ability;PDA (Personal Digital Assistant, it is personal
Digital assistants), it may include radio frequency receiver, pager, the Internet/intranet access, web browser, notepad, day
It goes through and/or GPS (Global Positioning System, global positioning system) receiver;Conventional laptop and/or palm
Type computer or other equipment, have and/or the conventional laptop including radio frequency receiver and/or palmtop computer or its
His equipment." terminal " used herein above, " terminal device " can be it is portable, can transport, be mounted on the vehicles (aviation,
Sea-freight and/or land) in, or be suitable for and/or be configured in local runtime, and/or with distribution form, operate in the earth
And/or any other position operation in space." terminal " used herein above, " terminal device " can also be communication terminal, on
Network termination, music/video playback terminal, such as can be PDA, MID (Mobile Internet Device, mobile Internet
Equipment) and/or mobile phone with music/video playing function, it is also possible to the equipment such as smart television, set-top box.
The inventors of the present application found that full-duplex transceiver is designed using the prior art, since uplink downlink is same simultaneously
Frequently (using identical time-domain resource and identical frequency domain resource), the transmitting signal of full duplex system can generate very to signal is received
Strong self-interference, self-interference signal can even make an uproar the bottom of than and be higher by more than 120 dB, cause full-duplex transceiver practical.
Full-duplex transceiver, electronic equipment and computer readable storage medium provided by the present application, it is intended to solve existing skill
The technical issues of art.
The self-interference signal referred in the application is that the transmitting signal of transmitting circuit in same transceiver produces receiving circuit
Raw interference signal.
How the technical solution of the application and the technical solution of the application are solved with specific embodiment below above-mentioned
Technical problem is described in detail.These specific embodiments can be combined with each other below, for the same or similar concept
Or process may repeat no more in certain embodiments.Below in conjunction with attached drawing, embodiments herein is described.
Embodiment one
Fig. 1 is the principle schematic diagram of the full-duplex transceiver of the embodiment of the present application one.
As shown in Figure 1, the application provides a kind of full-duplex transceiver, comprising: at least one transmitting circuit, at least one connects
Take-up road and simulation cancellation module.
For any pair of transmitting circuit and receiving circuit, cancellation module is simulated, is connect with receiving circuit and transmitting circuit,
For carrying out simulation elimination to the self-interference signal received in signal according to transmitting signal.
The connection that the application refers to includes following at least one: being electrically connected, meets optical path connection, the light of optical signal transmission
Road connection and photoelectric converter and electrical connection.
The full-duplex transceiver of the embodiment of the present application can preferably inhibit since full duplex is logical compared with the prior art
The transmit antenna port of the transmitting circuit of the caused same equipment of letter to the receiving antenna port of receiving circuit self-interference, and
Realize the reasonable compromise between self-interference rejection and implementation complexity (comprising hardware complexity and software complexity).
Embodiment two
The embodiment of the present application provides alternatively possible implementation, further includes implementing on the basis of example 1
Full-duplex transceiver shown in example two.
Optionally, in the full-duplex transceiver of the embodiment of the present application, simulation cancellation module includes: at least one digital assistant
Submodule is eliminated in simulation;
It includes: that unit, corresponding control unit and addition are eliminated in digital assistant simulation that submodule is eliminated in digital assistant simulation
Device;
The adder that submodule is eliminated in each digital assistant simulation is sequentially connected in series in the analog submodule route of receiving circuit;
Unit is eliminated in digital assistant simulation, and the sub- connection of the number of input terminal and transmitting circuit, output end, which is connected to, to be connect
Take-up road is carried out with the digitally transmitted signals on the digital sub-line road of transmitting circuit based on the feedback signal for generating feedback signal
Simulation is eliminated.
Optionally, unit is eliminated in digital assistant simulation, and output end is connected to an input terminal of corresponding adder, is fed back
End by corresponding control unit and receives line with the connection of the output end of adder or feedback end by corresponding control unit
The sub- connection of number in road, for the digitally transmitted signals according to the digital sub-line road in receiving circuit and from corresponding
The feedback signal of adder or the feedback signal on the digital sub-line road according to digitally transmitted signals and from receiving circuit are right
Self-interference signal carries out simulation elimination.
Optionally, simulation cancellation module includes: that submodule is eliminated in the simulation of at least one digital assistant;
It includes: that unit, corresponding control unit and addition are eliminated in digital assistant simulation that submodule is eliminated in digital assistant simulation
Device;
The adder that submodule is eliminated in each digital assistant simulation is sequentially connected in series in the analog submodule route of receiving circuit;
Unit is eliminated in digital assistant simulation, and output end is connected to an input terminal of corresponding adder, and feedback end passes through
Corresponding control unit passes through in corresponding control unit and receiving circuit with the connection of the output end of adder or feedback end
The sub- connection of number, for the digitally transmitted signals according to the digital sub-line road in receiving circuit and from corresponding adder
Feedback signal or the digital sub-line road according to digitally transmitted signals and from receiving circuit feedback signal, to self-interference
Signal carries out simulation elimination.
Optionally, simulation cancellation module includes: first order simulation cancellation module and second level simulation cancellation module;
First order simulation cancellation module and second level simulation cancellation module are connected to the analog submodule route of receiving circuit in turn
In, for successively carrying out simulation elimination to the self-interference signal in receiving circuit.
Optionally, first order simulation cancellation module includes that submodule is eliminated in the simulation of at least one level-one, and the second level is simulated
Cancellation module includes that submodule is eliminated in the simulation of at least one digital assistant;
Each level-one simulation is eliminated submodule and is sequentially connected in series in the analog submodule route of receiving circuit;
It includes: that unit, corresponding control unit and adder are eliminated in simulation that submodule is eliminated in level-one simulation;
Corresponding adder is serially connected in the analog submodule route of receiving circuit, and the output end of the adder be connected to it is next
The input terminal or first digit computer aided simulation of the adder of a level-one simulation elimination submodule eliminate the adder of submodule
Input terminal;
Unit, the analog submodule connection of input terminal and transmitting circuit are eliminated in simulation, and output end is connected to corresponding addition
One input terminal of device, feedback end are connected by the output end of corresponding control unit and adder.
Optionally, it includes single tapped delay and gain circuitry that submodule is eliminated in level-one simulation.
Optionally, first order simulation cancellation module includes that submodule is eliminated in the simulation of at least one level-one, and the second level is simulated
Cancellation module includes that submodule is eliminated in the simulation of at least one second level;
The simulation of each second level is eliminated submodule and is sequentially connected in series in the analog submodule route of receiving circuit, and input terminal all with hair
The analog submodule connection on ray road;It includes: at least one variable delay unit, at least one that submodule is eliminated in one second level simulation
A component signal fitting unit, low-converter, amplifier, first adder and second adder;
The input terminal of each variable delay unit and the analog submodule connection of transmitting circuit, output end is connected to corresponding
One input terminal of component signal fitting unit;
The output end of each component signal fitting unit is connected to each input terminal of second adder;
The output end of second adder is connected to the first adder that submodule is eliminated in the simulation of this second level by amplifier
One input terminal;
Another input terminal of the first adder of submodule is eliminated in the simulation of this second level, is simulated with previous second level and is eliminated son
The output end connection of the adder of submodule is eliminated in the output end of the first adder of module or the simulation of the last one level-one;This
The output end that the first adder of submodule is eliminated in second level simulation is respectively connected to each component signal by low-converter and is fitted list
Another input terminal of member.
Optionally, variable delay unit includes that multi-tap delay can reconcile adjustable gain circuit;
Multi-tap delay can reconcile adjustable gain circuit include: specified quantity the first retardation the first delay line
With the second delay line, delay selection switch and variable gain module of the second retardation;
Each first delay line is sequentially connected in series;
The output end of each first delay line is connected to the input terminal of corresponding second delay line;
Each output end of each first delay line and the second delay line is respectively connected to each of delay selection switch
Input terminal;
Delay selection switch output end be optionally connected with one input terminal, and the output end be connected to it is variable
The input terminal of gain module.
Optionally, component signal fitting unit includes: low-converter, conjugator, iteration step length calculator, the first multiplication
Device, integrator, the second multiplier, weighting system renovator, register, vector modulator;
The input terminal of low-converter and the output end of variable delay unit connect, and output end is connected to the input terminal of conjugator
With an input terminal of iteration step length calculator;
One output end of conjugator is connected to another input terminal of iteration step length calculator;
Two input terminals of the first multiplier are respectively connected to the another output of conjugator, baseband error signal end,
Output end is connected to the first input end of the second multiplier by integrator;
Another input terminal of second multiplier is connect with the output end of iteration step length calculator, and output end passes through weighting system
Number renovator is connected to an input terminal of vector modulator;
Weighting coefficient renovator is connect with register;
Another input terminal of vector modulator and the input terminal of variable delay unit connect, and output end is as component signal
The output end of fitting unit.
Optionally, in the full-duplex transceiver of the embodiment of the present application, further includes: digital cancellation module.
Digital cancellation module is connect with the digital sub-line road of receiving circuit and transmitting circuit, for according to transmitting signal pair
It receives the self-interference signal after simulation is eliminated in signal and carries out digital elimination.
Optionally, auxiliary radio frequency link includes: sequentially connected frequency mixer, low-pass filter and AD conversion unit;
The input terminal of frequency mixer is connected to the analog submodule route of transmitting circuit;
The output end of AD conversion unit is connected to digital cancellation module.
Optionally, the full-duplex transceiver of the embodiment of the present application further include: preequalization module.
The digital sub-line road and digital cancellation module of preequalization module and transmitting circuit connect;
Preequalization module includes the I/Q imbalance estimation unit and preequalization unit of connection, for eliminating I/Q imbalance.
Optionally, the output of the input terminal of I/Q imbalance estimation unit and the channel estimating unit in digital cancellation module
End connection, output end are connected to an input terminal of preequalization unit;
Preequalization unit is serially connected in the digital sub-line road of transmitting circuit, right for the I/Q unbalance information according to estimation
Digital signal to be launched carries out the compensation of the balance based on I/Q.
Optionally, the full-duplex transceiver of the embodiment of the present application further include: switching device.
Switching device is connect with preequalization module, is used for according to the unbalanced estimated result of I/Q dynamically, to preequalization mould
Block is activated or is closed;
Optionally, switching device is eliminated unit with the level-one simulation in simulation cancellation module and is connect, and is input to for basis
The averaged magnitude for simulating cancellation module simulates elimination unit to level-one and is activated or closed.
Optionally, digital cancellation module includes: digital beam excipient unit;
And the full-duplex transceiver of the application further include: the pre- cancellation module of number.
The pre- cancellation module of number is connected in the digital sub-line road of transmitting circuit.
The pre- cancellation module of number includes MAC (the Media Access Control/Medium Access of connection
Control, media access control) layer processing unit and transmitter baseband signal processing unit;MAC layer processing unit includes spread spectrum
Code/scrambling code distributes subelement;Transmitter baseband signal processing unit includes that spread spectrum/scrambling subelement and launching beam excipient are single
Member;
One input terminal of channel estimating unit is connected to transmitter base band signal process by digital beam excipient unit
Unit.
Optionally, the full-duplex transceiver of the application, further includes: predistortion module.
Predistortion module is connected with the digital sub-line road of transmitting circuit and analog submodule route.
Predistortion module includes the predistortion estimation unit and pre-distortion unit of connection.
Optionally, predistortion estimation unit, input terminal are connected to the analog submodule route intermediate power amplifier of transmitting circuit
Output end, output end are connected to the input terminal of pre-distortion unit, for non-linear point to the power amplifier in transmitting circuit
Amount is estimated offline;
Pre-distortion unit, output end be connected to the digital sub-line road of transmitting circuit, for according to being estimated offline as a result, right
Transmitting signal to be launched is pre-processed, so that treated, transmitting signal generates non-thread after by power amplifier
Property component is reduced to specified level.
Optionally, in the full-duplex transceiver of the application, for any two pairs of transmitting circuits and receiving circuit, a pair of transmitting
The simulation cancellation module of route and receiving circuit is identical as the simulation cancellation module of another pair transmitting circuit and receiving circuit or not
Together.
Optionally, in the full-duplex transceiver of the application, for any two pairs of transmitting circuits and receiving circuit, a pair of transmitting
The digital cancellation module of route and receiving circuit is identical as the digital cancellation module of another pair transmitting circuit and receiving circuit or not
Together.
Optionally, in the full-duplex transceiver of the application, simulation cancellation module is connected to the transmitting of different transmitting circuits
Between antenna port and the receiving antenna port of same receiving circuit, different hairs are originated from according to what the receiving antenna port received
The power for penetrating the self-interference signal of antenna port carries out string sequence to the self-interference signal for being originated from different transmit antenna ports and eliminates.
Optionally, in the full-duplex transceiver of the application, in different transmit antenna ports, the transmitting antenna of first part
Port and same receiving antenna port are arranged in same antenna array element;Other transmit antenna ports other than first part
It is arranged in other bays;
First part's transmit antenna port in same antenna array element is different from the polarization direction of receiving antenna port;
Cancellation module is simulated for first eliminating the self-interference signal for being originated from the transmit antenna port of first part, eliminates source afterwards
From the self-interference signal of other transmit antenna ports.
Optionally, input terminal and multiple transmit antenna ports company that unit is eliminated in the second level simulation in cancellation module are simulated
It connects, for receiving the superposed signal for being originated from the self-interference signal of multiple transmit antenna ports.
Optionally, full-duplex transceiver provided by the present application further include: passive suppression module.
Transmit antenna port, analog submodule route and digital sub-line road in transmitting circuit are sequentially connected.
Receiving antenna port, analog submodule route and digital sub-line road in receiving circuit are sequentially connected.
For any pair of transmitting circuit and receiving circuit, passive suppression module and transmit antenna port and receiving antenna end
Mouth connection, for the original self-interference signal progress received in signal according to transmitting signal, to same running time-frequency resource is shared
Inhibit.
Cancellation module is simulated, is connect with the analog submodule route and transmitting circuit of receiving circuit, for according to transmitting signal pair
It receives the self-interference signal after inhibiting in signal and carries out simulation elimination.
Optionally, passive suppression module includes at least one of following: circulator, dual polarization and physically-isolated antenna, base
In the multiple antennas of transmitting signal cancellation superposition.
Optionally, in the full-duplex transceiver of the application, for any two pairs of transmitting circuits and receiving circuit, a pair of transmitting
The passive suppression module of route and receiving circuit is identical as the passive suppression module of another pair transmitting circuit and receiving circuit or not
Together.
The full-duplex transceiver of the embodiment of the present application can preferably inhibit due to full duplex compared with the prior art
On the basis of the transmit antenna port to the self-interference of receiving antenna port of the caused same equipment of communication, provide more more
The embodiment of flexible full-duplex transceiver, suitable application area is more extensive, and more users is enabled to select to be suitble to
The customization full-duplex transceiver of itself realizes conjunction of the full-duplex transceiver between self-interference rejection and implementation complexity
Reason compromise.
Embodiment three
Based on the same inventive concept, the embodiment of the present application provides a kind of electronic equipment, which includes in the application
State the full-duplex transceiver that each embodiment provides.Optionally, which is terminal device or base station.
The technical effect of the embodiment of the present invention and the technical effect of above-described embodiment one to two are consistent, repeat no more.
Example IV
The embodiment of the present application provides alternatively possible implementation, on the basis of embodiment one or embodiment two,
It further include full-duplex transceiver shown in example IV.
It is dry to increase other on the basis of digital assistant simulates technology for eliminating for a kind of full-duplex transceiver of example IV introduction
It disturbs and suppresses or eliminates module, such as pure analog domain cancellation module and/or digital preequalization module, to realize that better receiving end is dry
Disturb elimination performance.Digital assistant simulation eliminates monotechnics principle in subsequent introduction, and the unit is in numeric field to self-interference signal
Linearity and non-linearity component modeled and reconstructed, and the analog domain in receiving end deletes the interference signal of the reconstruct.
The full-duplex transceiver of the embodiment of the present application four is one to the full-duplex transceiver of each embodiment of above-mentioned the application
The selection of the projects such as a little modules, including at least one of simplification, materialization and some additional supplements.
The first embodiment in the embodiment of the present application four is described below, simulates cancellation module in the first embodiment
It is simulated only with digital assistant and eliminates submodule.The first embodiment include: first example not comprising preequalization module,
With second example comprising preequalization module.
Fig. 2 is that the structural principle of first example of the first embodiment of four full-duplex transceiver of the embodiment of the present application shows
It is intended to.
As shown in Fig. 2, at least one transmitting circuit and receiving circuit are all divided in first example of the embodiment of the present application four
It is not reduced to one;Simulation cancellation module is reduced to only eliminate submodule comprising digital assistant simulation, and at least one number is auxiliary
It helps simulation to eliminate submodule and is reduced to one.
Transmit antenna port in transmitting circuit is embodied as the sending port in Fig. 2;Simulation sub-line in transmitting circuit
Road is embodied as the digital-to-analogue conversion (unit) being sequentially connected in series in Fig. 2, frequency mixer (including the circle of poor multiplication sign) and power amplification
The output end of device, power amplifier is connected to emission port;Digital-to-analogue conversion (unit) input terminal is connected to the number in transmitting circuit
According to sub-line road.
Receiving antenna port in receiving circuit is embodied as the receiving port in Fig. 2;Simulation sub-line in receiving circuit
Road includes the bandpass filter being sequentially connected in series in Fig. 2, low noise amplifier, frequency mixer, low-pass filter and analog-to-digital conversion (unit),
The input terminal of bandpass filter is connect with receiving port;The output end of analog-to-digital conversion (unit) is connected to the data in receiving circuit
Sub-line road.
Full duplex equipment receiver scheme as shown in Fig. 2, comprising passive suppression module, eliminate by simulation cancellation module and number
Module, wherein simulation cancellation module, which includes at least digital assistant simulation, eliminates unit.The realization circuit of the program is fairly simple, can
To realize relatively good self-interference eradicating efficacy under the premise of low Receiver Complexity.
Optionally, the passive suppression module of the embodiment of the present application can use a variety of implementations, including following at least one
: circulator, dual polarization and physically-isolated antenna, the multiple antennas based on transmitting signal cancellation superposition.
The working principle of passive suppression module is described below.
Passive suppressing method is folded using the cancellation of the physical isolation of antenna or dual polarization isolation or multi-antenna transmission signal
Calais reduces the intensity that self-interference signal reaches receiving antenna, to inhibit self-interference.There are many kinds of implementations for passive inhibition.
Fig. 3 a provides a kind of passive suppressing method based on circulator, and there are three ports for circulator, wherein transmitting signal
It is sent by port 1 to port 2, receives signal and received by port 2 to port 3, circulator is by inhibiting port 1 to let out
The signal of port 3 is drained to inhibit self-interference.
Fig. 3 b provide it is a kind of based on antenna dual polarization and physically-isolated passive Restrain measurement, in the figure, sending port
Different polarization directions is used with receiving port, and it is separated by a distance, in this way, the transmitting signal for reaching receiving port can be by
In different from the polarization direction of receiving port and have path loss and be reduced.
Fig. 4 provides a kind of passive suppressing method based on the superposition of multi-antenna transmission signal cancellation, and there are two send in figure
The distance of port and a receiving port, sending port 1 and sending port 2 to receiving port distinguishes λ/2 d and d+, and wherein λ is letter
Number wavelength passes through and sends identical signal in two sending ports simultaneously, and two transmitting signals that receiving port receives understand reverse phase
Cancellation.
The working principle of simulation cancellation module, the i.e. Method And Principle of simulation elimination self-interference signal is described below.
Simulation removing method is the analog domain (the analog submodule route i.e. before progress analog-to-digital conversion) in receives link to certainly
Interference signal is eliminated.
The different delayed time for obtaining transmitting signal as the first embodiment by one or more delay circuit is eliminated in simulation
Then copy iteratively adjusts the gain coefficient of these different delayed times copy by control circuit, copy these different delayed times
Superposed signal approximation self-interference signal, by subtracting the superposed signal in signal and eliminating self-interference from receiving.According to delay
The input of circuit is that simulation can be eliminated and be divided into pure analog domain elimination and digital assistant by analog domain signal or digital domain signal
Simulation is eliminated.
Fig. 5 provides a kind of implementation method that pure analog domain is eliminated, the link that this method is delayed by one with gain controllable
Composition, signal strength of the control unit based on feedback iteratively adjusts the delay and gain of the link, so as to disappear by the unit
Except the signal strength after self-interference is lower than certain level.
The numeric field symbol for utilizing transmission link is eliminated in digital assistant simulation, in numeric field to line present in reception signal
Property and nonlinear component rebuild, the digital domain signal of reconstruction is then transformed into analog domain, through frequency up-converted be radio frequency
Signal eliminates self-interference with received signal phase Calais after reverse phase.Fig. 6 provides a kind of concrete implementation circuit, firstly, in number
Word domain generates odd-order (1,3 ..., P, most high-order P determine according to the actual link non-linear characteristic) component for sending symbol,
Then these components being orthogonalized, each component of orthogonalization output can pass through a tapped delay line circuit respectively,
The output signal of all tapped delay line circuits through digital-to-analogue conversion transforms to analog domain after being overlapped, after up-conversion and reverse phase
It is added with signal is received.The tap order of tapped delay line circuit can be designed according to actual channel, actual channel
Number of path is more, higher order can be used when being delayed larger, conversely, with less order.
Optionally, it includes: that unit, corresponding control unit are eliminated in digital assistant simulation that submodule is eliminated in digital assistant simulation
And adder.
The adder that submodule is eliminated in digital assistant simulation is serially connected in the analog submodule route of receiving circuit.
Digital assistant simulation elimination unit, the sub- connection of the number of input terminal and transmitting circuit (reception numeric-field data,
Symbol or signal), for according to digitally transmitted signals (i.e. the numeric-field data of transmitting circuit, symbol or signal) and from correspondence
Adder feedback signal, to passive suppression module inhibit after self-interference signal carry out simulation elimination.
The output end that unit is eliminated in digital assistant simulation is connected to an input terminal of corresponding adder, and feedback end passes through
The connection of the output end of corresponding control unit and adder.Alternatively, the feedback end that unit is eliminated in digital assistant simulation passes through correspondence
Control unit and receiving circuit in the sub- connection of number.
Digital assistant simulation is eliminated unit and is used for according to digitally transmitted signals (the i.e. numeric-field data of transmitting circuit, symbol
Or signal) and feedback signal from the digital sub-line road in receiving circuit, the self-interference after inhibiting to passive suppression module believe
Number carry out simulation elimination.
Specifically, implementation as shown in FIG. 6 can be used by simulating digital assistant simulation elimination unit in cancellation module.
The gain that each tap in unit is eliminated in digital assistant simulation need to be adjusted based on feedback signal by control unit.Control unit
The parameter for iteratively updating each tap based on feedback signal, until making the signal strength of feedback lower than certain threshold value or feedback
Signal to Interference plus Noise Ratio be higher than certain threshold value.
Preferably, the source of feedback signal is one of the following, from radio-frequency head feedback (after adder, low noise amplification
Before device, as shown in Fig. 2 feedback A1), or fed back (after analog-to-digital conversion module, as shown in Fig. 2 feedback A2) from numeric field.
Particularly, when feedback signal source is to feed back from radio-frequency head, the physical significance of feedback signal can be signal strength.
Particularly, when feedback signal source is to feed back from digital end, the physical significance of feedback signal can be signal strength or believe dry make an uproar
Than.Feedback signal source difference will affect digital assistant simulation and eliminate the iterative convergence speed of tap gain and digital mould in unit
The quasi- performance eliminated unit and self-interference is eliminated.In general, the convergence rate based on radio-frequency head feedback is fed back than digital end
Fast convergence rate, but self-interference eliminate performance it is relatively weaker.
The working principle of digital cancellation module is described below, i.e., to the digital removing method of self-interference signal.
Digital removing method is that the numeric field (after passing through analog-to-digital conversion) in receiving end disappears to self-interference signal
It removes.Digital removing method estimates self-interference channel using known transmission symbol, then, the channel reconstructing based on estimation
Self-interference signal, and subtract in the digital domain signal received the self-interference signal of reconstruction.It is known that transmission symbol can
To be frequency pilot sign, or the data symbol sent;It is also possible to the symbol fed back by secondary link.Digital self-interference channel is estimated
Meter includes the channel estimation of linear component and the channel estimation of nonlinear component, and system, which can choose, first estimates linear component, In
It receives and nonlinear component is estimated again after subtracting the linear component of estimation in signal, it can also be to linear component and non-linear
Component carries out Combined estimator, and estimation method can be using lowest mean square etc..
Optionally, digital cancellation module can be used any existing digital technology for eliminating, for example, by self-interference channel into
Row estimation, then rebuilds self-interference signal.It should be noted that the symbol for numeric field channel estimation can be pilot tone symbol
Number, or the data symbol sent, as numeral input D1 is indicated in Fig. 6;It is also possible to the symbol fed back by secondary link, such as Fig. 6
Middle numeral input D2 is indicated.Two ways is compared, and the method based on numeral input D1 does not need additional circuit, but the essence estimated
It spends more weaker than the method based on numeral input D2.
Fig. 7 is that the structural principle of second example of four full-duplex transceiver the first embodiment of the embodiment of the present application shows
It is intended to.
On the basis of second example is first example shown in Fig. 2, the numeric field of transmission link can also increase pre-
Balance module.
Optionally, preequalization module includes I/Q imbalance estimation unit and preequalization unit.
The input terminal of I/Q imbalance estimation unit is connect with the output end of the channel estimating unit in digital cancellation module,
Output end is connected to an input terminal of preequalization unit.
Preequalization unit is serially connected in the digital sub-line road of transmitting circuit, right for the I/Q unbalance information according to estimation
Digital signal to be launched carries out the compensation of the balance based on I/Q.
Specifically, as shown in fig. 7, preequalization module includes I/Q imbalance estimation unit and preequalization unit, I/Q is uneven
The estimation of weighing apparatus and the parameter setting of preequalization unit can refer to method in the prior art.It is pre- equal by increasing in transmission link
Weigh module, and the I/Q that the program can effectively compensate for transmission link is uneven, improves the channel estimation essence of numeric field cancellation module
Degree, so that the self-interference for improving entire receiver eliminates ability.
Based on the first embodiment of the first embodiment, the workflow of entire full-duplex transceiver are as follows: sending
End, numeric field symbol is converted to analog signal through D/A converter module, through frequency mixer up-conversion, carries out power through power amplifier
Amplification, finally radiate in sending port;What receiving port received is after passive suppression module centainly inhibit
The superposed signal of self-interference signal and useful signal, the superposed signal, can be via digital assistants after band-pass filter
The simulation cancellation module that unit composition is eliminated in simulation further eliminates self-interference signal, by the continuous iteration elimination of the module,
The signal strength of output can be lower than certain threshold value, and to guarantee signal strength in the dynamic range of numeric field, then, residue is believed
Number it can amplify through low noise amplifier, through frequency mixer down coversion, low-pass filtered device filtering is converted to number through analog-to-digital conversion module
Domain symbol, then, digital cancellation module can estimate self-interference channel based on known signal, and the channel pair based on estimation
Remaining self-interference signal is rebuild, and the self-interference signal of reconstruction is subtracted in received digital domain signal, finally, remaining
Signal can be handled through subsequent numeric field to demodulate useful signal.Particularly, if transmitting terminal has preequalization module, number letter
Number preequalization can be also first carried out before through digital-to-analogue conversion to compensate the I/Q of transmission link imbalance, then again through analog-to-digital conversion
Module is converted to analog signal and carries out subsequent operation.
Second of embodiment in the embodiment of the present application four is described below, second of embodiment is in the first embodiment party
On the basis of formula, it is additionally arranged the simulation of at least one level-one and eliminates submodule.Second of embodiment includes: not comprising preequalization mould
First example of block and second example comprising preequalization module.
Fig. 8 is that the structural principle of first example of the second embodiment of four full-duplex transceiver of the embodiment of the present application shows
It is intended to.The simulation of at least one level-one eliminates submodule and is reduced to one in first example of second embodiment.
Optionally, level-one simulation is eliminated submodule and is serially connected in the analog submodule route of receiving circuit;Son is eliminated in level-one simulation
Module is used to carry out simulation elimination to the main diameter component in the self-interference signal after inhibition according to analog transmissions signal;Main diameter is
The strongest leakage path of signal strength or direct path.
Optionally, it includes: that unit, corresponding control unit and adder are eliminated in simulation that submodule is eliminated in level-one simulation.
Corresponding adder is serially connected in the analog submodule route of receiving circuit, and the output end of the adder be connected to it is next
The input terminal or first digit computer aided simulation of the adder of a level-one simulation elimination submodule eliminate the adder of submodule
Input terminal.
Unit is eliminated in level-one simulation, and the analog submodule connection of input terminal and transmitting circuit, output end is connected to corresponding
One input terminal of adder, feedback end are connected by the output end of corresponding control unit and adder.
Specifically, full duplex device transceiver scheme is as shown in figure 8, comprising passive suppression module, simulation cancellation module and
Digital cancellation module, wherein simulation cancellation module is simulated by level-one eliminates unit and its control unit, two-stage digital computer aided simulation
Eliminate unit and its control unit cascade composition.The program uses two-stage simulation and eliminates, and has stronger analog domain self-interference
Elimination ability.
The effect of passive suppression module and specific embodiment are identical as the first embodiment, and details are not described herein again.Mould
Level-one simulation eliminates unit and is mainly used to eliminate strongest leakage path or direct path bring self-interference in quasi- cancellation module,
Since the channel variation in the path is relatively slow, the parameter that unit is eliminated in level-one simulation can be updated with relatively low frequency.It is logical
It crosses the strongest leakage path of level-one simulation elimination unit elimination or direct path bring self-interference, two-stage digital computer aided simulation disappears
Except faster convergence rate may be implemented in unit, reaches higher self-interference and eliminate performance.
Specifically, it includes single tapped delay and gain circuitry that submodule is eliminated in level-one simulation.Optionally, level-one simulation is eliminated
Unit can be using single tapped delay and gain circuitry as shown in Figure 5.
When the delay of single tap can reconcile in adjustable gain circuit using the first delay line of 4 4Ts and 4 2Ts
When low latency line, single path delay adjustable gain circuit is specially a specific embodiment shown in Fig. 9.Such as shown in Fig. 9
Circuit, the circuit is by 4 4TsDelay line, 4 2TsDelay line, one 8 selection delay selection switch and variable gain
Module composition, by the selection of delay switch, may be implemented 4Ts, 6Ts..., 18TsEight kinds of different delays.It needs to illustrate
It is that the circuit of Fig. 9 is a kind of embodiment of Fig. 5, the self-interference that other delay adjustable gain circuits can also be applied to is eliminated
Scheme.
Digital assistant simulation eliminates unit and further eliminates self-interference signal on the basis of level-one is simulated and eliminates unit, should
The specific embodiment of unit is identical as the first embodiment, and details are not described herein again.
The effect of digital cancellation module and specific embodiment are identical as the first embodiment, and details are not described herein again.
Figure 10 is to apply for that the structural principle of second example of second embodiment of example IV full-duplex transceiver shows
It is intended to.
On the basis of first example of second embodiment shown in Fig. 8, the numeric field of transmission link can equally increase
Add preequalization module, to form second example of second embodiment as shown in figure 22.The effect of preequalization module and
Specific embodiment is identical as the first embodiment, and details are not described herein again.
Based on second embodiment, the workflow of entire full-duplex transceiver are as follows: in transmitting terminal, numeric field symbol is through number
Mould conversion module is converted to analog signal, through frequency mixer up-conversion, power amplification is carried out through power amplifier, finally in transmitting terminal
Mouth is radiate;What receiving port received is the self-interference signal and useful letter after passive suppression module centainly inhibit
Number superposed signal, the superposed signal after band-pass filter, can first through level-one simulate eliminate unit eliminate self-interference
Then signal simulates elimination unit through digital assistant and further eliminates self-interference signal, the entire letter for simulating cancellation module output
Number intensity can be lower than certain threshold value, and to guarantee signal in the dynamic range of numeric field, then, residual signal can be through low noise
Big device amplification, through frequency mixer down coversion, low-pass filtered device filtering is converted to numeric field symbol through analog-to-digital conversion module, then,
Digital cancellation module can be based on known signal and estimate self-interference channel, and based on the channel of estimation to remaining self-interference
Signal is rebuild, and the self-interference signal of reconstruction is subtracted in received digital domain signal, finally, residual signal can be through subsequent
Numeric field handle to demodulate useful signal.Particularly, if transmitting terminal has preequalization module, digital signal turns through digital-to-analogue
Preequalization can be also first carried out before alternatively to compensate the I/Q of transmission link imbalance, be then converted to mould through analog-to-digital conversion module again
Quasi- signal and the subsequent operation of progress.
Optionally, the embodiment of the present application full-duplex transceiver, further includes: switching device;
Switching device is connect with preequalization module, is used for according to the unbalanced estimated result of I/Q dynamically, to preequalization mould
Block is activated or is closed.
Further, the sub- connection of the number of switching device and receiving circuit is originated from the number sub-line road for basis
Signal determines the unbalanced estimated result of I/Q.
Optionally, switching device is eliminated unit with the level-one simulation in simulation cancellation module and is connect, and is input to for basis
The averaged magnitude for simulating cancellation module simulates elimination unit to level-one and is activated or closed.
Second example of second of embodiment based on the embodiment of the present application full-duplex transceiver also provides one kind certainly
The removing method principle of interference signal:
This method provides a kind of adaptive full duplex device transceiver scheme, and the self-interference of the program eliminates block diagram and figure
10 is identical, unlike second example described in second of embodiment, preequalization module in the program and
Level-one simulation elimination unit in simulation cancellation module basis to the unbalanced estimated result of I/Q and can be input to simulation respectively
The signal strength of cancellation module is dynamically activated or is closed.In a period of time, the transmission link I/Q imbalance of estimation continues greatly
When certain threshold value, transmission link activates preequalization module;In a period of time, the transmission link I/Q of system estimation is uneven
When continuously less than certain threshold value, preequalization module is closed.Similarly, in a period of time, it is input to the flat of simulation cancellation module
When equal signal strength is greater than certain threshold value, system activates level-one simulation to eliminate unit;In a period of time, it is input to simulation and eliminates
When the average signal strength of module is less than certain threshold value, system closes level-one simulation and eliminates unit.By dynamically adjusting link
Used in module, the energy consumption of transceiver can be effectively reduced, at the same can reach optimization self-interference eliminate performance.
Specifically, if αI, θI, αQ, θQThe instantaneous amplitude on the road transmitting terminal I respectively estimated, phase, the transmitting terminal Q of estimation
The instantaneous amplitude on road, phase, αth, θthThe respectively unbalanced threshold value of amplitude and phase, is preset by system or is configured;If β
For the threshold value for being input to the signal strength for simulating cancellation module, is preset by system or configured.As a period of time T1It is interior, T1By
System presets or configures, and the transmitting terminal I/Q imbalance of estimation persistently meetsθI-θQ> θthWhen, I/Q is uneven
It is affected to self-interference elimination, activates preequalization module at this time;Conversely, working as T1The transmitting terminal I/Q estimated in time is uneven
Weighing apparatus is persistently unsatisfactory forθI-θQ> θthWhen, the influence that I/Q imbalance eliminates self-interference is smaller, closes preequalization at this time
Module.Similarly, as a period of time T2It is interior, T2It is preset by system or is configured, be input to the average signal of simulation cancellation module
When intensity is greater than β, unit is eliminated in activation level-one simulation;Work as T2In time, it is input to the average signal strength of simulation cancellation module
When less than β, closes level-one simulation and eliminate unit.
It should be noted that there is no level-one simulations to eliminate unit if there are preequalization modules in link, can also set
The adaptation scheme based on Fig. 7 is counted, at this point, the dynamic adjustment of link is only limitted to activation or closing to preequalization module, is adopted
Rule is identical as the above-mentioned adaptation rule about preequalization module;Similarly, if there are level-one simulations to disappear in link
Except unit, preequalization module is not present, the adaptation scheme based on Fig. 8 can also be designed, at this point, the dynamic adjustment of link only limits
In activation or closing to level-one analogue unit, used rule and the above-mentioned adaptive rule that elimination unit is simulated about level-one
It is then identical.
Embodiment five
The present embodiment proposes a kind of digital assistant simulation removing method neural network based.By using mind in numeric field
Through network model, preferably the non-ideal factor of circuit (non-linear, I/Q is uneven etc.) can be carried out approximate;Pass through change
The input order of neural network, also can be convenient the multipath channel of the various environment of simulation.
Specifically, the digital assistant simulation elimination circuit neural network based is as shown in figure 11, the transmission of numeric field
Signal generates the output signal of numeric field by neural network, and the output for then generating analog domain through analog-to-digital conversion and up-conversion is believed
Number, which offsets in reception radio frequency domains with the self-interference signal received.Wherein, the neural network model can be with
Using such as feedforward neural network, convolutional neural networks, the circulation models such as neural network, the specific structure of neural network, such as
How many layer and every layer of how many neuron, activation primitive of neuron etc. can be determined according to trained effect.Nerve
The input signal of network is the transmission symbol at multiple moment, the symbol sent including at least current time and before several moment
The symbol of transmission sends the odd number order component of symbol, example in addition, input signal can also include the symbol that the moment sends later
Such as, 3 ranks, 5 order components etc..Input symbol quantity can be primarily determined according to the multidiameter delay of environment: when multidiameter delay compared with
When big, the symbol quantity of the different moments of input is more;Conversely, quantity is few.Final input signal quantity is based on mind
Effect through network training determines.In addition, being accorded with since neural network only handles real number signal to each of numeric field plural number
Number, take real and imaginary parts to input as two-way.The output of neural network is two-way real signal, respectively as the defeated of the road I and the road Q
Enter signal.
Figure 12 is the example that circuit is eliminated in the digital assistant simulation based on feedforward neural network, neural network here
Using the structure of feedforward neural network, by input layer, two layers of hidden layer and output layer composition.Wherein, input layer has 6 inputs,
Respectively Re { x (n) }, Im { x (n) }, Re { x (n-1) }, Im { x (n-1) }, Re { x (n-2) }, Im { x (n-2) }, i.e., when current
It carves and the real imaginary part of the symbol at two moment of front, the activation primitive of neuron is identity function, i.e. f (x)=x;Two layers hiding
Layer has 5 neurons respectively, and the activation primitive of neuron is to rectify linear unit R eLU, i.e. f (x)=max { x, 0 } or identical
Function f (x)=x, such as the activation primitive of every layer of all neurons can be made to be both configured to rectification linear unit, alternatively, often
The activation primitive of a part of neuron of layer is set as identity function, and the activation primitive of remaining neuron is set as rectifying linear list
Member;Output layer is respectively Re { y (n) } there are two neuron, output, and Im { y (n) }, activation primitive is identity function, i.e. and f (x)=
x。
The coefficient that neural network in circuit is eliminated in the digital assistant neural network based simulation need by training come
It determines.The label of training data, i.e. (Re { y (n) }, Im { y (n) }) take the sampling output on the road I and the road Q of receives link respectively,
The symbol as neural network input of the label and transmitting terminal forms a training data, and multiple training datas form an instruction
Practice collection, training method can be using such as stochastic gradient descent.When specific implementation, due to the self-interference signal that receives compared with
By force, it is possible to the label data obtained can be caused to have larger distortion beyond the dynamic range of the analog-to-digital conversion module of receives link,
, can be after the analog domain cancellation module of receives link in order to avoid this point, before analog-to-digital conversion module plus one is adjustable
Gain module, and turn down the gain of the adjustable gain module when obtaining label data, guarantee the signal received in modulus
It is the sampled data of receiving end multiplied by adjustable for training the label of data of neural network within the dynamic range of conversion module
The inverse of the gain of gain module.During actual transmissions, 1 is set by the gain of the adjustable gain module always.In addition,
Equipment can be continually updated the coefficient of neural network in transmission process based on pilot signal, have with the channel variation to environment
It is preferably approximate.
Embodiment six
The embodiment of the present application provides alternatively possible implementation, on the basis of example IV or embodiment two,
It further include full-duplex transceiver shown in embodiment six.
The embodiment of the present application six introduces a kind of full-duplex transceiver.The full-duplex transceiver of the embodiment of the present application six is pair
The full-duplex transceiver of above-mentioned the application it is preferred, including simplification, materialization and some additional supplements.Embodiment six and implementation
Example four main difference is that, simulation cancellation module in embodiment six eliminates submodule using pure simulation, no longer comprising digital
Computer aided simulation eliminates submodule.
Optionally, the simulation cancellation module in embodiment six includes that submodule and at least one second level mould are eliminated in level-one simulation
It is quasi- to eliminate submodule.Each second level simulation is eliminated submodule and is sequentially connected in series in the analog submodule route of receiving circuit, and input terminal
All with the analog submodule connection of transmitting circuit, for according to analog transmissions signal, in the self-interference signal after inhibition in addition to
Multipath component except main diameter component carries out simulation elimination.
Figure 13 is that the structural principle of an example of the first embodiment of six full-duplex transceiver of the embodiment of the present application shows
It is intended to.In one example of the first embodiment of embodiment six, it is the level-one mould in Figure 13 that submodule is eliminated in level-one simulation
Quasi- cancellation module;The simulation of at least one second level eliminates submodule and is reduced to one, and mould is eliminated in second level simulation in specially Figure 13
Block;Optionally, second level simulation cancellation module is specially that cancellation module is simulated in the second level of Analog Baseband auxiliary in Figure 13.
Optionally, it includes: at least one variable delay unit, at least one component letter that submodule is eliminated in a second level simulation
Number fitting unit, low-converter, amplifier, first adder and second adder;
The input terminal of each variable delay unit and the analog submodule connection of transmitting circuit, output end is connected to corresponding
One input terminal of component signal fitting unit;
The output end of each component signal fitting unit is connected to each input terminal of second adder;
The output end of second adder is connected to the first adder that submodule is eliminated in the simulation of this second level by amplifier
One input terminal;
Another input terminal of the first adder of submodule is eliminated in the simulation of this second level, is simulated with previous second level and is eliminated son
The output end connection of the adder of submodule is eliminated in the output end of the first adder of module or the simulation of the last one level-one;This
The output end that the first adder of submodule is eliminated in second level simulation is respectively connected to each component signal by low-converter and is fitted list
Another input terminal of member.
Optionally, variable delay unit includes that multi-tap delay can reconcile adjustable gain circuit;
Multi-tap delay can reconcile adjustable gain circuit include: specified quantity the first retardation the first delay line
With the second delay line, delay selection switch and variable gain module of the second retardation;
Each first delay line is sequentially connected in series;
The output end of each first delay line is connected to the input terminal of corresponding second delay line;
Each output end of each first delay line and the second delay line is respectively connected to each of delay selection switch
Input terminal;
Delay selection switch output end be optionally connected with one input terminal, and the output end be connected to it is variable
The input terminal of gain module.Specifically, the present embodiment describes a kind of full duplex device transceiver scheme, it is characterised in that comprising such as
The two-stage of Figure 13 simulates cancellation module, and it is that Analog Baseband auxiliary is eliminated that wherein second level simulation, which is eliminated,.As shown in figure 13, the program
It also may include predistortion module in addition to two-stage simulates cancellation module, passive suppression module, and digital cancellation module.The program uses
Two-stage simulation is eliminated and can separate the elimination of the main diameter component of self-interference signal and the elimination of multipath component, and in Analog Baseband iteration
The fitting coefficient for estimating self-interference signal, reduces the complexity of Joint iteration and reduces iteration time, realizes and quickly eliminates from dry
Disturb the effect of signal;The property of receiver self-interference elimination can further be promoted by increasing other modules on the basis of two-stage is simulated and eliminated
Energy.
The effect of passive suppression module and digital cancellation module and embodiment are identical as example IV, no longer superfluous herein
It states.The effect of predistortion module be by predistortion estimation unit to transmitting link in power amplifier nonlinear component into
The offline estimation of row, and transmitting signal is pre-processed by pre-distortion unit, so that treated, transmitting signal is passing through function
The nonlinear component generated after rate amplifier is greatly reduced.
Two-stage simulation cancellation module feature is that cascade two-stage simulates cancellation module, and wherein two-stage simulates cancellation module packet
Cancellation module is simulated in the Analog Baseband auxiliary second level of level-one simulation cancellation module containing single tap and multi-tap.Specific embodiment party
Formula is that the first order simulates cancellation module and realizes time synchronization using delay cell using single tapped delay line, and by inside it
Control unit obtain optimal weighting coefficients, eliminate the main diameter component of self-interference signal;The second level simulation of Analog Baseband auxiliary
Cancellation module uses two tapped delay lines, the time synchronization of every delay line is realized by delay cell, and by its internal control
Unit processed obtains the optimal fitting coefficient on the delay line by iteration, eliminates the multipath component of self-interference signal.
Specifically, first order simulation cancellation module is variable delay device in two-stage simulation cancellation module, and Analog Baseband is auxiliary
The second level simulation cancellation module helped is Variable delay device.A kind of implementation of Variable delay device is, by multiple fixations
The Delay Element of length is combined into the variable delay unit with a variety of gears.Variable delay value can manually adjust, can also
To be selected by signaling.A kind of specific embodiment can be, and the retardation that the first order simulates cancellation module can be with off-line measurement
It manually adjusts, the retardation of the second level simulation cancellation module of Analog Baseband auxiliary can be selected by signaling.One kind is by believing
Order selects the specific embodiment of Variable delay value for 8 gear variable delay unit in example IV, is by 4 delay line amounts
4TSDelay line and 4 delay line amounts be 2TSShort delay line composition, share 8 gears, corresponding optional retardation is respectively
4TS、6TS、8TS、10TS、12TS、14TS、16TSAnd 18TS, wherein TSFor the sampling interval, postpone indication signaling TDI (Time
Delay Indicator) value it is corresponding with 8 kinds of retardations respectively from 0 to 7.Base station can configure several without scheduling use periodically
The subframe at family is estimated for self-interference channel, and the quantization retardation of the strong diameter of power time and time time strong diameter is selected according to estimated result,
As the signaling TDI for being handed down to PHY (PHYsical, physics) layer, the delay of two delay lines is indicated.With nth data block m
For a delay line (if the method for synchronization of first order simulation cancellation module is to manually adjust, m=1 or 2, if the first order
The method of synchronization for simulating cancellation module is that signaling selects, then m=1,2 or 3), enable the radio frequency of transmitting link power amplifier export
Signal is x(n)(t), it is assumed that the last TDI obtained in the subframe without scheduling user isIt is corresponding to prolong
Amount is τ latem, then the output of the variable delay unit on the m articles delay line isQTD(Quantized
Time Delay, quantization delay).
Component fitting technique, specific embodiment are as follows: mould can be used in the second level simulation cancellation module of Analog Baseband auxiliary
The second level simulation cancellation module of quasi- base band auxiliary is completed to carry out the self-interference signal for eliminating main diameter component in Analog Baseband
Multipath signal is eliminated.It is fitted inside the second level simulation cancellation module of Analog Baseband auxiliary by variable delay unit, component signal
Unit, down-converter unit, adder and low noise amplifier composition.
Variable delay unit realizes the time synchronization of transmitting signal and self-interference signal, transmitting signal after time synchronization and
It receives signal and passes through component signal fitting unit, the fitted signal of the strong diameter of self-interference signal time and time time strong diameter is obtained, by adding
Musical instruments used in a Buddhist or Taoist mass and low noise amplifier are subtracted each other with the self-interference signal for eliminating main diameter component, and the residual signal after elimination is anti-
It is fed to the module, the self-interference signal for next data block is eliminated.
Component fitting technique feature is the weighting coefficient of delay line where iteration goes out it in Analog Baseband domain, is completed to certainly
The fitting of the component signal of corresponding delay amount is input to adder using fitted signal as the output of unit in interference signal
And in receiving end and signal subtraction is received, it completes multipath component and eliminates.
The internal structure of the component signal fitting unit of one example of six first embodiment of the embodiment of the present application is as schemed
Shown in 14, comprising: low-converter, conjugator, iteration step length calculator, the first multiplier, integrator, the second multiplier, weighting
System update device, register, vector modulator;
The input terminal of low-converter and the output end of variable delay unit connect, and output end is connected to the input terminal of conjugator
With an input terminal of iteration step length calculator;
One output end of conjugator is connected to another input terminal of iteration step length calculator;
Two input terminals of the first multiplier are respectively connected to the another output of conjugator, baseband error signal end,
Output end is connected to the first input end of the second multiplier by integrator;
Another input terminal of second multiplier is connect with the output end of iteration step length calculator, and output end passes through weighting system
Number renovator is connected to an input terminal of vector modulator;
Weighting coefficient renovator is connect with register;
Another input terminal of vector modulator and the output end of variable delay unit connect, and output end is as component signal
The output end of fitting unit.
As shown in figure 14, the work of the component signal fitting unit of an example of six first embodiment of the embodiment of the present application
It is as follows to make principle: by taking nth data block is in the calculation process on the m articles delay line as an example, m=1 or 2.Firstly, by variable delay
The output signal of moduleBy low-converter, it is down-converted to Analog Baseband, is denoted as
Secondly, by baseband signalConjugation and current data block baseband error signal e(n)(t) it is multiplied, and passes through
Integrator is crossed, the gradient of error function mean power is obtained, is denoted asIts
Middle * indicates conjugate operation;Then, willAnd its conjugation is input to jointly in iteration step length calculator, is used
To calculate the iteration step length of weighting coefficient.There are two types of the calculation methods of iteration step length, i.e., such as steepest descent method and Newton tangential method.
By taking Newton tangential method as an example, iteration step length can be by rightAnd its product of conjugation is integrated to obtain,
That is iteration step lengthAfter obtaining iteration step length, update is worked as
The weighting coefficient of preceding data block.Remember the serial number n of current data block.A data block deposit register is taken out in register
Weighting coefficientAnd receive the calculated step-length u of second step third step and gradientUpdate the weighting of current data block
CoefficientAnd result will be updated and be stored in register, the weighting of next data block to be updated
It is used when coefficient.Finally, the weighting coefficient of current data block is input in vector modulator, point of self-interference signal is obtained
Measure fitted signal, the output as component fitting module.
The workflow of the full-duplex transceiver of the embodiment of the present application six are as follows: in transmitting terminal, numeric field symbol loses by pre-
True resume module, and analog signal is converted to through D/A converter module, through frequency mixer up-conversion, power is carried out through power amplifier
Amplification, finally radiate in sending port;What receiving port received is after passive suppression module centainly inhibit
The superposed signal of self-interference signal and useful signal, the superposed signal, can be first through first order moulds after band-pass filter
Quasi- unit of eliminating eliminates self-interference signal, then further eliminates self-interference signal, entire mould through second level simulation cancellation module
The signal strength of quasi- cancellation module output can be lower than certain threshold value, with guarantee signal in the dynamic range of numeric field, then,
Residual signal can amplify through low noise amplifier, and through frequency mixer down coversion, low-pass filtered device filtering is converted through analog-to-digital conversion module
For numeric field symbol, then, digital cancellation module can estimate self-interference channel based on known signal, and based on estimation
Channel rebuilds remaining self-interference signal, and the self-interference signal of reconstruction is subtracted in received digital domain signal, most
Afterwards, residual signal can be handled through subsequent numeric field to demodulate useful signal.
Embodiment seven
Based on the same inventive concept, on the basis of any embodiment into embodiment six of embodiment one, the present embodiment is situated between
A kind of distribution method for the uplink and downlink resource in full duplex system (such as full-duplex transceiver or full duplex equipment etc.) of continuing.It needs
Illustrate, in the present embodiment, the resource of full duplex system include in time-domain resource, frequency domain resource and code domain resource at least
It is a kind of.
In full duplex system, the transmission of uplink and downlink data uses identical running time-frequency resource, in example IV and implementation
On the basis of six self-interference removing method of example, different code domain resources can also be used in uplink and downlink.
Optionally, it for each continuous public time/frequency source block of uplink and downlink, is covered up and down using single pair or multipair code word
The public time/frequency source block of row, and code operation is carried out to upstream data and downlink data using similar and different code word.
Optionally, the size of different code words pair is identical or different;
Optionally, the number that single pair code word is reused is identical or different.
Optionally, code operation is carried out to upstream data and downlink data, comprising: upstream data or downlink data specially accord with
Number, in code domain, time domain and/or frequency domain, at least one of following operations: spread spectrum, scrambling are carried out to symbol.
Specifically, one of following manner is included at least to the operation of data in code domain:
1. being spread using spreading code
For a modulated symbol d, the spreading code [s for a use of length being L1, s2..., sL] spread, expand
Symbol after frequency is [s1D, s2D ..., sLD], occupy L resource element (Resource Element, RE).
2. being scrambled using scrambling code
For L modulated symbol [d1, d2..., dL], the scrambling code [c for a use of length being L1, c2..., cL] into
Row scrambling, the symbol after scrambling are [c1d1, c2d2..., CLdL], occupy L RE.
3. being scrambled simultaneously using spreading code spread spectrum and scrambling code
For 1 modulated symbol d, the spreading code [s for a use of length being first L1, s2..., sL] spread,
Reuse the scrambling code [c that a length is L1, c2..., cL] scrambled, the symbol after spreading and scrambling is [c1s1D,
c2s2D ..., cLsLD], occupy L RE.
Above-mentioned code operation can be carried out in time domain, can also be carried out, can also be carried out simultaneously in time domain and frequency domain in frequency domain,
Concrete mode is as follows:
1. carrying out code operation in frequency domain
If modulated 1 or L symbol are d or [d1, d2..., dL], the spreading code that length is L is [s1, s2...,
sL], the scrambling code that length is L is [c1, c2..., cL], in this case, Figure 15 is to carry out the exemplary diagram of code operation in frequency domain,
Three kinds of examples of code operation are carried out in frequency domain when giving L=4 in Figure 15, is respectively corresponded and is only spread (a in Figure 15), only has
Scrambling code (b in Figure 15) and existing spread spectrum have the situation of scrambling code (c in Figure 15) again (one of box represents a RE).
2. carrying out code operation in time domain
If modulated 1 or L symbol are d or [d1, d2..., dL], the spreading code that length is L is [s1, s2...,
sL], the scrambling code that length is L is [c1, c2..., cL], in this case, Figure 16 is to carry out the exemplary diagram of code operation in time domain,
Three kinds of examples of code operation are carried out in time domain when giving L=4 in Figure 16, is respectively corresponded and is only spread (a in Figure 16), only has
Scrambling code (b in Figure 16) and existing spread spectrum have the situation of scrambling code (c in Figure 16) again (one of box represents a RE).
3. carrying out code operation in time domain and frequency domain simultaneously
If modulated 1 or LM symbol are d or [d11, d12..., dLM], the frequency domain spread spectrum code that length is L is [s1,
s2..., sL], the time domain spreading code that length is M is [p1, p2..., PM], the frequency domain scrambling code that length is L is [c1, c2...,
cL], the time domain scrambling code that length is M is [q1, q2..., qL], in this case, Figure 17 is in frequency domain and time domain while to carry out
The exemplary diagram of code operation carries out three kinds of examples of code operation in frequency domain and time domain simultaneously when giving L=M=2 in Figure 17, respectively
Corresponding only spread spectrum (a in Figure 17), only scrambling code (b in Figure 17) and existing spread spectrum have the feelings of scrambling code (c in Figure 17) again
Shape (one of box represents a RE).
It should be noted that (c) middle signal in Figure 17 is the case where frequency domain and time domain do spread spectrum and scrambling code, in fact
Include the case where on border some other possible: frequency domain spread spectrum and scrambling code and time domain spread spectrum, frequency domain spread spectrum and scrambling code and time domain are disturbed
Code, frequency domain spread spectrum and time domain spread spectrum and scrambling code, frequency domain spread spectrum and time domain scrambling code, frequency domain scrambling code and time domain spread spectrum and scrambling code, frequency domain
Scrambling code and time domain spread spectrum.
For some or several modulated symbols, after the operation based on above-mentioned code domain, it is continuous that several will be occupied
Time and frequency resource.In this case, for same running time-frequency resource, it is mutually orthogonal that uplink and downlink distribution can be adopted as
The spreading code of (or quasi- orthogonal), and/or, the mode of different scrambling codes further eliminates self-interference bring in full duplex system
It influences, improving data transmission efficiency and throughput of system.
Specifically, the code domain resource pool that base station can define downlink transfer respectively in advance and uplink uses, and in pairs
Ground configures the code domain resource in two resource pools: big for a certain fixation respectively for the running time-frequency resource of several fixed sizes
Small running time-frequency resource defines several pairs of code domain resources, one of them is assigned to downlink code domain resource pool, another is assigned to uplink
Code domain resource pool, and this is to the spreading code comprising mutually orthogonal (or quasi- orthogonal) in code domain resource, and/or, different scrambling codes.
In the subsequent example figure of the present embodiment, one piece of F subcarrier of occupancy or PRB, the running time-frequency resource of T symbol are defined
The size of block is F × T.It is spread when passing through, and/or, when the running time-frequency resource block size that the symbol after code-scrambling operation occupies is F × T,
The size of this yard is also defined as F × T.
Figure 18 is the exemplary diagram of downlink code domain resource pool and uplink code domain resource pool;Figure 18 gives downlink predetermined
One example of code domain resource pool and uplink code domain resource pool.In Figure 18, downlink code domain resource pool and uplink code domain resource pool
Different codes is made of a+b+c, wherein comprising a to 4 × 1 code, b to 1 × 4 code and c to 2 × 2 code, and any of them
A pair of of code is the spreading code of mutually orthogonal (or quasi- orthogonal), and/or, different scrambling codes.Downlink code domain resource pool and uplink code domain
Resource pool can be locally stored in base station and UE in advance.
A kind of interaction side of the full-duplex transceiver based on the application and above-described embodiment is provided in the embodiment of the present application
The flow diagram of method, this method is as shown in figure 19, includes the following steps S1901-S1903:
S1901: running time-frequency resource and different code domain resources are distributed for the upstream data and downlink data of each terminal device.
The running time-frequency resource that base station can be distributed for the upstream data of each terminal device, with the time-frequency distributed for downlink data
Resource, can completely overlapped (i.e. same running time-frequency resource), partly overlap or be not overlapped completely.
Optionally, base station is that the upstream data of each terminal device and downlink data distribute same running time-frequency resource.
In the embodiment of the present application, code domain resource can be orthogonal resource or non orthogonal resources.
Optionally, same running time-frequency resource includes at least one continuous public time/frequency source block of uplink and downlink, for each company
The public time/frequency source block of continuous uplink and downlink covers the public time/frequency source block of uplink and downlink using single pair or multipair code word, and using not
Same or identical code word carries out code operation to upstream data and downlink data.Code operation and the embodiment of the present application seven in this step
In code above-mentioned operation it is consistent, repeat no more.
Optionally, the size of different code words pair is identical or different;
Optionally, the number that single pair code word is reused is identical or different.
Terminal device includes UE (User Equipment, user equipment).
1. base station is user equipment allocation of downlink running time-frequency resource and uplink time/frequency source, and determines transmission other information (example
The Downlink Control Information that is transmitted in such as PDCCH, synchronization signal, the broadcast message in PBCH) down time-frequency resource.PDCCH
(Physical Downlink Control CHannel, Physical Downlink Control Channel), PBCH (Physical Broadcast
Channel, Physical Broadcast Channel).
2. base station is respectively downlink transfer and uplink distribution code domain resource.The method of salary distribution is as follows: if certain block time-frequency provides
Source is allocated to downlink transfer and uplink (public running time-frequency resource) simultaneously, then in downlink code domain resource pool and uplink code domain
The code of identical quantity in correspondence with each other is chosen in resource pool respectively, and is respectively allocated to downlink transfer and uplink.
S1902: the uplink and downlink running time-frequency resource of distribution and uplink and downlink code domain resource are issued to terminal device.
Optionally, base station issues the same running time-frequency resource of the uplink and downlink of distribution and uplink and downlink code domain resource to terminal device.
3. the uplink and downlink running time-frequency resource of distribution and code domain resource are sent to UE by base station.
S1903: downlink data is sent to terminal device according to down time-frequency resource and downlink code domain resource, and receives end
The upstream data that end equipment is sent based on uplink time/frequency source and uplink code domain resource.
Optionally, base station sends downlink data to terminal device according to same running time-frequency resource and downlink code domain resource, and
The upstream data that receiving terminal apparatus is sent based on same running time-frequency resource and uplink code domain resource.
4. base station carries out downlink data transmission and receives the transmitting uplink data of UE.It is carried out down when using public running time-frequency resource
When row transmission, downlink transfer is carried out using the code chosen in downlink code domain resource pool;On using the reception of public running time-frequency resource
When row transmission, uplink detection is carried out using the code chosen in uplink code domain resource pool.If in certain block running time-frequency resource quilt
Be allocated to downlink data transmission or uplink (the non-public running time-frequency resource of uplink and downlink), then it can be in downlink or uplink resource pool
Middle several codes of selection, and downlink transfer or uplink detection are carried out using the code chosen, it can also be operated without any yard, directly
Tap into row downlink transfer or uplink detection.
It should be noted that the downlink data transmission in above-mentioned steps S1903 can be later than step S1902 progress, it can also
To be carried out earlier than step S1902, can also be carried out simultaneously with step S1902.It should also be noted that, the code domain money that base station is sent
Source instruction can be (such as the specific instruction spreading code, and/or, scrambling code) of display, be also possible to implicit (such as instruction code domain
Index of the resource in downlink code domain resource pool or uplink code domain resource pool).
The another kind interaction of the full-duplex transceiver based on the application and above-described embodiment is provided in the embodiment of the present application
The flow diagram of method, this method is as shown in figure 20, includes the following steps S2001-S2002:
S2001: uplink and downlink running time-frequency resource and uplink and downlink code domain resource that base station is distributed and issued are received.
Optionally, terminal device reception base station is distributed and the uplink time/frequency source and down time-frequency resource issued is same money
Source.
1. terminal device, such as UE receive the uplink and downlink running time-frequency resource and code domain resource of the above-mentioned distribution that base station is sent.
S2002: the downlink data that base station issues is received according to down time-frequency resource and downlink code domain resource, and according to upper
The upstream data that row running time-frequency resource and uplink code domain resource are sent to base station.
Optionally, terminal device receives the downlink data that base station issues according to same running time-frequency resource and downlink code domain resource,
And the upstream data sent according to same running time-frequency resource and uplink code domain resource to base station.
2. carrying out downlink transfer detection based on the downlink code domain resource received, and based on the uplink code domain resource received
Carry out uplink.
In addition, if UE can also choose several code words in uplink code domain resource pool based on the transmission for exempting from scheduling, and
Upstream data is transmitted in the running time-frequency resource for exempting from scheduling with the code word of selection.In this case, base station can be in the time-frequency for exempting from scheduling
Blind Detecting is carried out based on uplink transmission data of the code word in uplink code domain resource pool to UE in resource.
As before, the running time-frequency resource public for uplink and downlink, it can be based on the code domain resource in code domain resource pool respectively to uplink
Code operation is carried out with downlink, reuses traditional CP-OFDM (Cyclic Prefix Orthogonal Frequency
Division Multiplexing, cyclic prefix orthogonal frequency division multiplexing) or DFT-S-OFDM (Discrete Fourier
Transform-Spread-Orthogonal Frequency Division Multiplexing, discrete fourier are spread just
Hand over frequency division multiplexing) mode transmitted;For the exclusive running time-frequency resource of upstream or downstream, traditional CP-OFDM can be used directly
Or DFT-S-OFDM mode is transmitted.Figure 21 is the exemplary diagram of different type running time-frequency resource code operation and modulation system;Figure 21
Give an example of this transmission mode.
Optionally, it for each continuous public time/frequency source block of uplink and downlink, is covered up and down using single pair or multipair code word
The public time/frequency source block of row, and code operation is carried out to upstream data and downlink data using similar and different code word.
Specifically, in above-mentioned steps, for the specific running time-frequency resource of one piece of public time/frequency source block of continuous uplink and downlink
Distribution with code domain resource may include following several different situations.
1. covering one piece of public time/frequency source block of continuous uplink and downlink using single pair code word, code word is not reused
For one piece of public time/frequency source block of continuous uplink and downlink, the code word of the sizes such as a pair of and this time/frequency source block is used
It is covered.Figure 22 is the exemplary diagram of uplink and downlink code word covering in this case.Figure 22 is in a kind of covering of uplink and downlink code word
The exemplary diagram of the public time/frequency source block of downlink.In Figure 22, for the public running time-frequency resource of the continuous uplink and downlink of same, downlink is passed
Defeated to carry out code operation using code word D1, uplink carries out code operation using code word U1.
2. covering one piece of public time/frequency source block of continuous uplink and downlink using single pair code word, code word is reusable
For one piece of public time/frequency source block of continuous uplink and downlink, when the code word of selection is smaller than this time/frequency source block,
This public running time-frequency resource of block uplink and downlink can be covered by way of reusing with a pair of of code word.Figure 23 is one kind or more
The exemplary diagram of the row code word covering public time/frequency source block of uplink and downlink.Figure 23 is the example of uplink and downlink code word covering in this case
Figure.In Figure 23, one piece of public running time-frequency resource of continuous uplink and downlink has been divided into 3 parts, for each part, downlink transfer
Code operation is carried out using code word D1, uplink uses code word U1 to carry out code operation.
3. covering one piece of public time/frequency source block of continuous uplink and downlink using multipair code word, code word is not reused
For one piece of public time/frequency source block of continuous uplink and downlink, when the code word of selection is smaller than this time/frequency source block,
This public running time-frequency resource of block uplink and downlink can be covered by using the mode of multipair code word.Figure 24 is in this case upper
The exemplary diagram of downlink code word covering.Figure 24 is a kind of exemplary diagram of uplink and downlink code word covering public time/frequency source block of uplink and downlink.In
In Figure 24, one piece of public running time-frequency resource of continuous uplink and downlink has been divided into 3 parts: being directed to first part's time/frequency source block, downlink
Transmission carries out code operation using code word D1, and uplink carries out code operation using code word U1;For second part time/frequency source block,
Downlink transfer carries out code operation using code word D2, and uplink carries out code operation using code word U2;It is provided for Part III time-frequency
Source block, downlink transfer carry out code operation using code word D3, and uplink carries out code operation using code word U3.
It should be noted that the size of above-mentioned difference code word pair may be the same or different.
4. covering one piece of public time/frequency source block of continuous uplink and downlink using multipair code word, code word is reusable
For one piece of public time/frequency source block of continuous uplink and downlink, when the code word of selection is smaller than this time/frequency source block,
This public running time-frequency resource of block uplink and downlink can be covered by using the mode of multipair code word and reuse single codeword.Figure
25 exemplary diagrams covered for uplink and downlink code word in this case.Figure 25 is a kind of uplink and downlink code word covering public time-frequency of uplink and downlink
The exemplary diagram of resource block.In Figure 25, one piece of public running time-frequency resource of continuous uplink and downlink has been divided into 4 parts: being directed to first
Point and second part time/frequency source block, downlink transfer use code word D1 carry out code operation, uplink use code word U1 into
The operation of row code;For Part III and Part IV time/frequency source block, downlink transfer uses code word D2 to carry out code operation, uplink
Transmission carries out code operation using code word U2.
It should be noted that the size of above-mentioned difference code word pair may be the same or different;Single pair code word is reused
Number may be the same or different.
It should also be noted that, the method for salary distribution of above-mentioned several running time-frequency resources and code domain resource, it can be with single use, it can also
To be used in conjunction with.For each individual continuous time/frequency source block, above-mentioned running time-frequency resource and code domain resource can be used
The method of salary distribution in any one.
Uplink and downlink time-frequency resource allocating described in this embodiment and code domain resource allocation methods, acceptable and NoMA
(Non-orthogonal Multiple Access, non-orthogonal multiple) technology combine, the handling capacity of further lifting system and
Efficiency of transmission.
Optionally, in the exchange method based on full-duplex transceiver of the embodiment of the present application, when for non-orthogonal multiple user
When distributing ascending resource or downlink resource, also execute at least one of following:
Scheduling does not distribute using different uplink code words and multiple access signature in the non-orthogonal multiple user of same running time-frequency resource;
Scheduling using different uplink code words and distributes different multiple access in the non-orthogonal multiple user of same running time-frequency resource
Signature;
Scheduling using identical uplink code word and distributes different multiple access in the non-orthogonal multiple user of same running time-frequency resource
Signature.
Specifically, when for user (user is the abbreviation of user equipment, and the user of other positions is similarly) distribute ascending resource
When, multiple users can be assigned on same running time-frequency resource, can also be different users on the basis of distributing code domain resource
MA Signature (Multiple Access Signature, multiple access signature) is further distributed, reaches and distinguishes different user
Purpose.Broadly, different NoMA users multiple access signature may include different bit-level scrambled codes, different symbol level scrambled codes,
Different symbol level spreading code, different signal constellation and mappings, different resource maps, different bit-levels interweave, are different
At least one of symbol level intertexture.It, then can will be different it should be noted that if distribute different uplink code words for different user
Uplink, and/or, downlink code word distinguishes user as different multiple access signatures, can also divide again on the basis of distribution codeword
User is distinguished with different other multiple access signatures.For convenience of description, in the present embodiment subsequent descriptions, multiple access is signed not
Include code word.
For one piece of public time/frequency source block of continuous uplink and downlink or one piece of public time/frequency source block of continuous uplink and downlink
Certain a part, specific running time-frequency resource, code domain resource and multiple access signature distribution may include following several different situations.
1. scheduling does not distribute using different uplink code words and multiple access signature in the NoMA user of same running time-frequency resource
For one piece of public time/frequency source block of continuous uplink and downlink, if the ascending resource of multiple users is assigned the block simultaneously
In resource, different uplink code words can be distributed for these users.Figure 26 is the example of uplink and downlink code word covering in this case
Figure.Figure 26 is a kind of exemplary diagram of uplink and downlink code word covering public time/frequency source block of uplink and downlink.In Figure 26,3 UE are assigned
The public running time-frequency resource of same is used for uplink, and downlink transfer carries out code operation using code word D1, and UE1, UE2, UE3's is upper
Row transmission is operated using code word U1, code word U2, code word U3 respectively.
2. scheduling using different uplink code words and distributes different multiple access signatures in the NoMA user of same running time-frequency resource
For one piece of public time/frequency source block of continuous uplink and downlink, if the ascending resource of multiple users is assigned the block simultaneously
In resource, different uplink code words and different multiple access signatures can be distributed for these users.Figure 27 be in this case up and down
The exemplary diagram of row code word covering.Figure 27 is the exemplary diagram of another uplink and downlink code word covering public time/frequency source block of uplink and downlink.In
In Figure 27, the public running time-frequency resource of same is assigned for uplink in 3 UE, and downlink transfer carries out code behaviour using code word D1
Make, the uplink of UE1, UE2, UE3 use code word U1 and multiple access signature M1, code word U2 and multiple access signature M2, code word U3 respectively
It is operated with multiple access signature M3.
3. scheduling using identical uplink code word and distributes different multiple access signatures in the NoMA user of same running time-frequency resource
For one piece of public time/frequency source block of continuous uplink and downlink, if the ascending resource of multiple users is assigned the block simultaneously
In resource, identical uplink code word can be distributed for these users but distributes different multiple access signatures.Figure 28 is in this case
The exemplary diagram of uplink and downlink code word covering.Figure 28 is the example of another uplink and downlink code word covering public time/frequency source block of uplink and downlink
Figure.In Figure 28, the public running time-frequency resource of same is assigned for uplink in 3 UE, downlink transfer using code word D1 into
The operation of row code, the uplink of UE1, UE2, UE3 use respectively code word U1 and multiple access sign M1, code word U1 and multiple access signature M2,
Code word U1 and multiple access signature M3 are operated.
Similarly, when for user's allocation of downlink resource, multiple users can be assigned on same running time-frequency resource, is being divided
On the basis of code domain resource, multiple access signature can also be further distributed for different users, achieve the purpose that distinguish different user.
For a certain portion of one piece of public time/frequency source block of continuous uplink and downlink or one piece of public time/frequency source block of continuous uplink and downlink
Point, the distribution of specific running time-frequency resource, code domain resource and multiple access signature may include following several different situations:
1. scheduling does not distribute using different downlink code words and multiple access signature in the NoMA user of same running time-frequency resource
2. scheduling using different lower code words and distributes different multiple access signatures in the NoMA user of same running time-frequency resource
3. scheduling using identical downlink code word and distributes different multiple access signatures in the NoMA user of same running time-frequency resource
It should also be noted that, multiple users can be assigned to same uplink and downlink in uplink and downlink simultaneously public for base station
On running time-frequency resource.For one piece of public time/frequency source block of continuous uplink and downlink or one piece of continuous public time-frequency money of uplink and downlink
Certain a part of source block, the distribution of specific running time-frequency resource, code domain resource and multiple access signature may include following several different situations:
1. dispatch same running time-frequency resource NoMA user using different uplink code words, different downlink code words and regardless of
It signs with multiple access
2. the NoMA user dispatched in same running time-frequency resource uses different uplink code words, different downlink code words and distribution
Different multiple access signatures
3. the NoMA user dispatched in same running time-frequency resource uses different uplink code words, identical downlink code word and distribution
Different multiple access signatures
4. the NoMA user dispatched in same running time-frequency resource uses identical uplink code word, different downlink code words and distribution
Different multiple access signatures
5. the NoMA user dispatched in same running time-frequency resource uses identical uplink code word, identical downlink code word and distribution
Different multiple access signatures
On the basis of the self-interference removing method that example IV and embodiment six provide, this implementation can be added in numeric field
Resource allocation methods in example seven are different time-frequency resource allocating code domain resources, and are carried out to transmitting terminal digital signal corresponding
Code operation, further eliminating self-interference bring influences, lifting system handling capacity and efficiency of transmission.
Embodiment eight
The embodiment of the present application provides alternatively possible implementation, embodiment one into embodiment six any one
It further include full-duplex transceiver shown in embodiment eight on the basis of embodiment.
Multiple antennas full-duplex transceiver is provided in the embodiment of the present application eight.It include at least in multiple antennas full-duplex transceiver
One transmitting circuit and at least two receiving circuits or at least two transmitting circuits and at least one receiving circuit.Each hair
Ray road corresponds to an antenna, the corresponding antenna of each receiving circuit.
Optionally, for any two pairs of transmitting circuits and receiving circuit, the passive suppression of a pair of of transmitting circuit and receiving circuit
Molding block, simulation cancellation module or digital cancellation module, with another pair transmitting circuit and the passive suppression module of receiving circuit, mould
Quasi- cancellation module or digital cancellation module are identical or different.
Based on the same inventive concept, the embodiment of the present application provides a kind of electronic equipment, comprising: the application and each embodiment
Full-duplex transceiver.
Optionally, the electronic equipment of the embodiment of the present application is terminal device or base station.Terminal device includes user equipment.
Optionally, the digital cancellation module of the full-duplex transceiver of the embodiment of the present application further include: digital beam excipient list
Member.
Full-duplex transceiver further include: the pre- cancellation module of number;The pre- cancellation module of number includes that the MAC layer processing of connection is single
Member and transmitter baseband signal processing unit;MAC layer processing unit includes spreading code/scrambling code distribution subelement;Transmitter base band
Signal processing unit includes spread spectrum/scrambling subelement and launching beam excipient subelement.
One input terminal of channel estimating unit is connected to transmitter base band signal process by digital beam excipient unit
Unit.
Specifically, it is the purpose for realizing the application, illustrates that the receiver of multiple antennas full duplex equipment and transmitter join below
It closes design scheme (hereinafter referred to as transceiver scheme).Scheme is applicable to base station or the terminal of multiple antennas full duplex.
For configuring the base station of Nr receiving antenna port and Nt transmit antenna port, Nr and Nt are greater than zero
Natural number, Figure 29 are the structural schematic diagrams of an example of multiple antennas full-duplex transceiver, and Figure 29 provides multiple antennas full duplex receipts
Hair machine structural schematic diagram.It is similar with scheme in embodiment two to five, mainly comprising receiving end simulation cancellation module, receiving end number
Cancellation module and the pre- cancellation module of transmitting terminal number.The passive suppression technology into embodiment six of embodiment two, pre-equalization techniques, in advance
Anti-aliasing techniques are equally applicable to the group of any pair transmit antenna port and receiving antenna port of the present embodiment multiaerial system
It closes, embodiment is identical to embodiment six as embodiment two, and details are not described herein again.
Simulate cancellation module in receiving end
The analog submodule route of receiving circuit is specially analog domain, and the analog submodule route of transmitting circuit is specially analog domain.
The function of the module is identical to embodiment six as embodiment two, is in analog domain, i.e. receiving end low noise amplification
Before device, the self-interference signal of transmit antenna port to the receiving antenna port of same equipment is deleted.Multiaerial system
Receiving end simulation cancellation module in simulation eliminate unit effect it is similar to embodiment six with embodiment two, for each of reconstruction
Analog domain interference signal suffered by receiving antenna port, receiving end is in analog domain by the analog domain interference signal of reconstruction from each
It is deleted in the signal of receiving antenna port.The effect and implementation of control unit in the receiving end simulation cancellation module of multiaerial system
Example two is eliminated unit to similar with embodiment six, to control simulation according to feedback signal and is rebuild suffered by each receiving antenna port
Analog domain interference signal filter coefficient generating process, such as embodiment two in embodiment six simulation eliminate parameter change
For process.It is different transmit antenna ports that multiaerial system receiving end, which simulates simulation in cancellation module and eliminates the input signal of unit,
Analog signal or digital signal, input source Class1 or input Source Type 2 in respectively Figure 29;Multiaerial system receiving end
The feedback signal of control unit in cancellation module is simulated as the analog signal after the elimination operation of different receiving antenna port analogs
Or digital signal, feedback kind 1 or feedback kind 2 in respectively Figure 29.
Specifically, the realization of receiving end simulation cancellation module can be in multiple antennas full-duplex transceiver scheme, multiple antennas
The combination of any list receiving antenna port and single transmit antenna port, is used independently embodiment two into embodiment six in equipment
Simulation cancellation scheme.A kind of specific embodiment is that different receiving antenna ports is combined with transmit antenna port to be made
Can be different with simulation cancellation scheme, for example, according to transmitting antenna in different transmit antenna ports and receiving antenna port combination
Port selects different simulation cancellation schemes to receiving antenna port self-interference size.One example is, bipolar for being configured with
Change the full duplex equipment of uniform planar array antenna, i.e. uniform planar array is made of dual-polarized bay, dual polarization day
Linear array two polarization direction differences of member, can be used as emission port and receiving port respectively, reduce transmit antenna port docking with this
Receive the interference of antenna port.It, will be by from another polarization side of same array element for a receiving antenna port
To interference and other bays interference.Compared with the interfering energy of other bays, same another polarization of array element
The interfering energy in direction is bigger, and the transmit antenna port and receiving antenna port combination for being consequently belonging to same antenna array element can be used
Self-interference eliminates that performance is more preferable but the higher simulation cancellation scheme of complexity, such as the scheme in example IV;And belong to not on the same day
The transmit antenna port of linear array member is weaker with the usable self-interference elimination performance of receiving antenna port combination but complexity is lower
Cancellation scheme is simulated, such as the scheme in embodiment six.
In addition, simulation cancellation module is connected to different transmit antenna ports and same reception day in the embodiment of the present application
Between line end mouth, the self-interference signal from different transmit antenna ports for being received according to the receiving antenna port it is strong
It is weak, string sequence is carried out to the self-interference signal for being originated from different transmit antenna ports and is eliminated.
Further, in different transmit antenna ports, the transmit antenna port of first part and same receiving antenna port
It is arranged in same antenna array element;Other transmit antenna ports other than first part are arranged in other bays;
First part's transmit antenna port in same antenna array element is different from the polarization direction of receiving antenna port;Simulation is eliminated
Module is originated from the self-interference signal of the transmit antenna port of first part for first eliminating, and rear eliminate is originated from other transmitting antenna ends
The self-interference signal of mouth.
Optionally, input terminal and multiple transmit antenna ports company that unit is eliminated in the second level simulation in cancellation module are simulated
It connects, for receiving the superposed signal for being originated from the self-interference signal of multiple transmit antenna ports.
Specifically, the realization of receiving end simulation cancellation module can also be that string sequence disappears in multiple antennas full-duplex transceiver scheme
Except mode, i.e., difference according to the interference size of different transmit antenna ports to same receiving antenna port, first eliminate interference compared with
It is big, then to eliminate interference lesser.Since interference signal is to believe from different transmit antenna port aliasings at receiving antenna port
Number, successively eliminate the interference signal that different transmit antenna ports arrive same receiving antenna port according to interference size, it is avoidable by
In larger interference signal, there are caused lower interference signal elimination performance is undesirable.Specifically, string sequence removing method can be
First eliminate strong jamming transmit antenna port arrive intended recipient antenna port interference signal linear component, then eliminate weak jamming emit
Antenna port then eliminates strong jamming transmit antenna port to target to the linear component of intended recipient antenna port interference signal
The nonlinear component of receiving antenna port interference signal finally eliminates weak jamming transmit antenna port to intended recipient antenna port
The nonlinear component of interference signal;Or, first eliminating strong jamming transmit antenna port to intended recipient antenna port interference signal
Linear component, then eliminate strong jamming transmit antenna port to intended recipient antenna port interference signal nonlinear component, then
Weak jamming transmit antenna port is eliminated to the linear component of intended recipient antenna port interference signal, finally eliminates weak jamming transmitting
Nonlinear component of the antenna port to intended recipient antenna port interference signal.Particularly, when there are certain transmitting days in equipment
When line end mouth is extremely weak to target antenna port interference signal intensity, receiving end simulate cancellation module can not to these interference signals into
Row is eliminated, such as there are physically-isolated transmitting antennas with receiving antenna.Particularly, several steps of specific string sequence removing method
In, certain steps can constitute new string sequence removing method from lacking, and first eliminate by force for example, a kind of string sequence removing method can be
It interferes transmit antenna port to the linear component of intended recipient antenna port interference signal, finally eliminates weak jamming transmitting antenna end
Mouth arrives the linear component of intended recipient antenna port interference signal, sends out in simulation cancellation module without strong jamming and weak jamming
The nonlinear component for penetrating antenna port to intended recipient antenna port is eliminated.Another kind string sequence removing method, which can be, first to be eliminated by force
It interferes transmit antenna port to the linear component of intended recipient antenna port interference signal, finally eliminates strong jamming transmitting antenna end
Mouth arrives the nonlinear component of intended recipient antenna port interference signal, without weak jamming transmitting antenna in simulation cancellation module
Elimination of the port to intended recipient antenna port interference signal.Particularly, transmit antenna port is interfered to receiving antenna port and is believed
Number size can the aerial array position according to belonging to transmit antenna port and receiving antenna port determine, for example, for being configured with
The full duplex equipment of dual polarization uniform planar array antenna, when two polarization directions of same antenna array element are used separately as transmitting day
Line end mouth and receiving antenna port belong to the transmit antenna port of same antenna array element with receiving antenna port for strong jamming transmitting
Otherwise antenna port is then weak jamming transmit antenna port.
Figure 30 is the instance graph of receiving end simulation cancellation module string sequence removing method.Figure 30 provides receiving end simulation and eliminates mould
One example of block string sequence removing method.If intended recipient antenna port be receiving antenna port 1, receiving antenna port 1 it is strong
Interference transmit antenna port is transmit antenna port 1, and the weak jamming transmit antenna port of receiving antenna port 1 is transmitting antenna end
2 to transmit antenna port n (n >=2) of mouth, remaining transmit antenna port are the extremely weak antenna port of receiving antenna port 1.The example
Middle receiving end simulation cancellation module eliminates the interference signal not generated to extremely weak transmit antenna port.Level-one mould in Figure 30
The quasi- interference signal line for eliminating unit and level-one control unit for eliminating strong jamming transmitting antenna to intended recipient antenna port
Property component, the implementation method that wherein unit and level-one control unit are eliminated in level-one simulation can be with embodiment two into embodiment six
Correlation module simulates level-one and/or second level simulation cancellation module in technology for eliminating or Figure 13 as shown in Figure 5.Complete level-one simulation
After eliminating operation, the reception signal after eliminating interference eliminates unit by second level simulation and carries out further interference signal elimination,
It is to eliminate weak jamming transmit antenna port to receiving antenna port that unit and the effect of Two-stage control unit are eliminated in second level simulation
Interference signal linear component, wherein unit is eliminated in second level simulation and the implementation method of Two-stage control unit can be the same as embodiment two to reality
The correlation module in example six is applied, simulates level-one and/or second level simulation cancellation module in technology for eliminating or Figure 13 as shown in Figure 5.Two
The input signal that unit is eliminated in grade simulation can be the superposed signal of multiple transmit antenna port transmitting signals.Complete second level simulation
After eliminating operation, the reception signal after eliminating interference eliminates unit by three-level simulation and carries out the elimination of next step interference signal,
It is to eliminate strong jamming transmit antenna port to receiving antenna port that unit and the effect of three class control unit are eliminated in three-level simulation
The tool that three ranks in unit eliminate unit and three class control unit to P order component is eliminated in interference signal nonlinear component, three-level simulation
Body implementation method can be with method described in example IV, and wherein three class control unit feedback kind can be receiving end simulation letter
Number or digital signal, respectively correspond feedback kind 1 and feedback kind 2 in Figure 30.After completing three-level simulation elimination operation, eliminate
Reception signal after interference is simulated by level Four eliminates unit progress final step analog domain interference signal elimination, and level Four simulation disappears
Except the interference signal that the effect of unit and level Four control unit is elimination weak jamming transmit antenna port to receiving antenna port is non-
The concrete methods of realizing that three ranks in unit eliminate unit and level Four control unit to P order component is eliminated in linear component, level Four simulation
Can be with method described in example IV, wherein level Four control unit feedback kind can be receiving end analog signal or number letter
Number, respectively correspond feedback kind 1 and feedback kind 2 in Figure 30.The input signal that unit is eliminated in level Four simulation can be multiple hairs
Penetrate the superposed signal of antenna port transmitting signal.
Receiving end number cancellation module
The digital sub-line road of receiving circuit is specially numeric field, and the digital sub-line road of transmitting circuit is specially numeric field.
The function of receiving end number cancellation module describes identical with embodiment two to embodiment six, is in numeric field, i.e.,
After the analog-to-digital conversion module of receiving end, disappear to the self-interference signal of transmit antenna port to the receiving antenna port of same equipment
It removes, same equipment is same base station or same terminal.
Figure 29 provides the structural block diagram of receiving end number cancellation module by taking base station as an example.The receiving end number of multiaerial system
The partial action of channel estimating unit is identical into embodiment six as example IV in cancellation module, same required to estimate first
In multiple antennas full duplex equipment each transmit antenna port to each receiving antenna port self-interference channel, wherein more days
Line full duplex equipment can be full duplex base station or full-duplex terminal.With example IV to embodiment six the difference is that, when
When multiple antennas full duplex equipment is full duplex base station, the channel estimating unit eliminated in digital cancellation module for number is also possible to
Further include terminal transmission antenna port to base station receiving antenna port uplink channel estimation;When multiple antennas full duplex equipment
When for full-duplex terminal, the channel estimating unit eliminated in digital cancellation module for number is also possible to further include base station hair
The down channel for penetrating antenna port to terminal receiving antenna port is estimated.Particularly, the channel estimating unit eliminated for number
Uplink channel estimation or the down channel estimation for including can be used for digital beam excipient unit.
The effect of digital beam excipient is same as the prior art in the receiving end number cancellation module of multiaerial system, for meter
Transmitting terminal launching beam excipient vector is calculated, and/or calculates receiving end and receives beam shaping vector.Note emits complex modulation signal
S, it is t=G that signal is emitted after transmitting terminal launching beam excipienttxS, wherein GtxFor launching beam excipient vector, t is hair
Signal vector is penetrated, dimension is that transmitting antenna number multiplies 1.Note received signal vector is r, and dimension is that transmitting antenna number multiplies 1, then receives
The transmitting signal that signal vector is estimated after receiving beam shaping, can be denoted asWherein GrxFor received wave
Beam excipient vector (or balanced vector), dimension are that transmitting antenna number multiplies 1,For the transmitting signal of estimation, identical as s is multiple
Number.Launching beam excipient more bibliography visible with the calculation method of beam shaping is received, except conventional according to terminal and base
Propagation channel calculates outside beam shaping vector between standing, and such as document, can be emitted by rationally designing for multiple antennas full duplex system
Self-interference signal energy, the generating criteria of this beam shaping vector can be effectively reduced in receiving end with beam shaping vector is received
Can be makes self-interference signal minimum, or makes to remain self-interference signal and the mean square error minimum of noise etc..
Number eliminates unit effect as the self-interference of calculating receiving end in the receiving end number cancellation module of multiaerial system
Signal, and subtract self-interference signal from receiving in signal.Specifically, calculate receiving end self-interference signal can according to estimation from
Interference channel, or the self-interference channel and digital beam excipient vector of estimation are realized.It is arrived for example, setting estimated multi-emitting antenna
The self-interference channel matrix of the same more receiving antennas of equipment is denoted as H, and dimension is that receiving antenna number multiplies transmitting antenna number.Transmitting terminal is same
The emission signal vector at one moment is denoted as t, and dimension is that transmitting antenna number multiplies 1.Then, it is calculated and is received according to the self-interference channel of estimation
The self-interference signal at end, and from the process for self-interference signal being subtracted in signal is received can be r-Ht, wherein r is to receive
Signal column vector, dimension are that receiving antenna number multiplies 1.When there are transmitting terminal digital beam excipients, and no matter transmitting terminal digital beam
Whether excipient is used for self-interference signal elimination, and the emission signal vector of transmitting terminal synchronization is written as t=GtxS, then at this time
Number eliminates unit and need to calculate self-interference signal according to the self-interference channel and digital beam excipient vector of estimation and believe from receiving
Self-interference signal is subtracted in number.The process is further written as r-HGtxS, wherein GtxFor transmitting terminal digital beam excipient to
Amount, dimension are the complex signal that transmitting antenna number multiplies that 1, s is transmitting, are a plural number.
The pre- cancellation module of transmitting terminal number
The function of the pre- cancellation module of transmitting terminal number is by the processing to transmitting signal, and realization reduces or eliminates self-interference
Purpose.Following one is included at least to the processing of transmitting signal, is spread in embodiment seven or signal scrambling technique, transmitting terminal wave beam is assigned
Type technology.
When multiple antennas full duplex equipment is base station, such as Figure 29 obtains spreading code/scrambling code of distribution from the MAC layer of base station,
Spread spectrum/scrambling for transmitting signals.When multiple antennas full duplex equipment is terminal, the spread spectrum of distribution is obtained according to base station signaling
Code/scrambling code, spread spectrum/scrambling for transmitting signals.Spread spectrum is shown in embodiment seven with scrambled specific embodiment.
Corresponding spread spectrum/scrambling subelement, receiving end signal is after passing through digital cancellation module, before the operation such as demodulation coding
It should also increase and despread and descramble subelement, the visible embodiment seven of the operation, details are not described herein again.
Embodiment nine
Based on the same inventive concept, the embodiment of the present application provides a kind of interactive device based on the application full-duplex transceiver
31, the structural schematic diagram of the interactive device is as shown in figure 31, comprising: resource allocation unit 3101 and data transceiving unit 3102.
Resource allocation unit 3101 be used for for each terminal device upstream data and downlink data distribute running time-frequency resource and
Different code domain resources, code domain resource are orthogonal resource or non orthogonal resources.
Data transceiving unit 3102 issues the uplink and downlink running time-frequency resource of distribution and uplink and downlink code domain resource to terminal device;
And downlink data is sent to terminal device according to down time-frequency resource and downlink code domain resource, and receiving terminal apparatus is based on
The upstream data that uplink time/frequency source and uplink code domain resource are sent.
Optionally, resource allocation unit 3101 is specifically used for distributing same running time-frequency resource for upstream data and downlink data;
Same running time-frequency resource includes at least one continuous public time/frequency source block of uplink and downlink, when public for each continuous uplink and downlink
Frequency resource block covers the public time/frequency source block of uplink and downlink using single pair or multipair code word, and uses similar and different code word pair
Upstream data and downlink data carry out code operation;And/or the size of different code words pair is identical or different;And/or single pair code word
The number of reuse is identical or different.
Optionally, it is specially symbol that resource allocation unit 3101, which is specifically used for upstream data or downlink data, code domain, when
In domain and/or frequency domain, at least one of following operations: spread spectrum, scrambling are carried out to symbol.
Optionally, resource allocation unit 3101, which is also used to work as, distributes ascending resource or downlink resource for non-orthogonal multiple user
When, it executes at least one of following:
Scheduling does not distribute using different uplink code words and multiple access signature in the non-orthogonal multiple user of same running time-frequency resource;
Scheduling using different uplink code words and distributes different multiple access in the non-orthogonal multiple user of same running time-frequency resource
Signature;
Scheduling using identical uplink code word and distributes different multiple access in the non-orthogonal multiple user of same running time-frequency resource
Signature.
Based on the same inventive concept, the embodiment of the present application provides another interaction dress based on the application full-duplex transceiver
32 are set, the structural schematic diagram of the interactive device is as shown in figure 32, comprising: data transceiving unit 3201.
Data transceiving unit 3201 is used to receive uplink and downlink running time-frequency resource and uplink and downlink the code domain money that base station is distributed and issued
Source;And the downlink data that base station issues is received according to down time-frequency resource and downlink code domain resource, and according to uplink time-frequency
The upstream data that resource and uplink code domain resource are sent to base station.
The application can be performed in the interactive device 31 based on the application full-duplex transceiver and interactive device 32 of the present embodiment
Exchange method based on the application full-duplex transceiver shown in embodiment seven, realization principle is similar, and details are not described herein again.
Embodiment ten
Based on the same inventive concept, the embodiment of the present application provides a kind of computer readable storage medium, which can
It reads to be stored with computer program on storage medium, method shown in embodiment seven is realized when which is executed by processor.
Specifically, those skilled in the art of the present technique are appreciated that the application is described herein for executing including being related to
One or more equipment in operation, including full-duplex transceiver and electronic equipment.These equipment can be required purpose
And it specially designs and manufactures, or also may include the known device in general purpose computer.These equipment, which have, to be stored in it
Computer program, these computer programs selectively activate or reconstruct.Such computer program can be stored in and set
In standby (for example, computer) readable medium or it is stored in and is suitable for storing e-command and is coupled to any type of bus respectively
Medium in, the computer-readable medium includes but is not limited to any kind of disk (including floppy disk, hard disk, CD, CD-
ROM and magneto-optic disk), ROM (Read-Only Memory, read-only memory), RAM (Random Access Memory, immediately
Memory), EPROM (Erasable Programmable Read-Only Memory, Erarable Programmable Read only Memory),
(Electrically Erasable Programmable Read-Only Memory, electric erazable programmable is read-only to be deposited EEPROM
Reservoir), flash memory, magnetic card or light card.It is, readable medium includes by equipment (for example, computer) can read
Form storage or transmission information any medium.
The technical effect of the embodiment of the present application ten is consistent with the technical effect of above-described embodiment eight, repeats no more.
The embodiment of the present application provides a kind of computer readable storage medium and is suitable for above method embodiment.Herein no longer
It repeats.
It should be understood that although each step in the flow chart of attached drawing is successively shown according to the instruction of arrow,
These steps are not that the inevitable sequence according to arrow instruction successively executes.Unless expressly stating otherwise herein, these steps
Execution there is no stringent sequences to limit, can execute in the other order.Moreover, at least one in the flow chart of attached drawing
Part steps may include that perhaps these sub-steps of multiple stages or stage are not necessarily in synchronization to multiple sub-steps
Completion is executed, but can be executed at different times, execution sequence, which is also not necessarily, successively to be carried out, but can be with other
At least part of the sub-step or stage of step or other steps executes in turn or alternately.
The above is only some embodiments of the application, it is noted that for the ordinary skill people of the art
For member, under the premise of not departing from the application principle, several improvements and modifications can also be made, these improvements and modifications are also answered
It is considered as the protection scope of the application.
Claims (15)
1. a kind of full-duplex transceiver characterized by comprising at least one transmitting circuit, at least one receiving circuit and
Simulate cancellation module;
For any pair of transmitting circuit and receiving circuit, the simulation cancellation module, with the receiving circuit and the transmitting
Connection, for carrying out simulation elimination to the self-interference signal received in signal according to transmitting signal.
2. full-duplex transceiver according to claim 1, which is characterized in that the simulation cancellation module includes: at least one
A number computer aided simulation eliminates submodule;
It includes: that unit, corresponding control unit and addition are eliminated in digital assistant simulation that submodule is eliminated in the digital assistant simulation
Device;
The adder that submodule is eliminated in each digital assistant simulation is sequentially connected in series in the analog submodule route of the receiving circuit;
Unit is eliminated in the digital assistant simulation, and output end is connected to an input terminal of corresponding adder, and feedback end passes through
Corresponding control unit passes through corresponding control unit and the reception with the connection of the output end of the adder or feedback end
The sub- connection of number in route, for according to the digitally transmitted signals on the digital sub-line road in the receiving circuit and being originated from
The feedback signal of corresponding adder or according to the digitally transmitted signals and the digital sub-line road from the receiving circuit
Feedback signal, simulation elimination is carried out to the self-interference signal.
3. full-duplex transceiver according to claim 2, which is characterized in that submodule is eliminated in the digital assistant simulation
Numeric field uses neural network model;
The neural network model is using feedforward neural network or convolutional neural networks or Recognition with Recurrent Neural Network or other nerve nets
Network, the input of the neural network are the numeric field symbol and/or its high order component sent, are exported as two-way real signal, difference
It is input to the road I and the road Q of secondary link, and respectively by digital-to-analogue conversion, up-conversion, is done certainly in analog domain with received after merging
Signal is disturbed to offset;
The coefficient of the neural network determines that the label of training data is the hits on the road receives link I and the road Q by training
According to;The coefficient of neural network can update in equipment transmission process.
4. full-duplex transceiver according to claim 1, which is characterized in that the simulation cancellation module includes: the first order
It simulates cancellation module and cancellation module is simulated in the second level;
First order simulation cancellation module and second level simulation cancellation module are connected to the analog submodule route of the receiving circuit in turn
In, for successively carrying out simulation elimination to the self-interference signal in the receiving circuit.
5. full-duplex transceiver according to claim 4, which is characterized in that it includes at least one that the first order, which simulates cancellation module,
Submodule is eliminated in a level-one simulation, and second level simulation cancellation module includes that submodule is eliminated in the simulation of at least one digital assistant;
Each level-one simulation is eliminated submodule and is sequentially connected in series in the analog submodule route of the receiving circuit;
It includes: that unit, corresponding control unit and adder are eliminated in simulation that submodule is eliminated in the level-one simulation;
The corresponding adder is serially connected in the analog submodule route of the receiving circuit, and the output end of the adder is connected to
The input terminal of the adder of submodule or the addition of first digit computer aided simulation elimination submodule are eliminated in next level-one simulation
The input terminal of device;
Unit is eliminated in the simulation, and the analog submodule connection of input terminal and the transmitting circuit, output end is connected to corresponding
One input terminal of adder, feedback end are connect by corresponding control unit with the output end of the adder;
And/or it includes single tapped delay and gain circuitry that submodule is eliminated in the level-one simulation.
6. full-duplex transceiver according to claim 4, which is characterized in that it includes at least one that the first order, which simulates cancellation module,
Submodule is eliminated in a level-one simulation, and second level simulation cancellation module includes that submodule is eliminated in the simulation of at least one second level;
The simulation of each second level is eliminated submodule and is sequentially connected in series in the analog submodule route of the receiving circuit, and input terminal all with institute
State the analog submodule connection of transmitting circuit;It includes: at least one variable delay unit, extremely that submodule is eliminated in the simulation of one second level
Few one-component signal fitting unit, low-converter, amplifier, first adder and second adder;
The analog submodule connection of the input terminal of each variable delay unit and the transmitting circuit, output end are connected to pair
One input terminal of the component signal fitting unit answered;
The output end of each component signal fitting unit is connected to each input terminal of second adder;
The output end of second adder is connected to the first adder that submodule is eliminated in the simulation of this second level by the amplifier
One input terminal;
Another input terminal of the first adder of submodule is eliminated in the simulation of this second level, is simulated with previous second level and is eliminated submodule
First adder output end or the last one level-one simulation eliminate submodule adder output end connection;This second level
The output end that the first adder of submodule is eliminated in simulation is respectively connected to each component signal by the low-converter and is fitted list
Another input terminal of member.
7. full-duplex transceiver according to claim 6, which is characterized in that under the component signal fitting unit includes:
Frequency converter, conjugator, iteration step length calculator, the first multiplier, integrator, the second multiplier, weighting system renovator, deposit
Device, vector modulator;
The input terminal of the low-converter is connect with the output end of the variable delay unit, and output end is connected to the conjugator
Input terminal and the iteration step length calculator an input terminal;
One output end of the conjugator is connected to another input terminal of the iteration step length calculator;
Two input terminals of the first multiplier are respectively connected to the another output of the conjugator, baseband error signal end,
Output end is connected to the first input end of the second multiplier by the integrator;
Another input terminal of second multiplier is connect with the output end of the iteration step length calculator, and output end is added by described
Weight coefficient renovator is connected to an input terminal of the vector modulator;
The weighting coefficient renovator is connect with the register;
Another input terminal of the vector modulator is connect with the input terminal of the variable delay unit, described in output end conduct
The output end of component signal fitting unit.
8. full-duplex transceiver according to claim 1, which is characterized in that further include:
Digital cancellation module is connect with the digital sub-line road of the receiving circuit and the transmitting circuit, for according to the hair
It penetrates the self-interference signal after signal eliminates simulation in the reception signal and carries out digital elimination.
9. full-duplex transceiver according to claim 8, which is characterized in that further include: preequalization module;
The preequalization module is connect with the digital sub-line road of the transmitting circuit and the digital cancellation module;
The preequalization module includes the I/Q imbalance estimation unit and preequalization unit of connection, for eliminating I/Q imbalance.
10. full-duplex transceiver according to claim 9, which is characterized in that further include: switching device;
The switching device is connect with the preequalization module, is used for according to the unbalanced estimated result of I/Q dynamically, to described
Preequalization module is activated or is closed;
And/or the switching device is eliminated unit with the level-one simulation in the simulation cancellation module and is connect, for according to input
To the averaged magnitude of the simulation cancellation module, elimination unit is simulated to the level-one and is activated or is closed.
11. full-duplex transceiver according to claim 8, which is characterized in that the number cancellation module includes: digital wave
Beam excipient unit;
The full-duplex transceiver further include: the pre- cancellation module of number;The pre- cancellation module of number is connected to the emission lines
In the digital sub-line road on road;
The pre- cancellation module of number includes the media access control MAC layer processing unit and transmitter base band signal process of connection
Unit;The MAC layer processing unit includes spreading code/scrambling code distribution subelement;The transmitter baseband signal processing unit packet
Include spread spectrum/scrambling subelement and launching beam excipient subelement;
One input terminal of the channel estimating unit is connected to the transmitter base band by the digital beam excipient unit
Signal processing unit.
12. full-duplex transceiver according to claim 1, which is characterized in that further include: predistortion module;
The predistortion module is connected with the digital sub-line road of the transmitting circuit and analog submodule route;
The predistortion module includes the predistortion estimation unit and pre-distortion unit of connection.
13. -12 described in any item full-duplex transceivers according to claim 1, which is characterized in that the simulation cancellation module connects
It connects between the transmit antenna port of different transmitting circuits and the receiving antenna port of same receiving circuit, according to the reception day
What line end mouth received is originated from the power of the self-interference signal of the different transmit antenna ports, emits day to the difference is originated from
The self-interference signal of line end mouth carries out string sequence and eliminates.
14. full-duplex transceiver according to claim 13, which is characterized in that in the different transmit antenna port,
The transmit antenna port of first part and the same receiving antenna port are arranged in same antenna array element;In addition to first part
Except other transmit antenna ports be arranged in other bays;
First part's transmit antenna port in same antenna array element is different from the polarization direction of receiving antenna port;
The simulation cancellation module eliminates source for first eliminating the self-interference signal for being originated from the transmit antenna port of first part afterwards
From the self-interference signal of other transmit antenna ports.
15. a kind of electronic equipment characterized by comprising such as the described in any item full-duplex transceivers of claim 1-14.
Priority Applications (5)
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PCT/KR2019/006147 WO2019225970A1 (en) | 2018-05-22 | 2019-05-22 | Method for resource configuration, and device and storage medium thereof |
KR1020207033672A KR20210000314A (en) | 2018-05-22 | 2019-05-22 | Resource configuration method, device and storage medium thereof |
US17/057,075 US11522654B2 (en) | 2018-05-22 | 2019-05-22 | Configuring physical resources for interference cancellation |
EP19807491.6A EP3769574A4 (en) | 2018-05-22 | 2019-05-22 | Method for resource configuration, and device and storage medium thereof |
US18/061,826 US20230102171A1 (en) | 2018-05-22 | 2022-12-05 | Configuring physical resources for interference cancellation |
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CN2018104967816 | 2018-05-22 |
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Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111490959A (en) * | 2020-04-03 | 2020-08-04 | 北京力通通信有限公司 | IQ imbalance correction method, device and circuit for broadband multi-channel radio frequency transceiver |
CN111585644A (en) * | 2020-05-27 | 2020-08-25 | 北京邮电大学 | Radar communication integrated system, signal processing method and apparatus, and storage medium |
CN111585594A (en) * | 2020-03-27 | 2020-08-25 | 中国人民解放军海军工程大学 | Interference cancellation device and method based on cascade digital control method |
CN113067150A (en) * | 2021-03-31 | 2021-07-02 | 北京北木波谱科技有限公司 | Anti-interference antenna and control method for anti-interference antenna |
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1593030A (en) * | 2001-10-02 | 2005-03-09 | 张量通讯公司 | Interference cancellation in a signal |
CN103634022A (en) * | 2013-12-09 | 2014-03-12 | 电子科技大学 | Full-duplex transceiver in flat fading environment and method for canceling self-interference |
CN103760541A (en) * | 2014-01-08 | 2014-04-30 | 华南理工大学 | Interference waveform self-adaptation offset method and device for continuous wave detection |
US20140348018A1 (en) * | 2011-02-03 | 2014-11-27 | The Board Of Trustees Of The Leland Stanford Junior University | Self-interference cancellation |
CN108023706A (en) * | 2016-11-03 | 2018-05-11 | 夏普株式会社 | Response message feedback method, base station and user equipment without authorized transmissions |
-
2018
- 2018-11-30 CN CN201811459991.4A patent/CN110518933B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1593030A (en) * | 2001-10-02 | 2005-03-09 | 张量通讯公司 | Interference cancellation in a signal |
US20140348018A1 (en) * | 2011-02-03 | 2014-11-27 | The Board Of Trustees Of The Leland Stanford Junior University | Self-interference cancellation |
CN103634022A (en) * | 2013-12-09 | 2014-03-12 | 电子科技大学 | Full-duplex transceiver in flat fading environment and method for canceling self-interference |
CN103760541A (en) * | 2014-01-08 | 2014-04-30 | 华南理工大学 | Interference waveform self-adaptation offset method and device for continuous wave detection |
CN108023706A (en) * | 2016-11-03 | 2018-05-11 | 夏普株式会社 | Response message feedback method, base station and user equipment without authorized transmissions |
Cited By (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111585594A (en) * | 2020-03-27 | 2020-08-25 | 中国人民解放军海军工程大学 | Interference cancellation device and method based on cascade digital control method |
CN111585594B (en) * | 2020-03-27 | 2021-10-26 | 中国人民解放军海军工程大学 | Interference cancellation device and method based on cascade digital control method |
CN111490959A (en) * | 2020-04-03 | 2020-08-04 | 北京力通通信有限公司 | IQ imbalance correction method, device and circuit for broadband multi-channel radio frequency transceiver |
CN111490959B (en) * | 2020-04-03 | 2020-12-01 | 北京力通通信有限公司 | IQ imbalance correction method, device and circuit for broadband multi-channel radio frequency transceiver |
CN111585644A (en) * | 2020-05-27 | 2020-08-25 | 北京邮电大学 | Radar communication integrated system, signal processing method and apparatus, and storage medium |
CN114268969B (en) * | 2020-09-16 | 2024-05-28 | 维沃移动通信有限公司 | Parameter evaluation method, device and terminal |
CN113067150A (en) * | 2021-03-31 | 2021-07-02 | 北京北木波谱科技有限公司 | Anti-interference antenna and control method for anti-interference antenna |
CN115314063A (en) * | 2021-05-04 | 2022-11-08 | 神基投资控股股份有限公司 | Signal integration circuit and electronic device |
CN115314055A (en) * | 2021-05-04 | 2022-11-08 | 神基投资控股股份有限公司 | Signal integration circuit and electronic device |
CN115314063B (en) * | 2021-05-04 | 2023-08-29 | 神基投资控股股份有限公司 | Signal integration circuit and electronic device |
CN115314055B (en) * | 2021-05-04 | 2023-08-29 | 神基投资控股股份有限公司 | Signal integration circuit and electronic device |
CN113904906A (en) * | 2021-09-30 | 2022-01-07 | 电子科技大学 | Method for realizing frequency domain nonlinear continuous interference suppression |
CN114362788A (en) * | 2021-12-17 | 2022-04-15 | 杭州花麟科技有限公司 | Interference signal suppression method, system, electronic device and computer medium |
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