CN110489053A - Manage method, relevant flash controller and the electronic device of flash memory module - Google Patents
Manage method, relevant flash controller and the electronic device of flash memory module Download PDFInfo
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- CN110489053A CN110489053A CN201810736859.7A CN201810736859A CN110489053A CN 110489053 A CN110489053 A CN 110489053A CN 201810736859 A CN201810736859 A CN 201810736859A CN 110489053 A CN110489053 A CN 110489053A
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- 239000010813 municipal solid waste Substances 0.000 claims abstract description 35
- 229910002056 binary alloy Inorganic materials 0.000 claims abstract description 10
- 230000005055 memory storage Effects 0.000 description 17
- 238000003860 storage Methods 0.000 description 13
- 230000002159 abnormal effect Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 230000006399 behavior Effects 0.000 description 3
- 239000002356 single layer Substances 0.000 description 3
- 239000010410 layer Substances 0.000 description 2
- 238000007726 management method Methods 0.000 description 2
- 238000011084 recovery Methods 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- 238000012935 Averaging Methods 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0604—Improving or facilitating administration, e.g. storage management
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/064—Management of blocks
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0656—Data buffering arrangements
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
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- Techniques For Improving Reliability Of Storages (AREA)
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Abstract
The invention discloses a kind of method, relevant flash controller and electronic devices for managing flash memory module, it the described method comprises the following steps: when the flash memory module powers on, and when having a unfinished garbage collection operations before the flash memory module powers on: carrying out binary system search to target block to determine first clear data page of the target block；Sequentially read the last one valid data page to determine the target block forward by first clear data page；And according to the last one described valid data page to re-start the garbage collection operations.The present invention by first clear data page by sequentially being read forward to determine the last one valid data page, the last one valid data page of the target block, present invention efficiency with higher and processing speed can just be determined by needing to search many data pages compared to the prior art.
Description
Technical field
The present invention is about flash memory, especially with respect to a kind of method for managing flash memory module and relevant flash controller and electronics
Device.
Background technique
In the access of some flash memory modules, the data of the first autonomous devices in future of flash controller meeting are written to flash memory module
In single-layer type store (Single-Level Cell, SLC) block, later again pass through garbage collection (garbage
Collection it) operates and moves the valid data in these single-layer types storage block into a target block, wherein the mesh
Mark block can be multiple field storage (Multi-Level Cell, TLC) block or three-layer type storage (Triple-Level
Cell, TLC) block.If however, after being powered off during garbage collection reply (power off recovery,
POR) or burst power-off after reply (sudden power off recovery, SPOR) situation, when flash memory module again on
It may require that after electricity and hunts out first valid data page in the target block, and garbage collection operations before judging accordingly
The degree carried out is to restart to carry out garbage collection operations again.However, hunting out in the target block first effectively
Data page usually requires to search many data pages, thus cause search speed slowly and reduce flash controller efficiency and
Stability.
Summary of the invention
Therefore, it is an object of the present invention to designing a kind of method for managing flash memory module, only can need to search
It seeks in the case of less data page and rapidly determines first valid data page in the target block, to solve the prior art
The problems in.
In one embodiment of the invention, a kind of method managing a flash memory module is disclosed comprising there are following steps:
When the flash memory module powers on, and when having a unfinished garbage collection operations before the flash memory module powers on: to a mesh
Mark block carries out binary system search to determine first clear data page of the target block；By first blank number
Sequentially read the last one valid data page to determine the target block forward according to page；And according to it is described the last one
Valid data page is to re-start the garbage collection operations.
In another embodiment of the present invention, a kind of flash controller is disclosed, wherein the flash controller is to use
Access a flash memory module, and the flash controller includes a read-only memory and a microprocessor, wherein it is described only
It reads memory and is used to store a program code, and the microprocessor is used to execute said program code to control to the flash memory
The access of module.In the operation of flash controller, when the flash memory module powers on, and have before the flash memory module powers on
When a unfinished garbage collection operations, the microprocessor carries out binary system search to a target block to determine the mesh
First clear data page for marking block, is sequentially read forward by first clear data page to determine the target area
The last one valid data page of block, and according to the last one described valid data page to re-start the garbage collection behaviour
Make.
In another embodiment of the present invention, a kind of electronic device is disclosed comprising have a flash memory module and one
Flash controller.When the flash memory module powers on, and there is unfinished garbage collection behaviour before the flash memory module powers on
When making, the flash controller carries out binary system search to a target block to determine first blank of the target block
Data page is sequentially read forward the last one significant figure to determine the target block by first clear data page
According to page, and according to the last one described valid data page to re-start the garbage collection operations.
Detailed description of the invention
Fig. 1 is a kind of schematic diagram of memory storage of an embodiment according to the present invention.
Fig. 2 is the flow chart according to the management flash memory module of one embodiment of the invention.
Fig. 3 be during garbage collection by it is multiple come source area block in valid data move to multiple target blocks
Schematic diagram.
Fig. 4 is the flow chart according to first searched out in target block the clear data page of one embodiment of the invention.
Fig. 5 be according to one embodiment of the invention by first clear data page in target block sequentially read forward with
Determine the schematic diagram of the last one valid data page of target block.
Wherein, the reference numerals are as follows:
100 memory storages
110 flash controllers
112 microprocessors
112C program code
112M read-only memory
114 control logics
116 buffer storage
118 interface logics
120 flash memory modules
130 master devices
132 encoders
134 decoders
200~210,402~428 steps
310_1~310_n carrys out source area block
320_1,320_2 target block
P0~P (N) data page
Specific embodiment
Fig. 1 is a kind of schematic diagram of memory storage 100 of an embodiment according to the present invention.Memory storage 100 includes one
Flash memory (Flash Memory) module 120 and a flash controller 110, and flash controller 110 is used to access flash memory module
120.According to the present embodiment, flash controller 110 includes a microprocessor 112, a read-only memory (Read Only
Memory, ROM) 112M, a control logic 114, a buffer storage 116 and an interface logic 118.Read-only memory 112M
It is for storing a program code 112C, and microprocessor 112 is then used to execute program code 112C to control to flash memory module
120 access (Access).Control logic 114 includes an encoder 132 and a decoder 134, and wherein encoder 132 is used
Encoded to the data being written in flash memory module 120 to generate corresponding check code (or error correcting code (Error
Correction Code), ECC), and decoder 134 is used to decode the data read-out by the flash memory module 120.
Under typical situation, flash memory module 120 includes multiple flash chips, and each flash chip includes a plurality of
Block (Block), and flash controller 110 to the erase data running of flash memory module 120 is carried out as unit of block.
In addition, a block can record certain amount of data page (Page), wherein flash controller 110 writes flash memory module 120
The running for entering data is written as unit of data page.In the present embodiment, flash memory module 120 is a three-dimensional NAND type
Flash memory (3D NAND-type flash) module.
It, can be using inside itself by the flash controller 110 that microprocessor 112 executes program code 112C in implementation
Component carry out many controls running, such as: the access running of flash memory module 120 is controlled using control logic 114 (especially
The running of the access at least a block or an at least data page), carried out using buffer storage 116 required buffered,
And it is linked up using interface logic 118 with a master device (Host Device) 130.Buffer storage 116 is with arbitrary access
Memory (Random Access Memory, RAM) is implemented.It is deposited for example, buffer storage 116 can be static random-access
Reservoir (Static RAM, SRAM), however, the present invention is not limited thereto.
In one embodiment, memory storage 100 can be portable memory device (such as: meet SD/MMC, CF, MS, XD
The memory card of standard), and master device 130 be an electronic device that can be connect with memory storage, such as mobile phone, laptop,
Desktop computer ... etc..And in another embodiment, memory storage 100 can be solid state hard disk or meet Common Flash Memory storage
(Universal Flash Storage, UFS) or built-in multimedia memory card (Embedded Multi Media Card,
EMMC) the embedded storage device of specification to be arranged in an electronic device, such as is arranged in mobile phone, laptop, desktop
In computer, and master device 130 can be a processor of the electronic device at this time.
With reference to Fig. 2, for according to the flow chart of the management flash memory module 120 of one embodiment of the invention.In step 200,
Process starts.In step 202, flash controller 110 to flash memory module 120 carry out garbage collection operations with release block with
For subsequent use.Specifically, with reference to Fig. 3, it is assumed that flash memory module 120 include it is multiple come source area block 310_1~310_n and
Multiple target blocks 320_1,320_2, it is plurality of come source area block 310_1~310_n can be single-layer type storage block, and it is more
A target block 320_1,320_2 can be multiple field storage block or three-layer type storage block.In the behaviour of memory storage 100
In work, when 110 autonomous devices 130 of flash controller receive writing commands, first data sequentially can be written to carrying out source area block
In 310_1~310_n, and since the data of these write-ins may to partially change into vain because subsequent data update
Data, therefore, when come remaining number of blocks available for writing in source area block 310_1~310_n it is few when, flash controller 110
Will the valid data in future source area block 310_1~310_n move in target block 320_1,320_2, to release
Source area block 310_1~310_n is come for subsequent use.Above-mentioned operation is known as garbage collection operations, however, garbage collection operations
Trigger condition be not limited to it is above-mentioned come source area block 310_1~310_n in the insufficient situation of remaining number of blocks available for writing, example
As trigger condition also can be it is certain come source area block 310_1~310_n the quality of data it is bad or in view of consume averaging
Situation.Since one skilled in the art should be able to recognize the operation content of garbage collection operations, therefore correlative detail exists
This is not repeated.
In step 204, the valid data in flash controller 110 sequentially source area block in future 310_1~310_n are moved
During target block 320_1,320_2, (SPOR) is replied after replying (POR) or the power-off that happens suddenly after power-off has occurred
Situation, that is, garbage collection operations are terminated abruptly in the case where not yet completing because of power-off, and after memory storage 100
It re-powers again.
In step 206, after memory storage 100 re-powers, flash controller 110 can first judge memory storage
Whether the situation that suffers from abnormal power-off is had before 100.Specifically, when memory storage 100 is in normal shutdown/power-off feelings
Under shape, flash controller 100 understands the multiple temporary tables that will be stored in buffer storage 116 and data storage to flash memory module
In 120, and which includes one be used to indicate memory storage 100 whether the label (flag) of normal shutdown, therefore, flash memory control
Device 110 processed can be judged after the power-up by reading the above-mentioned label being stored in flash memory module 120 before memory storage 100
Whether the situation that suffers from abnormal power-off is had, for example, just judgement previously has experience when above-mentioned label is not set correctly
To abnormal power-off.Memory storage 100 is to suffer from abnormal power-off in the present embodiment.
Then, when flash controller 110 judges the situation for previously having abnormal power-off and has the garbage collection not yet completed
When operation, what flash controller 110 had been written when replying after powering off to reply after powering off before or burst
Target block (carrying out subsequent explanation by taking target block 320_1 as an example) carries out binary system search (binary search), to seek
Find out first clear data page in target block 320_1.Specifically, with reference to flow chart shown in Fig. 4, target is searched out
The process of first clear data page in block 320_1 is as described below.
Step 402: determining search area (R) and first time according to the data page of target block 320_1 total (N)
The data page serial number to be searched (P=(N/2)), and search direction at this time as (D=2, i.e. data page serial number incremental side forward
To).
Step 404: reading the spare area (spare region) of data page (P).
Step 406: judging whether data page (P) is clear data page according to the content in spare area, for example,
Relevant metadata (metadata) whether can be recorded according to spare area to judge whether data page (P) is clear data
Page.If judging, data page (P) is clear data page, and process enters step 408；If judging data page (P) is and non-blank-white number
According to page, then process enters step 410.
Step 408: setting the data page serial number to be searched next time (P=P- (R/2)), and at this time search direction be to
(direction that D=1, i.e. data page serial number successively decrease) afterwards.
Step 410: setting the data page serial number to be searched next time (P=P+ (R/2)), and at this time search direction be to
Before (D=2).
Step 412: judging whether search area (R) is 1, if it is not, process enters step 414；If so, process enters step
Rapid 416.
Step 414: search area being halved into (R=(R/2)), and process returns to step 404.
Step 416: judging that searching direction is (D=1 backward), if it is not, process enters step 418；If so, stream
Journey enters step 424.
Step 418: whether the data page (P) searched at present of judgement is the last one data page (N), if so, process into
Enter step 420；If it is not, process enters step 422.
Step 420: judging that all data pages of target block 320_1 have write-in data, that is, target block 320 does not have
Clear data page.
Step 422: judging data page (P+1) for first clear data page of target block 320_1.
Step 424: judge the data page (P) searched at present whether less than a critical value (the present embodiment as " 4 "), if
It is that process enters step 426；If it is not, process enters step 428.
Step 426: since the valid data page of target block 320_1 is too low, therefore the block 320_1's that forgoes one's aim is all interior
Hold.
Step 428: judging data page (P) for first clear data page of target block 320_1.
After determining first clear data page, flash controller 110 can be by first clear data page sequentially forward
Read to determine the last one valid data page of target block 320_1, and according to the last one described valid data page with
Re-start garbage collection operations.Specifically, with reference to Fig. 5, it is assumed that the target block 320_ that flash controller 110 is determined
1 first clear data page is P102, then flash controller 110 can first read the content of data page P101 is to judge quality
It is no to meet a standard, and if the quality of data page P101 meets the standard and is judged as valid data page, and if quality not
It accords with the standard and is then judged as invalid data page.For example, decoder 134 carries out decoded operation to the content of data page P101
(including error correction operation), to judge whether data page P101 (can be translated by successfully reading i.e., it is possible to be properly completed
Code operation), if data page P101 can successfully be read, judge data page P101 for valid data page, and data page
P101 can not successfully be read, and judge data page P101 for invalid data page.In another example, the standard can also be with
The quantity or ratio for being the error bit of data page P101 are lower than a critical value.
In the present embodiment, data page P101 is invalid data page, and therefore, number is read forward in the continuation of flash controller 110
According to the content of page P100 to judge whether quality meets the standard.In the present embodiment, data page P100 is also invalid data
Page, therefore flash controller 110 continues to read forward the content of data page until quality complies with standard.In the present embodiment,
Since data page P99 is first data page for being judged as quality and whether meeting the standard, therefore data page P99 is determined as mesh
The last one valid data page of block 320_1 is marked, and flash controller 110 stops continuing to read data page forward at this time.
After determining the last one valid data page P99 of target block 320_1, flash controller 110 reads number
According to the spare area in page P99 with obtain it is corresponding carry out the data page of source area block, and re-start garbage collection operations accordingly.
As an example it is assumed that it is origin source area block 310_3 that the spare area in data page P99, which has recorded the data in data page P99,
What the 13rd data page was read, then flash controller 110 can be by remaining data page P102~P of target block 320_1
(N) full invalid data (dummy data) all is write to maintain the stability of target block 320_1, and restart garbage collection
Operation with the 14th data page of originally source area block 310_3 starts that valid data therein are sequentially copied to target block 320_
In 2.
As noted previously, as in the situation for previously having abnormal power-off and having the rubbish not yet completed in memory storage 100
When collecting operation, flash controller 110 will use binary system search rapidly to search out first blank in a target block
Data page, sequentially read forward by first clear data page again later with determine the target block the last one
Valid data page, for re-starting garbage collection operations.Therefore, compared to the prior art in need to search many data pages
It can just determine the last one valid data page of the target block, present invention efficiency with higher and processing speed.
The foregoing is only a preferred embodiment of the present invention, is not intended to restrict the invention, for the skill of this field
For art personnel, the invention may be variously modified and varied.All within the spirits and principles of the present invention, made any to repair
Change, equivalent replacement, improvement etc., should all be included in the protection scope of the present invention.
Claims (10)
1. a kind of method for managing a flash memory module, which is characterized in that include:
When the flash memory module powers on, and when having a unfinished garbage collection operations before the flash memory module powers on:
Binary system search is carried out to determine first clear data page of the target block to a target block；
Sequentially read the last one valid data to determine the target block forward by first clear data page
Page；And
According to the last one described valid data page to re-start the garbage collection operations.
2. the method as described in claim 1, which is characterized in that carry out binary system search to the target block to determine
The step of stating first clear data page of target block includes:
According to the information in a spare area of the data page searched to judge whether searched data page is clear data
Page.
3. the method as described in claim 1, which is characterized in that according to the last one described valid data page to re-start
The step of stating garbage collection operations includes:
According to the last one described valid data page recorded one come source area block and its in data page information, to re-start
The garbage collection operations with by it is described come source area block in data-moving to another target block.
4. the method as described in claim 1, which is characterized in that according to the last one described valid data page to re-start
The step of stating garbage collection operations includes:
When the serial number of the last one valid data page is lower than a critical value, abandon all effective in the target block
The content of data page, and the garbage collection operations are re-started moving the valid data that at least one comes in source area block to another
One target block, wherein described at least one to carry out the valid data in source area block include all valid data in the target block
The content of page.
5. the method as described in claim 1, which is characterized in that sequentially read forward by first clear data page with certainly
The step of making the last one described valid data page of the target block includes:
It is sequentially read forward until the quality of read data page meets a standard by first clear data page,
And read first data page for meeting the standard is as the last one described valid data page.
6. method as claimed in claim 5, which is characterized in that the standard is whether the content of the data page can be by just
It really reads or the quantity of the error bit of the data page or ratio is lower than a critical value.
7. a kind of flash controller, for accessing a flash memory module, the flash controller has been characterised by comprising:
One read-only memory, for storing a program code；And
One microprocessor, for the access for executing said program code to control to the flash memory module；
Wherein when the flash memory module powers on, and there are a unfinished garbage collection operations before the flash memory module powers on
When, the microprocessor carries out binary system search to a target block to determine first clear data of the target block
Page, the last one valid data to determine the target block are sequentially read forward by first clear data page
Page, and according to the last one described valid data page to re-start the garbage collection operations.
8. flash controller as claimed in claim 7, which is characterized in that the microprocessor is according to the data page searched
Information in one spare area is to judge whether searched data page is clear data page.
9. a kind of electronic device, which is characterized in that include:
One flash memory module；And
One flash controller, for accessing the flash memory module；
Wherein when the flash memory module powers on, and there are a unfinished garbage collection operations before the flash memory module powers on
When, the flash controller carries out binary system search to a target block to determine first blank number of the target block
According to page, the last one valid data to determine the target block are sequentially read forward by first clear data page
Page, and according to the last one described valid data page to re-start the garbage collection operations.
10. electronic device as claimed in claim 9, which is characterized in that the flash controller is according to the data page searched
A spare area in information to judge whether searched data page is clear data page.
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| Application Number | Priority Date | Filing Date | Title |
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| TW107116218 | 2018-05-14 | ||
| TW107116218A TWI670598B (en) | 2018-05-14 | 2018-05-14 | Method for managing flash memory module and associated flash memory controller and electronic device |
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| Publication number | Publication date |
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| TW201947407A (en) | 2019-12-16 |
| TWI670598B (en) | 2019-09-01 |
| CN110489053B (en) | 2022-09-23 |
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