CN110473508B

CN110473508B - Buzzer driving method and driving circuit for realizing wide voltage input

Info

Publication number: CN110473508B
Application number: CN201910757978.5A
Authority: CN
Inventors: 尹向阳; 赵永宁; 黄天华
Original assignee: Shenzhen Nanyun Microelectronics Co ltd
Current assignee: Shenzhen Nanyun Microelectronics Co ltd
Priority date: 2019-08-16
Filing date: 2019-08-16
Publication date: 2021-11-12
Anticipated expiration: 2039-08-16
Also published as: CN110473508A

Abstract

The invention discloses a buzzer driving method and a driving circuit for realizing wide voltage input, which are characterized in that a constant timing time and a constant buzzer peak current are set, the current on a series loop of a buzzer is sampled after a switching tube connected in series on the buzzer loop is started to be conducted, when the sampled current reaches the set buzzer peak current, timing is started, and meanwhile, the impedance change on the switching tube is adjusted through the feedback of the sampled current, so that the current flowing through the buzzer on the series loop is kept constant; and after the timing is finished, the switching tube is immediately turned off, the current of the buzzer passes through the follow current loop, the excitation energy is reduced to zero until the switching tube is turned on again next time, and a complete driving period is formed. The sound pressure level can be ensured to be consistent by controlling the currents flowing through the buzzers to be consistent and keeping the current for consistent time.

Description

Buzzer driving method and driving circuit for realizing wide voltage input

Technical Field

The invention relates to a control method of a buzzer, in particular to a buzzer driving method and a driving circuit for realizing wide voltage input, which are applied to an electromagnetic buzzer.

Background

The buzzer is an electronic buzzer, which is widely applied to the fields of alarms, electronic toys, timers, computers, printers, small household appliances and the like, wherein the buzzer is divided into an electromagnetic type and a piezoelectric type, the piezoelectric type is generally used in occasions with larger volume, the electromagnetic type is generally applied to some miniaturized occasions, the electromagnetic type buzzer is composed of an oscillator, an electromagnetic coil, a magnet, a vibrating diaphragm, a shell and the like, alternating current with certain frequency passes through the electromagnetic coil to enable the electromagnetic coil to generate a magnetic field, and the vibrating diaphragm periodically vibrates to make a sound under the interaction of the electromagnetic coil and the magnet.

Generally, two conventional methods for controlling an electromagnetic buzzer are available, one method is to use a control IC to drive a switch tube connected in series on the buzzer, the switch tube is driven by a fixed frequency with a fixed duty ratio of about 50%, and the switch tube is conducted, so that the current of a series loop of the buzzer excites the buzzer; and the switch tube is turned off, the current of the buzzer passes through the follow current loop, and the excitation energy is reduced to zero until the switch tube is turned on next time. As shown in fig. 1, the positive input voltage VIN + is connected to the positive electrode of an input capacitor Cin +, the negative electrode of the input capacitor is connected to the ground GND of the system, the drain of the switch is connected to the output terminal of the Buzzer and the anode of the freewheeling diode, the source of the switch is connected to the ground GND of the system, the cathode of the freewheeling diode is connected to the positive input electrode VIN +, and the input terminal of the Buzzer is connected to the positive input electrode VIN +. Such a driving method can only be applied in a narrow range of input voltage, if the nominal voltage is 3V, its range can only work at 1.5V-5V at maximum, otherwise the sound pressure level will change greatly, and the power consumption will increase in a quadratic relation with the rise of the input voltage, because the buzzer losses are basically all on its own coil, the larger the effective value of the current flowing on the coil, the larger the loss, and the other one is realized by using a self-excited oscillation mode, as shown in fig. 2, which does not need external driving, but needs two windings, a triode and two diodes, and a resistor, especially the winding cost of the windings is relatively large, and the working frequency of the mode is matched by parameters, so the consistency of the frequency is poor, and the realization method and the effect of the fixed duty ratio are not good, also, a fixed on-time is generated, which is equivalent to controlling the on-off of the buzzer with a fixed duty ratio, so that the application with a narrow input voltage range can be satisfied, and the power consumption increases in a quadratic relation with the increase of the input voltage, because the loss of the buzzer is basically on the coil of the buzzer, the larger the effective value of the current flowing on the coil is, the larger the loss is, and through practical testing of the electromagnetic buzzer with a nominal 5V input of the traditional driving scheme, the change of the sound pressure level in the input voltage range of 3V-12V is shown in the following table 1:

TABLE 1 Wide Voltage test data for traditional electromagnetic buzzers

Input voltage (V)	3	4	5	6	7	8	9	10	11	12
											Input current (mA)	15.1	20.1	24.9	29.4	33.6	37.8	41.7	45.5	49.1	53.0
Input power (mW)	45.3	80.4	125	176	235	302	375	455	540	636
											Sound pressure (dB)	75.4	79.4	79.7	82.5	79.1	80.1	84.7	86.4	86.4	85.1

We can see that the sound pressure level varies by up to 10dB over this voltage range and the power consumption rises from 45.3mW to 636mW, whereas the maximum power consumption of a typical buzzer cannot exceed 250mW, otherwise performance degradation or reliability degradation due to heat generation may occur. Therefore, the manufacturer of the buzzer needs to design and manufacture corresponding models with different input voltages according to the voltage applied by the actual client (usually 3V-24V at most), thereby greatly increasing the cost in design and manufacture.

Disclosure of Invention

The invention aims to provide a buzzer driving method for realizing wide voltage input, which can be directly applied to a wide input voltage range of 3V-24V and ensures that the emitted sound pressure level has small change.

Another object of the present invention is to provide a driving circuit for implementing the above method.

A buzzer driving method for realizing wide voltage input is characterized in that a constant timing time and a constant peak current of a buzzer are set, after a switching tube connected in series with a buzzer loop is started to be driven to be conducted, the current on the buzzer series loop is sampled, when the sampled current reaches the set peak current of the buzzer, timing is started, and meanwhile, the impedance change on the switching tube is adjusted through the feedback of the sampled current, so that the current flowing through the buzzer on the series loop is kept constant; and after the timing is finished, the switching tube is immediately turned off, the current of the buzzer passes through the follow current loop, the excitation energy is reduced to zero until the switching tube is turned on again next time, and a complete driving period is formed. The vibration diaphragm inside the buzzer vibrates back and forth to make a sound in the periodic operation process, the current size and the holding time of the buzzer do not change along with the change of input voltage, the vibration amplitude of the buzzer needs to be guaranteed to be consistent when the sound pressure level of the buzzer is guaranteed to be consistent under wide voltage, the current flowing through the buzzer is controlled to be consistent, and the holding time of the current is consistent, so that the consistency of the sound pressure level can be guaranteed.

The set timing time is much shorter than the conduction time of the conventional scheme, and is 5-10% of a driving period, so that the power consumption is lower.

The peak current is 70% -90% of the lowest input voltage divided by the internal resistance value of the buzzer.

A buzzer driving circuit for realizing wide voltage input comprises a switch module and a follow current module which are connected in series on a buzzer loop, and further comprises a constant voltage output power supply module, a reference generation circuit, an oscillator, a current sampling module, a logic module, a timing module and a turn-off module, wherein the positive electrode of input voltage is connected to the power supply module, the power supply module outputs a constant voltage signal, and the constant voltage signal is input into the reference generation circuit and simultaneously supplies power to other modules; the reference generating circuit outputs a first reference voltage signal to the timing module and a second reference signal to the logic module, the oscillator outputs a clock signal to the logic module, and the logic module outputs a driving voltage signal to the switch module; the logic module outputs another timing control signal to the timing module, the timing module outputs a turn-off voltage signal to the turn-off module, and the turn-off module outputs a turn-off control signal to the switch module; the output of the switch module is connected with the current sampling module, the current sampling module outputs a signal to the logic module, and the current sampling module is connected with a reference ground; setting a constant timing time in a timing module, setting a constant buzzer peak current in a logic module, sampling the current on a serial loop of a switch module through a current sampling module, starting timing by the timing module when the sampling current reaches the set buzzer peak current, and simultaneously adjusting the impedance change of the switch module by the logic module through the feedback of the sampling current so as to keep the current flowing through the buzzer on the serial loop constant; and after the timing is finished, the switch module is immediately turned off, the current of the buzzer forms a loop through the follow current module, the excitation energy is reduced to zero until the switch module is turned on again next time, and a complete driving period is formed.

Further, the timing time is 5-10% of a driving period, and the first reference voltage signal is set according to the timing time.

Further, the peak current is 70% -90% of the lowest input voltage divided by the internal resistance value of the buzzer, and the second reference voltage signal is set according to the peak current.

And the driving module is connected between the driving voltage output end of the logic module and the input end of the switch module so as to further amplify the driving voltage signal output by the logic module and ensure the conduction of the driving switch module.

Preferably, the logic module comprises a first comparator, an operational amplifier and an SR latch, a negative input end of the first comparator and a positive input end of the operational amplifier are connected to a first reference voltage signal, a positive input end of the first comparator and a negative input end of the operational amplifier are connected to an output end of the current sampling module, an output end of the first comparator is connected to an input end R of the SR latch, an input end S of the SR latch is connected to an output of the oscillator, and an output end of the operational amplifier is connected to an input end of the driving module.

Preferably, the timing module comprises a phase inverter, an NMOS transistor Q3, an NMOS transistor Q4, a resistor R1, a capacitor C2 and a second comparator, one end of the resistor R1 is connected with the output of the power supply module, the other end of the resistor R1 is connected with the drain of the NMOS transistor Q3, the gate of the NMOS transistor Q3 is connected with the output end of the phase inverter, the input end of the phase inverter is connected with the output end Q of the SR latch, the source of the NMOS transistor Q3 is connected with the drain of the NMOS transistor Q4 and the positive input end of the second comparator, the source of the NMOS transistor Q4 is grounded GND, the gate of the NMOS transistor Q4 is connected with the output end Q of the SR latch, the positive input end of the second comparator is connected with the positive electrode of the capacitor C2, the negative electrode of the capacitor is grounded, the negative input end of the second comparator is connected with a first reference voltage signal, and the output end of the second comparator is connected with the turn-off module.

The invention has the beneficial effects that:

1. the buzzer can not be burnt out due to the fact that the peak current is linearly increased caused by the fact that the input voltage is increased because the peak current and the current duration are controlled to be kept the same under the input voltage of 3V to 24V; ensuring that the buzzer can work normally in a wide input voltage range of 3V-24V;

2. the peak current is controlled based on the percentage of the maximum peak current under low voltage, so the peak current ratio is smaller, and the action time is much shorter than that of the traditional scheme, so the power consumption is greatly reduced;

3. the vibration amplitude of the buzzer diaphragm can be kept the same and the sound pressure level can be kept basically consistent because the peak current and the action time of the peak current are controlled to be the same under the input voltage of 3V to 24V. The buzzer can work in a wide input voltage range of 3V-24V, the sound pressure level change of the buzzer is small, and stable sound is kept.

4. The traditional scheme can not work under a wide input voltage, so that different buzzer models need to be designed to match the input voltage under different input voltages, and the invention can be generally used under a wide input voltage range of 3V-24V by only designing one buzzer model, so that the models are greatly reduced, and the number of the types of the buzzers can be reduced by a buzzer manufacturer.

Drawings

FIG. 1 is a schematic diagram of a conventional scheme 1;

FIG. 2 is a schematic diagram of a conventional scheme 2;

FIG. 3 is a functional block diagram of the present invention;

FIG. 4 is a schematic diagram of an embodiment of the present invention.

Detailed Description

Fig. 3 is a schematic block diagram of the driving circuit of the present invention connected to a buzzer, which includes: the circuit comprises a power supply module 2, a reference generating circuit 1, an oscillator, a follow current module 5, a switch module 8, a current sampling module 9, a driving module 4, a logic module 3, a timing module 6 and a turn-off module 7, wherein the connection relationship is as follows: the input voltage positive electrode VIN + is connected with the positive electrode of an input capacitor Cin, the negative electrode of the input capacitor is connected with the ground reference GND of the system, the input voltage positive electrode VIN + is connected with a power supply module, the power supply module outputs a constant voltage signal VDD, the VDD signal is input into a reference generating circuit and simultaneously supplies power for other modules, the reference generating circuit outputs a voltage signal VREF1 to a timing module and a signal VREF2 to a logic module, an oscillator OSC outputs a clock signal to the logic module, the logic module outputs a driving voltage signal VF and inputs the driving voltage signal VF into the driving module, the driving module outputs a voltage signal GT1 and inputs the voltage signal into a switch module, the logic module also outputs a timing control voltage signal GT0 to the timing module, the VDD signal is also input into the timing module, the timing module outputs a turn-off voltage signal Voff to the turn-off module, the turn-off module outputs a control signal to the input end of the switch module, the switch module is also connected with the output end of the Buzzer Buzzer and the input end of the follow current module, the output end of the follow current module is connected with the input anode VIN + of the system, the input end of the Buzzer is connected with the input anode VIN + of the system, the current sampling module outputs a signal VCS to the logic module, and the current sampling module is connected with the reference ground GND.

The power supply module is used for converting an input voltage into a voltage VDD for supplying power to other modules, the reference generation circuit is used for converting the VDD voltage into two reference voltages VREF1 and VREF2 used internally, the oscillator is used for providing a clock signal with fixed frequency, the timing module is used for starting timing for a fixed time after a peak current reaches a set value, the turn-off module is used for controlling the switch module to turn off after the timing module times out, the current sampling module is used for sampling the current flowing through the buzzer and converting the current into a voltage signal VCS to be sent to the logic module, the logic module is used for integrating the reference signal VREF2, the oscillator signal OSC and the current sampling signal VCS to finally generate a timing control signal GT0, and the driving module is used for amplifying the driving capacity of a driving voltage signal VF into a signal GT1, the function of the switch module is to control whether the Buzzer Buzzer forms a closed loop or not according to the signal of the driving signal GT1 so as to generate current, and the function of the free-wheeling module is to provide a free-wheeling loop for the Buzzer to release energy.

The working principle is as follows: after the input end voltage reaches a starting voltage, VDD after passing through a power supply module reaches a set value, power is supplied to other modules, meanwhile, a reference generating circuit generates references VREF1 and VREF2, the references VREF1 and VREF2 are respectively input into a timing module and a logic module and are used for setting timing time and peak current of a buzzer, VF voltage is high level in an initial state, a signal GT1 is output after passing through a driving module, the switching module is controlled to be opened, the whole loop formed by serially connecting the buzzers is closed, current on the buzzers is increased, excitation energy is increased, the current sampling module samples the current of the buzzers, the timing module starts timing after the current reaches the set value, meanwhile, the driving voltage GT1 automatically adjusts impedance change of the switching module, the current flowing through the buzzers keeps constant, the switching module is turned off after the timing of the timing module is finished, the current of the buzzers forms a loop through a follow current module, and the excitation energy is reduced to zero, the method comprises the steps that a switch module is turned on again until the next time, a complete cycle is formed, a vibration diaphragm inside a buzzer vibrates back and forth to make a sound in the periodic operation process, the current size and the holding time of the buzzer do not change along with the change of input voltage, the vibration amplitude of the buzzer needs to be guaranteed to be consistent to guarantee that the sound pressure level of the buzzer is consistent under wide voltage, the purpose of guaranteeing the sound pressure level to be consistent can be achieved by controlling the current flowing through the buzzer to be consistent and the holding time of the current to be consistent, meanwhile, the holding time is much shorter than the conduction time of the traditional scheme, the holding time is only about 5% -10% of one cycle generally, and therefore power consumption is low.

As shown in fig. 4, which is a schematic diagram of an optimized implementation circuit of the above schematic block diagram, the reference generating module is composed of resistors RA, RB, RC, RD, the power supply module is composed of LDO, the timing module is composed of an inverter D, NMOS, a transistor Q3, a transistor Q4, a resistor R1, a capacitor C2, and a comparator B, the turn-off module is composed of an NMOS transistor Q5, the logic module is composed of a comparator a and an operational amplifier C, SR latch, the driving module is composed of transistors Q1, a transistor Q2, and a resistor R2, the switching module is composed of an NMOS transistor TR1, the freewheel module is composed of a diode D1, and the current sampling module is composed of a resistor R4, a capacitor C1, and a sampling resistor R3; the connection relationship is as follows: resistance RA and RC's one end are connected to LDO's output Vdd jointly, resistance RA's other end connecting resistance RB, resistance RB's other termination GND, resistance RC's other end connecting resistance RD, resistance RD's other termination GND, reference voltage VREF1 and VREF 2's output are resistance RA and RB's the tie point and resistance RC and RD's tie point respectively, the input voltage positive pole Vin +, output are Vdd are connected to power module LDO's input. One end of a resistor R1 of the timing module is connected with Vdd, the other end of the resistor R1 of the timing module is connected with the drain of an NMOS tube Q3, the gate of Q3 is connected with the output end of an inverter D, the input end of the inverter D is connected with the output end Q of an SR latch, the source of Q3 is connected with the drain of an NMOS tube Q4 and the positive input end of a comparator B, the source of Q4 is connected with GND, the gate of Q4 is connected with the output end Q of the SR latch, the positive input end of the comparator B is connected with the positive electrode of a capacitor C2, the negative electrode of the capacitor is connected with GND, the negative input end of the comparator B is connected with the connection point of RA and RB, namely a VREF1 point, the output end of the comparator B is connected with the gate of an NMOS tube Q5 of the turn-off module, the source of Q5 is connected with GND, the drain is connected with the gate of a switch tube TR1 of the switch module, the negative input end of the comparator A of the logic module and the positive input end of the operational amplifier C of the logic module are connected with the 2 point of the reference generation module, and the positive input end of the current sampling module The positive electrode of the capacitor C1, the negative electrode of the capacitor C1 are connected with GND, the output end of the comparator A is connected with the input end R of the SR latch, the input end S of the latch SR is connected with the output OSC of the oscillator, the output end of the operational amplifier C is connected with the base electrode of the triode Q1 and the base electrode of the triode Q2 in the driving module, and the collector electrode of the triode Q1 in the driving module is connected. The output end of the LDO is a Vdd signal, the collector of a triode Q1 in the driving module is connected with Vdd, the emitter of an NPN triode Q1 and the emitter of a PNP triode Q2 are connected and connected to the gate of a switching tube TR1, the collector of the triode Q2 is connected with GND, the drain of the switching tube TR1 is connected with the output end of a buzzer and the anode of a freewheeling diode D1, the cathode of a diode D1 is connected with the input end of the buzzer and connected to the upper side of the positive electrode Vin + of an input voltage, the source of the switching tube TR1 is connected with one end of a sampling resistor R3, the other end of the resistor R3 is connected with GND, a resistor R2 is connected with the two ends of the gate and the source of the switching tube TR1, one end of the resistor R4 is connected with the source of the switching tube TR1, the other end of the resistor R1 is connected with the positive input end of the comparator A, and the capacitor C1 is connected between the positive input end of the comparator A and the GND.

The specific principle is as follows: after the input end is connected with a power supply and reaches a starting voltage of 3V, the power supply module LDO generates a fixed Vdd voltage to provide electric energy for an internal circuit, because the peak current sampling voltage of the buzzer in the initial state is zero, the comparator A outputs a high-level signal VF, the comparator A drives the switching tube TR1 to be switched on after being amplified by the driving circuit, the series loop of the buzzer forms a closed loop, the current of the buzzer is increased, the output end of the comparator A in the initial state is at a low level, the oscillator is at a high level, the output signal GT0 of the SR latch is at a high level, the NMOS tube Q4 is controlled to be switched on, the voltage on the capacitor C2 keeps at zero volt, and the time is not counted. When the peak current rises to a set value, the comparator A outputs high level, the SR latch is reset, low level is output, the GT0 becomes low, the Q4 is turned off, the Q3 is controlled to be turned on after the inversion of the inverter D, the LDO charges the C2 through the resistor R1, and timing is started; meanwhile, the output voltage of the operational amplifier C is adjusted and kept at a proper voltage, and when Vds is more than Vgs-Vgs due to the NMOS tube_(th)When the circuit works in a constant current region, each Vgs has a definite Id, so that the current of the switching tube TR1 can be kept constant as long as the grid voltage of the switching tube TR1 is controlled. By keeping the gate-source voltage of the NMOS switch transistor TR1 constant, the drain voltage increases and the switch transistor is turned on when the input voltage increasesTR1 impedance increase; the input voltage is reduced, the drain voltage is reduced, the impedance of the switching tube TR1 is reduced, and the drain-source current is kept to be a constant value; therefore, the normal operation of the buzzer can be ensured under the wide input voltage range of 3V to 24V, and the consistent sound pressure is kept. When the voltage of the capacitor C2 is charged to the reference voltage VREF1, the output voltage Voff of the comparator B becomes high level, the Q5 is controlled to be switched on, then the voltage of the GT1 is pulled low, the switch tube TR1 is switched off, the buzzer current forms a loop through the freewheeling diode D1, the excitation energy is reduced to zero, and the switch tube TR1 is switched on again until the next time, so that a complete period is formed. The timing time is generally selected to be 5-10% of one driving cycle, and the first reference voltage VREF1 is set according to the timing time. The peak current is typically selected to be 70% -90% of the lowest input voltage divided by the internal resistance of the buzzer, and the second reference voltage VREF2 is set according to the peak current. In addition, according to the specific requirement of sound pressure, the peak current is large, the timing time can be relatively short, and if the peak current is small, the timing time can be relatively long.

The above-described implementation circuit may be implemented as an integrated circuit packaged as a SOT-23 packaged chip.

Based on the above, according to the common technical knowledge and conventional means in the field, the detection circuit of the present invention has other embodiments without departing from the concept of detecting the rising edge of the present invention; therefore, the present invention may be modified, replaced or changed in various other ways, which fall within the scope of the appended claims.

Claims

1. The utility model provides a realize wide voltage input's buzzer drive circuit, includes switch module and the afterflow module of establishing ties on the buzzer return circuit, its characterized in that: the constant-voltage power supply circuit also comprises a constant-voltage output power supply module, a reference generation circuit, an oscillator, a current sampling module, a logic module, a timing module and a turn-off module, wherein the positive electrode of input voltage is connected to the power supply module, the power supply module outputs a constant-voltage signal, and the constant-voltage signal is input into the reference generation circuit and simultaneously supplies power to other modules; the reference generating circuit outputs a first reference voltage signal to the timing module and a second reference voltage signal to the logic module, the oscillator outputs a clock signal to the logic module, and the logic module outputs a driving voltage signal to the switch module; the logic module outputs another timing control signal to the timing module, the timing module outputs a turn-off voltage signal to the turn-off module, and the turn-off module outputs a turn-off control signal to the switch module; the output of the switch module is connected with the current sampling module, the current sampling module outputs a signal to the logic module, and the current sampling module is connected with a reference ground; setting a constant timing time in a timing module, setting a constant buzzer peak current in a logic module, sampling the current on a serial loop of a switch module through a current sampling module, starting timing by the timing module when the sampling current reaches the set buzzer peak current, and simultaneously adjusting the impedance change on the switch module by the logic module through the feedback of the sampling current so as to keep the current flowing through the buzzer on the serial loop constant; and after the timing is finished, the switch module is immediately turned off, the current of the buzzer forms a loop through the follow current module, the excitation energy is reduced to zero until the switch module is turned on again next time, and a complete driving period is formed.

2. The buzzer driving circuit for realizing wide voltage input according to claim 1, wherein: the timing time is 5-10% of a driving period, and the first reference voltage signal is set according to the timing time.

3. The buzzer driving circuit for realizing wide voltage input according to claim 1, wherein: the peak current is 70% -90% of the lowest input voltage divided by the internal resistance value of the buzzer, and the second reference voltage signal is set according to the peak current.

4. The buzzer driving circuit for realizing wide voltage input according to claim 1, wherein: the driving module is connected between the driving voltage output end of the logic module and the input end of the switch module.

5. The buzzer driving circuit for realizing wide voltage input according to claim 1, wherein: the logic module comprises a first comparator, an operational amplifier and an SR latch, wherein a negative input end of the first comparator and a positive input end of the operational amplifier are connected with a second reference voltage signal, a positive input end of the first comparator and a negative input end of the operational amplifier are connected with an output end of the current sampling module, an output end of the first comparator is connected with an input end R of the SR latch, an input end S of the SR latch is connected with the output of the oscillator, and an output end of the operational amplifier 1 is connected with an input end of the driving module.

6. The buzzer driving circuit for realizing wide voltage input according to claim 1, wherein: the timing module comprises a phase inverter, an NMOS tube Q3, an NMOS tube Q4, a resistor R1, a capacitor C2 and a second comparator, one end of the resistor R1 is connected with the output of the power supply module, the other end of the resistor R1 is connected with the drain of an NMOS tube Q3, the gate of the NMOS tube Q3 is connected with the output end of the phase inverter, the input end of the phase inverter is connected with the output end Q of the SR latch, the source of the NMOS tube Q3 is connected with the drain of an NMOS tube Q4 and the positive input end of the second comparator, the source of the NMOS tube Q4 is grounded GND, the gate of the NMOS tube Q4 is connected with the output end of the SR latch, the positive input end of the second comparator is connected with the positive electrode of the capacitor C2, the negative electrode of the capacitor is connected with the GND, the negative input end of the second comparator is connected with a first reference voltage signal, and the output end of the second comparator is connected with the turn-off module.