CN210985633U - Current-limiting power supply control circuit - Google Patents
Current-limiting power supply control circuit Download PDFInfo
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- CN210985633U CN210985633U CN201922484166.6U CN201922484166U CN210985633U CN 210985633 U CN210985633 U CN 210985633U CN 201922484166 U CN201922484166 U CN 201922484166U CN 210985633 U CN210985633 U CN 210985633U
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Abstract
The utility model relates to the technical field of electronics, in particular to a current-limiting power supply control circuit, which comprises an input end and an output end, and also comprises a PNP triode Q2, wherein an emitting electrode of the PNP triode Q2 is connected with the input end, and a collecting electrode of the PNP triode Q2 is connected with the output end; the PNP triode Q1 is used for controlling the base current of the PNP triode Q2, the emitting electrode of the PNP triode Q1 is connected with the input end, and the collecting electrode of the PNP triode Q1 is connected with the base electrode of the PNP triode Q2; and a delay circuit for preventing the PNP triode Q1 and the PNP triode Q2 from being electrified and self-locked is connected between the input end and the ground. After the structure is adopted, the utility model utilizes the amplification effect of the triode, controls the size of the resistor R4 so as to control the base current of the PNP triode Q2, thereby controlling the current of the output end; when the PNP triode Q1 is turned on, the output end can normally output only when the input end is electrified again; the circuit is simple, the cost is low, and the power consumption is low.
Description
Technical Field
The utility model relates to the field of electronic technology, especially a current-limiting power supply control circuit.
Background
In many applications, it is necessary to limit the current and voltage of the output circuit in order to prevent overload, short circuit, and the like. The common method is to use a fuse or a sampling resistor ADC reading method to limit current and prevent short circuit. The fuse is generally used to prevent short circuit but not overload, and the sampling resistor is a very effective method, but in some circuits with low power consumption and power consumption requirement, the power consumption consumed by the sampling resistor is not negligible.
Chinese utility model patent CN 207603267U discloses a current-limiting control circuit, which comprises a voltage reference source U1, a diode D1, a resistor R1, a triode Q1 and a resistor R2, which are connected in sequence to form a closed loop; the emitter of the triode Q1 is connected with one end of the resistor R2, the collector of the triode Q1 is connected with one end of the resistor R1, and the base of the triode Q1 is connected between the positive end of the diode D1 and the resistor R1; the negative terminal of the diode D1 is connected to a voltage reference source U1; the voltage reference source U1 is connected with the resistor R2 and is led out to be connected to the VCC end and the positive end of the capacitor C1; the negative terminal of the capacitor C1 is grounded.
Disclosure of Invention
The utility model discloses the technical problem that needs to solve provides a current-limiting power supply control circuit that the consumption is few and with low costs.
In order to solve the above technical problem, the current-limiting power supply control circuit of the present invention comprises an input terminal and an output terminal, and further comprises a PNP triode Q2, wherein an emitter of the PNP triode Q2 is connected to the input terminal, and a collector of the PNP triode Q2 is connected to the output terminal; the PNP triode Q1 is used for controlling the base current of the PNP triode Q2, the emitting electrode of the PNP triode Q1 is connected with the input end, and the collecting electrode of the PNP triode Q1 is connected with the base electrode of the PNP triode Q2; and a delay circuit for preventing the PNP triode Q1 and the PNP triode Q2 from being electrified and self-locked is connected between the input end and the ground.
Preferably, the delay circuit comprises a first delay circuit for controlling the delay of the PNP triode Q1 and a second delay circuit for controlling the delay of the PNP triode Q2, and the delay of the first delay circuit is greater than the delay of the second delay circuit.
Preferably, the first delay circuit comprises a capacitor C1, a resistor R1 and a resistor R2, the capacitor C1, the resistor R1 and the resistor R2 are connected in series between the input end and the ground, and the base of the PNP triode Q1 is connected between the capacitor C1 and the resistor R1.
Preferably, the circuit further comprises a resistor R3 for controlling the voltage of the output end when the circuit is turned off, one end of the resistor R3 is connected between the resistor R1 and the resistor R2, and the other end of the resistor R3 is connected with the output end.
Preferably, the second delay circuit comprises a capacitor C2 and a resistor R4, the capacitor C2 and the resistor R4 are connected in series between the input end and the ground, and a middle point of the capacitor C2 and the resistor R4 is connected with a base of a PNP triode Q2.
After the structure is adopted, the utility model utilizes the amplification effect of the triode, controls the size of the resistor R4 so as to control the base current of the PNP triode Q2, thereby controlling the current of the output end; the on-off of the PNP triode Q1 is controlled by the ratio of the resistor R1, the resistor R2 and the resistor R3, so that the state of an output end is controlled; when the PNP triode Q1 is turned on, the output end can normally output only when the input end is electrified again; the circuit is simple, the cost is low, and the power consumption is low.
Drawings
The present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
Fig. 1 is a schematic circuit diagram of a current-limiting power supply control circuit according to the present invention.
Detailed Description
As shown in fig. 1, the current-limiting power supply control circuit of the present invention includes an input terminal and an output terminal, and further includes a PNP triode Q2, wherein an emitter of the PNP triode Q2 is connected to the input terminal, and a collector of the PNP triode Q2 is connected to the output terminal; the PNP triode Q1 is used for controlling the base current of the PNP triode Q2, the emitting electrode of the PNP triode Q1 is connected with the input end, and the collecting electrode of the PNP triode Q1 is connected with the base electrode of the PNP triode Q2; and a delay circuit for preventing the PNP triode Q1 and the PNP triode Q2 from being electrified and self-locked is connected between the input end and the ground.
The time delay circuit comprises a first time delay circuit for controlling the time delay of the PNP triode Q1 and a second time delay circuit for controlling the time delay of the PNP triode Q2, and the time delay of the first time delay circuit is larger than the time delay of the second time delay circuit. The first time delay circuit comprises a capacitor C1, a resistor R1 and a resistor R2, wherein the capacitor C1, the resistor R1 and the resistor R2 are connected between an input end and the ground in series, and the base electrode of the PNP triode Q1 is connected between the capacitor C1 and the resistor R1. The circuit also comprises a resistor R3 for controlling the voltage of the output end when the circuit is switched off, one end of the resistor R3 is connected between the resistor R1 and the resistor R2, and the other end of the resistor R3 is connected with the output end. The second time delay circuit comprises a capacitor C2 and a resistor R4, the capacitor C2 and the resistor R4 are connected between the input end and the ground in series, and the middle point of the capacitor C2 and the resistor R4 is connected with the base electrode of a PNP triode Q2.
In order to ensure that the power-on moment is not self-locked, namely the second NPN triode Q2 is turned on earlier than the first NPN triode Q1, the delay formed by the first capacitor C1, the first resistor R1, and the second resistor R2 is greater than the delay formed by the second capacitor C2 and the fourth resistor R4. The first resistor R1, the second resistor R2, and the fourth resistor R4 are matched to completely turn off the second NPN transistor Q2 when the first NPN transistor Q1 is turned on. The resistor R4 controls the base current of the first NPN triode Q1, and the collector current of the first NPN triode Q1 is controlled by using the amplification principle of the triode; meanwhile, the collector current of the second NPN triode Q2 is controlled, and the voltage and the current when the circuit is turned off are controlled by the ratio of the resistor R2 and the resistor R3.
The working principle of the utility model is as follows: one end of the resistor R4 is connected with the base electrode of the PNP triode Q2, and the other end is grounded, so that the current of the base electrode of the PNP triode Q2 is controlled to control the current output by the collector electrode of the PNP triode Q2, namely the current control of the first output end Vout is completed; one end of the resistor R3 is connected with the collector of the PNP triode Q2, the other end of the resistor R3 is connected with one end of the resistor R1, the other end of the resistor R1 is connected with the base of the PNP triode Q1, one end of the resistor R2 is connected with the common end of the resistor R1 and the resistor R3, the other end of the resistor R2 is grounded, the on-off of the PNP triode Q1 is controlled by the ratio of the resistor R1, the resistor R2 and the resistor R3, and the voltage when the first; the resistor R1 and the resistor R2 control the base current of the PNP triode Q1 to control the on-off of the PNP triode Q2. One end of the capacitor C1 is connected to the first input terminal Vin, the other end is connected to the base of the PNP transistor Q1, the capacitor C2 is connected to the first input terminal Vin, the other end is connected to the base of the PNP transistor Q2, the collector of the PNP transistor Q1 is connected to the base of the PNP transistor Q2, the capacitor C1, the resistor R1 and the resistor R2 form a delay circuit, the capacitor C2 and the resistor R4 form a delay circuit, in order to ensure that the power-on moment is not self-locked, that is, the PNP transistor Q2 is turned on earlier than the PNP transistor Q1, the delay formed by the capacitor C1, the resistor R1 and the resistor R2 is larger than the delay formed by the capacitor C2 and the resistor R4. The first input terminal Vin is connected to the emitter of the PNP transistor Q1 and the emitter of the PNP transistor Q2.
When the first output end Vin is short-circuited or overloaded, the voltage of the collector of the PNP triode Q2 is obviously reduced and fed back to the base of the PNP triode Q1, when the voltage of the base of the PNP triode Q1 is 0.7V less than the voltage of the first input end Vin, the PNP triode Q1 is turned on, the voltage of the emitter of the PNP triode Q1 is fed back to the base of the PNP triode Q2, the voltage difference between the voltage and the Vin voltage of the first input end is greater than 0.7V, the PNP triode Q2 is turned off, the circuit stops supplying power to the outside, and the circuit can work normally again only when the first input end Vin is powered on again.
Although specific embodiments of the present invention have been described above, it will be appreciated by those skilled in the art that these are merely examples and that many changes and modifications may be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims.
Claims (5)
1. A current-limiting power supply control circuit comprises an input end and an output end, and is characterized in that: the PNP triode Q2 is further included, an emitting electrode of the PNP triode Q2 is connected with the input end, and a collecting electrode of the PNP triode Q2 is connected with the output end; the PNP triode Q1 is used for controlling the base current of the PNP triode Q2, the emitting electrode of the PNP triode Q1 is connected with the input end, and the collecting electrode of the PNP triode Q1 is connected with the base electrode of the PNP triode Q2; and a delay circuit for preventing the PNP triode Q1 and the PNP triode Q2 from being electrified and self-locked is connected between the input end and the ground.
2. A current-limiting power supply control circuit as claimed in claim 1, wherein: the time delay circuit comprises a first time delay circuit for controlling the time delay of the PNP triode Q1 and a second time delay circuit for controlling the time delay of the PNP triode Q2, and the time delay of the first time delay circuit is larger than the time delay of the second time delay circuit.
3. A current-limiting power supply control circuit as claimed in claim 2, wherein: the first time delay circuit comprises a capacitor C1, a resistor R1 and a resistor R2, wherein the capacitor C1, the resistor R1 and the resistor R2 are connected between an input end and the ground in series, and the base electrode of the PNP triode Q1 is connected between the capacitor C1 and the resistor R1.
4. A current-limiting power supply control circuit as claimed in claim 3, wherein: the circuit also comprises a resistor R3 for controlling the voltage of the output end when the circuit is switched off, one end of the resistor R3 is connected between the resistor R1 and the resistor R2, and the other end of the resistor R3 is connected with the output end.
5. A current-limiting power supply control circuit as claimed in claim 2, wherein: the second time delay circuit comprises a capacitor C2 and a resistor R4, the capacitor C2 and the resistor R4 are connected between the input end and the ground in series, and the middle point of the capacitor C2 and the resistor R4 is connected with the base electrode of a PNP triode Q2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922484166.6U CN210985633U (en) | 2019-12-31 | 2019-12-31 | Current-limiting power supply control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922484166.6U CN210985633U (en) | 2019-12-31 | 2019-12-31 | Current-limiting power supply control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN210985633U true CN210985633U (en) | 2020-07-10 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201922484166.6U Active CN210985633U (en) | 2019-12-31 | 2019-12-31 | Current-limiting power supply control circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN210985633U (en) |
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2019
- 2019-12-31 CN CN201922484166.6U patent/CN210985633U/en active Active
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