CN110400834A - A kind of no Snapback effect is inverse to lead IGBT and its manufacturing method - Google Patents
A kind of no Snapback effect is inverse to lead IGBT and its manufacturing method Download PDFInfo
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Abstract
The present invention relates to semiconductor technology, in particular to a kind of no snapback effect is inverse to lead IGBT and its manufacturing method.Major programme of the invention is improved to the collector structure at the back side IGBT, pass through the optimization collector area P++ and N++ layers of doping concentration and thickness, the reverse BV of device is reduced as far as possible, and avalanche breakdown effects and tunnel breakdown effect when using reverse blocking mode realize reverse-conducting.With it is conventional inverse lead IGBT compared with, since there is no N+ shorting region, when forward conduction, there is no the transformations from MOSFET conduction mode to IGBT conduction mode, therefore snapback phenomenon will not occur for when novel reverse proposed by the present invention leads IGBT forward conduction.Since novel reverse proposed by the present invention leads the relatively conventional inverse situation led that IGBT is bigger, be suitable for that such as quasi-resonance circuit one kind forward conduction time accounts for major part and the reverse-conducting time is shorter of the threshold voltage of IGBT reverse-conducting.Further it is proposed that novel reverse lead IGBT also and have many advantages, such as that forward conduction voltage drop is small, soft recovery characteristics are good.
Description
Technical field
The invention belongs to power semiconductor technologies field, it is related to a kind of no snapback effect against conductivity type IGBT and its system
Make method.
Background technique
Insulated gate bipolar transistor (IGBT) is a kind of compound device to grow up the eighties, is driven using MOSFET
Dynamic bipolar junction transistor, has the common advantage of MOSFET and BJT concurrently --- high input impedance and low conduction voltage drop, therefore answer extensively
Used in intermediate frequency and middle power it is electrical in.But since IGBT does not have the ability of reverse-conducting, in the application of its inductive load,
One fast recovery diode of reverse parallel connection (Fast Recovery Diode, abbreviation FRD) is needed to provide afterflow protection.
Since IGBT and FRD is readily incorporated parasitic inductance in welding, it is high and reliable to will cause practical IGBT application cost
Property it is poor, therefore integrated developed on the same chip of IGBT and FRD inverse is led insulated gate bipolar transistor (Reverse by people
Conducting-IGBT, abbreviation RC-IGBT), collector short-circuit structure is used, parallel alternately row is lithographically formed by the back side
The area Lie N+ and the area P+.Emitter adds positive bias, and when collector adds zero-bias, the p-type base area drift region-N--N+ shorting region is constituted
PN junction be in forward bias condition so that device realize reverse-conducting.But the inherent structure makes device in forward conduction
In the presence of the transformation from MOSFET conduction mode to IGBT conduction mode, snapback phenomenon (i.e. voltage rebound phenomenon) is shown as,
The phenomenon can aggravate the concentration of electric current and then directly affect the reliability of device.Further, since FRD is only integrated in partial region,
It is easy to cause current distribution is uneven even when reverse-conducting, equally will affect the reliability of device.
It is also able to achieve the inverse function of leading by introducing tunnel diode at the conventional back side IGBT, emitter adds positive bias, collects
When electrode adds zero-bias, the tunnel diode that P++ collector/area N++ is constituted is in reverse-biased, as emitter voltage increases
Greatly, barrier region energy band all the more tilts, and when built in field increases to a certain extent, a large amount of electronics can be passed through directly from valence band
Forbidden band and enter conduction band, realize reverse-conducting.But the doping concentration for constituting the area P++/N++ of tunnel diode is very high, reaches
1 × 1020cm-3~1 × 1021cm-3, technology difficulty is very big and the IGBT exists and led by tunnel diode in forward conduction
Logical transformation of the mode to IGBT conduction mode, therefore snapback phenomenon can also occur.
In conventional field cut-off type IGBT, due to the presence of N+ cutoff layers, under forward blocking mode, electric field is cut at N+
0 is only reduced in layer rapidly, trapezoidal profile is presented in electric field, therefore can reduce the thickness of drift region to realize the resistance to of same levels
Pressure.The doping concentration of N+ cutoff layers is usually 1 × 1015cm-3~1 × 1016cm-3, reverse BV is usually tens volts
~a few hectovolts, therefore field cut-off type IGBT does not have the ability of reverse-conducting.
Summary of the invention
The purpose of the present invention, existing snapback phenomenon asks when aiming at current tradition RC-IGBT forward conduction
Topic, and since the forward and reverse turn-on time of device is asymmetric so the situation not harsh to device reverse-conducting characteristic requirements, mentions
A kind of novel no snapback effect is against conductivity type IGBT and its manufacturing method out.
To achieve the above object, the present invention adopts the following technical scheme that:
A kind of novel no snapback effect against conductivity type IGBT, as shown in Figure 1, include collector structure, drift region structure,
Gate structure and emitter structure；
The collector structure includes the collector area P++ 10 and the metallization current collection positioned at 10 lower surface of the collector area P++
Pole 10；
The drift region structure include the N++ layer 9 being set side by side and N+ cutoff layers 8 and be located at N++ layer 9 and N+
The N- drift region layer 1 of 8 upper surface of cutoff layer, N++ layer 9 and N+ cutoff layers 8 are located at the upper surface of the collector area P++ 10；
The gate structure is trench gate, and at N- drift 1 upper surface both ends of region layer, structure includes gate oxidation for insertion setting
Layer 7 and the polygate electrodes 6 in gate oxide 7；
The emitter structure is located between two trench gates, and structure includes N+ emitter region 5, p-type base area 3, P+ contact
Area 2 and metallization emitter 4, the insertion of p-type base area 3 setting are located at P in N- drift 1 upper surface of region layer, the N+ emitter region 5
It 3 upper layer of type base area and is contacted with trench gate, the contact zone P+ 2 is located in p-type base area 3, and is located at the N+ emitter region 5 of two sides
Between, 2 both ends of the contact zone P+ also extend to 5 lower surface of N+ emitter region；2 junction depth of the contact zone P+ is greater than the junction depth of N+ emitter region 5；
Metallization emitter 4 is located at the upper surface of N+ emitter region 5 and the contact zone P+ 2, and only covering part N+ emits metallization emitter 4
Area 5.
Major programme of the invention relates generally to the backside collector structure of IGBT, passes through the optimization collector area P++ and N+
The doping concentration of+layer realizes reverse-conducting using the collector area P++ and N++ layers of avalanche breakdown.
Routine is inverse to be led in IGBT, and structural schematic diagram such as Fig. 2, the doping concentration of N+ cutoff layers 8 is about 1 × 1015cm-3~
1×1016cm-3, this is because when N+ 8 doping concentrations of cutoff layer are excessive, the rebound voltage V of devicesnapbackIt is very big, it can be to device
The reliability of part brings adverse effect.Routine is against when leading IGBT forward conduction, and due to the presence of N+ shorting region, device is initially entered
MOSFET work mode, with the increase of forward conduction electric current, device progresses into IGBT conduction mode, and the drift region N- 1 occurs
Voltage rebound (snapback) occurs for conductance modulation.
It overleaf introduces tunnel diode and realizes inverse IGBT structure such as Fig. 3 led, in this configuration, P++ collector 10 and N
++ the doping concentration of layer 9 is 1 × 1020cm-3~1 × 1021cm-3, and due to the characteristic of tunnel diode, the IGBT is in forward direction
In the presence of the transformation from tunnel diode conduction mode to IGBT conduction mode when conducting, therefore snapback phenomenon can also occur.
The structure of conventional FS-IGBT such as Fig. 4, wherein the doping concentration of N+ cutoff layers is usually 1 × 1015cm-3~1 ×
1016cm-3, therefore the reverse BV of device be usually tens volts~a few hectovolts, therefore FS-IGBT does not have reverse-conducting
Ability.
Novel reverse proposed by the present invention leads IGBT, and structure is as shown in Figure 1, utilize the collector area P++ and N++ cutoff layers
Avalanche breakdown realize reverse-conducting, the doping concentration of the collector area P++ 9 and N++ layer 9 is 1 × 1017cm-3~1 × 1019cm-3, the doping concentration of N+ cutoff layers 8 is 1 × 1015cm-3~1 × 1016cm-3, forward conduction characteristic and routine FS-IGBT class
Seemingly, there is no the transformations of conduction mode, therefore when novel reverse proposed by the present invention leads IGBT forward conduction will not occur
Snapback phenomenon.
Specific embodiments of the present invention are by the trench gate of pressure-resistant 1200V against being explained for the design of half cellular of conductivity type IGBT
It states, there are two types of manufacturing method, the first manufacturing method is to form N+ cutoff layers and N++ layers, step by ion implanting twice
It is as follows:
Step 1: choosing doping concentration is 5e13cm-3N-type silicon chip as silicon substrate, i.e. N-type in structure is partly led
Body drift region 1 drifts about 1 back side of region layer by phosphonium ion injection in N- first and knot forms N+ cutoff layers 8；
Step 2: passing through a phosphonium ion injection and knot formation N++ layer 9 again；
Step 3: in the grid oxygen of N- drift 1 upper surface of region layer growth 100nm, i.e. gate oxide 7, then depositing polysilicon,
Form polygate electrodes 6.
Step 4: in N- drift 1 injecting p-type impurity of region layer and knot formation p-type base area 3；
Step 4: injecting N-type impurity in p-type base area 3 forms N+ emitter region 5；
Step 6: injecting p-type impurity and the knot formation contact zone P+ 2 in p-type base area 3；
Step 7: depositing BPSG insulating medium layer in device upper surface, ohmic contact hole is etched；
Step 8: depositing metal forming 5 upper surface of N+ emitter region, cathodic metal 4 is formed, only covering part N+ emitter region
5, cathodic metal 4 is covered on the contact zone P+ 2 simultaneously；
Step 9: deposit passivation layer；
Step 10: rearwardly injecting p-type impurity and carry out it is ion-activated, formed the collector area P++ 10；
Step 11: back metal, forms metallization collector 10 in 10 lower surface of the collector area P++.
Second of manufacturing method is by carrying out impurity compensation and forming N+ to part N++ layers of injection boron ion and knot
Cutoff layer, steps are as follows:
Step 1: choosing doping concentration is 5e13cm-3N-type silicon chip as silicon substrate, i.e. N-type in structure is partly led
Body drift region 1 drifts about 1 back side of region layer by phosphonium ion injection in N- first and knot forms N++ layer 9；
Step 2: forming N+ layer 8 to N++ layers of progress impurity compensation by a boron ion injection and knot；
Step 3: in the grid oxygen of N- drift 1 upper surface of region layer growth 100nm, i.e. gate oxide 7, then depositing polysilicon,
Form polygate electrodes 6.
Step 4: in N- drift 1 injecting p-type impurity of region layer and knot formation p-type base area 3；
Step 4: injecting N-type impurity in p-type base area 3 forms N+ emitter region 5；
Step 6: injecting p-type impurity and the knot formation contact zone P+ 2 in p-type base area 3；
Step 7: depositing BPSG insulating medium layer in device upper surface, ohmic contact hole is etched；
Step 8: depositing metal forming 5 upper surface of N+ emitter region, cathodic metal 4 is formed, only covering part N+ emitter region
5, cathodic metal 4 is covered on the contact zone P+ 2 simultaneously；
Step 9: deposit passivation layer；
Step 10: rearwardly injecting p-type impurity and carry out it is ion-activated, formed the collector area P++ 10；
Step 11: back metal, forms metallization collector 10 in 10 lower surface of the collector area P++.
Beneficial effects of the present invention are, asymmetric for forward and reverse turn-on time, thus want to device reverse-conducting characteristic
Not harsh situation is sought, proposes that the novel no snapback effect of one kind against conductivity type IGBT, has low cost, simple process, forward direction
The advantages that on state characteristic is good, soft recovery characteristics are good.
Detailed description of the invention
Fig. 1, which is that novel groove gate type of the invention is inverse, leads IGBT structure cell schematic diagram.
Fig. 2, which is that conventional groove gate type is inverse, leads IGBT structure cell schematic diagram.
Fig. 3 is to realize the inverse IGBT structure cell schematic diagram led by overleaf introducing tunnel diode.
Fig. 4 is the structure cell schematic diagram of conventional FS-IGBT.
Fig. 5, which is that novel groove gate type of the invention is inverse, to be led IGBT, routine FS-IGBT, realizes inverse lead using tunnel diode
Dopant profiles near the collector of IGBT.
Fig. 6 be novel reverse of the invention lead IGBT, it is conventional inverse lead IGBT and introduce tunnel diode realize the inverse IGBT led
Forward conduction characteristic curve.
Fig. 7 be novel reverse of the invention lead IGBT, it is conventional inverse lead IGBT and introduce tunnel diode realize the inverse IGBT led
And the reverse-conducting characteristic curve of routine FS-IGBT.
When Fig. 8 is that novel reverse of the invention leads IGBT and introduces tunnel diode and realize the inverse IGBT reverse-conducting led, P+
The curve synoptic diagram of electric field, impact ionization rate and tunnel generation rate at +/N++ knot.
Fig. 9 is the curve that novel reverse of the present invention leads that the reverse BV of IGBT changes with N+ layers of concentration.
Figure 10 is the dipulse circuit for reflecting device reverse recovery characteristic
Figure 11 is conventional inverse to lead IGBT and novel reverse of the invention leads the reverse recovery characteristic curve of IGBT.
Figure 12 is the single-ended quasi-resonance circuit applied in electromagnetic oven.
Figure 13 is to lead the electricity of IGBT using inverse IGBT and the novel reverse of the present invention of leading of tradition respectively in single-ended quasi-resonance circuit
Galvanic electricity presses comparison diagram.
Figure 14 be in quasi-resonance circuit respectively using tradition it is inverse lead IGBT and when novel reverse of the present invention leads IGBT flow through it is humorous
The current vs of vibration capacitor and resonant inductance figure.
Figure 15 is the process flow chart of manufacturing method one.
Figure 16 is the process flow chart of manufacturing method two.
Specific embodiment
The present invention is described in detail with reference to the accompanying drawing:
The novel no snapback effect of one kind proposed by the present invention is against conductivity type IGBT, and structure is as shown in Figure 1, include current collection
Pole structure, drift region structure, emitter structure and gate structure；The collector structure includes the collector area P++ 10 and is located at
The metallization collector 10 of 10 lower surface of the collector area P++；The drift region structure includes N++ layer 9, N+ cutoff layers 8 and position
In N++ layer 9, N+ 8 upper surface N- of cutoff layer drift region layer 1, N++ layer 8 and N+ cutoff layers 8 are disposed in parallel in P++ collector
The upper surface in area 10；The gate structure is trench gate, and in N- drift 1 upper surface of region layer, structure includes grid oxygen for insertion setting
Change layer 7 and the polygate electrodes 6 in gate oxide 7；The emitter structure is located between two trench gates, knot
Structure includes N+ emitter region 5, p-type base area 3, the contact zone P+ 2 and metallization emitter 4, and the insertion of p-type base area 3 setting is floated in N-
1 upper surface of region layer is moved, the N+ emitter region 5 is located at 3 upper layer of p-type base area, and the contact zone P+ 2 is located in p-type base area 3, and
It is set side by side with N+ emitter region 5；2 junction depth of the contact zone P+ is greater than the junction depth of N+ emitter region 5；Metallization emitter 4 is located at N+ transmitting
The upper surface in area 5 and the contact zone P+ 2, metallize the only covering part N+ emitter region 5 of emitter 4.
Novel no snapback effect proposed by the present invention against conductivity type IGBT, its working principles are as follows:
When forward conduction, on the polygate electrodes 6 in cellular as shown in Figure 1 plus positive bias, in p-type base area 3
Electronics is accumulated in gate oxide side, and transoid occurs for channel, forms the N-type electricity of connection N+ emitter region 5 and N- drift region layer 1
Sub-channel.On metallization collector 10 plus positive pressure, metallization emitter 4 add zero potential.Electronic current passes through N-type electronics ditch
Road flows into N- drift region layer 1 from N+ emitter region 5, the PNP constituted for P type 3-N- of base area drift collector area 1-P++ of region layer 10
Transistor provides ideal base drive current, and after PNP transistor is opened, the injection into N- drift region layer 1 of the collector area P++ 10 is a large amount of
Hole forms conductance modulation, IGBT forward conduction.Novel reverse of the invention leads IGBT and leads IGBT (structure such as Fig. 2 institute with routinely inverse
Show) it compares, since there is no N+ shorting region, therefore when forward conduction, there is no lead device from MOSFET conduction mode to IGBT
The transformation of logical mode, therefore novel reverse of the invention leads IGBT will not occur snapback phenomenon, it is conventional inverse to lead IGBT, the present invention
Novel reverse lead IGBT and realize that the forward conduction characteristic curve of the inverse IGBT led is as shown in Figure 6 using tunnel diode.
When reverse-conducting, zero potential is added on polygate electrodes 6, adds positive pressure on the emitter 4 that metallizes, metallize collector
On 10 plus zero potential, device are in reverse blocking mode, the PN that emitter voltage is made of the collector area P++ 10 and N++ layer 9
Knot support, the depletion region as emitter-collector voltage increases, at the PN junction of the collector area P++ 10 and the composition of N++ layer 9
Extension, electric-field enhancing.When emitter-collector voltage increases to the breakdown voltage of the PN junction, PN junction breakdown, in space
Charged region generates a large amount of electronics-hole pair, realizes reverse-conducting, it is conventional it is inverse lead IGBT, novel reverse of the invention leads IGBT,
Realize that the reverse-conducting characteristic curve of the inverse IGBT and FS-IGBT led is as shown in Figure 7 using tunnel diode.
Specific embodiments of the present invention are by the trench gate of pressure-resistant 1200V against being explained for the design of half cellular of conductivity type IGBT
It states, there are two types of manufacturing method, the first manufacturing method is to form N+ cutoff layers and N++ layers, step by ion implanting twice
It is as follows:
Step 1: choosing doping concentration is 5e13cm-3N-type silicon chip as silicon substrate, i.e. N-type in structure is partly led
Body drift region 1 drifts about 1 back side of region layer by phosphonium ion injection in N- first and knot forms N+ cutoff layers 8；
Step 2: passing through a phosphonium ion injection and knot formation N++ layer 9 again；
Step 3: in the grid oxygen of N- drift 1 upper surface of region layer growth 100nm, i.e. gate oxide 7, then depositing polysilicon,
Form polygate electrodes 6.
Step 4: in N- drift 1 injecting p-type impurity of region layer and knot formation p-type base area 3；
Step 4: injecting N-type impurity in p-type base area 3 forms N+ emitter region 5；
Step 6: injecting p-type impurity and the knot formation contact zone P+ 2 in p-type base area 3；
Step 7: depositing BPSG insulating medium layer in device upper surface, ohmic contact hole is etched；
Step 8: depositing metal forming 5 upper surface of N+ emitter region, cathodic metal 4 is formed, only covering part N+ emitter region
5, cathodic metal 4 is covered on the contact zone P+ 2 simultaneously；
Step 9: deposit passivation layer；
Step 10: rearwardly injecting p-type impurity and carry out it is ion-activated, formed the collector area P++ 10；
Step 11: back metal, forms metallization collector 10 in 10 lower surface of the collector area P++.
Second of manufacturing method is by forming N+ cutoff layers to N++ layers of progress impurity compensation, and steps are as follows:
Step 1: choosing doping concentration is 5e13cm-3N-type silicon chip as silicon substrate, i.e. N-type in structure is partly led
Body drift region 1 drifts about 1 back side of region layer by phosphonium ion injection in N- first and knot forms N++ layer 9；
Step 2: forming N+ layer 8 to N++ layers of progress impurity compensation by a boron ion injection and knot；
Step 3: in the grid oxygen of N- drift 1 upper surface of region layer growth 100nm, i.e. gate oxide 7, then depositing polysilicon,
Form polygate electrodes 6.
Step 4: in N- drift 1 injecting p-type impurity of region layer and knot formation p-type base area 3；
Step 4: injecting N-type impurity in p-type base area 3 forms N+ emitter region 5；
Step 6: injecting p-type impurity and the knot formation contact zone P+ 2 in p-type base area 3；
Step 7: depositing BPSG insulating medium layer in device upper surface, ohmic contact hole is etched；
Step 8: depositing metal forming 5 upper surface of N+ emitter region, cathodic metal 4 is formed, only covering part N+ emitter region
5, cathodic metal 4 is covered on the contact zone P+ 2 simultaneously；
Step 9: deposit passivation layer；
Step 10: rearwardly injecting p-type impurity and carry out it is ion-activated, formed the collector area P++ 10；
Step 11: back metal, forms metallization collector 10 in 10 lower surface of the collector area P++.
IGBT is led to novel reverse provided by the invention and conventional inverse IGBT structure of leading carries out simulation comparison, is further demonstrated
The superiority of this structure.Routine is inverse to lead IGBT structure as shown in Fig. 2, novel reverse provided by the invention leads IGBT structure such as Fig. 1 institute
Show, the cellular thickness of device is 100um, and conventional against leading in IGBT structure, the ratio of N+ shorting region 10 and P+ collecting zone 9 is 1:
5。
Known by Fig. 6, novel reverse proposed by the present invention leads IGBT forward conduction characteristic and leads IGBT better than conventional inverse and utilize tunnel
Road diode realizes the inverse IGBT led, and conventional against IGBT is led, there are apparent snapback effects, and knock-on voltage VSB=8.8V；Benefit
Realize that the inverse IGBT led also shows apparent snapback phenomenon with tunnel diode；Novel reverse proposed by the present invention is led
Voltage rebound phenomenon is not present in IGBT.Forward conduction current density is 100A/cm2When, the conventional inverse forward conduction pressure for leading IGBT
Drop is about 1.19V, it is proposed by the present invention it is inverse to lead the forward conduction voltage drop of IGBT be about 1.05V, reduce 11.8%, this be by
Effective collecting zone area is bigger in the present invention.
Known by Fig. 7, when Vce is -5V, novel reverse of the present invention leads IGBT device and realizes reverse-conducting, i.e. P++ collector at this time
The PN junction that area 10 and N++ floor 9 are constituted punctures, and a large amount of electron hole pair is generated, due to the collector area P++ 10 and N++ layer 9
It is heavy doping, peak value electric field Emax when breakdown is about 1.25e6V/cm, knows PN junction breakdown at this time both comprising snow by Fig. 8
Breakdown is collapsed also comprising tunnel breakdown, but mainly based on avalanche breakdown.By the mechanism of junction breakdown it is found that as long as Vce maintains -5V
It can be achieved with reverse-conducting.And tunnel diode is utilized to realize in the IGBT of reverse-conducting, based on tunnel breakdown, due to potential barrier
Area is very thin, even if electric field is very strong, carrier accelerates to be not achieved in barrier region kinetic energy necessary to generating multiplier effect, cannot
Generate avalanche breakdown.For conventional FS-IGBT, reverse BV has reached 300V or so, therefore does not have reverse-conducting
Ability.
Fig. 9 show the present invention and proposes that novel reverse is led in IGBT, and reverse BV is with N+ cutoff layer doping concentrations
Change curve, the doping concentrations of N+ cutoff layers of Ying Tigao is to reduce the reverse BV of device, so that device is lower
Avalanche breakdown occurs under emitter voltage.Therefore, novel reverse proposed by the present invention is led in IGBT, the collector area P++ 10 and N++
The doping concentration of layer 9 should reach 1 × 1017cm-3~1 × 1019cm-3, rely primarily on avalanche breakdown effects and realize reverse-conducting.
Dipulse circuit shown in Fig. 10, can be used for reflecting the reverse recovery characteristic of device IGBT1, i.e., IGBT1 is by reversed
When conduction mode is converted to forward blocking mode, the process of drift region excess carriers is extracted.Reverse current fall off rate [dJ/
dt]RA big potential can be generated in circuit inductance, which can be superimposed on the supply voltage, generate voltage overshoot phenomenon.
This phenomenon can be measured with softness factor S, and S is bigger, reverse current fall off rate [dJ/dt]RSmaller, when S > 0.8, can determine whether this
Device has the characteristic of soft recovery.As shown in Figure 11, the softness factor S that novel reverse proposed by the present invention leads IGBT is about 10, tool
There are good soft recovery characteristics.
Figure 12 is common single-ended quasi-resonance circuit in electromagnetic oven, is switched on and off by IGBT in control circuit, week
The electric current of phase property flows through inductance, forms alternate magnetic field.Figure 13 is in the quasi-resonance circuit shown in Figure 12 respectively using conventional
It is inverse to lead IGBT and novel reverse proposed by the present invention leads collector current Ic, the collector-emitter voltage of the IGBT that IGBT is obtained
Vce versus time curve, by comparison it is found that novel reverse proposed by the present invention leads IGBT can replace and conventional inverse lead IGBT and exist
Application in quasi-resonance circuit can generate the electric current of mechanical periodicity on resonant inductance Lr.As shown in Figure 14, in a cycle
The forward conduction time accounts for 46.5%, and the reverse-conducting time only accounts for 13% or so, therefore the energy consumption of device in one cycle is main
It is determined by forward conduction with the two processes are turned off, the energy consumption very little generated during reverse-conducting, thus while the present invention mentions
The threshold voltage that novel reverse out leads IGBT reverse-conducting is larger, but since the time of reverse-conducting is short and the electricity of reverse-conducting
It flows small, too big energy consumption will not be caused.
In conclusion with it is conventional inverse lead IGBT compared with, will not be sent out when novel reverse proposed by the present invention leads IGBT forward conduction
Raw Snapback phenomenon, while there is more preferably forward conduction characteristic, although the threshold voltage of reverse-conducting is bigger, such as
The forward conduction time of quasi-resonance circuit one kind accounts in most application, will not bring too many additional energy consumption.In addition, this hair
The novel reverse of bright proposition, which leads IGBT also, has the characteristics that soft recovery characteristics are more preferable.
Claims (4)
1. a kind of no Snapback effect is inverse to lead IGBT, including collector structure, drift region structure, gate structure and emitter junction
Structure；
The collector structure includes the collector area P++ (10) and the metallization current collection for being located at the collector area P++ (10) lower surface
Pole (11)；
The drift region structure include the N++ layer (9) being set side by side and N+ cutoff layers (8) and be located at N++ layers (9) and N+
The N- of field cutoff layer (8) upper surface drifts about region layer (1), and N++ layers (9) and N+ cutoff layers (8) are located at the collector area P++ (10)
Upper surface；
The gate structure is trench gate, and at N- drift region layer (1) upper surface both ends, structure includes gate oxide for insertion setting
(7) and be located at gate oxide (7) in polygate electrodes (6)；
The emitter structure is located between two trench gates, and structure includes N+ emitter region (5), p-type base area (3), P+ contact
Area (2) and metallization emitter (4), p-type base area (3) the insertion setting is in N- drift region layer (1) upper surface, the N+ transmitting
Area (5) is located at p-type base area (3) upper layer and contacts with trench gate, and the contact zone P+ (2) is located in p-type base area (3), and position
Between the N+ emitter region (5) of two sides, the contact zone P+ (2) both ends also extend to N+ emitter region (5) lower surface；The contact zone P+ (2)
Junction depth is greater than the junction depth of N+ emitter region (5)；Metallization emitter (4) is located at the upper table of N+ emitter region (5) and the contact zone P+ (2)
Face, emitter (4) only covering part N+ emitter region (5) of metallizing.
2. a kind of no Snapback effect according to claim 1 is inverse to lead IGBT, which is characterized in that utilize P++ collector
Reverse-conducting is realized in the avalanche breakdown of area (10) and N++ cutoff layers (9), and the collector area P++ (10) concentration is 1 × 1017cm-3
~1 × 1019cm-3, junction depth is 0.5~1um；The doping concentration of N+ cutoff layers (8) is 1 × 1015cm-3~1 × 1016cm-3, knot
Depth is 2~5um；The doping concentration of N++ layers (9) is 1 × 1017cm-3~1 × 1019cm-3, junction depth is identical as N+ cutoff layer (8),
For 2~5um.
3. a kind of inverse manufacturing method for leading IGBT of no Snapback effect according to claim 1, which is characterized in that including
Following steps:
Step 1: choosing doping concentration is 5e13cm-3N-type silicon chip as silicon substrate, i.e., the drift of N-type semiconductor in structure
Area (1) drifts about region layer (1) back side by phosphonium ion injection in N- first and knot forms N+ cutoff layers (8)；
Step 2: passing through N++ layers (9) of a phosphonium ion injection and knot formation again；
Step 3: in the grid oxygen of N- drift region layer (1) upper surface growth 100nm, i.e. gate oxide (7), then depositing polysilicon,
It is formed polygate electrodes (6).
Step 4: in N- drift region layer (1) injecting p-type impurity and knot formation p-type base area (3)；
Step 4: injection N-type impurity forms N+ emitter region (5) in p-type base area (3)；
Step 6: injecting p-type impurity and the knot formation contact zone P+ (2) in p-type base area (3)；
Step 7: depositing BPSG insulating medium layer in device upper surface, ohmic contact hole is etched；
Step 8: depositing metal forming N+ emitter region (5) upper surface, formed cathodic metal (4), only covering part N+ emitter region
(5), cathodic metal 4 is covered on the contact zone P+ 2 simultaneously；
Step 9: deposit passivation layer；
Step 10: rearwardly injecting p-type impurity and carry out it is ion-activated, formed the collector area P++ (10)；
Step 11: back metal, forms metallization collector (11) in the collector area P++ (10) lower surface.
4. a kind of inverse manufacturing method for leading IGBT of no Snapback effect according to claim 1, which is characterized in that including
Following steps:
Step 1: choosing doping concentration is 5e13cm-3N-type silicon chip as silicon substrate, i.e., the drift of N-type semiconductor in structure
Area (1) drifts about region layer (1) back side by phosphonium ion injection in N- first and knot forms N++ layers (9)；
Step 2: forming N+ layers (8) to N++ layers of progress impurity compensation by a boron ion injection and knot；
Step 3: in the grid oxygen of N- drift region layer (1) upper surface growth 100nm, i.e. gate oxide (7), then depositing polysilicon,
It is formed polygate electrodes (6).
Step 4: in N- drift region layer (1) injecting p-type impurity and knot formation p-type base area (3)；
Step 4: injection N-type impurity forms N+ emitter region (5) in p-type base area (3)；
Step 6: injecting p-type impurity and the knot formation contact zone P+ (2) in p-type base area (3)；
Step 7: depositing BPSG insulating medium layer in device upper surface, ohmic contact hole is etched；
Step 8: depositing metal forming N+ emitter region (5) upper surface, formed cathodic metal (4), only covering part N+ emitter region
(5), cathodic metal 4 is covered on the contact zone P+ 2 simultaneously；
Step 9: deposit passivation layer；
Step 10: rearwardly injecting p-type impurity and carry out it is ion-activated, formed the collector area P++ (10)；
Step 11: back metal, forms metallization collector (11) in the collector area P++ (10) lower surface.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112201688A (en) * | 2020-08-25 | 2021-01-08 | 株洲中车时代半导体有限公司 | Reverse conducting IGBT chip |
| CN114709264A (en) * | 2022-03-28 | 2022-07-05 | 广东可易亚半导体科技有限公司 | GaN longitudinal reverse conducting junction field effect transistor |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5981981A (en) * | 1993-10-13 | 1999-11-09 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device including a bipolar structure |
| JP2008181975A (en) * | 2007-01-23 | 2008-08-07 | Mitsubishi Electric Corp | Semiconductor device and manufacturing method thereof |
| CN101378073A (en) * | 2007-08-30 | 2009-03-04 | 东部高科股份有限公司 | Insulated gate bipolar transistor and method for manufacturing the same |
| CN104253155A (en) * | 2013-06-27 | 2014-12-31 | 快捷韩国半导体有限公司 | Power device and method of manufacturing the same |
| CN109904225A (en) * | 2019-03-29 | 2019-06-18 | 电子科技大学 | A kind of high reliability IGBT and its manufacturing method |
-
2019
- 2019-08-15 CN CN201910753248.8A patent/CN110400834B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5981981A (en) * | 1993-10-13 | 1999-11-09 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device including a bipolar structure |
| JP2008181975A (en) * | 2007-01-23 | 2008-08-07 | Mitsubishi Electric Corp | Semiconductor device and manufacturing method thereof |
| CN101378073A (en) * | 2007-08-30 | 2009-03-04 | 东部高科股份有限公司 | Insulated gate bipolar transistor and method for manufacturing the same |
| CN104253155A (en) * | 2013-06-27 | 2014-12-31 | 快捷韩国半导体有限公司 | Power device and method of manufacturing the same |
| CN109904225A (en) * | 2019-03-29 | 2019-06-18 | 电子科技大学 | A kind of high reliability IGBT and its manufacturing method |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112201688A (en) * | 2020-08-25 | 2021-01-08 | 株洲中车时代半导体有限公司 | Reverse conducting IGBT chip |
| CN112201688B (en) * | 2020-08-25 | 2023-04-07 | 株洲中车时代半导体有限公司 | Reverse conducting IGBT chip |
| CN114709264A (en) * | 2022-03-28 | 2022-07-05 | 广东可易亚半导体科技有限公司 | GaN longitudinal reverse conducting junction field effect transistor |
| CN114709264B (en) * | 2022-03-28 | 2024-07-23 | 广东可易亚半导体科技有限公司 | GaN longitudinal reverse conduction junction field effect transistor |
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