CN110324078B - System and method for detecting optical interface differential signal fault - Google Patents
System and method for detecting optical interface differential signal fault Download PDFInfo
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- CN110324078B CN110324078B CN201810291145.XA CN201810291145A CN110324078B CN 110324078 B CN110324078 B CN 110324078B CN 201810291145 A CN201810291145 A CN 201810291145A CN 110324078 B CN110324078 B CN 110324078B
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- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/66—Testing of connections, e.g. of plugs or non-disconnectable joints
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- H—ELECTRICITY
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- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/07—Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems
- H04B10/073—Arrangements for monitoring or testing transmission systems; Arrangements for fault measurement of transmission systems using an out-of-service signal
- H04B10/0731—Testing or characterisation of optical devices, e.g. amplifiers
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Abstract
The invention relates to an optical interface detection technology in the field of data communication, discloses an optical interface differential signal fault detection method, and solves the problem that an optical interface tool in the traditional technology cannot detect the optical interface differential signal fault of equipment in loopback detection. The method can be summarized as follows: the test platform sends an optical interface test command to the tested equipment; the tested equipment sends the optical interface test command to a test tool; the testing tool controls a signal pin of one polarity of an optical interface of the tested equipment to be grounded in a simulation mode; then, the tested device sends a loopback test data packet to the optical interface; and testing whether the differential signal pin of the other polarity of the optical interface has a fault by the testing tool. In addition, the invention also discloses an optical interface differential signal fault detection system which is suitable for detecting the differential signal fault of the optical interface equipment.
Description
Technical Field
The invention relates to an optical interface detection technology in the field of data communication, in particular to an optical interface differential signal fault detection system and method.
Background
In high-bandwidth network communication products, a large number of differential signals are adopted for interface interconnection, and particularly, data transmission is mainly carried out between optical interfaces by using the differential signals; in order to ensure the reliability of signal transmission, an optical interface tool is usually used to perform short-distance loopback detection on an optical interface of the device.
Because of the characteristics of the differential signal (on the premise of meeting the requirement of the amplitude of the differential signal, when the optical interface tool is used for carrying out short-distance loopback test on the interface differential signal, as long as one signal in the positive pole (P) or the negative pole (N) of the differential signal can be normally communicated, the interface can still be normally tested without being influenced), if in the actual production process of the equipment, the condition of poor welding or false welding of an outgoing line in the positive pole pin (P) or the negative pole (N) of the differential signal of the optical port is caused, the fault of the optical interface differential signal of the equipment cannot be detected in the loopback detection based on the current optical interface tool, and the equipment has great hidden danger in the actual application process of the market.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: the system and the method for detecting the optical interface differential signal fault solve the problem that the optical interface tool in the traditional technology cannot detect the optical interface differential signal fault of the equipment in loopback detection.
On one hand, the embodiment of the invention provides an optical interface differential signal fault detection system, which comprises a test platform, a test tool and a tested device; the test tool is connected with an optical interface to be tested of the tested equipment;
the test platform is used for sending an optical interface test command to the tested equipment and acquiring an optical interface test result fed back by the tested equipment;
the tested equipment is used for sending the optical interface test command to the test tool through the optical interface to be tested when receiving the optical interface test command sent by the test platform, and constructing a test data packet to carry out loopback test on the optical interface to be tested;
the testing tool is used for controlling one polarity differential signal pin of the optical interface to be tested of the tested equipment to simulate grounding when receiving an optical interface testing command sent by the tested equipment, judging whether the other polarity differential signal pin of the optical interface to be tested has a fault or not, and feeding back a testing result of the optical interface to be tested to the testing platform through the tested equipment.
As a further optimization, the testing tool is a programmable logic controller.
As further optimization, a power supply input end of the test tool is connected with a power supply end of the optical interface to be tested of the tested equipment, and a general purpose input/output (GPIO) pin of the test tool is correspondingly connected with a differential signal pin of the optical interface to be tested of the tested equipment; and the I2C pin of the test tool is correspondingly connected with the I2C pin of the optical interface to be tested of the tested equipment.
As further optimization, the test fixture controls a polarity differential signal pin of the optical interface to be tested of the device under test to simulate grounding, specifically:
the testing tool controls the level of a general purpose input/output (GPIO) pin of a positive differential signal pin of an optical interface to be tested, which is connected to the tested equipment, to be pulled down so as to control the positive differential signal pin to simulate grounding;
or the test tool controls the level of a general input/output GPIO pin of a cathode differential signal pin of an optical interface to be tested, which is connected to the equipment to be tested, to be pulled down so as to control the cathode differential signal pin to simulate grounding.
As a further optimization, the test platform is further configured to perform fault error reporting on the optical interface to be tested with the fault in the differential signal pin.
For further optimization, the general purpose input/output GPIO pin of the test tool is correspondingly connected with the differential signal pin of the optical interface to be tested of the tested equipment through a logic switch.
On the other hand, an embodiment of the present invention further provides an optical interface differential signal fault detection method, which is applied to the fault detection system, and the method includes the following steps:
the test platform sends an optical interface test command to the tested equipment;
the tested equipment sends the optical interface test command to a test tool through an optical interface to be tested;
the testing tool controls the anode/cathode differential signal pin of the optical interface to be tested of the tested equipment to simulate grounding;
the tested equipment sends a test data packet to the optical interface to be tested;
and the test tool tests whether the negative/positive differential signal pin of the optical interface to be tested has a fault.
As further optimization, the test fixture controls the analog grounding of the anode/cathode differential signal pin of the optical interface to be tested of the device under test, and specifically includes:
the testing tool controls the level of a general purpose input/output (GPIO) pin of a positive differential signal pin of an optical interface to be tested, which is connected to the tested equipment, to be pulled down so as to control the positive differential signal pin to simulate grounding;
or the test tool controls the level of a general input/output GPIO pin of a cathode differential signal pin of an optical interface to be tested, which is connected to the equipment to be tested, to be pulled down so as to control the cathode differential signal pin to simulate grounding.
As further optimization, the test fixture tests whether the negative/positive differential signal pin of the optical interface to be tested fails, and specifically includes: if the optical interface is judged to have a fault, the test tool feeds back the test result of the optical interface to the test platform through the tested equipment: and the test platform carries out fault error reporting on the optical interface to be tested with the fault in the differential signal pin.
As a further optimization, the testing tool controls the anode/cathode differential signal pin of the optical interface of the device under test to be grounded in an analog manner, and specifically includes that the testing tool controls the anode/cathode differential signal pin of the optical interface under test of the device under test to be grounded in an analog manner through a CPLD.
The invention has the beneficial effects that: in the loopback test process, a test platform sends an optical interface test command to the tested equipment, the tested equipment sends the optical interface test command to a test fixture through a to-be-tested optical interface, the test fixture simulates and grounds one polarity (anode/cathode) differential signal pin of the to-be-tested optical interface of the tested equipment after receiving the optical interface test command, and then the tested equipment sends a test data packet to the to-be-tested optical interface to test whether the other polarity (cathode/anode) differential signal pin of the optical interface has a fault; therefore, the accurate detection of the differential signal fault of the optical interface can be realized, so that fault problem equipment can be intercepted, and the maintenance cost of later equipment is reduced.
Drawings
FIG. 1 is a block diagram of an optical interface differential signal fault detection system according to the present invention;
fig. 2 is a schematic circuit diagram of an optical interface differential signal fault detection system in embodiment 1;
fig. 3 is a schematic circuit diagram of an optical interface differential signal fault detection system in embodiment 2;
fig. 4 is a flowchart of an optical interface differential signal fault detection method in embodiment 3.
Detailed Description
The invention aims to provide an optical interface differential signal fault detection system and method, which solve the problem that the optical interface differential signal fault of equipment cannot be detected in loopback detection of an optical interface tool in the prior art. In the loopback test process, a test platform sends an optical interface test command to a tested device, the tested device sends the optical interface test command to a test fixture through a to-be-tested optical interface, the test fixture simulates and grounds one polarity (anode/cathode) differential signal pin of the to-be-tested optical interface of the tested device after receiving the optical interface test command, and then the tested device sends a test data packet to the to-be-tested optical interface to test whether the other polarity (cathode/anode) differential signal pin of the optical interface has a fault; therefore, the accurate detection of the differential signal fault of the optical interface can be realized, so that fault problem equipment can be intercepted, and the maintenance cost of later equipment is reduced.
As shown in fig. 1, the optical interface differential fault detection system of the present invention includes a test platform, a test fixture, and a device under test; the test tool is connected with an optical interface to be tested of the tested equipment;
the test platform is used for sending an optical interface test command to the tested equipment and acquiring an optical interface test result fed back by the tested equipment;
the tested device is used for sending the optical interface test command to the test tool when receiving the optical interface test command sent by the test platform, and constructing a test data packet to carry out loopback test on the optical interface to be tested;
the testing tool is used for controlling one polarity differential signal pin of the optical interface to be tested of the tested equipment to simulate grounding when receiving an optical interface testing command sent by the tested equipment, judging whether the other polarity differential signal pin of the optical interface to be tested has a fault or not, and feeding back a testing result of the optical interface to be tested to the testing platform through the tested equipment.
The scheme of the invention is described in detail with reference to the accompanying drawings and examples:
example 1:
as shown in fig. 2, the test fixture in the optical interface differential signal fault detection system in this embodiment includes a CPLD (programmable logic controller), which has the characteristics of flexible programming and high integration level, and can meet the requirement of the automated test of the present invention;
the power supply input end VDD pin of the CPLD is connected with power supply end VCC _ R and VCC _ T of the optical interface to be tested of the tested equipment, so that the CPLD is powered by the power supply of the optical interface to be tested;
I2C bus pins I2C _ SDA and I2C _ SCL of the optical interface to be tested are connected with I2C bus pins I2C _ SDA1 and I2C _ SCL1 of the CPLD through an I2C bus, and general input/output GPIO pins (RX _ P1 and RX _ N1) of the CPLD are correspondingly connected with differential signal receiving pins RXD _ P and RXD _ N of the optical interface to be tested through a logic switch; the enabling end of the logic switch is connected with a GPIO control pin EN1 of the CPLD;
a differential signal transmitting pin TXD _ P and TXD _ N of the to-be-detected optical interface are correspondingly connected with a differential signal receiving pin RXD _ P and RXD _ N thereof, so that a self-loop circuit is formed;
in this embodiment, the test platform sends a test command of the light emitting interface to the device under test, after receiving the test command of the light emitting interface, the CPU of the device under test sends the test command of the light emitting interface to the CPLD through I2C, after receiving the test command of the light emitting interface, the CPLD enables the logic switch, and the CPLD controls to pull down the level of the general input/output GPIO pin RX _ P1 connected to the positive differential signal pin of the light emitting interface under test, so as to control the positive differential signal pin to simulate grounding; then, the tested equipment sends a test data packet to the optical interface to be tested so as to test whether a negative differential signal pin of the optical interface to be tested has a fault;
if no fault exists, the CPLD controls to pull down the level of a general input/output GPIO pin RX _ N1 connected to a negative differential signal pin of the optical interface to be tested so as to control the negative differential signal pin to simulate grounding; and then the tested equipment sends a test data packet to the optical interface to be tested so as to test whether the positive differential signal pin of the optical interface to be tested has a fault.
The purpose of using the logic switch here is to reduce the effect of stub connected to GPIO on the differential signal.
Example 2:
as shown in fig. 3, the present embodiment is different from embodiment 1 in that: in the embodiment 1, a to-be-tested optical interface of the device to be tested is adopted to carry out self-loop test; in this embodiment, a pair of optical interfaces to be tested of the device under test is used to perform the far-end loopback test.
In this embodiment, the test fixture includes a CPLD (programmable logic controller), and a power supply input terminal VDD pin of the CPLD is connected to power supply terminals VCC _ R and VCC _ T of the first to-be-measured optical interface and the second to-be-measured optical interface of the device to be tested, so that the power supply terminals of the first to-be-measured optical interface and the second optical interface supply power to the CPLD;
the I2C bus pins I2C _ SDA and I2C _ SCL of the first to-be-tested optical interface are connected with the I2C bus pins I2C _ SDA0 and I2C _ SCL0 of the CPLD through an I2C bus, and the general input/output GPIO pins RX _ P0 and RX _ N0 of the CPLD are correspondingly connected with the differential signal receiving pins RXD _ P and RXD _ N of the first to-be-tested optical interface through a logic switch; the enabling end of the logic switch is connected with an enabling end pin EN0 of the CPLD;
I2C bus pins I2C _ SDA and I2C _ SCL of the second optical interface to be tested are connected with I2C bus pins I2C _ SDA1 and I2C _ SCL1 of the CPLD through an I2C bus, and general input/output GPIO pins RX _ P1 and RX _ N1 of the CPLD are correspondingly connected with differential signal receiving pins RXD _ P and RXD _ N of the second optical interface to be tested through another logic switch; the enable terminal of the logic switch is connected with an enable terminal pin EN1 of the CPLD.
Differential signal receiving pins RXD _ P and RXD _ N of the first optical interface to be tested are correspondingly connected with differential signal transmitting pins TXD _ P and TXD _ N of the second optical interface to be tested; and differential signal receiving pins RXD _ P and RXD _ N of the second optical interface to be tested are correspondingly connected with differential signal transmitting pins TXD _ P and TXD _ N of the first optical interface to be tested.
In this embodiment, when testing the first to-be-tested optical interface, the test platform sends an optical interface test command to the to-be-tested device, the to-be-tested device sends the test command to the CPLD through the first to-be-tested optical interface after receiving the optical interface test command, and the CPLD controls to pull down the level of the general input/output GPIO pin RX _ P0 connected to the positive differential signal pin of the first to-be-tested optical interface after receiving the optical interface test command, so as to control the positive differential signal pin to be grounded in an analog manner; then, the tested equipment sends a test data packet to the first interface to be tested so as to test whether a negative differential signal pin of the first interface to be tested has a fault;
if no fault exists, the CPLD controls to pull down the level of a general input/output GPIO pin RX _ N0 connected to a negative differential signal pin of the first to-be-detected optical interface so as to control the negative differential signal pin to be grounded in an analog mode; and then the tested equipment sends a test data packet to the first interface to be tested so as to test whether the positive differential signal pin of the first interface to be tested has a fault.
When the second optical interface to be tested is tested, the test platform sends an optical interface test command to the tested equipment, the tested equipment sends the test command to the CPLD through the second optical interface to be tested after receiving the optical interface test command, and the CPLD controls to pull down the level of a general input/output GPIO pin RX _ P1 connected to an anode differential signal pin of the second optical interface to be tested after receiving the optical interface test command so as to control the anode differential signal pin to be grounded in an analog manner; then the tested equipment sends a test data packet to the second optical interface to be tested so as to test whether the negative differential signal pin of the second optical interface to be tested has a fault;
if no fault exists, the CPLD controls to pull down the level of a general input/output GPIO pin RX _ N1 connected to a negative differential signal pin of the second optical interface to be tested so as to control the negative differential signal pin to be grounded in an analog mode; and then the tested equipment sends a test data packet to the second optical interface to be tested so as to test whether the positive differential signal pin of the second optical interface to be tested has a fault.
Example 3:
the method for detecting the differential fault of the optical interface provided by the embodiment is shown in fig. 4, and includes the following implementation steps:
s01, the test platform sends an optical interface test command to the tested equipment;
in this step, the test platform sends an optical interface test command to the device under test through the ethernet bus.
S02, the tested equipment sends the optical interface test command to a test tool through an optical interface to be tested;
in this step, the tested device sends the received optical interface test command to the CPLD of the test fixture through the I2C bus.
S03, controlling the anode differential signal pin of the optical interface to be tested of the tested equipment to simulate grounding by the test fixture;
in this step, the CPLD of the test fixture controls the positive differential signal pin to simulate grounding by pulling down the general purpose input/output GPIO pin level of the positive differential signal pin connected to the optical interface to be tested of the device under test.
S04, the tested equipment sends a test data packet to the optical interface to be tested;
in this step, the device under test first constructs a test data packet for the optical interface to be tested, such as: and constructing a data packet with a source address and a destination address both being the address of the first optical interface when the first optical interface needs to be tested, and then sending the data packet to the first optical interface.
S05, testing whether a negative differential signal pin of the optical interface to be tested breaks down or not by using a testing tool; if yes, go to step S09; otherwise, go to step S06;
in this step, since the positive differential signal pin of the optical interface differential signal to be tested is grounded in a simulation manner in step S03, data can only be received and transmitted through the negative differential signal pin, so that it is possible to test whether the negative differential signal pin fails by determining whether the optical interface to be tested normally receives data.
If the negative differential signal pin is judged to have a fault, the optical interface to be tested can be directly judged to be a fault interface, but the positive differential signal pin needs to be tested again, after the test is finished, the test on the optical interface to be tested is finished, the step S09 is entered, and the test result of the optical interface to be tested is fed back to the test platform through the tested equipment; if the negative differential signal pin has no fault, the positive differential signal pin also needs to be further tested for faults.
S06, controlling the negative differential signal pin of the optical interface to be tested of the tested equipment to simulate grounding by the test fixture;
in this step, if it is tested that the negative differential signal pin of the optical interface to be tested has no fault, that is, data can be normally received, the positive differential signal pin of the optical interface to be tested is tested again; similarly, the CPLD needing to test the tooling controls the level of the general input/output GPIO pin of the negative differential signal pin of the optical interface to be tested connected to the tested equipment to control the negative differential signal pin to simulate grounding.
S07, the tested equipment sends a test data packet to the optical interface to be tested;
in this step, the device under test first constructs a test data packet for the optical interface to be tested, such as: and if the first interface to be tested needs to be tested, constructing a data packet of which the source address and the destination address are the addresses of the first interface to be tested, and then sending the data packet to the first interface to be tested.
S08, testing whether the positive differential signal pin of the optical interface to be tested breaks down or not by the testing tool, and entering the step S09;
in this step, since the negative differential signal pin of the optical interface differential signal to be tested is grounded in a simulation manner in step S06, data can only be received and transmitted through the positive differential signal pin, so that it is possible to test whether the positive differential signal pin fails by determining whether the optical interface to be tested normally receives data. And after the positive differential signal pin of the optical interface to be tested is tested, the test of the optical interface to be tested is finished.
S09, the test tool feeds back a test result of the optical interface to be tested to the test platform through the tested equipment;
in this step, as long as the test of the optical interface to be tested is finished, the test result of the optical interface to be tested is fed back to the test platform through the tested equipment.
S10, the test platform carries out fault error reporting on the optical interface with the fault in the differential signal pin.
In this step, the test platform performs fault reporting on a certain port if detecting that the port has abnormal packet loss or is closed according to the fed back test result, so as to accurately position the failed port.
Claims (8)
1. The system for detecting the differential signal fault of the optical interface is characterized by comprising a test platform, a test tool and a tested device; the test tool is connected with an optical interface to be tested of the tested equipment;
the test platform is used for sending an optical interface test command to the tested equipment and acquiring an optical interface test result fed back by the tested equipment;
the tested equipment is used for sending the optical interface test command to the test tool through the optical interface to be tested when receiving the optical interface test command sent by the test platform, and constructing a test data packet to carry out loopback test on the optical interface to be tested;
the test tool is used for controlling one polarity differential signal pin of the optical interface to be tested of the tested equipment to simulate grounding when receiving an optical interface test command sent by the tested equipment, judging whether the other polarity differential signal pin of the optical interface to be tested has a fault, and feeding back a test result of the optical interface to be tested to the test platform through the tested equipment;
the method is characterized in that a polarity differential signal pin of the optical interface to be tested of the controlled device is used for simulating and grounding, and the method specifically comprises the following steps:
the testing tool controls the level of a general purpose input/output (GPIO) pin of a positive differential signal pin of an optical interface to be tested, which is connected to the tested equipment, to be pulled down so as to control the positive differential signal pin to simulate grounding;
or the test tool controls the level of a general input/output GPIO pin of a cathode differential signal pin of an optical interface to be tested, which is connected to the equipment to be tested, to be pulled down so as to control the cathode differential signal pin to simulate grounding.
2. The inspection system of claim 1, wherein the test fixture is a programmable logic controller.
3. The detection system according to claim 1, wherein the power input terminal of the test fixture is connected to a power supply terminal of the optical interface under test of the device under test, the general purpose input/output GPIO pin of the test fixture is correspondingly connected to the differential signal pin of the optical interface under test of the device under test, and the I2C pin of the test fixture is correspondingly connected to the I2C pin of the optical interface under test of the device under test.
4. The detection system of claim 3, wherein the GPIO pin of the test fixture is further connected to a differential signal pin of the optical interface under test of the device under test via a logic switch.
5. The detection system according to any one of claims 1 to 4, wherein the test platform is further configured to perform fault error reporting on the optical interface under test with a fault in the differential signal pin.
6. An optical interface differential signal fault detection method, characterized in that the method comprises the following steps:
the test platform sends an optical interface test command to the tested equipment;
the tested equipment sends the optical interface test command to a test tool through an optical interface to be tested;
the testing tool controls the anode/cathode differential signal pin of the optical interface to be tested of the tested equipment to simulate grounding;
the tested equipment sends a test data packet to the optical interface to be tested;
the testing tool tests whether the negative/positive differential signal pin of the optical interface to be tested has a fault;
the testing tool controls the anode/cathode differential signal pin of the optical interface to be tested of the tested equipment to simulate grounding, and specifically comprises:
the testing tool controls the level of a general purpose input/output (GPIO) pin of a positive differential signal pin of an optical interface to be tested, which is connected to the tested equipment, to be pulled down so as to control the positive differential signal pin to simulate grounding;
or the test tool controls the level of a general input/output GPIO pin of a cathode differential signal pin connected to an optical interface of the tested equipment to be pulled down so as to control the cathode differential signal pin to simulate grounding.
7. The detection method according to claim 6, wherein the test fixture controls analog grounding of a positive/negative differential signal pin of an optical interface of the device under test, and specifically comprises: the testing tool utilizes the logic switch to control the anode/cathode differential signal pin of the optical interface to be tested of the tested equipment to simulate grounding.
8. The detection method according to claim 6 or 7, wherein the testing tool tests whether the negative/positive differential signal pin of the optical interface to be tested has a fault, specifically comprising: if the optical interface is judged to be in fault, the test tool feeds back the test result of the optical interface to the test platform through the tested equipment; and the test platform carries out fault error reporting on the optical interface to be tested with the fault in the differential signal pin.
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| CN1415971A (en) * | 2001-11-03 | 2003-05-07 | 华为技术有限公司 | Functional test method for measuring fault at single end of difference serial circuit |
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| CN102193008A (en) * | 2010-03-03 | 2011-09-21 | 鸿富锦精密工业（深圳）有限公司 | Probe |
| CN102355380A (en) * | 2011-08-17 | 2012-02-15 | 迈普通信技术股份有限公司 | Hardware testing device and method for synchronous asynchronous serial interface |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1415971A (en) * | 2001-11-03 | 2003-05-07 | 华为技术有限公司 | Functional test method for measuring fault at single end of difference serial circuit |
| CN200959622Y (en) * | 2006-07-31 | 2007-10-10 | 华为技术有限公司 | Difference signal transmission line detecting system |
| CN102193008A (en) * | 2010-03-03 | 2011-09-21 | 鸿富锦精密工业（深圳）有限公司 | Probe |
| CN201733310U (en) * | 2010-08-09 | 2011-02-02 | 青岛海信宽带多媒体技术有限公司 | Self-linking optical returning module capable of power supply indication |
| CN102355380A (en) * | 2011-08-17 | 2012-02-15 | 迈普通信技术股份有限公司 | Hardware testing device and method for synchronous asynchronous serial interface |
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