CN102355380A - Hardware testing device and method for synchronous asynchronous serial interface - Google Patents
Hardware testing device and method for synchronous asynchronous serial interface Download PDFInfo
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- CN102355380A CN102355380A CN2011102357787A CN201110235778A CN102355380A CN 102355380 A CN102355380 A CN 102355380A CN 2011102357787 A CN2011102357787 A CN 2011102357787A CN 201110235778 A CN201110235778 A CN 201110235778A CN 102355380 A CN102355380 A CN 102355380A
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Abstract
The invention relates to a communication technique. The invention can be used for solving the problems of a traditional communication device that a hardware testing mode of a synchronous asynchronous serial interface is inferior in intuitive performance, a fault is difficult to be positioned and the quality of products is difficult to be ensured because detection is not comprehensive enough. The invention provides a hardware testing device and method for a synchronous asynchronous serial interface. The technical scheme is as follows: the hardware testing device for the synchronous asynchronous serial interface is connected to the synchronous asynchronous serial interface of a tested device through a first synchronous asynchronous serial interface; a second synchronous asynchronous serial interface is respectively connected to the first synchronous asynchronous serial interface and a synchronous asynchronous serial interface test connector having a loopback; and a signal detection circuit is respectively connected to the first synchronous asynchronous serial interface and a state display module. The hardware testing device provided by the invention has the beneficial effects that the level, quality, stability and amplitude of each signal are directly reflected and the hardware testing device is suitable for the hardware test of the synchronous asynchronous serial interface.
Description
Technical field
The present invention relates to the communication technology, particularly the hardware circuit detection technique of synchronous and asynchronous serial line interface in the communications field.
Background technology
In data communications equipment, data terminal equipment and other data processing equipment, various serial data communication interfaces are equipped with, as the synchronous and asynchronous serial line interface of V35/V24 pattern be one be in daily use, very general data communication interface.Be equipped with of the extensive use of the equipment of synchronous and asynchronous serial line interface along with market; The requirement of user's application scenarios docking port stability, reliability is more and more higher; It is the link of critical very that the synchronous and asynchronous serial line interface that for example connects terminal equipments such as data service terminal, ATM, test of its quality of hardware and production detect.
Present typical hardware method of testing to synchronous and asynchronous serial line interface; A kind of be adopt that the synchronous and asynchronous serial line interface test splice carry loopback is connected with the synchronous and asynchronous serial line interface of equipment under test method of testing; Be about to each signal in the synchronous and asynchronous serial line interface carries loopback through the outside synchronous and asynchronous serial line interface test splice and form loopback at synchronous and asynchronous serial line interface place, detect the connectedness of interface hardware signal through the synchronous and asynchronous serial line interface transceive data of control equipment under test.When equipment under test is DTE equipment; Its serial V24 interface is 25 pins; For serial V35 interface is 34 pins, and the so corresponding synchronous and asynchronous serial line interface test splice that carries loopback that connects then is respectively 25 holes or 34 holes, and this test splice has the circuit that interface signal is carried out loopback in addition.When equipment under test was dce device, the said synchronous and asynchronous serial line interface test splice that carries loopback then was corresponding syringe needle, specifically repeats no more.In this method of testing; If have adhesion or fault between each holding wire of serial interface module, as: XCLK, RCLK, TCLK holding wire are sticked together, and all can't detect; Comprehensive and validity testing result that detects is relatively poor, and in the location difficulty of back problem that breaks down.
Another kind method is through two equipment or interface cards that are equipped with synchronous and asynchronous serial line interface, and the pairing simulation is transmitted the mode of data stability, the connectedness of hardware signal are tested.In this method of testing; Data test is sent in two synchronous and asynchronous serial line interface pairings; The judgement of each signal detecting result is not directly perceived in the docking port; Be difficult to the quality and the stability of decision signal; And method of testing underaction; Testing cost is higher, is not suitable for being applied in the detection of product lot quantity production phase.
Relatively poor based on above existing method of testing test intuitive, breaking down is difficult to the location, detects comprehensive inadequately or the like limitation; Cause stability, the reliability of synchronous and asynchronous serial line interface very poor; The difficult quality guarantee of product; Directly have influence on the client and use, adopt the detection method of low cost, high efficiency, comprehensive, validity, intuitive to become a kind of urgent demand so.
Summary of the invention
The object of the invention is exactly to overcome that the hardware testing mode intuitive of synchronous and asynchronous serial line interface in the present communication equipment is relatively poor, breaking down is difficult to locate and detect the shortcoming that comprehensively causes product quality to be difficult to guarantee inadequately, and a kind of synchronous and asynchronous serial line interface hardware testing device and method is provided.
The present invention solves its technical problem; The technical scheme that adopts is; Synchronous and asynchronous serial line interface hardware testing device; It is characterized in that; Comprise the first synchronous and asynchronous serial line interface; The second synchronous and asynchronous serial line interface; Carry the synchronous and asynchronous serial line interface test splice of loopback; Signal deteching circuit and state display module; The said first synchronous and asynchronous serial line interface is connected with the synchronous and asynchronous serial line interface of equipment under test; The second synchronous and asynchronous serial line interface respectively with the first synchronous and asynchronous serial line interface; The synchronous and asynchronous serial line interface test splice that carries loopback connects, and signal deteching circuit is connected with the first synchronous and asynchronous serial line interface and state display module respectively;
The said first synchronous and asynchronous serial line interface is used for being connected with the synchronous and asynchronous serial line interface of equipment under test, and all serial line interface signals are drawn to the signal deteching circuit and the second synchronous and asynchronous serial line interface;
Said signal deteching circuit is used for detecting all signals of being introduced by the first synchronous and asynchronous serial line interface, judges the level range of each signal, and through testing result state of a control display module;
Said state display module is used for showing according to the testing result of signal deteching circuit the corresponding state of detection signal;
The said synchronous and asynchronous serial line interface test splice that carries loopback is used for all the signal loopbacks from the second synchronous and asynchronous serial line interface.
Concrete, said signal deteching circuit comprises differential signal detection circuit and single-ended signal testing circuit,
Said differential signal detection circuit is used for detecting all differential signals of judging that the first synchronous and asynchronous serial line interface is drawn, and testing result is shown through the state display module;
Said single-ended signal testing circuit is used for detecting all single-ended signals that synchronous and asynchronous serial line interface is drawn, and testing result is shown through the state display module.
Further, said single-ended signal testing circuit comprises comparator U1, comparator U2, first threshold voltage input end U
H, the second threshold voltage input U
LAnd the single-ended signal input, the normal phase input end of said comparator U1 and first threshold voltage input end U
HConnect, negative-phase input is connected with the normal phase input end of comparator U2, and is connected with the single-ended signal input, the negative-phase input of comparator U2 and the second threshold voltage input U
LConnect, the output of the output of comparator U1 and comparator U2 is connected with the state display module respectively.
Further again, said differential signal detection circuit comprises amplifier module, window comparator module and differential signal driver module;
Between being used for getting the differential signal of input wherein, said amplifier module is transferred to the differential signal driver module after magnitude of voltage and the amplification;
Said comparator module is used for the differential signal of input and the threshold voltage value of setting are compared, and comparative result is transferred to the differential signal driver module;
Said differential signal driver module is used for carrying out the state demonstration according to the comparative result of input and intermediate voltage value state of a control display module.
Concrete; Said amplifier module comprises input, the amplifier U4 of magnitude of voltage between differential signal pair; Said amplifier U4 amplifies the voltage median of differential signal, after the dividing potential drop of output through two diode D1, diode D2, forms two threshold voltage U
H1, U
L1
Said window comparator module comprises comparator U5, comparator U6, first threshold voltage input end R
H, the second threshold voltage input R
LAnd differential signal intermediate voltage value input; The normal phase input end of said comparator U5 is connected with first threshold voltage input end RH; Negative-phase input is connected with the normal phase input end of comparator U6; And be connected the negative-phase input of comparator U6 and the second threshold voltage input U with differential signal intermediate voltage value input
LConnect, the Enable Pin that the output of the output of comparator U1 and comparator U2 is connected to the differential signal driver module connects;
Said differential signal driver module comprises the output of the right input of original differential signal, window comparator, two threshold voltage U that amplifier U4 output forms
H1, U
L1
Concrete, said synchronous and asynchronous serial line interface comprises V35 interface and V24 interface.
Another object of the present invention provides a kind of synchronous and asynchronous serial line interface hardware testing method, it is characterized in that, may further comprise the steps:
A. the synchronous and asynchronous serial line interface with equipment under test is connected with the first synchronous and asynchronous serial line interface of hardware testing device, and equipment under test powers on;
B. test console sends test command to equipment under test, and equipment under test sends test packet in its synchronous and asynchronous serial line interface;
C. first of the hardware testing device synchronous and asynchronous serial line interface is drawn all signals and is transferred to signal deteching circuit, and signal deteching circuit detects these all signals, judges the level range of each signal, and shows through testing result state of a control display module;
D. behind the said test packet process hardware testing device loopback, turn back to equipment under test;
What e. equipment under test will be received compares through the test packet of loopback and the test packet that sends before, and judged result is fed back to test console.
Further, among the said step c, the state display module adopts indicator light to carry out the demonstration of synchronous and asynchronous serial line interface signal condition.
Further; In the said steps d; Be meant that said test packet sends to the second synchronous and asynchronous serial line interface through the first synchronous and asynchronous serial line interface of hardware testing device behind the said test packet process hardware testing device loopback, and through carrying the synchronous and asynchronous serial line interface test splice loopback of loopback.
Further, among the said step e, judge that it is to judge that test packet has or not packet loss and has or not error message in above-mentioned transmission course that test packet has or not error of transmission in above-mentioned transmission course.
The invention has the beneficial effects as follows; Through above-mentioned synchronous and asynchronous serial line interface hardware testing device and method; The level, quality, stability, the amplitude that reflect each signal through the state display module very intuitively; And owing to adopt the synchronous and asynchronous serial line interface test splice that carries loopback; In conjunction with test packet, improved the reliability of product test and comprehensive greatly.
Description of drawings
Fig. 1 is the structured flowchart of the present invention system when testing.
Fig. 2 is the synchronous and asynchronous serial line interface hardware testing of a present invention apparatus structure block diagram.
Fig. 3 is the structured flowchart of synchronous and asynchronous serial line interface hardware testing device signal deteching circuit in the embodiment of the invention.
Fig. 4 is the structure chart of single-ended signal testing circuit in the synchronous and asynchronous serial line interface hardware testing device in the embodiment of the invention.
Fig. 5 is the structure chart of differential signal detection circuit in the synchronous and asynchronous serial line interface hardware testing device in the embodiment of the invention.
Fig. 6 is the synchronous and asynchronous serial line interface hardware testing of a present invention method flow diagram.
Embodiment
Below in conjunction with embodiment and accompanying drawing, describe technical scheme of the present invention in detail.
The structured flowchart of system was referring to Fig. 1 when the present invention tested, and the synchronous and asynchronous serial line interface hardware testing of the present invention apparatus structure block diagram is referring to Fig. 2.Synchronous and asynchronous serial line interface hardware testing device of the present invention comprises the first synchronous and asynchronous serial line interface; The second synchronous and asynchronous serial line interface; Carry synchronous and asynchronous serial line interface test splice, signal deteching circuit and the state display module of loopback; The said first synchronous and asynchronous serial line interface is connected with the synchronous and asynchronous serial line interface of equipment under test; The second synchronous and asynchronous serial line interface is connected with the first synchronous and asynchronous serial line interface, the synchronous and asynchronous serial line interface test splice that carries loopback respectively; Signal deteching circuit is connected with the first synchronous and asynchronous serial line interface respectively, and the state display module connects; The said first synchronous and asynchronous serial line interface is used for being connected with the synchronous and asynchronous serial line interface of equipment under test, and all serial line interface signals are drawn to the signal deteching circuit and the second synchronous and asynchronous serial line interface; Said signal deteching circuit is used for detecting all signals of being introduced by synchronous and asynchronous serial line interface, judges the level range of each signal, and through testing result state of a control display module; Said state display module is used for showing according to the testing result of signal deteching circuit the corresponding state of detection signal; The said synchronous and asynchronous serial line interface test splice that carries loopback is used for all the signal loopbacks from the second synchronous and asynchronous serial line interface.
In the synchronous and asynchronous serial line interface hardware testing of the present invention method; At first the synchronous and asynchronous serial line interface with equipment under test is connected with the first synchronous and asynchronous serial line interface of the synchronous and asynchronous serial line interface hardware testing of the present invention device; Equipment under test powers on; Send test packet by test console control equipment under test; The processor of equipment under test makes up test packet and sends in its synchronous and asynchronous serial line interface; The first synchronous and asynchronous serial line interface of synchronous and asynchronous then serial line interface hardware testing device is drawn all signals and is transferred to signal deteching circuit; Signal deteching circuit detects these all signals; Judge the level range of each signal; And show by judged result state of a control display module; Simultaneously because the first synchronous and asynchronous serial line interface of the test packet that the processor of equipment under test makes up by synchronous and asynchronous serial line interface hardware testing device sends to the second synchronous and asynchronous serial line interface; And through after carrying the synchronous and asynchronous serial line interface test splice loopback of loopback; Get back to equipment to be tested; The processor of equipment under test with its with make up the test packet send before and compare; Judge that test packet has or not error of transmission in above-mentioned transmission course, and judged result is fed back to test console.
Embodiment
Like Fig. 3 is the structured flowchart of synchronous and asynchronous serial line interface hardware testing device signal deteching circuit in the embodiment of the invention.Signal deteching circuit in its synchronous and asynchronous serial line interface hardware testing device comprises differential signal detection circuit and single-ended signal testing circuit; Said differential signal detection circuit is used for detecting all differential signals of judging that the first synchronous and asynchronous serial line interface is drawn, and through testing result state of a control display module; Said single-ended signal testing circuit is used for detecting all single-ended signals of judging that synchronous and asynchronous serial line interface is drawn, and through testing result state of a control display module.
The structured flowchart of the single-ended signal testing circuit of synchronous and asynchronous serial line interface hardware testing device is referring to Fig. 4, and the structured flowchart of its differential signal detection circuit is referring to Fig. 5.In the synchronous and asynchronous serial line interface hardware testing device of present embodiment, signal deteching circuit is used for detecting all signals of being introduced by synchronous and asynchronous serial line interface, judges the level range of each signal, and shows testing result through the state display module; The state display module is used for the corresponding state according to the control shows signal of signal deteching circuit, and it can adopt indicator light, like LED light; Hoop plug-back head is used for all the signal loopbacks with synchronous and asynchronous serial line interface.
Signal deteching circuit is made up of differential signal detection circuit and single-ended signal testing circuit; Differential signal detection circuit is used for detecting the differential signal of judging synchronous and asynchronous serial line interface (like the V35 pattern); And through judged result state of a control display module; The single-ended signal testing circuit is used for detecting the single-ended signal of judging that synchronous and asynchronous serial line interface is drawn, and through judged result state of a control display module.Wherein the single-ended signal detection circuit is set with two threshold voltage window comparator, the window comparator by the comparator U1-inverting input terminal of the first threshold voltage input terminal U
H connection, the negative phase input terminal of the comparator U2 is connected to the positive phase input terminal and the input terminal of a single-ended signal, the comparator U2 is negative phase input terminal of the second threshold voltage input terminal U
L connector, the output of comparator U1 and the output of comparator U2, respectively, and status display module connected components; signal detection circuit includes a differential amplifier module, a differential signal comparison module and drive module, amplifier module the differential signal for the input voltage value whichever is larger intermediate differential signal transmitted to the drive module, the comparator module is used to set the input signal and the differential voltage is compared to a threshold, and the comparison result transmitted to the differential signal drive module, the differential signal drive module is used for the comparison result and the input voltage value of the intermediate control status display module for status display, the specific structure can be determined as a window comparator is an intermediate voltage value of the differential signal is within the set threshold voltage of the two R
H , R
L between, giving the differential signal drive module enable input brought in a level, the state level control the differential signal drive module is enabled, the driver module to output a differential signal status to the status display module; original differential signal output of the amplifier are formed with two threshold voltages U
H1 , U
L1 driver module by comparing the differential signal, the comparison are output to the status display module, the status of the status display module determines the differential signal voltage range, signal quality, stable sex.
The synchronous and asynchronous serial line interface hardware testing method of the embodiment of the invention, concrete steps are following:
A. the synchronous and asynchronous serial line interface with equipment under test is connected with the first synchronous and asynchronous serial line interface of hardware testing device, and equipment under test powers on;
B. test console sends test command to equipment under test, and equipment under test sends test packet in its synchronous and asynchronous serial line interface;
C. first of the hardware testing device synchronous and asynchronous serial line interface is drawn all signals and is transferred to signal deteching circuit, and signal deteching circuit detects these all signals, judges the level range of each signal, and shows through testing result state of a control display module.The state display module adopts indicator light to carry out the demonstration of synchronous and asynchronous serial line interface signal condition in this step.
D. behind the said test packet process hardware testing device loopback, turn back to equipment under test.In this step; Be meant behind the said test packet process hardware testing device loopback; Said test packet sends to the second synchronous and asynchronous serial line interface through the first synchronous and asynchronous serial line interface of hardware testing device, and through carrying the synchronous and asynchronous serial line interface test splice loopback of loopback.
What e. equipment under test will be received compares through the test packet of loopback and the test packet that sends before, and judged result is fed back to test console.In this step, judge that it is to judge that test packet has or not packet loss and has or not error message in above-mentioned transmission course that test packet has or not error of transmission in above-mentioned transmission course.
Synchronous and asynchronous serial line interface among the present invention can be V35 interface or V24 interface.
Claims (10)
1. synchronous and asynchronous serial line interface hardware testing device; Be used to connect the synchronous and asynchronous serial line interface of V35/V24 of equipment to be tested; It is characterized in that; Said device comprises the first synchronous and asynchronous serial line interface; The second synchronous and asynchronous serial line interface; Carry the synchronous and asynchronous serial line interface test splice of loopback; Signal deteching circuit and state display module; The said first synchronous and asynchronous serial line interface is connected with the synchronous and asynchronous serial line interface of equipment under test; The second synchronous and asynchronous serial line interface respectively with the first synchronous and asynchronous serial line interface; The synchronous and asynchronous serial line interface test splice that carries loopback connects, and signal deteching circuit is connected with the first synchronous and asynchronous serial line interface and state display module respectively;
The said first synchronous and asynchronous serial line interface is used for being connected with the synchronous and asynchronous serial line interface of equipment under test, and all serial line interface signals are drawn to the signal deteching circuit and the second synchronous and asynchronous serial line interface;
Said signal deteching circuit is used for detecting all signals of being introduced by the first synchronous and asynchronous serial line interface, judges the level range of each signal, and through testing result state of a control display module;
Said state display module is used for showing according to the testing result of signal deteching circuit the corresponding state of detection signal;
The said synchronous and asynchronous serial line interface test splice that carries loopback is used for all the signal loopbacks from the second synchronous and asynchronous serial line interface.
2. testing apparatus as claimed in claim 1 is characterized in that, said signal deteching circuit comprises differential signal detection circuit and single-ended signal testing circuit,
Said differential signal detection circuit is used for detecting all differential signals of judging that the first synchronous and asynchronous serial line interface is drawn, and testing result is shown through the state display module;
Said single-ended signal testing circuit is used for detecting all single-ended signals that synchronous and asynchronous serial line interface is drawn, and testing result is shown through the state display module.
3. testing apparatus as claimed in claim 2 is characterized in that, said single-ended signal testing circuit comprises comparator (U1), comparator (U2), first threshold voltage input end (U
H), the second threshold voltage input (U
L) and the single-ended signal input, the normal phase input end of said comparator (U1) and first threshold voltage input end (U
H) connect, negative-phase input is connected with the normal phase input end of comparator (U2), and is connected with the single-ended signal input, the negative-phase input of comparator (U2) and the second threshold voltage input (U
L) connect, the output of the output of comparator (U1) and comparator (U2) is connected with the state display module respectively.
4. like claim 1 or 2 or 3 described testing apparatuss, it is characterized in that said differential signal detection circuit comprises amplifier module, window comparator module and differential signal driver module;
Between being used for getting the differential signal of input wherein, said amplifier module is transferred to the differential signal driver module after magnitude of voltage and the amplification;
Said comparator module is used for the differential signal of input and the threshold voltage value of setting are compared, and comparative result is transferred to the differential signal driver module;
Said differential signal driver module is used for carrying out the state demonstration according to the comparative result of input and intermediate voltage value state of a control display module.
5. testing apparatus as claimed in claim 4; It is characterized in that; Said amplifier module comprises input, the amplifier (U4) of magnitude of voltage between differential signal pair; Said amplifier (U4) amplifies the voltage median of differential signal; After the dividing potential drop of output through two diodes (D1), diode (D2), form two threshold voltage (U
H1), (U
L1);
Said window comparator module comprises comparator (U5), comparator (U6), first threshold voltage input end (R
H), the second threshold voltage input (R
L) and differential signal intermediate voltage value input, the normal phase input end of said comparator (U5) and first threshold voltage input end (R
H) connect, negative-phase input is connected with the normal phase input end of comparator (U6), and is connected with differential signal intermediate voltage value input, the negative-phase input of comparator (U6) and the second threshold voltage input (U
L) connect, the Enable Pin that the output of the output of comparator (U1) and comparator (U2) is connected to the differential signal driver module connects;
Said differential signal driver module comprises the output of the right input of original differential signal, window comparator, two threshold voltage (U that amplifier (U4) output forms
H1, U
L1).
6. testing apparatus as claimed in claim 5 is characterized in that, said synchronous and asynchronous serial line interface comprises V35 interface and V24 interface.
7. synchronous and asynchronous serial line interface hardware testing method is characterized in that,, may further comprise the steps:
A. the synchronous and asynchronous serial line interface with equipment under test is connected with the first synchronous and asynchronous serial line interface of hardware testing device, and equipment under test powers on;
B. test console sends test command to equipment under test, and equipment under test sends test packet in its synchronous and asynchronous serial line interface;
C. first of the hardware testing device synchronous and asynchronous serial line interface is drawn all signals and is transferred to signal deteching circuit, and signal deteching circuit detects these all signals, judges the level range of each signal, and shows through testing result state of a control display module;
D. behind the said test packet process hardware testing device loopback, turn back to equipment under test;
What e. equipment under test will be received compares through the test packet of loopback and the test packet that sends before, and judged result is fed back to test console.
8. method of testing as claimed in claim 7 is characterized in that, among the said step c, the state display module adopts indicator light to carry out the demonstration of synchronous and asynchronous serial line interface signal condition.
9. method of testing as claimed in claim 7; It is characterized in that; In the said steps d; Be meant behind the said test packet process hardware testing device loopback; Said test packet sends to the second synchronous and asynchronous serial line interface through the first synchronous and asynchronous serial line interface of hardware testing device, and through carrying the synchronous and asynchronous serial line interface test splice loopback of loopback.
10. according to each described method of testing of claim 7-9, it is characterized in that, among the said step e, judge that it is to judge that test packet has or not packet loss and has or not error message in above-mentioned transmission course that test packet has or not error of transmission in above-mentioned transmission course.
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